Electronic fuse configuration method and vehicle

Abstract

The application provides an electronic fuse configuration method and a vehicle; the method comprises the following steps: outputting a preset charging voltage through an electronic fuse, performing multiple constant voltage charging on a capacitive load connected to an output end of the electronic fuse, and acquiring charging parameters in each charging process; calculating a single capacitance value according to each charging parameter and taking an average value to obtain an estimated capacitance value of the capacitive load; selecting target CCM parameters from a preset CCM parameter table according to a comparison result of the estimated capacitance value and a preset load level threshold; writing the target CCM parameters into the electronic fuse, and controlling the electronic fuse to enter a CCM mode. The application realizes online identification of the capacitive load before eFuse starts and adaptive configuration of the CCM parameters, and solves the problem of startup failure caused by mismatch between fixed parameters and loads.

Description

Technical Field

[0001] This application relates to the field of power control technology, and in particular to an electronic fuse configuration method and a vehicle. Background Technology

[0002] As automotive electronic and electrical architecture evolves towards centralized computing and regional control, the low-voltage power distribution system of the vehicle places higher demands on the intelligence and configurability of protection devices. Traditional fuses, due to their slow response speed, fixed protection thresholds, and non-resettable nature, are no longer suitable for the functional safety requirements of intelligent electric vehicles. Electronic fuses (eFuses), with their software-configurable protection parameters, millisecond-level fault response, and repeatable triggering characteristics, are gradually becoming the mainstream overcurrent protection devices in domain controllers and regional power distribution units.

[0003] In real-world vehicle power distribution scenarios, the eFuse output is typically connected to multiple capacitive loads, including ECU input filter capacitors, DC / DC converter front-end capacitors, and wiring harness distributed capacitors. Upon system power-up, these capacitors need to charge rapidly to their rated operating voltage, generating a high-amplitude inrush current. If the eFuse's startup control strategy is mismatched with the current load characteristics, overcurrent protection can easily be triggered during startup, causing abnormal shutdown of the output and resulting in startup failure of the downstream electronic control unit.

[0004] Existing soft-start solutions using continuous conduction mode fix the soft-start parameters after initialization, without adjusting them based on the actual capacitive load size. When the output load capacitance deviates from the preset parameters, the charging inrush current may still exceed the current limiting threshold, causing the eFuse to falsely trigger overcurrent protection and shut down the output during startup, resulting in system startup failure. Therefore, how to match the CCM soft-start parameters with the current capacitive load characteristics during the eFuse startup phase to achieve reliable soft-start remains a pressing technical problem in the field of vehicle power distribution. Summary of the Invention

[0005] To address the aforementioned technical problems, this application provides a method and apparatus for configuring electronic fuses that can be adapted to different loads.

[0006] This application provides a method for configuring an electronic fuse, including the following steps: A preset charging voltage is output to the eFuse output terminal, and the capacitive load connected to the eFuse output terminal is charged multiple times under constant voltage to obtain the charging parameters during each charging process. The estimated capacitance value of the capacitive load is obtained by calculating the capacitance value of each charge based on the charging parameters and taking the average value. Based on the comparison result between the estimated capacitance value and the preset load level threshold, the target CCM parameter is selected from the preset CCM parameter table; The target CCM parameters are written into the eFuse, and the eFuse is controlled to enter CCM mode to complete the output startup.

[0007] Preferably, the present invention also provides a vehicle, including a processor, a memory, an on-board power supply, a capacitive load, and an electronic fuse connected between the on-board power supply and the capacitive load, the fuse being connected to and controlled by the processor, the memory being coupled to the processor, the memory being used to store computer program code, the computer program code including computer instructions; characterized in that, when the processor reads the computer instructions from the memory, the vehicle performs the method described above.

[0008] The beneficial effects of this invention are as follows: On the one hand, by performing constant voltage charging on the output of eFuse multiple times before startup and averaging the capacitance value based on the characteristics of the RC circuit, online quantitative identification of the connected capacitive load is achieved, enabling eFuse to make pre-start predictions based on the actual load scale rather than fixed empirical values, fundamentally eliminating the problem of blind parameter setting caused by unknown load.

[0009] On the other hand, by comparing the estimated capacitance value with the preset load level threshold and selecting the appropriate target CCM parameters by looking up the table, a mapping relationship between the capacitive load scale and the CCM soft start strategy is established. This enables key parameters such as the PWM period, precharge time and voltage threshold of the continuous conduction mode to be dynamically adjusted according to the load characteristics, achieving an adaptive balance between suppressing power-on surges and avoiding overcurrent false triggering, and significantly improving the start-up success rate under different capacitive load scenarios.

[0010] On the other hand, the entire configuration process relies solely on constant voltage charging and lookup table matching, eliminating the need to run complex adaptive algorithms or iterative learning models in the eFuse or main control chip. This achieves load-adaptive soft-start while maintaining extremely low computational resource consumption and implementation costs. Attached Figure Description

[0011] Figure 1 This is a flowchart of the electronic fuse configuration method described in this application.

[0012] Figure 2 This is a diagram illustrating the architecture of a vehicle electronic fuse configuration system according to an embodiment of this application.

[0013] Figure 3 This is the startup waveform diagram when the eFuse output terminal is connected to a 300μF capacitive load in the embodiment of this application.

[0014] Figure 4 This is the startup waveform diagram when the eFuse output terminal is connected to a 1000μF capacitive load in the embodiment of this application.

[0015] Figure 5 This is the startup waveform diagram when the eFuse output terminal is connected to a 3000μF capacitive load in the embodiment of this application.

[0016] Figure 6 This is the startup waveform diagram when the eFuse output terminal is connected to a 4400μF capacitive load in the embodiment of this application. Detailed Implementation

[0017] The technical method of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0018] Furthermore, the accompanying drawings are merely illustrative of the invention and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor methods and / or microcontroller methods.

[0019] It should be understood that although the terms "first," "second," etc., may be used herein to describe various units, these units should not be limited by these terms. These terms are used merely to distinguish one unit from another. For example, without departing from the scope of the exemplary embodiments, a first unit may be referred to as a second unit, and similarly, a second unit may be referred to as a first unit. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0020] In this case, Figure 2The overall architecture of a vehicle electronic fuse configuration system 100 provided in this application embodiment is shown. The system includes an on-board power supply 101, an electronic fuse 102 (eFuse), a capacitive load 103, a processor 104, a memory 105, an SPI communication bus 106, and an ADC sampling module 107. The on-board power supply 101 supplies power to the capacitive load 103 through the electronic fuse 102; the processor 104 is connected to the electronic fuse 102 through the SPI communication bus 106 to read and write CCM parameters; the ADC sampling module 107 samples the voltage and current at the output of the electronic fuse 102 in real time and sends the sampled data back to the processor 104; the memory 105 contains a pre-programmed CCM parameter table, which the processor 104 looks up and calls after estimating the capacitive load.

[0021] It should be noted that, Figure 2 The system architecture shown is merely an exemplary implementation of this application and is not intended to limit the scope of protection of this application. Those skilled in the art should understand that the specific chip model of the electronic fuse 102 (such as VNF1248 or other eFuse devices with configurable soft-start function), the specific type of the processor 104 (such as MCU, DSP, FPGA, or SoC), the specific medium of the memory 105 (such as Flash, EEPROM, or SRAM), the specific protocol of the communication bus 106 (such as SPI, I2C, UART, or CAN), and the specific implementation of the ADC sampling module 107 (such as an analog-to-digital converter integrated within the eFuse or an external independent sampling circuit) can all be adaptively replaced according to the hardware resources and interface conditions of the actual vehicle power distribution system without affecting the essence of the technical solution of this application. As long as the system possesses the core function of configuring parameters of the eFuse through the communication interface and obtaining charging parameters through voltage / current sampling to estimate capacitive load, it should fall within the scope of protection of this application.

[0022] To achieve the above objectives, please refer to Figures 1 to 6 This invention provides a method for configuring an electronic fuse, which mainly includes the following steps: S100: Output a preset charging voltage to the eFuse output terminal, perform constant voltage charging on the capacitive load connected to the eFuse output terminal multiple times, and obtain the charging parameters during each charging process.

[0023] S200: Calculate the single capacitance value based on the charging parameters for each charge and take the average value to obtain the estimated capacitance value of the capacitive load.

[0024] S300: Based on the comparison result between the estimated capacitance value and the preset load level threshold, select the target CCM parameter from the preset CCM parameter table.

[0025] CCM stands for Capacitive Charging Mode, a working state specifically designed to solve the problem of power surge in electronic systems. In this mode, the capacitor in the capacitive load is slowly charged by a controlled, constant current, thereby effectively limiting the surge current at startup.

[0026] S400: Write the target CCM parameters into the eFuse and control the eFuse to enter CCM mode to complete the output start-up.

[0027] Preferably, the charging parameters include the initial voltage at the output terminal before charging, the actual voltage at the output terminal after charging, the charging time, and the charging output current.

[0028] In some embodiments, the initial output voltage before charging refers to the current output voltage to ground value sampled by the analog-to-digital converter (ADC) configured at the eFuse output or via SPI communication at the start of a single constant-voltage charging cycle, denoted as... The actual output voltage after charging refers to the voltage value of the eFuse output to ground sampled again through the same analog-to-digital converter or SPI communication after a preset fixed duration of constant voltage charging. This value is denoted as... This voltage value characterizes the actual charging response of the internal load over a fixed charging time. The charging time refers to the duration of a single constant-voltage charging cycle, denoted as... The charging output current refers to the average output current provided by the eFuse to the output terminal during the constant voltage charging phase, denoted as . The charging output current is used to calculate the equivalent resistance of the capacitive load. Then, the single capacitance value is calculated by combining the charging voltage difference and the charging time.

[0029] It should be noted that due to the presence of harness impedance and eFuse on-resistance, the charging output current may have a momentary spike in the early stage of charging. Therefore, the average current value during the charging stage is used as the calculation input.

[0030] Preferably, the step S200, which calculates the single-charge capacitance value based on the charging parameters for each charge, includes steps S201-S206.

[0031] S201: Obtain the charging voltage difference based on the difference between the actual voltage at the output terminal after charging and the initial voltage at the output terminal before charging.

[0032] In some embodiments, step S201 refers to eliminating the interference of residual voltage at the output terminal on the quantitative evaluation of capacitive load charging response through differential operation within an independent constant voltage charging cycle, thereby extracting the net voltage increment contributed solely by this constant voltage charging.

[0033] S202: Obtain the equivalent resistance of the capacitive load based on the preset charging voltage and the charging output current; calculate the single-cycle capacitance value based on the equivalent resistance, the charging time, and the charging voltage difference, using the charging characteristics of an RC series circuit.

[0034] In some embodiments, step S202 refers to, based on the completion of the charging voltage difference extraction, further using the electrical measurable parameters of the constant voltage charging stage to determine the total equivalent impedance of the output circuit, and based on the transient response law of the RC series circuit under constant voltage excitation, converting the sampling data of the voltage domain and current domain into the quantitative estimation result of the capacitance domain, thereby obtaining the capacitance value of the internal load in a single constant voltage charging cycle.

[0035] In some embodiments, obtaining the equivalent resistance of the capacitive load based on the preset charging voltage and the charging output current means that during the constant voltage charging phase, the voltage regulation loop inside the eFuse clamps the output voltage to the preset charging voltage. At this time, the current flowing through the output circuit is determined by the impedance characteristics of the entire circuit and the real-time charging state of the capacitive load. Since the voltage across the capacitive load continuously rises during charging, and the circuit current exhibits an exponential decay trend, the average output current over the entire charging period is used as the steady-state estimation basis. According to a variation of Ohm's law, the equivalent resistance of the capacitive load... equal to the preset charging voltage With charging output current The ratio of .

[0036] In some embodiments, calculating the single-cycle capacitance value based on the equivalent resistance, the charging time, and the charging voltage difference, according to the charging characteristics of an RC series circuit, refers to using the aforementioned equivalent resistance... Charging time and the charging voltage difference obtained in step S201 Using the charging response characteristics of an RC series circuit under constant voltage excitation as input parameters, the capacitance value of the capacitive load is calculated by reverse calculation. The charging process of the RC series circuit under constant voltage excitation follows an exponential voltage rise law. Considering that there is often residual voltage at the output terminal before charging in actual vehicle scenarios, and that step S201 has eliminated the influence of residual voltage on the net voltage increment through difference calculation, it is necessary to establish a reverse calculation model based on the complete charging response relationship to ensure that the calculation accuracy of the single capacitance value is not affected by residual charge.

[0037] Specifically, under constant voltage charging conditions, the capacitive load outputs an initial voltage before charging. Initially, after charging time Afterwards, its voltage rises to the actual output voltage after charging. The voltage increment is the charging voltage difference. The above parameters and the loop time constant satisfy the following relationship: ; In the formula, Preset charging voltage; This is the initial voltage at the output terminal before charging. Equivalent resistance; Let be the capacitance value in a single operation; e is the natural constant. Simplifying the above relationship, we can obtain the solution for the capacitance value in a single operation. Explicit expression: ; Or equivalently written as: ; In the formula, This represents the natural logarithm. The physical meaning of this formula is: given the equivalent resistance and charging time, the single-charge capacitance value is directly proportional to the charging time and inversely proportional to the equivalent resistance and the logarithmic term. When the capacitive load is large, the voltage increment over a fixed charging time... When the capacitance is small, the logarithmic term decreases accordingly, and the single-phase capacitance value increases accordingly; conversely, when the capacitive load is small, As the logarithmic term increases, the single capacitance value decreases accordingly.

[0038] S203: During the constant voltage charging process, the first output voltage and the second output voltage are acquired at the first sampling time and the second sampling time, respectively.

[0039] In some embodiments, the first sampling time refers to the intermediate voltage sampling time point that is first triggered according to the preset timing logic within a single constant voltage charging phase, denoted as... The selection of this moment must satisfy three constraints: firstly, It should be greater than the delay time from the issuance of the charging command to the stable response of the output voltage, in order to avoid the voltage oscillation and electromagnetic interference window at the moment the internal power switch of the eFuse turns on; secondly, The sampling point should be significantly earlier than the end of charging to ensure that it is in the middle of the exponential charging curve of the capacitor, rather than in the saturation region, thus preserving a sufficient voltage change gradient; thirdly, A sufficient time interval must be maintained between the sampling time and the second sampling time to ensure that the voltage difference between the two sampling points is greater than the minimum effective quantization step of the analog-to-digital converter, thus guaranteeing the numerical stability of the subsequent equation solution. For example, during the total charging time... Within a 20μs constant voltage charging cycle, the first sampling time can be... The setting is 5μs, which avoids the first 2μs of the switching transient process and also provides a sufficient time of 15μs before the end of charging.

[0040] In some embodiments, the second sampling time refers to another intermediate voltage sampling time point triggered later than the first sampling time according to a preset timing logic within a single constant voltage charging phase, denoted as […]. Second sampling time The selection of [the data] also follows the above constraints and must ensure that it is consistent with the first sampling time. A identifiable voltage drop is formed between them. In engineering practice, Typically, the sampling time is selected between 60% and 80% of the total charging time to balance the requirements of voltage change rate and distance from the saturation region at the end of charging. For example, within a total charging time of 20 μs, the second sampling time can be... Set to 15μs, this is the same as the first sampling time. A fixed sampling interval of 10μs is formed between (5μs). This interval corresponds to a voltage difference of several hundred millivolts to several volts in a 14V vehicle power distribution scenario, which is sufficient to be effectively distinguished by a conventional 10-bit or 12-bit analog-to-digital converter.

[0041] In some embodiments, the first output voltage refers to the voltage at the first sampling time. The voltage value between the eFuse output and ground, which is configured by the analog-to-digital converter or sampled via the Serial Peripheral Interface (SPI), is denoted as... The second output voltage refers to the voltage at the second sampling time. The voltage value of the eFuse output terminal to ground sampled through the same analog-to-digital converter channel or the same SPI register address is denoted as... .

[0042] S204: Based on the first sampling time, the second sampling time, the first output voltage, the second output voltage, and the preset charging voltage, the RC time constant is obtained by solving the charging equations of the RC series circuit.

[0043] In some embodiments, step S204 refers to establishing a two-equation simultaneous model of the voltage sampling values ​​at two different times based on the obtained voltage data at two intermediate sampling points, utilizing the exponential charging response law of the RC series circuit under constant voltage excitation. The intermediate variable of the initial output voltage before charging is eliminated through elimination operations, thereby directly solving for the RC time constant determined solely by the inherent characteristics of the circuit. This RC time constant serves as a comprehensive characterization of the capacitive load and the equivalent resistance.

[0044] In some embodiments, the RC time constant refers to the product of the capacitance and resistance values ​​in the RC series circuit, denoted as . Alternatively, it can be expressed as RC. This time constant characterizes the time required for the voltage of a capacitive load to rise to 63.2% of the difference between the preset charging voltage and the initial output voltage before charging under constant voltage charging conditions. It is the only characteristic parameter for measuring the charging and discharging response speed of the circuit. For a specific eFuse output circuit, as long as the size of the capacitive load and the equivalent resistance of the circuit do not change, the RC time constant remains constant and is independent of the magnitude of the initial output voltage before charging. Therefore, by solving for the RC time constant using voltage sampling values ​​at two different times, the interference of residual voltage fluctuations before charging on the calculation results can be effectively avoided.

[0045] In some embodiments, the process of obtaining the RC time constant based on the charging equations of the RC series circuit specifically refers to using the zero-state response law of the RC series circuit under constant voltage excitation to establish voltage response equations for the first and second sampling times, respectively, and then eliminating the initial voltage at the output terminal before charging by dividing the two equations to obtain an explicit expression containing only the RC time constant. The specific derivation process is as follows: Under constant voltage charging conditions, the exponential response of the voltage across the capacitive load with time is as follows: ; In the formula, The output voltage is given at time t after charging begins; t is the charging duration.

[0046] The first sampling time With the voltage at the first output terminal Substituting into the above equation, we obtain the first equation: ; The second sampling time With the voltage at the second output terminal Substituting into the above equation, we obtain the second equation: ; By rearranging and simplifying the two equations above, we can obtain: ; ; Divide the two equations above to eliminate the unknowns. ,get: ; Taking the natural logarithm of both sides of the above equation and rearranging, we finally obtain the solution for the RC time constant. Explicit calculation formula: ; The physical meaning of this formula is: the RC time constant is equal to the time interval between two sampling moments, divided by the natural logarithm of the ratio of the voltage deviations at the two sampling points. When the capacitive load is large, the voltage rises slowly. and When the ratio approaches 1, the logarithmic term decreases, and the RC time constant increases accordingly. Conversely, when the capacitive load is small, the voltage rises rapidly, the ratio of the two voltage deviations is significantly greater than 1, the logarithmic term increases, and the RC time constant decreases accordingly.

[0047] S205: Calculate the verification capacitor value based on the equivalent resistance and the RC time constant.

[0048] In some embodiments, step S205 refers to using the inherent mathematical relationship between the RC time constant and the equivalent resistance to perform algebraic operations on the loop time constant obtained in step S204 and the loop equivalent resistance calculated in step S202, thereby obtaining an estimated value of the capacitive load capacitance derived solely from the voltage sampling data.

[0049] In some embodiments, the verification capacitance value refers to the estimated value of the capacitive load capacitance obtained by dividing the RC time constant by the equivalent resistance, denoted as . This calculation relationship stems from the fundamental definition of the RC time constant, which states that the time constant equals the product of capacitance and resistance. Through algebraic transformation, the capacitance value can be deduced from the time constant and the equivalent resistance. Specifically, the verification capacitance value equals the RC time constant. The quotient of the equivalent resistance.

[0050] S206: Determine whether the deviation between the single capacitance value and the verification capacitance value is less than a preset deviation threshold; if not, correct the single capacitance value according to the verification capacitance value.

[0051] In some embodiments, step S206 refers to performing a consistency check on the single capacitance value calculated based on the current sampling path and the verification capacitance value calculated based on the dual voltage sampling path through a numerical comparison mechanism within a single constant voltage charging cycle. When the difference between the estimation results of the two independent physical measurement paths exceeds the allowable boundary, the verification result of the voltage sampling path is automatically used to cover the original result of the current sampling path, thereby shielding the systematic errors caused by abnormal drift of the current detection circuit, temperature drift of the sampling resistor, or offset of the analog-to-digital converter reference voltage, and ensuring that each set of capacitance data entering the multiple average accumulation process has an acceptable level of confidence.

[0052] In some embodiments, the deviation refers to the relative difference between a single capacitance value and a calibration capacitance value, used to quantify the dispersion of estimation results from two independent measurement paths. The deviation is calculated in a relative deviation form, that is, using the calibration capacitance value as a benchmark reference, calculating the percentage deviation of a single capacitance value relative to this calibration benchmark, thereby eliminating the problem of incomparability of absolute differences under different capacitive load scales. Specifically, the deviation... The calculation formula is: ; In the formula, This indicates the relative deviation between the single capacitance value and the calibration capacitance value. This represents the absolute value of the difference between the single capacitance value and the verification capacitance value. The verification capacitance value is used as the denominator because this verification path is based on pure voltage timing sampling, and its numerical stability is generally better than that of the single capacitance value that relies on current sampling in engineering practice. Using this as a benchmark can more sensitively capture abnormal drift in the current sensing link.

[0053] Preferably, the number of constant voltage charging cycles in S100 is a preset fixed number, and the average value of each single capacitance value in S200 includes step S210.

[0054] S210: The single capacitance value calculated from each constant voltage charging cycle is summed and divided by the preset fixed number of times to obtain the estimated capacitance value.

[0055] In some embodiments, step S210 refers to performing an arithmetic average on the final determined capacitance estimation results for each cycle after completing a preset fixed number of independent constant voltage charging cycles.

[0056] In some embodiments, the preset fixed number of times refers to the number of constant voltage charging repetitions pre-set by the main control chip before the eFuse fast configuration process starts, based on system startup timing constraints and capacitive load identification accuracy requirements, denoted as n. The selection of this number needs to strike a balance between estimation accuracy and configuration time: if the number is too small (e.g., only 1 or 2 times), the impact of a single random error on the final result will be too large, resulting in insufficient statistical stability of the estimated capacitance value and potentially leading to misjudgment of the load level; if the number is too large (e.g., more than 10 times), the total time spent on multiple constant voltage charging sessions will be significantly extended, violating the original intention of eFuse fast configuration, and delaying the power supply readiness time of the downstream ECU in vehicle power-on startup scenarios. For example, in a 14V vehicle low-voltage power distribution system, considering the 10-bit or 12-bit quantization accuracy of the analog-to-digital converter, the vehicle electromagnetic environment noise level, and the eFuse startup timing requirements, the preset fixed number of times n can be set to 3 times. This number can effectively suppress random errors through multiple independent samplings while keeping the overall estimation stage time within an acceptable range.

[0057] In some embodiments, the estimated capacitance value refers to the average value obtained by arithmetically summing the individual capacitance values ​​after quality verification and dividing by a preset fixed number of times, denoted as . This estimated capacitance value numerically represents the best linear unbiased estimate of the capacitance of a capacitive load under multiple independent measurements, and its statistical variance decreases inversely with the increase of the number of measurements.

[0058] Preferably, the preset CCM parameter table includes multiple load levels and their corresponding CCM parameters, wherein the multiple load levels are divided according to preset load level thresholds; the CCM parameters include PWM control parameters and precharge control parameters.

[0059] In some embodiments, the preset CCM parameter table includes multiple load levels and their corresponding CCM parameters, wherein the multiple load levels are divided according to preset load level thresholds; the CCM parameters include PWM control parameters and precharge control parameters, which refer to a structured discrete mapping table pre-programmed into the non-volatile memory (such as Flash or EEPROM) or eFuse internal register mapping area of ​​the main control chip. This mapping table divides the continuous capacitive load capacitance value range into several discrete load level intervals, and each interval is bound to a complete set of CCM soft-start control parameters. When the estimated capacitance value output in step S210 falls into a certain load level interval, the main control chip can directly call the CCM parameters corresponding to that level by looking up the table index, without having to perform complex online parameter optimization or iterative calculations during the startup phase.

[0060] In some embodiments, the CCM parameter refers to the entire timing and duty cycle configuration used by eFuse to control the output voltage to slowly rise from the off state to the rated operating voltage in Continuous Conduction Mode (CCM).

[0061] The PWM control parameters refer to the pulse width modulation parameters used to control the high-frequency switching behavior of the internal power switch of the eFuse during the standard phase of CCM mode (i.e., after the pre-charge phase is completed, the output voltage has reached the pre-charge phase voltage threshold and switched to normal power supply).

[0062] The pre-charge control parameters refer to all timing and threshold parameters used to control the eFuse to pre-charge the capacitive load in an intermittent switching manner during the pre-charge phase of CCM mode (i.e., the initial startup phase, when the output voltage slowly climbs from zero or the residual voltage). The pre-charge control parameters include at least the following four sub-parameters: (1) The PWM period during the precharge phase is denoted as It refers to the time interval between the eFuse power switch being turned on and off once during the precharge phase, until the start of the next turn-on.

[0063] (2) The maximum number of pulses during the pre-charge phase is denoted as This refers to the maximum number of intermittent switching pulses that eFuse is allowed to execute during the precharge phase.

[0064] (3) The maximum time during the charging phase is denoted as This refers to the maximum allowable time from when the eFuse starts CCM mode until the output voltage is determined to be a startup failure and the output is shut off.

[0065] (4) The voltage threshold during the pre-charge stage, denoted as This refers to the switching voltage between the pre-charge stage and the standard stage.

[0066] Preferably, step S300 involves selecting a target CCM parameter from a preset CCM parameter table based on the comparison result between the estimated capacitance value and the preset load level threshold, including steps S301-S304.

[0067] S301: Compare the estimated capacitance value with the preset load level threshold in the preset CCM parameter table to determine the load level to which the estimated capacitance value belongs.

[0068] In some embodiments, step S301 refers to the process where, after the average value of multiple constant voltage charging is calculated in step S210, the main control chip uses the obtained estimated capacitance value as an input quantity and compares it with the threshold values ​​of each load level defined in the CCM parameter table pre-programmed in the non-volatile memory to determine the range, thereby discretizing the continuous capacitance value range into a certain load level label.

[0069] S302: Determine whether the estimated capacitance value falls within the boundary ambiguity region of two adjacent load levels; wherein the boundary ambiguity region is determined based on the preset load level threshold and preset ambiguity bandwidth corresponding to the two adjacent load levels.

[0070] In some embodiments, step S302 refers to the main control chip further verifying whether the estimated capacitance value is within a sensitive range near the boundary threshold between two adjacent load levels after the hard boundary load level determination in step S301. Since the estimated capacitance value still has residual random errors after multiple sampling and averaging in step S210 (e.g., ±5% to ±10% estimation uncertainty caused by factors such as analog-to-digital converter quantization noise, vehicle electromagnetic interference, and temperature drift of the current detection circuit), if the estimated capacitance value happens to be near the critical point of a preset load level threshold, the hard boundary determination result in step S301 may jump between two adjacent levels due to random fluctuations in sampling noise, leading to discontinuous switching of CCM parameter selection, and consequently causing voltage fluctuations or current surges during the output startup process. By introducing a boundary ambiguity region mechanism, the main control chip can identify the uncertainty range of the estimation result near the critical region and trigger the weighted interpolation fusion process in the subsequent step S303, achieving a smooth transition between CCM parameters of adjacent levels and avoiding sudden changes in control parameters caused by hard threshold jumps.

[0071] In some embodiments, the preset fuzzy bandwidth refers to the half-width of the tolerance interval that is symmetrically extended on both sides of each preset load level threshold, denoted as... This bandwidth characterizes the maximum range of fluctuation that the estimated capacitance value may experience due to measurement uncertainty. Determining its value requires comprehensive consideration of the overall standard deviation of the estimated capacitance value, the impact of changes in the vehicle's ambient temperature on the actual capacitance value (e.g., the temperature coefficient of a ceramic capacitor can cause the actual capacitance value to vary by ±15% within the range of -55℃ to +125℃), and the effective resolution of the main control chip's analog-to-digital converter. If the preset fuzzy bandwidth is set too narrowly (e.g., less than 50% of the estimation standard deviation), most estimated values ​​near the threshold will be misjudged as being outside the fuzzy region, failing to provide a smooth transition. If it is set too wide (e.g., greater than the threshold itself), the fuzzy region will cover the entire load level range, causing all estimated values ​​to enter the interpolation process, thus losing the meaning of discrete level classification. For example, in a 14V vehicle low-voltage power distribution scenario, for a first threshold of 300μF, the preset fuzzy bandwidth can be... The preset fuzzy bandwidth is set to 50 μF; for the second threshold of 1200 μF, the preset fuzzy bandwidth can be set to 150 μF; for the third threshold of 4000 μF, the preset fuzzy bandwidth can be set to 300 μF. The above bandwidth values ​​are approximately 15% to 10% of the corresponding thresholds, which not only cover the main distribution range of the estimation uncertainty, but also retain the clear attribution within the core range of each load level.

[0072] In some embodiments, the boundary ambiguity region refers to a symmetrical interval defined by a preset ambiguity bandwidth on both sides of a preset load level threshold. Specifically, for a boundary threshold of... The preset fuzzy bandwidth is For adjacent load level pairs, the capacitance range of the boundary ambiguity region can be expressed as: This interval represents the uncertainty boundary of the estimated capacitance value: when the estimated capacitance value falls into this interval, the main control chip cannot determine with sufficient confidence whether it belongs to the load level to the left or the right of the threshold. Therefore, a subsequent weighted interpolation mechanism needs to be introduced to fuse the CCM parameters of the two levels according to the relative position of the estimated capacitance value in the fuzzy region in order to obtain a more robust soft-start control strategy.

[0073] In some embodiments, determining whether the estimated capacitance value falls within the boundary ambiguity region of two adjacent load levels means that after the main control chip completes the load level hard boundary determination in step S301, it further compares the estimated capacitance value with the boundary ambiguity region range of the left and right adjacent boundary thresholds corresponding to the current determination level. The specific determination logic is as follows: Identify the load level determined in step S301, and obtain the preset ambiguity bandwidth of the left boundary threshold (if it exists) and the right boundary threshold (if it exists) of that level; calculate the upper limit (i.e., the left threshold plus the ambiguity bandwidth) and the lower limit (i.e., the left threshold minus the ambiguity bandwidth) of the left boundary ambiguity region, and the upper limit and lower limit of the right boundary ambiguity region; determine whether the estimated capacitance value falls within the numerical range of any of the above-mentioned boundary ambiguity regions. If the estimated capacitance value falls into a certain boundary ambiguity region, the main control chip determines that the current estimation result is in a critical uncertain state and triggers the weighted interpolation fusion process in step S303; if the estimated capacitance value does not fall into any boundary ambiguity region (i.e., it is within the core range of a certain load level and far away from all boundary thresholds), the main control chip directly jumps to step S304 and calls the fixed CCM parameters corresponding to the load level determined in step S301, without performing interpolation calculations.

[0074] S303: If so, then obtain the CCM parameters corresponding to the two adjacent load levels as the first candidate parameter and the second candidate parameter, and perform weighted interpolation fusion on the first candidate parameter and the second candidate parameter according to the relative position of the estimated capacitance value in the boundary ambiguity region to obtain the target CCM parameter.

[0075] In some embodiments, step S303 refers to the main control chip abandoning the direct use of fixed CCM parameters for a single load level after determining in step S302 that the estimated capacitance value falls into a certain boundary ambiguity region. Instead, it extracts the complete CCM parameter sets corresponding to the adjacent load levels on the left and right sides of the ambiguity region as candidate sets, calculates linear weight coefficients based on the relative position of the estimated capacitance value in the ambiguity region, and performs a weighted fusion operation on each corresponding sub-parameter in the two candidate parameter sets to generate a set of target CCM parameters for continuous transition.

[0076] In some embodiments, the first candidate parameter refers to the complete set of CCM parameters corresponding to the lower load level (i.e., the side with the smaller capacitance threshold) in the boundary ambiguity region. The second candidate parameter refers to the complete set of CCM parameters corresponding to the higher load level (i.e., the side with the larger capacitance threshold) in the boundary ambiguity region.

[0077] In some embodiments, the relative position of the estimated capacitance value within the boundary ambiguity region refers to the normalized percentage of the estimated capacitance value's approximation from the lower limit to the upper limit of the boundary ambiguity region, denoted as λ. Mathematically, this relative position is defined as the difference between the estimated capacitance value and the lower limit of the boundary ambiguity region, divided by the total bandwidth of the boundary ambiguity region, i.e.: ; In the formula, It represents a relative position and is a dimensionless numerical value, ranging from 0 to 1. This represents the lower limit of the boundary ambiguity zone (i.e., the preset load level threshold corresponding to the lower load level minus the preset ambiguity bandwidth). This represents the upper limit of the boundary ambiguity zone (i.e., the preset load level threshold corresponding to the lower load level plus the preset ambiguity bandwidth). When When the value approaches 0, it indicates that the estimated capacitance value is close to the lower limit of the ambiguity region, and closer to the core range of lower load levels; when When the value approaches 1, it indicates that the estimated capacitance value is close to the upper limit of the ambiguity zone and closer to the core range of higher load levels.

[0078] In some embodiments, the weighted interpolation fusion refers to calculating the weight coefficients of the first candidate parameters based on their relative positions. Weighting coefficients with the second candidate parameter The corresponding sub-parameters in the two candidate parameter sets are linearly weighted and summed to obtain the final values ​​of each sub-parameter in the target CCM parameters. The weighting coefficients satisfy a normalization constraint, i.e. The specific calculation formula is as follows: ; ; For each subparameter P in the CCM parameter set, its target fusion value The calculation formula is: ; In the formula, This represents the value of a sub-parameter in the target CCM parameters; This indicates the value of the corresponding sub-parameter in the first candidate parameter; This represents the value of the corresponding sub-parameter in the second candidate parameter. It should be noted that the above linear weighting formula applies to time-series and threshold parameters with continuous numerical characteristics (such as the PWM period in the pre-charge phase, the maximum number of pulses in the pre-charge phase, the maximum charging time, and the voltage threshold in the pre-charge phase); for parameters that remain constant across adjacent load levels (such as the PWM period in the standard phase, the PWM interval time when the high-side drive is enabled, and the multiplication factor), since... Regardless of how the weighting coefficients are allocated, the fusion result is always equal to this constant value, so it can be directly inherited without performing repeated calculations.

[0079] S304: If not, then retrieve the target CCM parameter corresponding to the determined load level from the preset CCM parameter table.

[0080] Preferably, step S400, in which the target CCM parameter is written into the eFuse, includes step S401.

[0081] S401: Write the target CCM parameters into the corresponding register of the eFuse via the communication protocol.

[0082] In some embodiments, the communication protocol refers to the electrical interface standard and communication frame format followed by the main control chip and the eFuse chip for data exchange. In vehicle-mounted low-voltage power distribution systems, considering that the eFuse is usually integrated as an intelligent high-side switch within a domain controller or regional power distribution unit, a high-speed, low-latency, and interference-resistant short-distance communication link is required between it and the main control microcontroller. Therefore, at least one of the following communication protocols can be used: Serial Peripheral Interface (SPI) protocol, Inter-Integrated Circuit (I2C) protocol, Universal Asynchronous Receiver / Transmitter (UART) protocol, and Controller Area Network (CAN) protocol.

[0083] Preferably, step S400, which controls the eFuse to enter CCM mode, includes steps S411-S416.

[0084] S411: The eFuse reads the written target CCM parameters and enters the pre-charge stage. During the pre-charge stage, it repeatedly switches on and off according to the pre-charge stage PWM period and the maximum number of pulses in the pre-charge stage in the target CCM parameters.

[0085] In some embodiments, step S411 refers to the control state machine integrated inside the eFuse loading the relevant control parameters for the precharge stage from the configuration register group after the target CCM parameters are written and verified in step S401. It switches its own working mode from standby or off state to precharge state, and performs periodic on and off control of the internal high-side power switch according to the loaded timing parameters, so as to precharge the capacitive load at the output end in an intermittent pulse charging manner.

[0086] S412: During the pre-charge phase, the first output terminal voltage and the second output terminal voltage are acquired at the end of two adjacent pulse cycles, respectively; the actual voltage rise slope is calculated based on the first output terminal voltage, the second output terminal voltage and the time interval between adjacent pulse cycles.

[0087] In some embodiments, step S412 refers to using the inherent time boundary of the PWM cycle as a synchronous sampling trigger point during the intermittent switching of the pre-charge phase in the eFuse, capturing the steady-state value of the output voltage at the end of two adjacent switching cycles, and extracting the actual ramp-up rate of the output voltage during the pre-charge phase by using the ratio of the voltage increment at the two moments to the known time interval. This actual voltage ramp-up rate, as a key observation for dynamic feedback control during the pre-charge phase, directly reflects the true charging response speed of the capacitive load driven by the current CCM parameters.

[0088] In some embodiments, the end time of two adjacent pulse cycles refers to the end time of each of two complete PWM switching cycles that are consecutive in time during the precharge phase.

[0089] In some embodiments, the first output voltage refers to the voltage value of the eFuse output terminal to ground sampled by the analog-to-digital converter configured at the output terminal or via the Serial Peripheral Interface (SPI) at the end of the previous cycle in two adjacent pulse cycles, denoted as The second output voltage refers to the voltage value of the eFuse output terminal to ground sampled at the end of the latter cycle of two adjacent pulse cycles, through the same analog-to-digital converter channel or the same SPI register address, denoted as... This voltage value characterizes the further accumulation of charge potential after the capacitive load has undergone an additional full PWM cycle of intermittent charging.

[0090] In some embodiments, the time interval between adjacent pulse periods refers to the precise time difference between the sampling time of the first output voltage and the sampling time of the second output voltage, denoted as . Under ideal timing control during the precharge phase, the eFuse's internal periodic timer counts cyclically with a fixed reload value. Therefore, the time interval between the end of two adjacent cycles is numerically equal to the PWM cycle of the precharge phase.

[0091] In some embodiments, the actual voltage rise slope refers to the average increment of the output voltage per unit time, denoted as . The slope represents the actual ramp-up efficiency of the capacitive load voltage under the current CCM parameters during the precharge phase.

[0092] S413: Calculate the expected average voltage rise slope in the precharge phase based on the precharge phase voltage threshold, the maximum number of pulses in the precharge phase, and the precharge phase PWM period in the target CCM parameters.

[0093] In some embodiments, step S413 refers to deriving a theoretical voltage ramp-up rate benchmark value through algebraic operations based on the key timing and threshold parameters already written into the target CCM parameter set of the eFuse during the initial stage of the precharge phase or during operation. This benchmark value characterizes the average speed at which the output voltage should uniformly ramp up from the precharge start level to the precharge phase voltage threshold under ideal operating conditions.

[0094] In some embodiments, the expected average voltage rise slope refers to the average rate at which the output voltage should uniformly rise from the initial level to the precharge stage voltage threshold within the total time budget of the precharge stage under ideal operating conditions, denoted as In engineering practice, since the output voltage at the start of the precharge phase is typically a residual voltage close to zero (e.g., below 0.3V), much smaller than the precharge phase voltage threshold (e.g., 1.7V to 3V), to simplify calculations and retain a certain safety margin, the initial residual voltage can be ignored in estimating the expected average slope, and the precharge phase voltage threshold can be directly used as the total voltage rise. The formula for calculating the expected average voltage rise slope is: ; In the formula; Indicates the voltage threshold during the pre-charge phase; This represents the maximum number of pulses during the precharge phase. The physical meaning of this formula is: under ideal conditions, the total voltage ramp-up task during the precharge phase (targeting the precharge phase voltage threshold) should be completed within the total duration corresponding to the maximum number of pulses during the precharge phase. Therefore, dividing the total voltage ramp-up amount by the total time budget yields the theoretical average ramp-up rate.

[0095] S414: Determine whether the deviation between the actual voltage rise slope and the expected average voltage rise slope exceeds the preset slope tolerance.

[0096] In some embodiments, the deviation refers to the relative degree of deviation of the actual voltage rise slope from the expected average voltage rise slope, denoted as To simultaneously retain deviation direction information (to distinguish between actual charging being too fast or too slow) and facilitate numerical comparison with tolerance boundaries, the deviation is expressed as a signed relative deviation, calculated using the following formula: ; In the formula, This represents the relative deviation between the actual voltage rise slope and the expected average voltage rise slope. When the value is positive, it indicates that the actual voltage rise rate is higher than the expected baseline, meaning that the charging process in the current pre-charging phase is faster than the theoretical design, and the actual size of the capacitive load may be smaller than the estimated value or the power supply voltage may be too high; when When the value is negative, it indicates that the actual voltage rise slope is lower than the expected baseline, that is, the charging process in the current pre-charging stage is slower than the theoretical design, the actual size of the capacitive load may be larger than the estimated value, the impedance of the wiring harness circuit increases, or the voltage drop at the power supply end drops.

[0097] In some embodiments, the preset slope tolerance refers to a boundary parameter pre-set during the eFuse rapid configuration process design phase, used to define the maximum allowable relative deviation between the actual slope and the expected slope, denoted as . .

[0098] S415: If so, adjust the PWM period of the precharge phase of the next pulse cycle according to the deviation so that the actual voltage rise slope approaches the expected average voltage rise slope.

[0099] In some embodiments, step S415 refers to the process where, after step S414 determines that the deviation between the actual voltage rise slope and the expected average voltage rise slope exceeds the preset slope tolerance, the main control chip or the internal logic of the eFuse performs quantitative correction on the PWM cycle of the pre-charge phase to be used in the next pulse cycle based on the positive or negative direction and magnitude of the deviation. By changing the average charging power per unit time, the rise rate of the output voltage is adjusted in reverse, thereby pulling the measured slope back to the allowable fluctuation range of the expected average slope.

[0100] In some embodiments, the next pulse cycle refers to the next complete PWM switching cycle that follows the current or recently completed PWM switching cycle during the precharge phase.

[0101] In some embodiments, adjusting the precharge phase PWM period of the next pulse cycle according to the deviation refers to the main control chip or eFuse internal logic calculating the signed relative deviation δk based on step S414, and then linearly scaling and correcting the current precharge phase PWM period according to a preset response scaling factor to obtain a new PWM period value for the next cycle. In some embodiments, the adjustment amount of the PWM cycle during the precharge phase is determined by the following formula: ; In the formula, This indicates the PWM period for the precharge phase of the next pulse cycle after adjustment. This indicates the precharge phase PWM period of the current pulse cycle; This represents the preset PWM period response coefficient, which characterizes the relative magnitude by which the PWM period should be adjusted when the deviation changes by 100%. The sign is determined by the direction of the difference between the actual slope and the expected slope. The physical meaning of this formula is: the PWM cycle of the next cycle is linearly scaled in the same direction as the current cycle by the product of the deviation amplitude and the response coefficient; when... When the product term is positive, the product term is positive. The cycle is extended; when When the product term is negative, the product term is negative. The cycle is shortened.

[0102] In some embodiments, the preset PWM periodic response coefficient α refers to a gain parameter that is pre-set during the eFuse rapid configuration process design phase to balance control sensitivity and stability.

[0103] S416: When the voltage at the output terminal of the eFuse reaches the pre-charge stage voltage threshold in the target CCM parameters, the system transitions from the pre-charge stage to the standard stage to complete the output terminal startup.

[0104] In some embodiments, step S416 refers to the eFuse internal logic monitoring the cumulative level of the output voltage in real time during the intermittent switching process of the precharge phase. When the voltage reaches or exceeds the preset precharge phase voltage threshold after a step-by-step increase over multiple PWM cycles, the eFuse internal state machine immediately terminates the intermittent switching timing of the precharge phase, switches the operating mode to the standard phase, and rapidly replenishes the output voltage with a high duty cycle continuous conduction strategy defined in the target CCM parameters of the standard phase, so that the output voltage further increases from the precharge phase voltage threshold to the rated operating voltage.

[0105] In some embodiments, the precharge stage voltage threshold refers to an output voltage threshold value pre-set in the target CCM parameter set to define the switching boundary between the precharge stage and the standard stage, denoted as . The standard phase refers to the continuous conduction mode that the eFuse enters after the precharge phase. In this mode, the high-side power MOSFET inside the eFuse no longer performs the intermittent on-off cycle of the precharge phase, but instead performs high-frequency continuous switching according to the high duty cycle pulse width modulation strategy defined in the standard phase of the target CCM parameters, so that the output voltage quickly rises from the precharge phase voltage threshold to the rated operating voltage.

[0106] Preferably, during the standard phase, the eFuse continuously conducts output according to the standard phase PWM period, the PWM interval time when the high-side drive is turned on, and the multiplication factor in the target CCM parameters.

[0107] In some embodiments, after the mode switching from the precharge stage to the standard stage is completed in step S416, the high-side power MOSFET inside the eFuse no longer performs the intermittent on-off cycle with extremely low duty cycle in the precharge stage. Instead, according to the pulse width modulation timing parameters defined in the standard stage of the target CCM parameter set, it injects energy into the capacitive load at the output end and the downstream electronic control unit in a high-frequency, high-duty-cycle continuous switching mode, so that the output voltage quickly rises from the precharge stage voltage threshold to the rated operating voltage. After reaching the rated voltage, the internal voltage feedback loop takes over the voltage regulation control, thereby completing the soft-start process of the entire output end and entering a continuous and stable power supply state.

[0108] In some embodiments, the PWM interval time when the high-side drive is enabled refers to the duration during which the high-side power MOSFET inside the eFuse is in the on-state within the standard PWM cycle, denoted as This parameter, together with the PWM period of the standard phase, determines the theoretical duty cycle reference for the standard phase, i.e. The duty cycle directly affects the average charging power at the output during the standard phase: a larger duty cycle means more charge is injected into the capacitive load per unit cycle, resulting in a faster voltage rise. However, if the residual charging demand of the capacitive load is still large or the downstream ECU has already started working before the voltage stabilizes, an excessively large duty cycle may cause the instantaneous current to approach the overcurrent protection threshold. A smaller duty cycle results in a smoother voltage rise, but prolongs the time it takes for the output to reach the rated operating voltage.

[0109] In some embodiments, the multiplication factor refers to a multiplicative coefficient used in the standard phase to extend the PWM interval time when the high-side drive is enabled by an integer multiple, denoted as The eFuse internal logic sets the PWM interval when the high-side driver is enabled. With multiplier Multiply by the product to obtain the actual effective extended conduction time. This extended on-time occupies a corresponding proportion of the standard PWM cycle, forming the equivalent duty cycle of the standard phase. The introduction of the multiplication factor allows eFuse to achieve coarse-grained adjustment of the duty cycle by modifying only a 4-bit or 8-bit integer coefficient without changing the PWM cycle register in the standard phase.

[0110] It should be noted that during the constant voltage charging process, the charging time for each constant voltage charge is a preset fixed duration.

[0111] Preferably, the present invention also provides a vehicle, including a processor, a memory, an on-board power supply, a capacitive load, and an electronic fuse connected between the on-board power supply and the capacitive load, the fuse being connected to and controlled by the processor, the memory being coupled to the processor, the memory being used to store computer program code, the computer program code including computer instructions; characterized in that, when the processor reads the computer instructions from the memory, the vehicle performs the method described above.

[0112] In this case, to verify the starting performance of the electronic fuse configuration method described in this application under different capacitive load conditions, multiple sets of comparative experiments were conducted on a 14V vehicle-mounted low-voltage power distribution experimental platform. The experimental conditions were set as follows: the rated voltage of the eFuse output terminal was 14V, the preset charging voltage for the constant voltage charging stage was 14V, and the single constant voltage charging time was fixed. The constant voltage charging was performed three times, and the arithmetic mean of the three estimated capacitance values ​​was taken as the final estimated capacitance value. Based on the estimation results, a suitable target CCM parameter was selected from the preset CCM parameter table and written into the eFuse. Then, the eFuse was controlled to enter CCM mode to complete the output startup. Four typical capacitive loads of 300μF, 100μF, 3000μF, and 4400μF were selected for verification in the experiment. The startup waveforms of each group of experiments are shown below. Figures 3 to 6 As shown.

[0113] comprehensive Figures 3 to 6 The experimental results show that, under a wide range of capacitive load variations from 300μF to 4400μF, the method described in this application can estimate the capacitive load scale by identifying it through constant voltage charging before startup, and adaptively select matching CCM parameters. This enables eFuse to reliably complete soft start under different capacitive load scenarios, avoiding the problems of overcurrent protection false triggering and startup failure caused by load mismatch under fixed parameter configuration. This significantly improves the versatility and operational stability of eFuse in vehicle multi-load power distribution environments.

[0114] It should be noted that the above embodiments of this application use the VNF1248F type eFuse as an example for experimental verification, but this does not constitute a limitation on the scope of protection of this application. Those skilled in the art will understand that as long as the eFuse chip possesses the following basic capabilities: 1. It can read and write internal registers through communication interfaces (such as SPI, I2C, etc.); 2. It supports CCM (capacitive charging mode) or an equivalent soft-start working mode; 3. It can provide output voltage and current detection and readback functions, the configuration method proposed in this application can be adopted. For other types of eFuse chips, it is only necessary to pre-establish the corresponding load level classification table and parameter mapping table according to the CCM parameter definition range in its datasheet, and to estimate the capacitive load based on the RC charging characteristics, to achieve the same technical effect as this application. Therefore, the technical solution of this application is applicable to various eFuse devices with configurable soft-start functions, and should not be construed as limited to the specific models listed in the embodiments.

[0115] Therefore, the embodiments should be considered as exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of the equivalents of the application are intended to be included within the invention.

[0116] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features of the invention herein.

Claims

1. A method for configuring an electronic fuse, characterized in that, Includes the following steps: By outputting a preset charging voltage through an electronic fuse, the capacitive load connected to the output terminal of the electronic fuse is charged multiple times under constant voltage to obtain the charging parameters during each charging process. The estimated capacitance value of the capacitive load is obtained by calculating the capacitance value of each charge based on the charging parameters and taking the average value. Based on the comparison result between the estimated capacitance value and the preset load level threshold, the target CCM parameter is selected from the preset CCM parameter table; The target CCM parameters are written into the electronic fuse, and the electronic fuse is controlled to enter CCM mode.

2. The electronic fuse configuration method according to claim 1, characterized in that, The charging parameters include the initial voltage at the output terminal before charging, the actual voltage at the output terminal after charging, the charging time, and the charging output current.

3. The electronic fuse configuration method according to claim 2, characterized in that, The single-charge capacitance value is calculated based on the charging parameters described in each charge, including: The charging voltage difference is obtained by comparing the actual voltage at the output terminal after charging with the initial voltage at the output terminal before charging. The equivalent resistance of the capacitive load is obtained based on the preset charging voltage and the charging output current; the single-cycle capacitance value is calculated based on the equivalent resistance, the charging time, and the charging voltage difference, according to the charging characteristics of the RC series circuit. During the constant voltage charging process, the first output terminal voltage and the second output terminal voltage are acquired at the first sampling time and the second sampling time, respectively. Based on the first sampling time, the second sampling time, the first output voltage, the second output voltage, and the preset charging voltage, the RC time constant is obtained by solving the charging equations of the RC series circuit. The verification capacitor value is calculated based on the equivalent resistance and the RC time constant. Determine whether the deviation between the single capacitance value and the verification capacitance value is less than a preset deviation threshold; if not, correct the single capacitance value based on the verification capacitance value.

4. The electronic fuse configuration method according to claim 1, characterized in that, The number of constant voltage charging cycles is a preset fixed number, and the averaging of the capacitance values ​​from each individual charge includes: The estimated capacitance value is obtained by summing the single capacitance values ​​calculated from each constant voltage charging cycle and dividing by the preset fixed number of cycles.

5. The electronic fuse configuration method according to claim 1, characterized in that, The preset CCM parameter table includes multiple load levels and their corresponding CCM parameters. The multiple load levels are divided according to preset load level thresholds. The CCM parameters include PWM control parameters and precharge control parameters.

6. The electronic fuse configuration method according to claim 5, characterized in that, The step of selecting target CCM parameters from a preset CCM parameter table based on the comparison result between the estimated capacitance value and the preset load level threshold includes: The estimated capacitance value is compared with the preset load level threshold in the preset CCM parameter table to determine the load level to which the estimated capacitance value belongs; Determine whether the estimated capacitance value falls within the boundary ambiguity region of two adjacent load levels; wherein, the boundary ambiguity region is determined based on a preset load level threshold and a preset ambiguity bandwidth corresponding to the two adjacent load levels; If so, the CCM parameters corresponding to the two adjacent load levels are obtained as the first candidate parameter and the second candidate parameter. Based on the relative position of the estimated capacitance value in the boundary ambiguity region, the first candidate parameter and the second candidate parameter are weighted and interpolated to obtain the target CCM parameter. If not, the target CCM parameter corresponding to the determined load level is retrieved from the preset CCM parameter table.

7. The electronic fuse configuration method according to claim 1, characterized in that, The step of writing the target CCM parameters into the electronic fuse includes: The target CCM parameters are written into the corresponding register of the electronic fuse via a communication protocol.

8. The electronic fuse configuration method according to claim 1, characterized in that, The control of the electronic fuse to enter CCM mode includes: The electronic fuse reads the written target CCM parameters and enters the pre-charge stage. During the pre-charge stage, it repeatedly switches on and off according to the pre-charge stage PWM cycle and the maximum number of pulses in the pre-charge stage in the target CCM parameters. During the pre-charge phase, the first output voltage and the second output voltage are acquired at the end of two adjacent pulse cycles, respectively; the actual voltage rise slope is calculated based on the first output voltage, the second output voltage, and the time interval between adjacent pulse cycles. Based on the precharge phase voltage threshold, the maximum number of pulses in the precharge phase, and the precharge phase PWM period in the target CCM parameters, calculate the expected average voltage rise slope in the precharge phase. Determine whether the deviation between the actual voltage rise slope and the expected average voltage rise slope exceeds a preset slope tolerance; If so, the PWM period of the precharge phase of the next pulse cycle is adjusted according to the deviation so that the actual voltage rise slope approaches the expected average voltage rise slope. When the voltage at the output terminal of the electronic fuse reaches the pre-charge stage voltage threshold in the target CCM parameters, it transitions from the pre-charge stage to the standard stage to complete the output terminal startup.

9. The electronic fuse configuration method according to claim 8, characterized in that, During the standard phase, the electronic fuse continuously conducts output according to the standard phase PWM period, the PWM interval time when the high-side drive is turned on, and the multiplication factor in the target CCM parameters.

10. A vehicle comprising a processor, a memory, an on-board power supply, a capacitive load, and an electronic fuse connected between the on-board power supply and the capacitive load, the fuse being connected to and controlled by the processor, the memory being coupled to the processor, the memory being used to store computer program code, the computer program code including computer instructions; characterized in that, When the processor reads the computer instructions from the memory, the vehicle performs the method as described in any one of claims 1-9.

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