A synchronous rectification controller
Patent Information
- Application Number
- CN202611109034.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-24
- Publication Date
- 2026-09-25
AI Technical Summary
然而,高压采样管需要满足较小的导通阻抗才能实现对漏源电压的精准采样,在高压BCD工艺中实现低阻高压采样管需要占用较大的芯片面积,导致同步整流控制器的整体尺寸难以进一步缩小
[0015]本申请提供的同步整流控制器,采样管与控制模块分别集成于不同半导体裸片并合封于同一封装体内。采样管采用功率器件工艺制备,能够在实现低导通阻抗的同时有效控制单颗裸片的面积;控制模块采用集成芯片工艺制备,无需为兼容高压器件而牺牲集成度。两者分裸片制备后再进行合封,既发挥了不同工艺各自的优势,又避免了在同一裸片内集成高低压器件所带来的面积损失,从而在保证采样精度的前提下显著降低了同步整流控制器的整体尺寸。
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Figure CN122823922A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power supply technology, and in particular to a synchronous rectification controller. Background Technology
[0002] With the increasing demand for high power density and high efficiency converters in fields such as data centers, industrial power supplies, and communication power supplies, represented by artificial intelligence computing power, isolated converters have become the preferred solution for mainstream topologies of medium and high power (hundred watts to kilowatts).
[0003] To further improve overall efficiency, the industry commonly uses low on-resistance MOSFETs to replace traditional Schottky diodes for rectification, a technique known as synchronous rectification (SR). Synchronous rectification significantly reduces conduction losses in the rectification section and improves converter efficiency by replacing rectifier diodes with power MOSFETs that have extremely low on-state resistance.
[0004] Synchronous rectification technology requires the detection of the drain-source voltage of the SR MOSFET. This is typically achieved by lowering the drain voltage using a high-voltage sampling transistor. Existing synchronous rectification controllers integrate the high-voltage sampling transistor and the low-voltage control section onto a single silicon chip, or isolate them on separate silicon chips before packaging them into an integrated circuit. In other words, the high-voltage sampling transistor and the low-voltage control section are integrated onto a single semiconductor die. However, the high-voltage sampling transistor needs to have a low on-resistance to achieve accurate sampling of the drain-source voltage. Implementing a low-resistance high-voltage sampling transistor in high-voltage BCD technology requires a large chip area, making it difficult to further reduce the overall size of the synchronous rectification controller. Summary of the Invention
[0005] In order to solve at least one of the problems existing in the prior art, the purpose of this application is to provide a synchronous rectification controller that reduces the size of the synchronous rectification controller while ensuring sampling accuracy.
[0006] To achieve the above objectives, this application provides a synchronous rectification controller for controlling the rectifier switching transistors of an isolation converter, comprising: The package has a drain sampling pin and a control output pin. The drain sampling pin is used to connect to the drain of the rectifier switch, and the control output pin is used to connect to the gate of the rectifier switch. A sampling tube, integrated on a semiconductor die, has its input terminal electrically connected to the drain sampling pin and its output terminal electrically connected to the control module, for sampling the drain voltage of the rectifier switch and transmitting it to the control module. A control module, integrated on another semiconductor die and connected to the control output pin, is used to generate a control signal based on the drain voltage and output it to the control output pin. The semiconductor die containing the sampling tube and another semiconductor die containing the control module are encapsulated together in the package.
[0007] Furthermore, the rectifier switch includes a first rectifier switch and a second rectifier switch, and the sampling tube includes a first sampling tube and a second sampling tube for sampling the first rectifier switch and the second rectifier switch respectively. The first sampling tube and the second sampling tube are integrated on the same semiconductor die.
[0008] Furthermore, the rectifier switch includes a first rectifier switch and a second rectifier switch, and the sampling tube includes a first sampling tube and a second sampling tube for sampling the first rectifier switch and the second rectifier switch respectively. The first sampling tube is integrated on a first semiconductor die, and the second sampling tube is integrated on a second semiconductor die, which is different from the first semiconductor die.
[0009] Furthermore, the semiconductor die containing the sampling tube is bonded to the base island with conductive adhesive. The sampling tube is a vertical high-voltage MOSFET. The bottom drain of the sampling tube is electrically connected to the drain sampling pin of the package through conductive adhesive. The top gate and top source of the sampling tube are electrically connected to the control module through internal wiring.
[0010] Furthermore, the sampling tube is a planar high-voltage MOSFET, the drain of the sampling tube is electrically connected to the drain sampling pin of the package, and the gate and source of the sampling tube are electrically connected to the control module through internal wiring.
[0011] Furthermore, the internal bonding wires are arranged coplanarly and side by side within the package body, with a predetermined spacing between adjacent bonding wires.
[0012] Furthermore, the isolation converter is a resonant converter, a flyback converter, or a forward converter.
[0013] Furthermore, the control module is also provided with a direct sampling input terminal, which is connected to the drain sampling pin.
[0014] Furthermore, the control module is used to obtain the drain voltage of the rectifier switch through the direct-connected sampling input terminal when the supply voltage is less than the first voltage threshold.
[0015] The synchronous rectification controller provided in this application integrates the sampling transistor and the control module onto different semiconductor dies and encapsulates them within the same package. The sampling transistor is fabricated using power device technology, which effectively controls the area of a single die while achieving low on-resistance. The control module is fabricated using integrated chip technology, eliminating the need to sacrifice integration density for compatibility with high-voltage devices. By fabricating both on separate dies and then encapsulating them, the advantages of different processes are leveraged, while avoiding the area loss caused by integrating high- and low-voltage devices on the same die. This significantly reduces the overall size of the synchronous rectification controller while ensuring sampling accuracy.
[0016] The synchronous rectification controller provided in this application places the two sampling transistors on different semiconductor dies, completely eliminating ground noise coupling interference between the two sampling channels through physical isolation. Compared with the solution of integrating the two sampling transistors on the same die, the stability and accuracy of the two sampling channels can be guaranteed without adding additional timing control circuitry, which reduces the complexity of circuit design and improves the reliability of the controller in multi-channel application scenarios.
[0017] The synchronous rectifier controller provided in this application uses a coplanar parallel arrangement of the internal wires to ensure sufficient spacing between them. This effectively avoids the risk of contact or wire collapse caused by wire obstruction, crossing, or insufficient spacing, thereby improving the yield of the packaging process and the long-term reliability of the product.
[0018] The synchronous rectification controller provided in this application also features a direct-connect sampling input terminal. This terminal directly acquires the drain voltage of the rectifier switching transistor, avoiding sampling inaccuracies caused by the sampling transistor's gate drive voltage not yet being established. This ensures correct startup and stable operation of the controller during power-up. During normal operation, the drain voltage is obtained after step-down via a high-voltage sampling transistor to achieve low-power sampling. The combination of these two features balances startup reliability, steady-state stability, and system power consumption.
[0019] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing the application. Attached Figure Description
[0020] The accompanying drawings are provided to further illustrate the present application and form part of the specification. Together with the embodiments of the present application, they serve to explain the present application but do not constitute a limitation thereof. In the drawings: Figure 1 This is a schematic diagram of a synchronous rectifier circuit. Figure 2 for Figure 1 A schematic diagram of the structure of the synchronous rectifier controller; Figure 3for Figure 1 A schematic diagram of the package of the synchronous rectifier controller in the diagram; Figure 4 This is a schematic diagram of another synchronous rectifier controller; Figure 5 for Figure 4 A schematic diagram of the package of the synchronous rectifier controller in the diagram; Figure 6 This is a schematic diagram of another synchronous rectifier controller; Figure 7 This is a schematic diagram of another synchronous rectifier circuit. Figure 8 for Figure 7 A schematic diagram of the structure of the synchronous rectifier controller; Figure 9 for Figure 7 A schematic diagram of the package of the synchronous rectifier controller in the diagram; Figure 10 This is a schematic diagram of the package of another synchronous rectifier controller; Figure 11 This is a schematic diagram of the package of another synchronous rectifier controller; Figure 12 This is a schematic diagram of the package of another synchronous rectifier controller; Figure 13 This is a schematic diagram of the package of another synchronous rectifier controller; In the diagram: 100 - Synchronous rectifier controller, 110 - Package, 111 - Control module, 120 - Control semiconductor die, 130 - Sampling semiconductor die, 140 - First semiconductor die, 150 - Second semiconductor die, 160 - Conductive adhesive. Detailed Implementation
[0021] To better understand and explain this application, a further detailed description will be provided below with reference to the accompanying drawings. This application is not limited to these specific embodiments. Rather, any modifications or equivalent substitutions made to this application should be covered within the scope of the claims.
[0022] It should be noted that many specific details are provided in the following embodiments. Those skilled in the art should understand that this application can be implemented without these specific details. In the various embodiments given below, principles, structures, and components well known in the art are not described in detail in order to highlight the main points of this application.
[0023] It should be understood that although terms such as "first," "second," etc., may be used herein to describe various units or data, these units or data should not be limited by these terms. These terms are used merely to distinguish one feature from another. For example, without departing from the scope of the exemplary embodiments, a first feature may be referred to as a second feature, and similarly, a second feature may be referred to as a first feature.
[0024] Terminology Explanation: A semiconductor die is a single, unpackaged semiconductor chip unit that has been cut from a wafer.
[0025] A vertical high-voltage MOSFET refers to a high-voltage MOSFET with its drain located at the bottom of the die and its gate and source located at the top of the die.
[0026] A planar high-voltage MOSFET refers to a high-voltage MOSFET in which the drain, gate, and source are all located on the same side of the die.
[0027] The die pad is a metal platform area on the package frame used to support and hold the die.
[0028] The synchronous rectifier controller will now be described in detail with reference to specific embodiments.
[0029] This application provides a synchronous rectification controller for controlling the rectifier switching transistors on an isolation converter, including: The package has a drain sampling pin and a control output pin. The drain sampling pin is used to connect to the drain of the rectifier switch, and the control output pin is used to connect to the gate of the rectifier switch. The sampling tube is integrated on the semiconductor die. The input terminal of the sampling tube is electrically connected to the drain sampling pin, and the output terminal of the sampling tube is electrically connected to the control module. It is used to sample the drain voltage of the rectifier switch and transmit it to the control module. A control module, integrated on another semiconductor die and connected to the control output pin, is used to generate a control signal based on the drain voltage and output it to the control output pin. The semiconductor die containing the sampling tube and another semiconductor die containing the control module are encapsulated together in the package.
[0030] It should be noted that the synchronous rectifier controller of this application can be used with resonant converters, flyback converters or forward converters.
[0031] In some implementations, the source of the rectifier switch is grounded, and the control signal can be generated directly based on the drain voltage sampled by the drain sampling pin.
[0032] In some other embodiments, the package may also be provided with a source sampling pin, which is used to connect to the source of the rectifier switch, sample the source voltage and transmit it to the control module, and the control module generates a control signal based on the sampled drain voltage and source voltage.
[0033] It should be noted that the drain sampling pin, control output pin, and sampling transistor are configured one-to-one with the rectifier switching transistors on the isolation converter. That is, when there is only one rectifier switching transistor, only one drain sampling pin, one output pin, and one sampling transistor can be configured; when there are two rectifier switching transistors, two drain sampling pins, two output pins, and two sampling transistors are configured.
[0034] For example, a synchronous rectification controller can be applied to an isolated converter with two rectifier switches, and is used to control the two rectifier switches on the isolated converter using two sampling tubes. Figure 1 This is a schematic diagram of a synchronous rectifier circuit. Figure 2 for Figure 1 A schematic diagram of the structure of the synchronous rectifier controller; Figure 3 for Figure 1 A schematic diagram of the packaging of the synchronous rectifier controller.
[0035] like Figure 1 As shown, the synchronous rectification circuit includes a transformer T1, two rectifier switches M1 and M2, and a synchronous rectification controller 100.
[0036] Among them, the secondary winding of transformer T1 has a center tap, and the center tap of transformer T1 is connected to the output terminal Vout; The synchronous rectifier controller 100 includes a first drain sampling pin VDB, a second drain sampling pin VDA, a first source sampling pin VSB, a second source sampling pin VSA, a power supply terminal VDD, a ground terminal GND, a first control output pin VGB, and a second control output pin VGA.
[0037] In this circuit, the drain of the first rectifier switch M1 is connected to the first end of the secondary winding of transformer T1 and is also connected to the first drain sampling pin VDB of the synchronous rectifier controller 100. The drain of the second rectifier switch M2 is connected to the second end of the secondary winding of transformer T1 and is also connected to the second drain sampling pin VDA of the synchronous rectifier controller 100. The source of the first rectifier switch M1 is connected to the first source sampling pin VSB of the synchronous rectifier controller 100; the source of the second rectifier switch M2 is connected to the second source sampling pin VSA of the synchronous rectifier controller 100. The synchronous rectifier controller 100 samples the drain-source voltages of the first rectifier switch M1 and the second rectifier switch M2 through the first drain sampling pin VDB, the first source sampling pin VSB, the second drain sampling pin VDA, and the second source sampling pin VSA. The first control output pin VGB is connected to the gate of the first rectifier switch M1; the second control output pin VGA is connected to the gate of the second rectifier switch M2.
[0038] The power supply terminal VDD of the synchronous rectifier controller 100 is connected to the output terminal Vout through the first resistor R1 and grounded through the voltage regulator capacitor C1. The output terminal Vout provides power to the synchronous rectifier controller 100 by voltage division. The ground pin GND, the first source sampling pin VSB, and the second source sampling pin VSA of the synchronous rectifier controller 100 share a common ground.
[0039] The synchronous rectifier controller 100 generates control signals based on the sampled drain-source voltage to drive the gates of the first rectifier switch M1 and the second rectifier switch M2 respectively, thereby realizing rectified output and supplying power to the load.
[0040] like Figures 2-3 As shown, the exemplary synchronous rectifier 100 includes: Package 110 has a first drain sampling pin VDB, a second drain sampling pin VDA, a first source sampling pin VSB, a second source sampling pin VSA, a first control output pin VGB, a second control output pin VGA, a power supply pin VDD, and a ground pin GND.
[0041] The synchronous rectifier controller 100 includes: a control module 111, a first sampling tube Q1, and a second sampling tube Q2.
[0042] The control module 111 is integrated on the control semiconductor die 120.
[0043] The first sampling transistor Q1 and the second sampling transistor Q2 are both integrated on a sampling semiconductor die 130, which is different from the control semiconductor die 120. The control semiconductor die 120 and the sampling semiconductor die 130 are encapsulated in a package 110.
[0044] The drain D3 of the first sampling transistor Q1 is electrically connected to the first drain sampling pin VDB to receive the drain voltage of the first rectifier switch M1. The source S3 of the first sampling transistor Q1 is electrically connected to the first sampling terminal S1 of the control module 111. The gate G3 of the first sampling transistor Q1 is electrically connected to the first sampling control terminal G1 of the control module 111. The control module 111 controls the on / off state of the first sampling transistor Q1 through the first sampling control terminal G1. When the first sampling transistor Q1 is on, it samples and reduces the drain voltage of the first rectifier switch M1 and transmits it to the control module 111 through the first sampling terminal S1.
[0045] The drain D4 of the second sampling transistor Q2 is electrically connected to the second drain sampling pin VDA to receive the drain voltage of the second rectifier switch M2. The source S4 of the second sampling transistor Q2 is electrically connected to the second sampling terminal S2 of the control module 111. The gate G4 of the second sampling transistor Q2 is electrically connected to the second sampling control terminal G2 of the control module 111. The control module 111 controls the on / off state of the second sampling transistor Q2 through the second sampling control terminal G2. When the second sampling transistor Q2 is on, it samples and reduces the drain voltage of the second rectifier switch M2 and transmits it to the control module 111 through the second sampling terminal S2.
[0046] The control module 111 also has a first source sampling terminal B1 and a second source sampling terminal B2. The first source sampling terminal B1 is electrically connected to the first source sampling pin VSB and is used to receive the source potential of the first rectifier switch M1. The second source sampling terminal B2 is electrically connected to the second source sampling pin VSA and is used to receive the source potential of the second rectifier switch M2. The first source sampling terminal B1 and the second source sampling terminal B2 are set independently of each other.
[0047] The control module 111 also has a first control output terminal E1 and a second control output terminal C1. The first control output terminal E1 is electrically connected to the first control output pin VGB and is used to output a control signal to the gate of the first rectifier switch M1. The second control output terminal C1 is electrically connected to the second control output pin VGA and is used to output a control signal to the gate of the second rectifier switch M2.
[0048] The control module 111 determines the drain-source voltage Vds1 of the first rectifier switch M1 based on the drain voltage of the first rectifier switch M1 after step-down received at the first sampling terminal S1 and the source potential of the first rectifier switch M1 received at the first source sampling terminal B1. Similarly, the control module 111 determines the drain-source voltage Vds2 of the second rectifier switch M2 based on the drain voltage of the second rectifier switch M2 after step-down received at the second sampling terminal S2 and the source potential of the second rectifier switch M2 received at the second source sampling terminal B2.
[0049] The control module 111 generates control signals based on the drain-source voltages Vds1 and Vds2, respectively, and outputs them to the corresponding pins through the first control output terminal E1 and the second control output terminal C1, thereby outputting them to the gate of the rectifier switch to control the conduction and turn-off of the rectifier switch.
[0050] For example, such as Figure 2-3 As shown, the control module 111 is also provided with a first direct-connect sampling input terminal D1 and a second direct-connect sampling input terminal D2. The first direct-connect sampling input terminal D1 and the second direct-connect sampling input terminal D2 are directly electrically connected to the first drain sampling pin VDB and the second drain sampling pin VDA, respectively.
[0051] When the supply voltage VDD of the synchronous rectifier controller 100 is less than the first voltage threshold, the synchronous rectifier controller 100 is in the startup phase. The control module 111 directly obtains the drain voltage of the rectifier switch through the two directly connected sampling input terminals for the state determination of the rectifier switch, avoiding sampling inaccuracy caused by the gate drive voltages of the first sampling transistor Q1 and the second sampling transistor Q2 not being fully established. When the supply voltage VDD of the synchronous rectifier controller 100 reaches or exceeds the first voltage threshold, the synchronous rectifier controller 100 is in the normal operation phase. The control module 111 obtains the stepped-down drain voltage through the first sampling transistor Q1 and the second sampling transistor Q2 to achieve low-power sampling.
[0052] It should be noted that the first direct-connect sampling input terminal D1 and the second direct-connect sampling input terminal D2 can be set or not. The design of the direct-connect sampling input terminal of the control module 111 in the synchronous rectifier controller is suitable for application scenarios with one sampling tube as well as application scenarios with two sampling tubes.
[0053] In this application, the direct-connect sampling terminal design separates the sampling paths for the startup and normal operation phases. During startup, the drain voltage is directly obtained from the direct-connect sampling input, ensuring correct startup before the supply voltage is fully established and preventing sampling inaccuracies or malfunctions caused by the failure to establish the gate drive voltage of the sampling transistor. During normal operation, the drain voltage is obtained after step-down via the sampling transistor, reducing the power consumption of the sampling circuit. This combination balances startup reliability, steady-state stability, and system power consumption, further enhancing the adaptability of the synchronous rectifier controller under various operating conditions.
[0054] For example, the above Figure 1-3 A synchronous rectifier suitable for two rectifier switches is shown, but the synchronous rectifier controller provided in this application is also applicable to applications with an isolated converter having only one rectifier switch, for using a sampling transistor to control one rectifier switch on the isolated converter. For example, Figure 4 This is a schematic diagram of another synchronous rectifier controller; Figure 5 for Figure 4 A schematic diagram of the synchronous rectifier controller in the diagram is shown below. Figure 4-5 As shown, the synchronous rectifier controller includes: Package 110 has a drain sampling pin VD, a control output pin VG, and a source sampling pin VS. The drain sampling pin VD is used to connect to the drain of the rectifier switch, the control output pin VG is used to connect to the gate of the rectifier switch, and the source sampling pin VS is used to connect to the source of the rectifier switch. The sampled source voltage is then transmitted to the control module 111. The sampling transistor Q0 is integrated on the sampling semiconductor die 130. The input terminal of the sampling transistor Q0, i.e., the drain D4, is electrically connected to the drain sampling pin VD. The output terminal of the sampling transistor Q0, i.e., the source S4, is electrically connected to the port S2 of the control module 111. It is used to sample the drain voltage of the rectifier switch and transmit it to the control module 111. The gate G4 of the sampling transistor Q0 is connected to the control module 111 and is controlled by the control module 111. The control module 111 is integrated on the control semiconductor die 120 and connected to the control output pin VG. It generates control signals based on the drain voltage and source voltage and outputs them to the control output pin VG. The sampling semiconductor die 130 containing the sampling tube Q0 and the control semiconductor die 120 containing the control module 111 are encapsulated together in the package 110.
[0055] The above Figure 4-5 A synchronous rectification controller for a single rectifier switch is shown, in which the control module 111 obtains the drain voltage only through the sampling transistor Q0. However, in this application, the control module 111 can also be configured to directly connect to the sampling terminal to obtain the drain voltage. For example, Figure 6 Here is a schematic diagram of another synchronous rectifier controller, as shown below. Figure 6 As shown, in this exemplary synchronous rectification controller: The control module 111 also includes a direct-connect sampling input terminal D2, which is directly electrically connected to the drain sampling pin VD. When the supply voltage VDD of the synchronous rectifier controller 100 is less than the first voltage threshold, the synchronous rectifier controller 100 is in the startup phase. The control module 111 directly obtains the drain voltage of the rectifier switch through the direct-connect sampling input terminal D2 for determining the state of the rectifier switch, avoiding inaccurate sampling due to the gate drive voltage of the sampling transistor Q0 not yet being established. When the supply voltage VDD of the synchronous rectifier controller 100 reaches or exceeds the first voltage threshold, the synchronous rectifier controller 100 is in the normal operation phase. The control module 111 obtains the stepped-down drain voltage through the sampling transistor Q0 to achieve low-power sampling.
[0056] For example, in an application scenario where the synchronous rectification controller 100 is used for two rectifier switches, when the two rectifier switches share a common source, the synchronous rectification controller can omit one source sampling pin and use a common source sampling pin to sample the common source of the two rectifier switches. For example, Figure 7 This is a schematic diagram of another synchronous rectifier circuit. Figure 8 for Figure 7 A schematic diagram of the structure of the synchronous rectifier controller; Figure 9 for Figure 7 A schematic diagram of the package of the synchronous rectifier controller. (See diagram below.) Figure 7 As shown: The source of the first rectifier switch M1 is connected to the source of the second rectifier switch M2 and is at the same potential; the synchronous rectifier controller 100 includes a first drain sampling pin VDB, a first control output pin VGB, a ground pin GND, a second drain sampling pin VDA, a second control output pin VGA, a power supply pin VCC, a common source sampling pin VSS, and an empty pin NC.
[0057] The first drain sampling pin VDB is connected to the drain of the first rectifier switch M1, and the second drain sampling pin VDA is connected to the drain of the second rectifier switch M2; the common source sampling pin VSS is connected to the common source of the first rectifier switch M1 and the second rectifier switch M2; the connection of other pins remains unchanged.
[0058] It is understandable that the empty pin (NC) is added to meet the pin count requirements of specific package formats. It does not connect any circuitry internally and is only used to meet the standardization requirements of the package pin count.
[0059] like Figures 8-9 As shown, the first source sampling terminal B1 and the second source sampling terminal B2 of the control module 111 are connected and electrically connected to the common source sampling pin VSS, for receiving the common source potential of the first rectifier switch M1 and the second rectifier switch M2. Based on the stepped-down drain voltage of the first rectifier switch M1 received at the first sampling terminal S1 and the received common source potential, the control module 111 can determine the drain-source voltage Vds1 of the first rectifier switch M1 (i.e., Vds1 = VD1 - VSS, where VSS is the reference ground potential). Similarly, based on the stepped-down drain voltage of the second rectifier switch M2 received at the second sampling terminal S2 and the common source potential, the control module 111 determines the drain-source voltage Vds2 of the second rectifier switch M2 (i.e., Vds2 = VD2 - VSS). Then, control signals are generated according to the drain-source voltages Vds1 and Vds2 respectively, and output to the gate of the corresponding rectifier switch through the first control output terminal E1 and the second control output terminal C1 to control the conduction and turn-off of the rectifier switch.
[0060] It should be noted that by using independent source pins for sampling, the source potentials of the two rectifier switches can be sampled accurately, thereby calculating their respective drain-source voltages more accurately. This is suitable for applications requiring high-precision sampling.
[0061] By using a common source sampling pin, one source sampling pin is omitted, which ensures that the source potentials of the two rectifier switches are consistent when calculating the drain-source voltage.
[0062] For example, when the synchronous rectifier controller 100 is used in an application scenario with two rectifier switching transistors, the two sampling transistors can be as follows: Figure 1-3 The synchronous rectification controller shown is packaged on the same semiconductor die, but it can also be packaged on different semiconductor dies. For example, Figure 10 The following is a schematic diagram of the package of another synchronous rectifier controller, as shown below. Figure 10 As shown, in Figure 10 The synchronous rectifier controller shown is... Figure 3 The differences in the packaging of the synchronous rectifier controller shown are as follows: The first sampling transistor Q1 is integrated on the first semiconductor die 140, and the second sampling transistor Q2 is integrated on the second semiconductor die 150. That is, the two sampling transistors are integrated on different semiconductor dies. The first semiconductor die 140, the second semiconductor die 150, and the control semiconductor die 120 are encapsulated in a package 110.
[0063] Figure 11 The following is a schematic diagram of the package of another synchronous rectifier controller, as shown below. Figure 11 As shown, Figure 11 The synchronous rectifier controller shown is... Figure 9 The differences in the packaging of the synchronous rectifier controller shown are as follows: The first sampling transistor Q1 is integrated on the first semiconductor die 140, and the second sampling transistor Q2 is integrated on the second semiconductor die 150. That is, the two sampling transistors are integrated on different semiconductor dies. The first semiconductor die 140, the second semiconductor die 150, and the control semiconductor die 120 are encapsulated in a package 110.
[0064] Right now Figure 10 and Figure 11 The packages of the synchronous rectifier controller with independent source sampling pins and with common source sampling pins are shown respectively. Both packages use independent sampling tube packages.
[0065] This packaging method, which places the two sampling transistors on separate semiconductor dies, completely eliminates ground noise coupling interference between the two sampling channels through physical isolation. Compared to integrating the two sampling transistors onto the same die, it ensures the stability and accuracy of both sampling channels without the need for additional timing control circuitry. This reduces the complexity of circuit design and improves the reliability of the controller in multi-channel applications.
[0066] For example, regarding the sampling transistor, in this application, the sampling transistor can be a planar high-voltage MOSFET, such as... Figure 3 , Figure 5 , Figure 9 , Figure 10 , Figure 11 In each of the synchronous rectifier controllers shown, the sampling tubes are all planar high-voltage MOSFETs. The drain, gate, and source of the planar high-voltage MOSFET are all located on the same side of the die. During packaging, they are electrically connected to the corresponding pins of the control module 111 and the package 110 through internal wiring.
[0067] In planar high-voltage MOSFET packaging, the internal wire bonding is arranged coplanarly and side-by-side within the package body 110, with a predetermined spacing between adjacent wire bonding. This predetermined spacing is set according to the packaging process capability, for example, not less than 50μm, to ensure that the internal wire bonding has sufficient spacing and avoid the risk of contact or wire collapse caused by wire bonding obstruction.
[0068] In this application, the sampling tube can also be a vertical high-voltage MOSFET. For example, Figure 12 The following is a schematic diagram of the package of another synchronous rectifier controller, as shown below. Figure 12 As shown, in Figure 12 The synchronous rectifier controller shown is... Figure 10 The differences in the packaging of the synchronous rectifier controller shown are as follows: Both the first sampling transistor Q1 and the second sampling transistor Q2 are vertical high-voltage MOSFETs. The drain of the vertical high-voltage MOSFET is located at the bottom of the die, while the gate and source are located at the top of the die.
[0069] The third semiconductor die 140 containing the first sampling transistor Q1 is mounted on a base island via conductive adhesive 160. This base island is electrically connected to the first drain sampling pin VDB of the package 110. The top gate G3 of the first sampling transistor Q1 is electrically connected to the first sampling control terminal G1 of the control module 111 via internal wiring. The top source S3 of the first sampling transistor Q1 is electrically connected to the first sampling terminal S1 of the control module 111 via internal wiring. The fourth semiconductor die 150 containing the second sampling transistor Q2 is mounted on a base island via conductive adhesive 160. This base island is electrically connected to the second drain sampling pin VDA of the package 110, thereby achieving an electrical connection between the bottom drain D4 and the second drain sampling pin VDA. The top gate G4 of the second sampling transistor Q2 is electrically connected to the second sampling control terminal G2 of the control module 111 via internal wiring. The top source S4 of the second sampling transistor Q2 is electrically connected to the second sampling terminal S2 of the control module 111 via internal wiring.
[0070] In vertical high-voltage MOSFET packaging, the internal wire bonding is also arranged coplanarly and side-by-side within the package body 110, with a predetermined spacing between adjacent wire bonding. This predetermined spacing is set according to the packaging process capability, for example, not less than 50μm, to ensure that the internal wire bonding has sufficient spacing and avoid the risk of contact or wire collapse caused by wire bonding obstruction.
[0071] For example, Figure 13 The following is a schematic diagram of the package of another synchronous rectifier controller, as shown below. Figure 13 As shown, Figure 13 The synchronous rectifier controller shown is... Figure 12 Similar to the synchronous rectifier controller shown, the sampling transistor uses a vertical high-voltage MOSFET, but it also uses... Figure 11 The scheme shown is for the common source sampling pin.
[0072] In this application, vertical high-voltage MOSFETs and planar high-voltage MOSFETs can be arbitrarily selected as sampling tubes according to actual engineering needs.
[0073] It should be noted that the specific values mentioned above are only for illustrating the implementation of this application in detail, and should not be construed as limitations on this application. In other examples, implementation methods, or embodiments, other values may be selected according to this application, and no specific limitations are made here.
[0074] It will be understood by those skilled in the art that the above are merely preferred embodiments of this application and are not intended to limit this application. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A synchronous rectification controller for controlling the rectifier switching transistors of an isolation converter, characterized in that, include: The package has a drain sampling pin and a control output pin. The drain sampling pin is used to connect to the drain of the rectifier switch, and the control output pin is used to connect to the gate of the rectifier switch. A sampling tube, integrated on a semiconductor die, has its input terminal electrically connected to the drain sampling pin and its output terminal electrically connected to the control module, for sampling the drain voltage of the rectifier switch and transmitting it to the control module. A control module, integrated on another semiconductor die and connected to the control output pin, is used to generate a control signal based on the drain voltage and output it to the control output pin. The semiconductor die containing the sampling tube and another semiconductor die containing the control module are encapsulated together in the package.
2. The synchronous rectifier controller according to claim 1, characterized in that, The rectifier switch includes a first rectifier switch and a second rectifier switch, and the sampling tube includes a first sampling tube and a second sampling tube for sampling the first rectifier switch and the second rectifier switch respectively. The first sampling tube and the second sampling tube are integrated on the same semiconductor die.
3. The synchronous rectifier controller according to claim 1, characterized in that, The rectifier switch includes a first rectifier switch and a second rectifier switch, and the sampling tube includes a first sampling tube and a second sampling tube for sampling the first rectifier switch and the second rectifier switch respectively. The first sampling tube is integrated on a first semiconductor die, and the second sampling tube is integrated on a second semiconductor die, which is different from the first semiconductor die.
4. The synchronous rectifier controller according to claim 2 or 3, characterized in that, The drain sampling pin includes a first drain sampling pin and a second drain sampling pin corresponding to the first rectifier switch and the second rectifier switch; the control output pin includes a first control output pin corresponding to the first rectifier switch and a second control output pin corresponding to the second rectifier switch. The package further includes a first source sampling pin and a second source sampling pin corresponding to the first rectifier switch and the second rectifier switch, or the package further includes a common source sampling pin corresponding to the first rectifier switch and the second rectifier switch.
5. The synchronous rectifier controller according to claim 1, characterized in that, The semiconductor die containing the sampling tube is bonded to the base island with conductive adhesive. The sampling tube is a vertical high-voltage MOSFET. The bottom drain of the sampling tube is electrically connected to the drain sampling pin of the package through conductive adhesive. The top gate and top source of the sampling tube are electrically connected to the control module through internal wiring.
6. The synchronous rectifier controller according to claim 1, characterized in that, The sampling tube is a planar high-voltage MOSFET. The drain of the sampling tube is electrically connected to the drain sampling pin of the package. The gate and source of the sampling tube are electrically connected to the control module through internal wiring.
7. The synchronous rectifier controller according to claim 5 or 6, characterized in that, The internal wires are arranged coplanarly and side by side within the package body, with a predetermined spacing between adjacent wires.
8. The synchronous rectifier controller according to claim 1, characterized in that, The isolation converter is a resonant converter, a flyback converter, or a forward converter.
9. The synchronous rectifier controller according to claim 1, characterized in that, The control module is also provided with a direct sampling input terminal, which is connected to the drain sampling pin.
10. The synchronous rectification controller according to claim 9, characterized in that, The control module is used to obtain the drain voltage of the rectifier switch through the direct-connected sampling input terminal when the supply voltage is less than the first voltage threshold.