Control circuit and electronic device for a bridge arm

Abstract

The application discloses a control circuit of a bridge arm and electronic equipment, and belongs to the technical field of power integrated circuits. The control circuit comprises a power supply circuit, a level shift circuit and a driving circuit, wherein the power supply circuit further comprises an isolation module; a first power supply end of the level shift circuit is coupled to a first power rail VS, and a second power supply end is coupled to a second power rail HB; a first power supply end of the driving circuit is coupled to the first power rail VS, and a second power supply end is coupled to a third power rail VB; by separately arranging the power supply end HB of the level shift circuit and the power supply end VB of the driving circuit, the conduction path of negative overshoot to the level shift circuit is blocked, and the logic correctness in the conversion process of the low-voltage domain control signal is ensured. When a negative overshoot is generated at VS by using the isolation module, the charge discharge path of VB to HB is cut off, the HB potential is inhibited from following the negative drop of VS, the working pressure difference between HB and VS is maintained within a safe amplitude range, and the synergistic optimization of the negative voltage resistance capability and low static power consumption is realized.

Description

Technical Field

[0001] This application belongs to the field of power integrated circuit technology, specifically relating to a control circuit and electronic device for a bridge arm. Background Technology

[0002] In the high-side power supply architecture of a gallium nitride (GaN) half-bridge driver, the reference ground of both the high-side level shift circuit and the subsequent driver circuit is connected to the low-voltage power rail (i.e., the first power rail VS). During the dead time of switching between the high-side and low-side GaN devices, the low-side GaN device is reverse-biased due to the freewheeling current of the load inductor, resulting in a severe negative overshoot (e.g., -2V to -3V) in VS. This negative overshoot is directly coupled to the operating power rail of the level shift circuit via the power supply network shared by the level shift circuit and the driver circuit, causing incorrect logic state flips or distortion in the drive signal transmission. Summary of the Invention

[0003] This application provides a control circuit and electronic device for a bridge arm, which solves the problem that the voltage difference of the power supply rail of the level shift circuit collapses due to the negative overshoot of the low-voltage power rail, thereby causing logical transmission errors or failures of the high-voltage domain control signal.

[0004] In a first aspect, embodiments of this application provide a control circuit for a bridge arm, the bridge arm including a first gallium nitride power device and a second gallium nitride power device, the control circuit including: Power supply circuit, used to provide voltage; A level shifting circuit is provided, wherein the first power supply terminal of the level shifting circuit is connected between the first gallium nitride power device and the second gallium nitride power device through a first power rail, and the second power supply terminal is connected to the power supply circuit through a second power rail. The input terminal is used to receive control signals in the low-voltage domain, and the output terminal is used to output control signals in the high-voltage domain. The voltage of the second power rail is higher than the voltage of the first power rail. The driving circuit has a first power supply terminal connected between the first gallium nitride power device and the second gallium nitride power device via the first power rail, a second power supply terminal connected to the power supply circuit via the third power rail, an input terminal connected to the output terminal of the level shifting circuit, and an output terminal connected to the gate of the first gallium nitride power device. It is used to control the first gallium nitride power device to close or open according to the control signal of the high-voltage domain. The voltage of the third power rail is higher than the voltage of the first power rail. The power supply circuit includes an isolation module connected between the second power rail and the third power rail. The isolation module is used to cut off when the first power rail is at a negative voltage, so as to suppress the voltage of the second power rail from falling with the voltage of the first power rail.

[0005] Optionally, the control circuit further includes: A bootstrap capacitor is connected between the first power rail and the third power rail; A switching device is connected between the power supply circuit and the third power rail; The negative voltage detection circuit has its input terminal connected to the first power rail and its output terminal connected to the control terminal of the switching device. It is used to disconnect the switching device when the voltage of the first power rail is less than a preset negative voltage threshold, so that the power supply circuit stops charging the bootstrap capacitor.

[0006] Optionally, the negative voltage detection circuit includes: a first transistor, the emitter of the first transistor being grounded, the base being connected to the first power rail, and the collector being connected to the switching device; when the voltage of the first power rail drops from above the preset negative voltage threshold to below the preset negative voltage threshold, the transistor changes from an on state to an off state to disconnect the switching device; when the voltage of the first power rail rises from below the preset negative voltage threshold to above the preset negative voltage threshold, the transistor changes from an off state to an on state to close the switching device.

[0007] Optionally, the control circuit further includes: A first buffer is connected between the collector of the first transistor and the switching device, and is used to output a disconnect signal when the first transistor changes from a conducting state to a cutoff state, and to output a close signal when the first transistor changes from a cutoff state to a conducting state; the disconnect signal is used to indicate that the switching device is disconnected, and the close signal is used to indicate that the switching device is closed.

[0008] Optionally, the negative voltage detection circuit further includes: a first diode, a reference voltage source, a first resistor, a second resistor, and a third resistor; one end of the first diode is connected to the first power rail, and the other end is connected to the first resistor; the other end of the first resistor is connected to the base of the first transistor; one end of the second resistor is connected to the output terminal of the reference voltage source, and the other end is connected to the base of the first transistor; one end of the third resistor is connected to a low-voltage power supply, and the other end is connected to the collector of the first transistor.

[0009] Optionally, the preset negative voltage threshold is determined based on the reference voltage output by the reference voltage source, the resistance ratio of the first resistor to the second resistor, the forward voltage drop of the first diode, and the base-emitter forward voltage of the first transistor.

[0010] Optionally, the driving circuit includes: a latch and a second buffer; the input terminal of the latch is connected to the output terminal of the level shifting circuit, and the output terminal is connected to the input terminal of the second buffer; the output terminal of the second buffer is connected to the gate of the first gallium nitride power device. The latch is used to latch the control signal of the high-voltage domain output by the level shifting circuit; The second buffer is used to drive the first gallium nitride power device according to the control signal of the high voltage domain.

[0011] Optionally, the isolation module is a high-voltage bipolar transistor, wherein the base and collector of the high-voltage bipolar transistor are connected, the emitter is connected to the second power rail, and the collector is connected to the third power rail.

[0012] Optionally, the control circuit further includes: a second diode connected between the switching device and the third power rail; and a third diode connected between the power supply circuit and the second power rail.

[0013] Secondly, embodiments of this application provide an electronic device including the control circuit of the bridge arm described above.

[0014] The embodiments of this application have the following advantages: The control circuit of this application embodiment includes: a power supply circuit, a level shifting circuit and a driving circuit, wherein the power supply circuit further includes an isolation module; the first power supply terminal of the level shifting circuit is coupled to the first power rail VS as its reference ground, and the second power supply terminal is coupled to the second power rail HB as its operating power supply, and the voltage of HB is higher than that of VS, so that the level shifting circuit forms an independent low-voltage logic processing floating domain with the floating ground VS as the reference potential.

[0015] The first power supply terminal of the drive circuit is also coupled to the first power rail VS as its reference ground, and the second power supply terminal is coupled to the third power rail VB as its power output power supply, with VB being higher than VS. This allows the drive circuit to form a high-current power output floating domain with the floating ground VS as the reference potential. By separating the second power supply terminal HB of the level shifting circuit from the third power supply terminal VB of the drive circuit, the conduction path of negative overshoot to the level shifting circuit is blocked, ensuring the logical correctness and transmission integrity of the low-voltage domain control signal to the high-voltage domain control signal conversion process.

[0016] By utilizing the unidirectional conductivity or controllable turn-off characteristics of the isolation module, when a negative overshoot transient occurs in VS, the charge discharge path from the VB rail to the HB rail is forcibly cut off, suppressing the HB potential from falling negatively with VS. This ensures that the operating voltage difference between HB and VS remains within the design-allowed safe range throughout the entire VS negative overshoot. Because the HB potential is suppressed by the isolation module and does not drop significantly with VS, the static bias current of each branch inside the level shifting circuit does not increase significantly with the increase of the VS negative voltage amplitude, achieving a synergistic optimization of high negative voltage resistance and ultra-low static power consumption. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the control circuit of a bridge arm according to an embodiment of this application; Figure 2 This is a schematic diagram of the control circuit of another bridge arm according to an embodiment of this application; Figure 3 This is a circuit diagram of a negative pressure detection circuit according to an embodiment of this application; Figure 4 This is a schematic diagram of the control circuit of another bridge arm according to an embodiment of this application; Figure 5 This is a circuit diagram of a control circuit for a bridge arm according to an embodiment of this application; Figure 6 This is a schematic diagram of the working waveform of the node when the first power rail is under negative voltage in an embodiment of this application; Figure 7 This is a schematic diagram of the voltage node waveform of the negative pressure detection circuit in an embodiment of this application.

[0018] Explanation of reference numerals in the attached figures: First gallium nitride power device G1, power supply circuit 01, level shifting circuit 02, drive circuit 03, first power rail VS, second power rail HB, third power rail VB, bootstrap capacitor C, switching device P, negative voltage detection circuit 04, first transistor Q0, first diode D1, reference voltage source Vref, first resistor R0, second resistor R1, third resistor R2, first buffer B1, latch RS, second buffer B2, second diode D2, third diode D3, high voltage bipolar transistor Q1. Detailed Implementation

[0019] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0020] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0021] The control circuit of the bridge arm provided in this application embodiment will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0022] Reference Figure 1 The diagram illustrates a structural schematic of a control circuit for a bridge arm according to an embodiment of this application. The bridge arm includes a first gallium nitride power device G1 and a second gallium nitride power device G2 (not shown in the diagram). The control circuit may specifically include: Power supply circuit 01 is used to provide voltage; The level shifting circuit 02 has its first power supply terminal connected between the first gallium nitride power device G1 and the second gallium nitride power device G2 via the first power rail VS. Its second power supply terminal is connected to the power supply circuit via the second power rail HB. The input terminal is used to receive control signals in the low-voltage domain, and the output terminal is used to output control signals in the high-voltage domain. The voltage of the second power rail HB is higher than the voltage of the first power rail VS. The driving circuit 03 has a first power supply terminal connected between the first gallium nitride power device G1 and the second gallium nitride power device G2 via a first power rail VS. Its second power supply terminal is connected to the power supply circuit via a third power rail VB. Its input terminal is connected to the output terminal of the level shifting circuit 02, and its output terminal is connected to the gate of the first gallium nitride power device G1. This circuit is used to control the first gallium nitride power device G1 to close or open according to the control signal from the high-voltage domain. The voltage of the third power rail VB is higher than the voltage of the first power rail VS. Power supply circuit 01 includes an isolation module ( Figure 1 (Not shown in the image) The isolation module is connected between the second and third power rails and is used to cut off when the first power rail is at a negative voltage, so as to suppress the voltage of the second power rail from falling with the voltage of the first power rail.

[0023] In this embodiment, the bridge arm includes a first gallium nitride power device G1 (high-side transistor) and a second gallium nitride power device G2 (low-side transistor, not shown in the figure), which are connected in series to form a half-bridge topology. The source of the first gallium nitride power device G1 and the drain of the second gallium nitride power device G2 are connected to the switching node, and the first power rail VS is connected to the switching node.

[0024] The power supply circuit 01 provides the operating voltage for the entire control circuit. Its output terminals are coupled to the second power supply terminals of the level shifting circuit 02 and the drive circuit 03, respectively, providing independent power supplies for the level shifting circuit 02 and the drive circuit 03. In this application, the power supply circuit 01 also integrates an isolation module (…). Figure 1 (Not shown in the image), this isolation module is connected between the second power rail HB and the third power rail VB.

[0025] The first power supply terminal of the level shift circuit 02 is connected between the first gallium nitride power device G1 and the second gallium nitride power device G2 via the first power rail VS. The second power supply terminal of the level shift circuit 02 is connected to the power supply circuit 01 via the second power rail HB. The input terminal of the level shift circuit 02 is used to receive control signals in the low-voltage domain, and the output terminal is used to output control signals in the high-voltage domain. The voltage of the second power rail HB is higher than the voltage of the first power rail VS. The level shift circuit 02 is used to convert the PWM control signal in the low-voltage domain (such as 3.3V or 5V logic level) into a high-voltage domain control signal in the high-voltage floating domain (with VS as the reference ground).

[0026] The first power supply terminal of the drive circuit 03 is connected between the first gallium nitride power device G1 and the second gallium nitride power device G2 via the first power rail VS. The second power supply terminal of the drive circuit 03 is connected to the power supply circuit 01 via the third power rail VB. The input terminal of the drive circuit 03 is connected to the output terminal of the level shifting circuit 02, and the output terminal of the drive circuit 03 is connected to the gate of the first gallium nitride power device G1. The drive circuit 03 is used to control the first gallium nitride power device G1 to close or open according to the control signal of the high-voltage domain. The voltage of the third power rail VB is higher than the voltage of the first power rail VS. As a power output stage, the drive circuit 03 provides sufficient drive capability to the gate of the first gallium nitride power device G1, ensuring that the gallium nitride power device achieves full conduction and rapid turn-off under high-frequency switching conditions.

[0027] The isolation module is used to cut off when the first power rail VS is negative, to suppress the voltage of the second power rail HB from falling along with the voltage of the first power rail VS. When the first power rail VS generates a negative overshoot due to the freewheeling current of the load inductor, the isolation module uses its single-phase conductivity to forcibly cut off the charge discharge path from the third power rail VB to the second power rail HB, so that the potential of the second power supply terminal HB of the level shift circuit 02 does not fall with the negative voltage of VS. As a result, the operating voltage difference (HB-VS) of the cross-coupled latch inside the level shift circuit 02 is maintained within a safe amplitude range throughout the negative overshoot of VS, cutting off the conduction path of the negative overshoot to the power supply disturbance of the level shift circuit 02.

[0028] The control circuit of this embodiment includes a power supply circuit, a level shifting circuit, and a drive circuit. The power supply circuit further includes an isolation module. By separating the second power supply terminal HB of the level shifting circuit from the third power supply terminal VB of the drive circuit, the conduction path of negative overshoot to the level shifting circuit is blocked, ensuring the logical correctness and transmission integrity during the conversion of the low-voltage domain control signal to the high-voltage domain control signal. Utilizing the unidirectional conductivity or controllable turn-off characteristics of the isolation module, when a negative overshoot transient occurs in VS, the charge discharge path from the VB rail to the HB rail is forcibly cut off, suppressing the HB potential from falling negatively with VS. This ensures that the working voltage difference between HB and VS remains within the design-allowed safe amplitude range throughout the entire VS negative overshoot. Because the HB potential is suppressed by the isolation module and does not drop significantly with VS, the static bias current of each branch inside the level shifting circuit does not increase significantly with the increase of the VS negative voltage amplitude, achieving a synergistic optimization of high negative voltage resistance and ultra-low static power consumption.

[0029] Reference Figure 2 The diagram shows a structural schematic of a control circuit for another bridge arm according to an embodiment of this application. The control circuit may further include: The bootstrap capacitor C is connected between the first power rail VS and the third power rail VB; Switching device P is connected between power supply circuit 01 and the third power rail VB; The negative voltage detection circuit 04 has its input terminal connected to the first power rail VS and its output terminal connected to the control terminal of the switching device P. It is used to disconnect the switching device P when the voltage of the first power rail VS is less than a preset negative voltage threshold, so that the power supply circuit 01 stops charging the bootstrap capacitor C.

[0030] In this embodiment, the control circuit further includes a bootstrap capacitor C. The bootstrap capacitor C is connected between the first power rail VS and the third power rail VB. As an energy storage element of the floating power supply, the bootstrap capacitor C provides energy to the drive circuit 03 when the drive circuit 03 drives the first gallium nitride power device G1 to conduct. The voltage difference across the bootstrap capacitor C (i.e., the voltage difference between VB and VS) constitutes the operating power supply of the drive circuit 03, and this voltage difference remains within a relatively stable range during normal circuit operation.

[0031] The control circuit also includes a switching device P. Switching device P is connected between the power supply circuit 01 and the third power rail VB. Switching device P controls the on / off state of the charging path of the bootstrap capacitor C via the power supply circuit 01. Switching device P can be implemented using a PMOS transistor. When it is on, the voltage output from the power supply circuit 01 charges the bootstrap capacitor C through switching device P; when it is off, the charging path between the power supply circuit 01 and the bootstrap capacitor C is cut off. The control terminal of switching device P is connected to the output terminal of the negative voltage detection circuit 04, and the on / off state of switching device P is determined by the control signal output by the negative voltage detection circuit 04.

[0032] The control circuit also includes a negative voltage detection circuit 04. The input terminal of the negative voltage detection circuit 04 is connected to the first power rail VS, and the output terminal is connected to the control terminal of the switching device P. The negative voltage detection circuit 04 is used to detect the potential of the first power rail VS in real time, and disconnects the switching device P when the voltage of the first power rail VS is less than a preset negative voltage threshold, so that the power supply circuit 01 stops charging the bootstrap capacitor C.

[0033] For example, the negative voltage detection circuit 04 internally generates a precise reference voltage through a bandgap reference circuit. This reference voltage, along with the potential of the first power rail VS, forms the detection core through a resistor divider network and a bipolar transistor Q0. When the potential of the first power rail VS drops below a preset negative voltage threshold due to the freewheeling current of the load inductor, the bipolar transistor Q0 transitions from the saturation region (or amplification region) to the cutoff region, causing a change in its collector potential. After being shaped by a buffer circuit, a control signal is output to the control terminal of the switching device P, causing the switching device P to turn off, thereby stopping the charging of the bootstrap capacitor C. When the potential of the first power rail VS rises back above the preset negative voltage threshold, the bipolar transistor Q0 turns on again, and the control signal output by the negative voltage detection circuit 04 causes the switching device P to turn on again, and the power supply circuit 01 resumes charging the bootstrap capacitor C.

[0034] This application can promptly disconnect the charging circuit of the bootstrap capacitor C when a negative overshoot occurs at the switching node VS, preventing overcharging of the bootstrap capacitor C due to the drop in VS potential and preventing the gate of the first gallium nitride power device G1 from being damaged by overdrive. At the same time, the negative voltage detection circuit 04 only operates when the VS voltage is lower than a preset threshold, and consumes only a very low quiescent current in the non-detection state, thereby achieving a low-power design.

[0035] Reference Figure 3 The diagram shows a circuit diagram of a negative voltage detection circuit provided in an embodiment of this application. The negative voltage detection circuit 04 includes: a first transistor Q0, the emitter of the first transistor Q0 is grounded, the base is connected to a first power rail VS, and the collector is connected to a switching device P. When the voltage of the first power rail VS drops from above a preset negative voltage threshold to below a preset negative voltage threshold, it changes from an on state to an off state, so that the switching device P is turned off; when the voltage of the first power rail VS rises from below a preset negative voltage threshold to above a preset negative voltage threshold, it changes from an off state to an on state, so that the switching device P is turned on.

[0036] In this embodiment, the negative voltage detection circuit 04 may include a first transistor Q0. The emitter of the first transistor Q0 is grounded, its base is connected to the first power rail VS, and its collector is connected to the switching device P. This application utilizes the change in the conduction state of the first transistor Q0 to achieve real-time detection and judgment of the potential of the first power rail VS. The specific working principle is as follows: When the voltage of the first power rail VS drops from above a preset negative voltage threshold to below a preset negative voltage threshold, the first transistor Q0 changes from the on state to the off state. When the potential of the first power rail VS is normal (no negative overshoot occurs), the base potential of the first transistor Q0 has a sufficient positive bias voltage relative to its emitter, causing the first transistor Q0 to be in the on state (saturation region or amplification region). At this time, the collector potential of the first transistor Q0 is pulled low, and this low level is processed by the buffer circuit and output to the control terminal of the switching device P, keeping the switching device P in the closed state, and the power supply circuit O1 normally charges the bootstrap capacitor C. When the potential of the first power rail VS gradually drops below the preset negative voltage threshold due to the freewheeling current of the load inductor, the base potential of the first transistor Q0 is pulled down to below its on-threshold voltage, and the first transistor Q0 loses its positive bias and enters the off state. The collector potential of the first transistor Q0 increases accordingly. The buffer circuit outputs a control signal to disconnect the switching device P, thereby cutting off the charging path between the power supply circuit O1 and the bootstrap capacitor C, stopping the charging of the bootstrap capacitor C, and preventing the bootstrap capacitor C from being overcharged due to the negative voltage of the first power rail VS.

[0037] When the voltage on the first power rail VS rises from below a preset negative voltage threshold to above a preset negative voltage threshold, the first transistor Q0 changes from the off state to the on state. When the negative overshoot of the first power rail VS ends and the potential rises back above the preset negative voltage threshold, the base potential of the first transistor Q0 regains sufficient positive bias, and the first transistor Q0 resumes the on state. Its collector potential is pulled low again, and a control signal is output through the buffer circuit to make the switching device P close again, and the power supply circuit O1 resumes normal charging of the bootstrap capacitor C.

[0038] The negative pressure detection circuit 04 realizes real-time tracking and automatic response of the first power rail VS potential. It only triggers the protection action when a dangerous negative pressure occurs in VS. It maintains extremely low static power consumption in non-detection state. Moreover, the entire detection process does not require an external comparator or complex logic circuit. The circuit structure is simple, the response speed is fast, and the cost is low.

[0039] In one embodiment, such as Figure 3 As shown, the negative voltage detection circuit 04 further includes: a first diode D1, a reference voltage source Vref, a first resistor R0, a second resistor R1, and a third resistor R2; one end of the first diode D1 is connected to the first power rail VS, and the other end is connected to the first resistor R0; the other end of the first resistor R0 is connected to the base of the first transistor Q0; one end of the second resistor R2 is connected to the output terminal of the reference voltage source Vref, and the other end is connected to the base of the first transistor Q0; one end of the third resistor R2 is connected to the low-voltage power supply, and the other end is connected to the collector of the first transistor Q0.

[0040] In this embodiment, the negative pressure detection circuit 04 may further include: a first diode D1, a reference voltage source Vref, a first resistor R0, a second resistor R1, and a third resistor R2. The above components are connected in the following manner to form the core voltage divider and state discrimination network for negative pressure detection.

[0041] One end of the first diode D1 is connected to the first power rail VS, and the other end is connected to the second resistor R1. The first diode D1 acts as a voltage withstand protection device, buffering the voltage between the first power rail VS and the internal nodes of the detection circuit. When the first power rail VS experiences a negative overshoot, the first diode D1 absorbs most of the negative voltage drop, preventing damage to the base of the first transistor Q0 due to excessive reverse voltage. Simultaneously, the forward voltage drop VD1 of the first diode D1 is used as a known constant in setting the detection threshold.

[0042] The other end of the second resistor R1 is connected to the base of the first transistor Q0. One end of the first resistor R0 is connected to the output of the reference voltage source Vref, and the other end of the first resistor R0 is connected to the base of the first transistor Q0. The reference voltage source Vref provides a reference voltage, which is superimposed on the potential of the first power rail VS through a voltage divider network composed of the first resistor R0, the second resistor R1, and the first diode D1, forming a node voltage VX at the base of the first transistor Q0. The value of the node voltage VX is determined by the reference voltage source Vref, the potential of the first power rail VS, the forward voltage drop of the first diode D1, and the voltage division ratio of the first resistor R0 and the second resistor R1. The reference voltage source Vref is preferably implemented using a bandgap reference circuit to output a stable reference voltage that does not drift with temperature changes, ensuring that the negative voltage detection threshold remains constant across the entire temperature range.

[0043] One end of the third resistor R2 is connected to the low-voltage power supply VCC, and the other end is connected to the collector of the first transistor Q0. The third resistor R2 acts as the collector load resistor of the first transistor Q0, pulling the collector potential down to a low level when the first transistor Q0 is turned on and pulling it up to a high level when the first transistor Q0 is turned off. The potential change at the collector of the first transistor Q0 is processed by a buffer circuit and output to the control terminal of the switching device P, thereby controlling the on / off state of the switching device P.

[0044] With the above settings, the precise reference voltage provided by the reference voltage source Vref and the negative voltage of the first power rail VS are superimposed through a resistor divider network to determine the bias state of the base of the first transistor Q0. Those skilled in the art can precisely set the preset negative voltage threshold value by adjusting the resistance ratio of the first resistor R0 and the second resistor R1. When the potential of the first power rail VS is higher than the preset negative voltage threshold, the base of the first transistor Q0 receives sufficient forward bias voltage, the first transistor Q0 is turned on, the switching device P is closed, and the power supply circuit O1 normally charges the bootstrap capacitor C. When the potential of the first power rail VS drops below the preset negative voltage threshold, the base bias of the first transistor Q0 is insufficient, the first transistor Q0 is turned off, the switching device P is opened, and the power supply circuit O1 stops charging the bootstrap capacitor C. The entire detection circuit has a simple structure, requiring no external comparator or complex operational amplifier, effectively reducing circuit area and manufacturing cost.

[0045] In one embodiment, the preset negative voltage threshold is determined based on the reference voltage output by the reference voltage source Vref, the resistance ratio of the first resistor R0 to the second resistor R1, the forward voltage drop of the first diode D1, and the base-emitter forward voltage of the first transistor Q0.

[0046] In this embodiment, the value of the preset negative voltage threshold is determined collaboratively by the parameters of each component in the negative voltage detection circuit 04. The preset negative voltage threshold can be determined based on the reference voltage output by the reference voltage source Vref, the resistance ratio of the first resistor R0 to the second resistor R1, the forward voltage drop of the first diode D1, and the base-emitter forward voltage of the first transistor Q0.

[0047] For example, the reference voltage output by the reference voltage source Vref is superimposed on the potential of the first power rail VS and the forward voltage drop of the first diode D1 through a voltage divider network formed by the first resistor R0 and the second resistor R1, forming a node voltage VX at the base of the first transistor Q0. When the node voltage VX is equal to the base-emitter forward voltage VBE of the first transistor Q0, the first transistor Q0 is in a critical state of conduction, and the voltage value of the first power rail VS corresponding to this critical state is the preset negative voltage threshold. The boundary conditions of the preset negative voltage threshold can satisfy the following relationship: VX=VREF-(VREF-(VS+VD1))×R1 / (R0+R1) When VX = VBE, the first transistor Q0 is in a critical conduction state, from which the expression for the preset negative voltage threshold can be obtained: VS(th)=VBE×(R0+R1) / R1-VREF×R0 / R1-VD1 As shown in the above formula, the preset negative voltage threshold is jointly determined by the reference voltage VREF, the resistance ratio of the first resistor R0 to the second resistor R1, the forward voltage drop VD1 of the first diode D1, and the base-emitter forward voltage VBE of the first transistor Q0. Those skilled in the art can flexibly set the specific value of the preset negative voltage threshold by adjusting the resistance ratio of the first resistor R0 to the second resistor R1 according to actual application requirements. Meanwhile, the reference voltage source Vref is implemented using a bandgap reference circuit, and its output reference voltage remains stable across the entire temperature range, ensuring that the preset negative voltage threshold does not drift significantly with temperature changes, thus guaranteeing the detection accuracy and reliability of the negative voltage detection circuit 04 under all operating conditions.

[0048] For example, the preset negative voltage threshold can be set to -9V. That is, when the potential of the first power rail VS drops below -9V, the negative voltage detection circuit 04 outputs a control signal to disconnect the switching device P and stop charging the bootstrap capacitor C. When the potential of the first power rail VS rises back to above -9V, the negative voltage detection circuit 04 controls the switching device P to close again and resume charging the bootstrap capacitor C.

[0049] Reference Figure 4 The diagram shows a structural schematic of a control circuit for another bridge arm according to an embodiment of this application. The control circuit may further include: The first buffer B1 is connected between the collector of the first transistor Q0 and the switching device P. It is used to output a disconnect signal when the first transistor Q0 changes from the on state to the off state, and to output a close signal when the first transistor Q0 changes from the off state to the on state. The disconnect signal is used to indicate that the switching device P is open, and the close signal is used to indicate that the switching device P is closed.

[0050] In this embodiment, the negative pressure detection circuit 04 further includes a first buffer B1. The first buffer B1 is connected between the collector of the first transistor Q0 and the switching device P, and is used to perform signal conditioning and drive enhancement on the potential change of the collector of the first transistor Q0 before outputting it to the control terminal of the switching device P.

[0051] The first buffer B1 is used to output a disconnect signal when the first transistor Q0 changes from the on state to the off state. When the potential of the first power rail VS drops below a preset negative voltage threshold, the base bias of the first transistor Q0 is insufficient, and the first transistor Q0 changes from the on state to the off state. After the first transistor Q0 is turned off, its collector potential rises to a logic high level under the pull-up effect of the third resistor R2. After shaping and driving amplifying this high-level signal, the first buffer B1 outputs a disconnect signal to the control terminal of the switching device P to indicate that the switching device P is turned off.

[0052] The first buffer B1 is also used to output a closed signal when the first transistor Q0 changes from the off state to the on state. When the potential of the first power rail VS rises back above the preset negative voltage threshold, the base of the first transistor Q0 regains sufficient forward bias, and the first transistor Q0 returns from the off state to the on state. After the first transistor Q0 is turned on, its collector potential is pulled low to a logic low level. After shaping and driving amplifying this low-level signal, the first buffer B1 outputs a closed signal to the control terminal of the switching device P to indicate that the switching device P is closed.

[0053] Through the above configuration, the first buffer B1 serves as a signal isolation and drive enhancement mechanism between the collector of the first transistor Q0 and the switching device P. On the one hand, the first buffer B1 can quickly respond to and shape the waveform of the potential change of the collector of the first transistor Q0, ensuring that the control terminal of the switching device P receives a control signal with steep edges, no jitter, and sufficient drive capability, thus avoiding increased power consumption due to the switching device P being in the linear region caused by a slow signal rise or fall edge. On the other hand, the first buffer B1 isolates the sensitive detection node of the negative voltage detection circuit 04 from the control terminal of the switching device P, preventing voltage spikes or current surges generated by the switching device P during switching operations from being reverse-coupled to the collector node of the first transistor Q0, interfering with the normal operation of the detection circuit, and improving the reliability and anti-interference capability of the negative voltage detection circuit 04.

[0054] In one embodiment, such as Figure 4 As shown, the driving circuit 03 includes: a latch RS and a second buffer B2; the input terminal of the latch RS is connected to the output terminal of the level shift circuit 02, and the output terminal is connected to the input terminal of the second buffer B2; the output terminal of the second buffer B2 is connected to the gate of the first gallium nitride power device G1. The latch RS is used to latch the control signal of the high-voltage domain output by the level shift circuit 02; The second buffer B2 is used to drive the first gallium nitride power device G1 according to the control signal of the high voltage domain.

[0055] In this embodiment, the driving circuit 03 includes a latch RS and a second buffer B2. The input terminal of the latch RS is connected to the output terminal of the level shift circuit 02, and the output terminal of the latch RS is connected to the input terminal of the second buffer B2. The output terminal of the second buffer B2 is connected to the gate of the first gallium nitride power device G1.

[0056] The latch RS is used to latch the high-voltage domain control signal output by the level shift circuit 02. The high-voltage domain control signal output by the level shift circuit 02 is in pulse form. This pulse signal has a short duration and cannot be directly used to drive the gate of the first gallium nitride power device G1. After receiving this pulse signal, the latch RS latches it to a stable level state, ensuring that the high-voltage domain control signal remains valid throughout the entire switching cycle until the next pulse signal arrives and flips. Simultaneously, the latch RS operates in the high-voltage floating domain, with its reference ground being the first power rail VS and its operating power source being the second power rail HB. Because the potential of the second power rail HB is suppressed by the isolation module when the first power rail VS experiences a negative overshoot and does not follow the drop in VS, the latch RS can still maintain a stable logic flip threshold and latch state under negative VS conditions, ensuring that the high-voltage domain control signal is not lost or falsely flipped under extreme negative voltage conditions.

[0057] The second buffer B2 is used to drive the first gallium nitride power device G1 according to the control signal of the high-voltage domain. The control signal latched by the latch RS is a high-level logic signal with limited driving capability. The second buffer B2 acts as a power amplifier stage. Its input terminal receives the high-voltage domain control signal output by the latch RS, and its output terminal is connected to the gate of the first gallium nitride power device G1. The second buffer B2 converts the logic level signal output by the latch RS into a gate drive signal with large sinking and sourcing current capabilities to drive the gate capacitance of the first gallium nitride power device G1 to charge and discharge rapidly, thereby realizing the rapid closing and opening of the first gallium nitride power device G1. The reference ground of the second buffer B2 is the first power rail VS, and the operating power supply is the third power rail VB. The amplitude of its output signal is determined by the voltage difference between VB and VS, which can provide sufficient gate-source voltage for the gate of the first gallium nitride power device G1, ensuring that the first gallium nitride power device G1 is fully turned on.

[0058] Through the above configuration, the driving circuit 03 of this embodiment constructs a two-stage "latch-drive" architecture between the level shifting circuit 02 and the gate of the first gallium nitride power device G1. The latch RS is responsible for converting the pulse-shaped control signal into a stable level signal, and the second buffer B2 is responsible for amplifying the level signal into a gate drive signal with sufficient driving capability. The two work together to ensure the logic stability of the control signal and meet the high-current drive requirements of the gallium nitride power device gate. At the same time, the power supply terminals of the latch RS and the second buffer B2 are respectively connected to the second power rail HB and the third power rail VB, realizing the separation of the power domains of the logic decision stage and the power output stage, further enhancing the negative voltage resistance and operational reliability of the driving circuit 03.

[0059] In one embodiment, such as Figure 4As shown, the second diode D2 is connected between the switching device and the third power rail; the third diode D3 is connected between the power supply circuit and the second power rail.

[0060] In this embodiment, the control circuit further includes a second diode D2 and a third diode D3. The second diode D2 is connected between the switching device P and the third power rail VB. The anode of the second diode D2 is connected to the output terminal of the switching device P, and the cathode of the second diode D2 is connected to the third power rail VB. When the switching device P is turned on, the voltage output by the power supply circuit 01 charges the bootstrap capacitor C via the switching device P and the second diode D2. The second diode D2 acts as a reverse-charging protection diode, preventing the stored charge in the bootstrap capacitor C from flowing back into the power supply circuit 01 via the switching device P when the bootstrap capacitor C is discharging, thus ensuring that the voltage across the bootstrap capacitor C remains stable during the switching operation. Simultaneously, since the second diode D2 is positioned between the switching device P and the bootstrap capacitor C, it acts as a unidirectional conductor in the charging circuit, effectively preventing the bootstrap capacitor C from forming a discharge path through the parasitic diode or body diode of the switching device P during the switching device P's off period, thereby ensuring the energy storage efficiency and voltage holding capacity of the bootstrap capacitor C.

[0061] The third diode D3 is connected between the power supply circuit 01 and the second power rail HB. The anode of the third diode D3 is connected to the output terminal of the power supply circuit 01, and the cathode of the third diode D3 is connected to the second power rail HB. The third diode D3 is used to reverse-cut off when the potential of the second power rail HB is higher than the output voltage of the power supply circuit 01, thus forming a physical isolation between the second power rail HB and the power supply circuit 01. When the first power rail VS generates a negative overshoot and the isolation module is in the off state, the potential of the second power rail HB is suppressed by the isolation effect between the isolation module and the third power rail VB, maintaining relative stability. However, if the potential of the second power rail HB rises abnormally due to certain transient factors (such as exceeding the output voltage of the power supply circuit 01), the third diode D3 reverse-cuts off, preventing the abnormal high voltage from being conducted to the power supply circuit 01 in reverse, protecting the internal components of the power supply circuit 01 from overvoltage damage. In addition, the third diode D3 and the isolation module together constitute a dual protection system for the second power rail HB, further enhancing the power supply safety of the level shifting circuit 02.

[0062] The third diode, D3, can be implemented using a high-voltage diode. Its reverse withstand voltage is selected based on the highest operating voltage and possible transient overshoot amplitude in the actual application to ensure reliable cutoff under various extreme conditions, achieving effective isolation between the second power rail HB and the power supply circuit 01. The second diode, D2, can be implemented using a fast recovery diode or a Schottky diode to reduce the forward voltage drop and improve charging efficiency. At the same time, its reverse recovery time should be as short as possible to reduce the additional losses caused by reverse recovery under high-frequency switching conditions.

[0063] Reference Figure 5 The diagram shows a circuit diagram of a bridge arm control circuit provided in an embodiment of this application. The isolation module is a high-voltage bipolar transistor Q1. The base and collector of the high-voltage bipolar transistor Q1 are connected, the emitter is connected to the second power rail HB, and the collector is connected to the third power rail VB.

[0064] In this embodiment, the isolation module can be implemented using a high-voltage bipolar transistor Q1. The base and collector of the high-voltage bipolar transistor Q1 are connected, the emitter is connected to the second power rail HB, and the collector is connected to the third power rail VB. The high-voltage bipolar transistor Q1 uses a diode connection (i.e., the collector and base are shorted). This connection method allows the high-voltage bipolar transistor Q1 to operate in forward conduction mode, and its conduction characteristics are equivalent to a high-voltage diode, allowing current to flow unidirectionally from the emitter to the collector, while it is in a cutoff state under reverse bias.

[0065] When the potential of the first power rail VS is at normal voltage (non-negative state), the potential of the third power rail VB is higher than that of the second power rail HB. The high-voltage bipolar transistor Q1 is forward-biased, and the second power rail HB is connected to the third power rail VB through the high-voltage bipolar transistor Q1. The voltage output by the power supply circuit 01 provides the operating power for the level shifting circuit 02 to the second power rail HB via the third power rail VB and the high-voltage bipolar transistor Q1. When the first power rail VS experiences a negative overshoot due to the freewheeling current of the load inductor, the potential of the third power rail VB decreases along with the first power rail VS (because the bootstrap capacitor C is connected between VS and VB). The emitter potential (connected to HB) of the high-voltage bipolar transistor Q1 is higher than its collector potential (connected to VB), causing the high-voltage bipolar transistor Q1 to be reverse-biased and cut off. After the high-voltage bipolar transistor Q1 is cut off, the electrical path between the second power rail HB and the third power rail VB is physically severed. The decrease in the potential of the third power rail VB cannot be transmitted to the second power rail HB, and the potential of the second power rail HB is suppressed and does not decrease along with the first power rail VS. Therefore, the working voltage difference between the first power supply terminal (VS) and the second power supply terminal (HB) of the level shifting circuit 02 is maintained within the design range throughout the negative overshoot of VS, ensuring the normal operation of the level shifting circuit 02.

[0066] like Figure 5As shown, the first power supply terminal of the level shift circuit 02 uses the first power rail VS as the reference ground, and the second power supply terminal uses the second power rail HB as the operating power supply. Its operating voltage amplitude is determined by the voltage difference between HB and VS (ΔV = HB - VS). The input terminal of the level shift circuit 02 receives a PWM control signal from the low-voltage control domain (reference ground is system ground GND). This PWM control signal is a low-voltage logic level (e.g., 3.3V or 5V), with a high-level amplitude of 3.3V or 5V relative to system ground GND and a low-level amplitude of 0V. This low-voltage domain control signal is converted into two complementary differential control signals by an input stage inverter, which respectively drive a pair of high-voltage cascaded NMOS transistors inside the level shift circuit 02.

[0067] When the low-voltage domain control signal is high, the first NMOS transistor is turned on, forming a transient pull-down current path in the first branch of the cross-coupled latch, flowing from the second power rail HB through the load resistor and the turned-on NMOS transistor to the first power rail VS. The drain node potential of the first branch is pulled low. The cross-coupled latch (composed of a pair of cross-connected PMOS transistors) uses a positive feedback regeneration mechanism to rapidly amplify the low potential of the first branch, while simultaneously forcing the PMOS transistor in the second branch to fully turn on, pulling the drain node of the second branch up to the potential of the second power rail HB. The output terminal of the cross-coupled latch (i.e., the drain node of the second branch) outputs a high level, the amplitude of which is the potential of HB relative to VS, i.e., the high-level logic value of the high-voltage domain control signal.

[0068] When the low-voltage domain control signal goes low, the second NMOS transistor turns on, the cross-coupled latch flips in the opposite direction, and the output terminal outputs a low level. The amplitude of this low level is the potential of VS relative to VS (i.e., 0V). Thus, the level shift circuit 02 converts the input low-voltage domain control signal into a high-voltage domain control signal with the first power rail VS as the reference ground and the second power rail HB as the high level at the output terminal, completing the cross-domain conversion from low-voltage domain logic level to high-voltage floating domain logic level.

[0069] Because the isolation module (high-voltage bipolar transistor Q1) cuts off when the first power rail VS experiences a negative overshoot, it suppresses the potential of the second power rail HB from falling with VS. The internal bias state and logic switching threshold of the level shift circuit 02 remain stable throughout the negative voltage operation. The operating voltage difference (HB-VS) of the cross-coupled latch inside the level shift circuit 02 does not change with the absolute potential of VS, and the regeneration gain and switching speed of the latch remain constant. This ensures the logical correctness and transmission integrity during the conversion of the low-voltage domain control signal to the high-voltage domain control signal, achieving reliable signal transmission with a negative voltage resistance of not less than -9V.

[0070] Reference Figure 6The diagram illustrates the working waveform of a node with a negative voltage on the first power rail, as provided in an embodiment of this application. Figure 6 As shown, Figure 5 The waveforms of each node when VS is negative are shown. The waveforms demonstrate that the dual-channel voltage rail design solves the problem of negative voltage resistance in the low-voltage to high-voltage level shift circuit.

[0071] Reference Figure 7 The diagram shows a voltage node waveform of the negative voltage detection circuit provided in an embodiment of this application. Figure 7 The diagram shows the waveform of the voltage node during the operation of the negative voltage detection circuit. When the voltage of the floating low-voltage power rail gradually decreases to a negative value Vneg (assuming Vneg is the critical switching voltage of the detection circuit), the voltage of node X also decreases accordingly. The operating state of transistor Q0 changes from the saturation region to the cutoff region, and the detection circuit outputs a control signal VG to turn off the switch P1. When the floating low-voltage power rail rises back above Vneg, the output control signal turns on the switch P1.

[0072] This application embodiment constructs a hierarchical architecture of power supply circuit, level shifting circuit, and driving circuit. The power rails of the high-side level shifting circuit and the subsequent driving circuit are divided into two independent power rails, HB and VB. An isolation module is set between them. The isolation module is reverse-cut off when the first power rail VS has a negative overshoot, which completely cuts off the conduction path of negative voltage noise to the power supply terminal of the level shifting circuit from a physical level. This prevents the HB potential from falling with VS and ensures that the working voltage difference of the cross-coupled latch inside the level shifting circuit remains stable when VS drops to -9V, thereby achieving a negative voltage resistance capability of not lower than -9V. Meanwhile, by setting up a negative voltage detection circuit, the VS potential is detected in real time by the change of the on and off states of the bipolar transistor Q0. When VS is lower than the preset negative voltage threshold, a control signal is immediately output to disconnect the switching device P to stop charging the bootstrap capacitor C. This effectively prevents the bootstrap capacitor C from being overcharged due to the negative VS voltage, which could cause the gate of the first gallium nitride power device G1 to break down. Moreover, the negative voltage detection circuit only operates when VS becomes negative, and the static current in the non-detection state is only about 54μA to 56μA, achieving extremely low standby power consumption. Furthermore, the negative voltage detection circuit consists of only a reference voltage source, three resistors, one diode, and one transistor. It does not require an external comparator or complex operational amplifier, resulting in a simple circuit structure, fast response speed, small layout area, and low cost. Moreover, the preset negative voltage threshold can be flexibly set by adjusting the resistor voltage division ratio, is unaffected by temperature drift, and has high detection accuracy. The placement of the second diode D2 and the third diode D3 further prevents reverse charge backflow and high voltage backflow, improving power supply safety. The "latch-drive" two-stage architecture of the latch RS and the second buffer B2 ensures the logic stability of the high voltage domain control signal and provides sufficient gate drive capability.

[0073] In one embodiment, this application also provides an electronic device including the control circuit of the bridge arm described above.

[0074] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0075] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A control circuit for a bridge arm, characterized in that, The bridge arm includes a first gallium nitride power device and a second gallium nitride power device, and the control circuit includes: Power supply circuit, used to provide voltage; A level shifting circuit is provided, wherein the first power supply terminal of the level shifting circuit is connected between the first gallium nitride power device and the second gallium nitride power device through a first power rail, and the second power supply terminal is connected to the power supply circuit through a second power rail. The input terminal is used to receive control signals in the low-voltage domain, and the output terminal is used to output control signals in the high-voltage domain. The voltage of the second power rail is higher than the voltage of the first power rail. The driving circuit has a first power supply terminal connected between the first gallium nitride power device and the second gallium nitride power device via the first power rail, a second power supply terminal connected to the power supply circuit via the third power rail, an input terminal connected to the output terminal of the level shifting circuit, and an output terminal connected to the gate of the first gallium nitride power device. It is used to control the first gallium nitride power device to close or open according to the control signal of the high-voltage domain. The voltage of the third power rail is higher than the voltage of the first power rail. The power supply circuit includes an isolation module connected between the second power rail and the third power rail. The isolation module is used to cut off when the first power rail is at a negative voltage, so as to suppress the voltage of the second power rail from falling with the voltage of the first power rail.

2. The control circuit for the bridge arm according to claim 1, characterized in that, Also includes: A bootstrap capacitor is connected between the first power rail and the third power rail; A switching device is connected between the power supply circuit and the third power rail; The negative voltage detection circuit has its input terminal connected to the first power rail and its output terminal connected to the control terminal of the switching device. It is used to disconnect the switching device when the voltage of the first power rail is less than a preset negative voltage threshold, so that the power supply circuit stops charging the bootstrap capacitor.

3. The control circuit for the bridge arm according to claim 2, characterized in that, The negative voltage detection circuit includes: a first transistor, the emitter of the first transistor is grounded, the base is connected to the first power rail, and the collector is connected to the switching device. When the voltage of the first power rail drops from above the preset negative voltage threshold to below the preset negative voltage threshold, the transistor changes from an on state to an off state to disconnect the switching device; when the voltage of the first power rail rises from below the preset negative voltage threshold to above the preset negative voltage threshold, the transistor changes from an off state to an on state to close the switching device.

4. The control circuit for the bridge arm according to claim 3, characterized in that, Also includes: A first buffer is connected between the collector of the first transistor and the switching device, and is used to output a disconnect signal when the first transistor changes from a conducting state to a cutoff state, and to output a close signal when the first transistor changes from a cutoff state to a conducting state; the disconnect signal is used to indicate that the switching device is disconnected, and the close signal is used to indicate that the switching device is closed.

5. The control circuit for the bridge arm according to claim 3, characterized in that, The negative voltage detection circuit further includes: a first diode, a reference voltage source, a first resistor, a second resistor, and a third resistor; one end of the first diode is connected to the first power rail, and the other end is connected to the first resistor; the other end of the first resistor is connected to the base of the first transistor; one end of the second resistor is connected to the output terminal of the reference voltage source, and the other end is connected to the base of the first transistor; one end of the third resistor is connected to a low-voltage power supply, and the other end is connected to the collector of the first transistor.

6. The control circuit for the bridge arm according to claim 5, characterized in that, The preset negative voltage threshold is determined based on the reference voltage output by the reference voltage source, the resistance ratio of the first resistor to the second resistor, the forward voltage drop of the first diode, and the base-emitter forward voltage of the first transistor.

7. The control circuit for the bridge arm according to claim 1, characterized in that, The driving circuit includes: a latch and a second buffer; the input terminal of the latch is connected to the output terminal of the level shifting circuit, and the output terminal is connected to the input terminal of the second buffer; the output terminal of the second buffer is connected to the gate of the first gallium nitride power device. The latch is used to latch the control signal of the high-voltage domain output by the level shifting circuit; The second buffer is used to drive the first gallium nitride power device according to the control signal of the high voltage domain.

8. The control circuit for the bridge arm according to claim 1, characterized in that, The isolation module is a high-voltage bipolar transistor. The base and collector of the high-voltage bipolar transistor are connected, the emitter is connected to the second power rail, and the collector is connected to the third power rail.

9. The control circuit for the bridge arm according to claim 2, characterized in that, Also includes: The second diode is connected between the switching device and the third power rail; The third diode is connected between the power supply circuit and the second power rail.

10. An electronic device, characterized in that, Includes the control circuit of the bridge arm as described in any one of claims 1-9 above.

Images