Frequency converter and harmonic suppression method, circuit and electrical appliance thereof
Patent Information
- Application Number
- CN202611094731.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-22
- Publication Date
- 2026-09-25
AI Technical Summary
然而,这种方式需要设置多个带通滤波器,谐波提取较为复杂,算法复杂度较高
[0016]本申请提供的多个实施例,通过在两相旋转dq坐标系下对dq轴电流进行积分均值滤波提取参考电流基波分量,经坐标逆变换得到目标电流基波分量,进而分离出包含谐波分量的参考三相电流信号,从而能够一次性提取基波分量并得到参考三相电流信号,无需为各次谐波单独设置滤波器,降低了谐波抑制方法复杂度。同时,上述谐波抑制方法中,通过PR补偿控制器对谐波分量跟踪生成补偿信号,最终经SVPWM控制器补偿得到目标三相电流信号。PR补偿控制器可实现对谐波分量的精确补偿,且动态响应性能较高,从而能够进一步提高方法的谐波抑制效果。
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Figure CN122823934A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electrical control technology in the next-generation information technology industry, and in particular to a frequency converter and its harmonic suppression method, circuit and electrical equipment. Background Technology
[0002] Among various frequency conversion technologies, harmonic suppression has always been a research hotspot. Specifically, due to the nonlinear characteristics of the front-end rectifier stage and the back-end inverter stage of the frequency converter, a large number of harmonic currents and voltages are generated on both the input and output sides. Typical harmonic orders include the 5th, 7th, 11th, and 13th harmonics. These characteristic harmonics can cause various problems such as grid voltage distortion and increased transformer and line losses.
[0003] To suppress inverter harmonics, some related technologies set up bandpass filters for the characteristic subharmonics of these typical orders to extract the corresponding harmonic currents, thereby determining the corresponding feedforward compensation signals and achieving harmonic suppression. However, this method requires setting up multiple bandpass filters, making harmonic extraction complex and the algorithm highly complex. Summary of the Invention
[0004] Based on this, this application provides a harmonic suppression method for frequency converters, which can reduce the algorithm complexity of harmonic suppression methods and improve the harmonic suppression effect.
[0005] On one hand, this application provides a harmonic suppression method for a frequency converter, comprising: acquiring a three-phase current signal from the input side of the frequency converter; performing a first preset transformation on the three-phase current signal to obtain the dq-axis current in a two-phase rotating dq coordinate system; performing integral mean filtering on the dq-axis current to extract a reference current fundamental component; performing a first preset inverse transformation on the reference current fundamental component to obtain a target current fundamental component; the first preset transformation and the first preset inverse transformation are corresponding; using the target current fundamental component to perform fundamental processing on the three-phase current signal to obtain a reference three-phase current signal, wherein the reference three-phase current signal contains harmonic components; using a preset PR compensation controller to track and measure the harmonic components in the reference three-phase current signal and generate a current compensation signal; and using an SVPWM controller to compensate the reference three-phase current signal based on the current compensation signal to obtain the target three-phase current signal.
[0006] Optionally, the step of performing a first preset transformation on the three-phase current signal to obtain the dq-axis current in the two-phase rotating dq coordinate system includes: performing a Clark transformation on the three-phase current signal to obtain the current in the two-phase stationary αβ coordinate system; and performing a Park transformation on the current in the two-phase stationary αβ coordinate system to obtain the dq-axis current.
[0007] Optionally, the step of performing a first preset inverse transformation on the fundamental component of the reference current to obtain the fundamental component of the target current includes: performing an inverse Park transformation on the fundamental component of the reference current to obtain the αβ-axis current; and performing an inverse Clark transformation on the αβ-axis current to obtain the fundamental component of the target current.
[0008] Optionally, the dq-axis current is subjected to integral mean filtering to extract the fundamental component of the reference current, including: determining one-sixth of the fundamental period as the integration time window; and performing integral mean filtering on the dq-axis current component according to the integration time window to extract the fundamental component of the reference current.
[0009] Optionally, the step of performing integral mean filtering on the dq-axis current components according to the integral time window to extract the fundamental component of the reference current includes: inputting the dq-axis currents into the integrator to obtain a first reference signal; delaying the first reference signal by T / 6 to obtain a second reference signal; where T is the fundamental period; combining the first reference signal and the second reference signal into a third reference signal; and filtering the third reference signal using the integral time window to obtain the fundamental component of the reference current.
[0010] Optionally, the three-phase current signal is processed using the fundamental component of the target current to obtain a reference three-phase current signal, including: distributing the fundamental component of the target current to each phase of the three-phase current signal; and subtracting the fundamental component of the target current from the current signal of each phase to obtain the reference three-phase current signal.
[0011] On the other hand, this application provides a harmonic suppression circuit applied to a frequency converter, comprising: a conversion circuit, a first average filter circuit, a second average filter circuit, an inverse conversion circuit, a fundamental frequency processing circuit, a PR compensation controller, and an SVPWM controller. The three input terminals of the conversion circuit correspond to each phase of the three-phase current signal on the input side; the two output terminals of the conversion circuit are respectively connected to the input terminals of the first and second average filter circuits; the conversion circuit performs a first preset conversion on the three-phase current signal to obtain the dq-axis current in a two-phase rotating dq coordinate system; the first and second average filter circuits perform integral average filtering on the dq-axis current to extract the fundamental component of the reference current; the two input terminals of the inverse conversion circuit... The output terminals of the first and second average filtering circuits are respectively connected; the inverse transformation circuit is used to perform a first preset inverse transformation on the fundamental component of the reference current to obtain the fundamental component of the target current; the first preset transformation and the first preset inverse transformation correspond to each other; the fundamental processing circuit is connected to the three output terminals of the inverse transformation circuit and is used to perform fundamental processing on the three-phase current signal using the fundamental component of the target current to obtain the reference three-phase current signal; the reference three-phase current signal contains harmonic components; the fundamental processing circuit is also used to track and measure the harmonic components in the reference three-phase current signal using a preset PR compensation controller and generate a current compensation signal; and based on the current compensation signal, the reference three-phase current signal is compensated using an SVPWM controller to obtain the target three-phase current signal.
[0012] Optionally, the conversion circuit includes: a Clarke transform circuit, with its three input terminals serving as the three input terminals of the conversion circuit; the Clarke transform circuit is used to perform Clarke transform on the three-phase current signal to obtain the current in the two-phase stationary αβ coordinate system; a Parker transform circuit, with its two input terminals connected to the two output terminals of the Clarke transform circuit; the two output terminals of the Parker transform circuit serve as the two output terminals of the conversion circuit; the Parker transform circuit is used to perform Parker transform on the current in the two-phase stationary αβ coordinate system to obtain the dq-axis current; the inverse conversion circuit includes: an inverse Parker transform circuit, with its two input terminals serving as the two input terminals of the inverse conversion circuit; the Parker inverse transform circuit is used to perform inverse Parker transform on the fundamental component of the reference current to obtain the αβ-axis current; a Clarke inverse transform circuit, with its two input terminals connected to the two output terminals of the Parker inverse transform circuit respectively; the three output terminals of the Clarke inverse transform circuit are respectively connected to the fundamental processing circuit; the Clarke inverse transform circuit is used to perform inverse Clarke transform on the αβ-axis current to obtain the fundamental component of the target current.
[0013] Optionally, both the first and second mean filtering circuits include: an integrator, the input of which serves as the input of the first mean filtering circuit; the integrator is used to integrate the input d-axis current or q-axis current to obtain a first reference signal; a delay circuit; the delay circuit is connected to the output of the integrator and is used to delay the first reference signal by T / 6 to obtain a second reference signal; T is the fundamental period; a synthesis circuit, connected to both the output of the integrator and the delay circuit; the synthesis circuit is used to synthesize the first and second reference signals into a third reference signal; and a filtering circuit, connected to the synthesis circuit, is used to filter the third reference signal using the integration time window to obtain the fundamental component of the reference current.
[0014] In another aspect, this application provides a frequency converter including the aforementioned harmonic suppression circuit.
[0015] In another aspect, this application provides an electrical device including the aforementioned harmonic suppression circuit or the aforementioned frequency converter.
[0016] The embodiments provided in this application extract the fundamental component of the reference current by performing integral averaging filtering on the dq-axis current in a two-phase rotating dq coordinate system. The fundamental component of the target current is then obtained through inverse coordinate transformation, thereby separating the reference three-phase current signal containing harmonic components. This allows for the extraction of the fundamental component and the acquisition of the reference three-phase current signal in a single step, eliminating the need for separate filters for each harmonic and reducing the complexity of the harmonic suppression method. Furthermore, in the aforementioned harmonic suppression method, a PR compensation controller tracks the harmonic components to generate compensation signals, which are then compensated by an SVPWM controller to obtain the target three-phase current signal. The PR compensation controller enables precise compensation of harmonic components and exhibits high dynamic response performance, further improving the harmonic suppression effect of the method. Attached Figure Description
[0017] Figure 1 This is a schematic flowchart of a harmonic suppression method for a frequency converter according to an embodiment of this application; Figure 2 This is a block diagram illustrating the signal transmission of a three-phase current signal according to an embodiment of this application. Figure 3 This is a block diagram illustrating the principle of integral mean filtering according to one embodiment of this application; Figure 4 This is a schematic diagram of the structure of a harmonic suppression circuit according to an embodiment of this application; Figure 5 This is a schematic diagram of the structure of a first mean filter circuit and a second mean filter circuit according to an embodiment of this application.
[0018] Explanation of reference numerals in the attached figures 100. Harmonic suppression circuit; 110. Transformer circuit; 111. Clarke transform circuit; 112. Parker transform circuit; 120. First mean filter circuit; 130. Second mean filter circuit; 140. Inverse transform circuit; 141. Inverse Parker transform circuit; 142. Inverse Clarke transform circuit; 150. Fundamental wave processing circuit; 160. Integrator; 170. Delay circuit; 180. Synthesizing circuit; 190. Filter circuit. Detailed Implementation
[0019] To make the technical solution and beneficial effects of this application more apparent and understandable, a detailed description is provided below by listing specific embodiments. The accompanying drawings are not necessarily drawn to scale, and local features may be enlarged or reduced to more clearly show the details of the local features; unless otherwise defined, the technical and scientific terms used herein have the same meanings as those in the technical field to which this application pertains.
[0020] refer to Figure 1 Some embodiments of this application provide a harmonic suppression method for a frequency converter, including: S101, acquire the three-phase current signal on the input side of the frequency converter.
[0021] It is understandable that the input side refers to the side of the frequency converter connected to the power grid. Three-phase current signals can be detected in various ways; for example, they can be acquired by a current sensor on the input side of the frequency converter.
[0022] S102, perform a first preset transformation on the three-phase current signal to obtain the dq-axis current in the two-phase rotating dq coordinate system.
[0023] Understandably, the first preset transformation refers to the process of transforming the three-phase current in the three-phase abc stationary coordinate system into the dq-axis current coordinate transformation in the two-phase rotating dq coordinate system. The dq-axis current refers to the current components in the two-phase rotating dq coordinate system, including the d-axis current and the q-axis current. After the first preset transformation, the fundamental positive-sequence current exhibits DC characteristics, while the characteristic subharmonics in the three-phase current (such as the 5th, 7th, 11th, 13th, etc., 6k±1th orders) are uniformly converted into positive or negative sequence AC components of the 6kth order, where k is a positive integer.
[0024] Specifically, in a two-phase rotating dq coordinate system, the three-phase current signal will be represented as a DC signal, while the characteristic subharmonics of the 5th, 7th, 11th, 13th, etc., 6k±1th, which are commonly caused by nonlinear loads in the power grid, will be converted into positive or negative sequence AC components of the 6kth (6th, 12th, 18th, etc.) order, so that harmonic separation can be performed in subsequent steps.
[0025] As a concrete example, see reference Figure 2The step of performing a first preset transformation on the three-phase current signal to obtain the dq-axis current in the two-phase rotating dq coordinate system in step S102 may include: performing a Clark transformation on the three-phase current signal to obtain the current in the two-phase stationary αβ coordinate system; and performing a Park transformation on the current in the two-phase stationary αβ coordinate system to obtain the dq-axis current.
[0026] Specifically, such as Figure 2 As shown, the Clark transform converts three-phase currents (a-phase current ia, b-phase current ib, and c-phase current ic) in a stationary abc coordinate system into currents in a two-phase stationary αβ coordinate system (α-axis current iα and β-axis current iβ). The Park transform converts the currents in the two-phase stationary αβ coordinate system into dq-axis currents in a two-phase rotating dq coordinate system that rotates synchronously at the fundamental frequency (d-axis current id and q-axis current iq). Therefore, by performing the Clark and Park transforms sequentially, the three-phase current signal on the input side can be converted into dq-axis currents.
[0027] S103 performs integral mean filtering on the dq-axis current to extract the fundamental component of the reference current.
[0028] As can be understood, integral averaging filtering refers to a filtering method that integrates and averages the continuous sampled values of the input signal within a fixed integration time window. The reference current fundamental component refers to the fundamental DC component extracted from the dq-axis current after integral averaging filtering, in a two-phase rotating dq coordinate system.
[0029] Specifically, in a two-phase rotating dq coordinate system, the three-phase current signal is transformed into a fundamental component of the reference current and harmonic components composed of characteristic harmonics. The fundamental reference current always maintains a positive sequence, thus integral averaging filtering can effectively extract this component. The harmonic components are converted into positive or negative sequence AC components of the 6kth order, indicating that they undergo periodic changes. Therefore, by selecting a specific integration time window, the 6kth harmonic components in the dq-axis current can be made to cancel each other out, resulting in a pure fundamental DC component of the reference current.
[0030] In some embodiments, the step of performing integral mean filtering on the dq-axis current to extract the fundamental component of the reference current in step S103 includes: determining one-sixth of the fundamental period as the integration time window; and performing integral mean filtering on the dq-axis current component according to the integration time window to extract the fundamental component of the reference current.
[0031] It is understandable that the fundamental frequency period is the reciprocal of the fundamental frequency of the power grid. For example, for a 50Hz mains power supply, the fundamental frequency period is 20 milliseconds, and the integration time window is approximately 3.33 milliseconds.
[0032] Specifically, in the power grid, nonlinear loads mainly generate characteristic harmonics of the 6k±1 order. After the Parker transformation in step S102, all the 6k±1 order harmonics are converted into positive or negative sequence harmonics of the 6k order. In the above embodiment, the integration time window is set to one-sixth of the fundamental period. The positive or negative sequence harmonics of the 6k order will cancel each other out during the integration time window, thus naturally filtering out all characteristic harmonic components of the 6k order in the dq-axis current component, retaining only the fundamental component of the reference current. This achieves the function of extracting the fundamental component of the reference current.
[0033] Furthermore, in the above process, since integral mean filtering only requires accumulation and division operations, without complex number transformation or additional filter parameter tuning, the computational complexity is low, which simplifies the calculation process of harmonic suppression methods and reduces the implementation cost of the method.
[0034] In some embodiments, reference Figure 3 The steps of performing integral mean filtering on the dq-axis current components according to the integral time window to extract the fundamental component of the reference current include: inputting the dq-axis currents into the integrator to obtain a first reference signal; delaying the first reference signal by T / 6 to obtain a second reference signal; where T is the fundamental period; combining the first reference signal and the second reference signal into a third reference signal; and filtering the third reference signal using the integral time window to obtain the fundamental component of the reference current.
[0035] Specifically, the first reference signal refers to the signal output by the integrator after integrating the d-axis current or q-axis current respectively. It includes the cumulative component of the fundamental DC component over time, and the periodic fluctuation component after integrating the 6kth harmonic component. It can be understood that the d-axis current and q-axis current can be processed separately using two mean-filtering circuits. The second reference signal is the signal obtained by delaying the first reference signal by T / 6 time (T being the fundamental period). This delay can be achieved using various delay circuits such as shift registers, analog delay lines, or digital FIFO buffers; the specific delay principles are not elaborated here. The third reference signal is the signal obtained by combining the first and second reference signals using a combining circuit (e.g., an adder or subtractor). The operation of the combining circuit is matched to the final required filtering function, so that the periodic fluctuation components in the first and second reference signals complement each other and cancel each other out after combining, thus obtaining the fundamental component of the reference current.
[0036] S104, perform a first preset inverse transform on the fundamental component of the reference current to obtain the fundamental component of the target current. The first preset transform and the first preset inverse transform are corresponding.
[0037] It is understandable that the first preset inverse transformation refers to the inverse transformation process corresponding to the first preset transformation, used to restore the fundamental component of the reference current in the dq coordinate system to the fundamental component of the target current in the three-phase stationary coordinate system. The fundamental component of the target current refers to the three-phase fundamental current obtained after the fundamental component of the reference current undergoes the first preset inverse transformation. This current only contains the fundamental DC component of the three-phase current signal, therefore the fundamental component of the target current is the inverter output current under ideal conditions.
[0038] In some embodiments, reference Figure 2 The step of S104, which performs a first preset inverse transformation on the fundamental component of the reference current to obtain the fundamental component of the target current, includes: performing an inverse Park transformation on the fundamental component of the reference current to obtain the αβ-axis current; and performing an inverse Clark transformation on the αβ-axis current to obtain the fundamental component of the target current.
[0039] Specifically, when the first preset transformation includes the sequential execution of the Clarke transformation and the Park transformation, the first preset inverse transformation can be the sequential execution of the Park inverse transformation and the Clark inverse transformation. The Park inverse transformation can transform the fundamental component of the reference current (including the d-axis component) into... and q-axis components The current is converted into the αβ-axis current (including the α-axis component iαf and the β-axis component iβf) in a two-phase stationary αβ coordinate system. The inverse Clarke transform can convert the αβ-axis current into the fundamental component of the target current in a three-phase stationary abc coordinate system. The fundamental component of the target current includes the a-phase component iaf, the b-phase component ibf, and the c-phase component icf. Thus, the function of obtaining the fundamental component of the target current is realized.
[0040] S105 uses the fundamental component of the target current to perform fundamental processing on the three-phase current signal to obtain a reference three-phase current signal, which contains harmonic components.
[0041] Specifically, the reference three-phase current signal refers to the difference signal obtained by subtracting the fundamental component of the target current for each corresponding phase from the three-phase current signal acquired in step S101. Figure 2 The reference three-phase current signal may include phase a reference component ica, phase b reference component icb, and phase c reference component icc. The reference three-phase current signal mainly contains harmonic components, so it can be used as the target for subsequent harmonic tracking and compensation generation by the PR compensation controller to achieve harmonic suppression function.
[0042] In some embodiments, S105 uses the fundamental component of the target current to perform fundamental processing on the three-phase current signal to obtain a reference three-phase current signal, including: allocating the fundamental component of the target current to each phase of the three-phase current signal; and subtracting the fundamental component of the target current from the current signal of each phase to obtain the reference three-phase current signal.
[0043] Specifically, the corresponding component of the target current fundamental component can be subtracted from the current signal of each phase in the three-phase current signal. For example, the phase a current ia can be subtracted from the phase a component iaf to obtain the phase a reference component ica in the reference three-phase current signal. Thus, the function of obtaining the reference three-phase current signal using the target current fundamental component is realized.
[0044] S106 uses a preset PR compensation controller to track and measure the harmonic components in the reference three-phase current signal and generate a current compensation signal.
[0045] S107, based on the current compensation signal, uses the SVPWM controller to compensate the reference three-phase current signal to obtain the target three-phase current signal.
[0046] As can be understood, the PR compensation controller refers to a proportional resonant controller, which can provide extremely high gain for AC signals of a specific frequency, achieving zero steady-state error tracking and compensation generation of harmonic components. The current compensation signal is the control signal generated by the PR compensation controller based on the harmonic components in the reference three-phase current signal. The SVPWM controller refers to a space vector pulse width modulation controller, used to convert the current compensation signal into drive pulses for power switching devices, causing the inverter to generate a voltage opposite to the harmonic current, thus achieving harmonic suppression. The target three-phase current signal refers to the final three-phase current signal after compensation by the current compensation signal. The harmonic content in the target three-phase current signal is significantly reduced, thereby achieving the final harmonic suppression effect.
[0047] The aforementioned harmonic suppression method extracts the fundamental component of the reference current by performing integral averaging filtering on the dq-axis current in a two-phase rotating dq coordinate system. The fundamental component of the target current is then obtained through inverse coordinate transformation. This allows for the separation of the reference three-phase current signal containing harmonic components, enabling the extraction of the fundamental component and obtaining the reference three-phase current signal in a single step. This eliminates the need for separate filters for each harmonic, reducing the complexity of the harmonic suppression method. Furthermore, the method utilizes a PR compensation controller to track harmonic components and generate compensation signals, which are then compensated by an SVPWM controller to obtain the target three-phase current signal. The PR compensation controller achieves precise compensation of harmonic components and exhibits high dynamic response performance, further enhancing the harmonic suppression effect of the method.
[0048] In some embodiments, the preset PR compensation controller is composed of multiple proportional resonant controllers connected in parallel. The resonant frequencies of the proportional resonant controllers are each set to 6k times the fundamental frequency; k is a positive integer.
[0049] Specifically, the proportional resonant controller can achieve zero steady-state error tracking of AC signals at the corresponding resonant frequency. Therefore, in the above harmonic suppression method, the preset PR compensation controller is set as multiple proportional resonant controllers connected in parallel, and the resonant frequencies of the multiple proportional resonant controllers are configured as 6th, 12th, 18th, etc., 6k times the fundamental frequency. The parallel connection of multiple proportional resonant controllers can simultaneously and accurately compensate for the main characteristic subharmonic components in the total harmonic current, thereby significantly improving the suppression accuracy of multi-frequency harmonic currents and enhancing the harmonic suppression effect.
[0050] refer to Figure 2 and Figure 4 This application provides a harmonic suppression circuit for use in a frequency converter. The harmonic suppression circuit 100 includes: a conversion circuit 110, a first average filter circuit 120, a second average filter circuit 130, an inverse conversion circuit 140, a fundamental frequency processing circuit 150, a PR compensation controller (not shown), and an SVPWM controller (not shown). The three input terminals of the conversion circuit 110 (first input terminal a1, second input terminal a2, and third input terminal a3) correspond to each phase of the three-phase current signal (phase a current ia, phase b current ib, and phase c current ic) on the input side. The two output terminals of the conversion circuit (first output terminal c1 and second output terminal c2) are connected to the input terminals of the first average filter circuit 120 and the second average filter circuit 130, respectively. The conversion circuit 110 performs a first preset conversion on the three-phase current signals (ia, ib, ic) to obtain the dq-axis currents (id, iq) in a two-phase rotating dq coordinate system. The first mean filtering circuit 120 and the second mean filtering circuit 130 are used to perform integral mean filtering on the dq axis current to extract the fundamental component of the reference current. , The two input terminals (d1, d2) of the inverse converter circuit 140 are respectively connected to the output terminals of the first mean filter circuit 120 and the second mean filter circuit 130. The inverse converter circuit 140 is used to filter the fundamental component of the reference current ( , The circuit performs a first preset inverse transformation to obtain the fundamental components of the target current (iaf, ibf, icf). The first preset transformation corresponds to the first preset inverse transformation. The three output terminals (f1, f2, f3) of the fundamental wave processing circuit 150 and the inverse transformation circuit 140 are connected to perform fundamental wave processing on the three-phase current signal using the fundamental components of the target current (iaf, ibf, icf) to obtain the reference three-phase current signal (ica, icb, icc). The reference three-phase current signal (ica, icb, icc) contains harmonic components. The fundamental wave processing circuit 150 is also used to track and measure the harmonic components in the reference three-phase current signal using a preset PR compensation controller and generate a current compensation signal. Based on the current compensation signal, the reference three-phase current signal is compensated using an SVPWM controller to obtain the target three-phase current signal.
[0051] It should be noted that for the description of the harmonic suppression circuit in the above embodiments, please refer to the aforementioned description of the harmonic suppression method, which will not be repeated here.
[0052] In some embodiments, reference Figure 2 and Figure 4 The conversion circuit 110 includes a Clarke transform circuit 111 and a Parker transform circuit 112. The three input terminals of the Clarke transform circuit 111 serve as the three input terminals (a1, a2, a3) of the conversion circuit. The Clarke transform circuit 111 performs a Clarke transform on the three-phase current signals (ia, ib, ic) to obtain the currents (iα, iβ) in the two-phase stationary αβ coordinate system. The two input terminals (b1, b2) of the Parker transform circuit 112 are connected to the two output terminals of the Clarke transform circuit 111. The two output terminals of the Parker transform circuit 112 serve as the two output terminals (c1, c2) of the conversion circuit. The Parker transform circuit 112 performs a Parker transform on the currents (iα, iβ) in the two-phase stationary αβ coordinate system to obtain the dq-axis currents (id, iq).
[0053] The inverse converter circuit 140 includes a Parker inverse converter circuit 141 and a Clarke inverse converter circuit 142. The two input terminals of the Parker inverse converter circuit 141 serve as the two input terminals (d1, d2) of the inverse converter circuit. The Parker inverse converter circuit 141 is used to convert the fundamental component of the reference current (…). , The Clarke inverse transform circuit 142 is used to perform the inverse Clarke transform on the αβ-axis currents to obtain the αβ-axis currents (iαf, iβf). The two inputs (e1, e2) of the Clarke inverse transform circuit 142 are connected to the two outputs of the Clarke inverse transform circuit 141, respectively. The three outputs (f1, f2, f3) of the Clarke inverse transform circuit 142 are connected to the fundamental frequency processing circuit 150, respectively. The Clarke inverse transform circuit 142 is used to perform the Clarke inverse transform on the αβ-axis currents to obtain the fundamental components of the target current (iaf, ibf, icf).
[0054] In some embodiments, reference Figure 3 and Figure 5 Both the first mean filtering circuit 120 and the second mean filtering circuit 130 include: an integrator 160, a delay circuit 170, a synthesis circuit 180, and a filter circuit 190. The input terminal of the integrator 160 serves as the input terminal of the first mean filtering circuit. The integrator 160 integrates the input d-axis current id or q-axis current iq to obtain a first reference signal. The delay circuit 170 is connected to the output terminal of the integrator 160 and delays the first reference signal by T / 6 to obtain a second reference signal. T is the fundamental period. The synthesis circuit 180 is connected to both the output terminal of the integrator 160 and the delay circuit 170. The synthesis circuit 180 synthesizes the first and second reference signals into a third reference signal. The filter circuit 190 is connected to the synthesis circuit 180 and filters the third reference signal using the integration time window to obtain the fundamental component of the reference current. , ).
[0055] It should be noted that for the descriptions of the transformation circuit 110, the inverse transformation circuit 140, the first mean filter circuit 120, and the second mean filter circuit 130 in the above embodiments, please refer to the aforementioned descriptions of the harmonic suppression method, which will not be repeated here.
[0056] Based on the aforementioned embodiments of the harmonic suppression circuit, another embodiment provided in this application provides a frequency converter that includes the aforementioned harmonic suppression circuit. This frequency converter, through the aforementioned harmonic suppression circuit, can reduce the algorithmic complexity of the harmonic suppression method while improving the harmonic suppression effect.
[0057] Based on the foregoing description of the harmonic suppression circuit and frequency converter embodiments, some embodiments of this application also provide an electrical device including the aforementioned harmonic suppression circuit or frequency converter. This electrical device, through the aforementioned harmonic suppression circuit or frequency converter, can reduce the algorithmic complexity of the harmonic suppression method while improving the harmonic suppression effect.
[0058] It should be noted that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.
[0059] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.
[0060] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0061] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0062] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0063] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.
Claims
1. A harmonic suppression method for a frequency converter, characterized in that, include: Obtain the three-phase current signal on the input side of the frequency converter; The three-phase current signal is subjected to a first preset transformation to obtain the dq-axis current in the two-phase rotating dq coordinate system; The fundamental component of the reference current is extracted by performing integral mean filtering on the dq axis current; The fundamental component of the reference current is subjected to a first preset inverse transformation to obtain the fundamental component of the target current; The first preset transformation and the first preset inverse transformation correspond to each other; The three-phase current signal is processed using the fundamental component of the target current to obtain a reference three-phase current signal, which contains harmonic components. The harmonic components in the reference three-phase current signal are tracked and measured using a preset PR compensation controller, and a current compensation signal is generated. Based on the current compensation signal, the target three-phase current signal is obtained by compensating the reference three-phase current signal using an SVPWM controller.
2. The method according to claim 1, characterized in that, The step of performing a first preset transformation on the three-phase current signal to obtain the dq-axis current in the two-phase rotating dq coordinate system includes: The three-phase current signal is subjected to Clarke transform to obtain the current in the two-phase stationary αβ coordinate system; The dq-axis current is obtained by performing the Park transformation on the current in the two-phase stationary αβ coordinate system.
3. The method according to claim 2, characterized in that, The step of performing a first preset inverse transform on the fundamental component of the reference current to obtain the fundamental component of the target current includes: The fundamental component of the reference current is subjected to an inverse Parker transform to obtain the αβ axis current. The fundamental component of the target current is obtained by performing an inverse Clarke transform on the αβ-axis current.
4. The method according to claim 1, characterized in that, The step of performing integral mean filtering on the dq-axis current to extract the fundamental component of the reference current includes: The integration time window is determined to be one-sixth of the fundamental frequency period; Based on the integration time window, the dq-axis current component is subjected to integral mean filtering to extract the fundamental component of the reference current.
5. The method according to claim 4, characterized in that, The step of performing integral mean filtering on the dq-axis current component according to the integral time window to extract the fundamental component of the reference current includes: The dq-axis currents are input into the integrator to obtain the first reference signal; The first reference signal is delayed by T / 6 to obtain the second reference signal; T is the fundamental frequency period. The first reference signal and the second reference signal are combined to form a third reference signal; The third reference signal is filtered using an integral time window to obtain the fundamental component of the reference current.
6. The method according to claim 1, characterized in that, The step of processing the three-phase current signal using the fundamental component of the target current to obtain a reference three-phase current signal includes: The fundamental component of the target current is assigned to each phase of the three-phase current signal; The reference three-phase current signal is obtained by subtracting the fundamental component of the target current from the current signal of each phase.
7. A harmonic suppression circuit, applied in a frequency converter, characterized in that, include: The circuit includes a converter circuit, a first mean filter circuit, a second mean filter circuit, an inverse converter circuit, a fundamental frequency processing circuit, a PR compensation controller, and an SVPWM controller. The three input terminals of the transformation circuit correspond to each phase of the three-phase current signal on the input side; the two output terminals of the transformation circuit are respectively connected to the input terminals of the first mean filter circuit and the second mean filter circuit; the transformation circuit is used to perform a first preset transformation on the three-phase current signal to obtain the dq-axis current in a two-phase rotating dq coordinate system; the first mean filter circuit and the second mean filter circuit are used to perform integral mean filtering on the dq-axis current to extract the fundamental component of the reference current; The two input terminals of the inverse transformation circuit are respectively connected to the output terminals of the first mean filter circuit and the second mean filter circuit; the inverse transformation circuit is used to perform a first preset inverse transformation on the fundamental component of the reference current to obtain the fundamental component of the target current; the first preset transformation and the first preset inverse transformation correspond to each other; The fundamental wave processing circuit is connected to the three output terminals of the inverse conversion circuit, and is used to process the three-phase current signal using the fundamental wave component of the target current to obtain a reference three-phase current signal; the reference three-phase current signal contains harmonic components. The fundamental wave processing circuit is also used to track and measure the harmonic components in the reference three-phase current signal using the preset PR compensation controller and generate a current compensation signal; and based on the current compensation signal, to compensate the reference three-phase current signal using the SVPWM controller to obtain the target three-phase current signal.
8. The harmonic suppression circuit according to claim 7, characterized in that, The conversion circuit includes: The Clarke transform circuit has three input terminals, which are used as the three input terminals of the transformation circuit. The Clarke transform circuit is used to perform Clarke transform on the three-phase current signal to obtain the current in the two-phase stationary αβ coordinate system. The Parker transform circuit has two input terminals connected to the two output terminals of the Clarke transform circuit; the two output terminals of the Parker transform circuit serve as the two output terminals of the transform circuit; the Parker transform circuit is used to perform Parker transformation on the current in the two-phase stationary αβ coordinate system to obtain the dq-axis current; The inverse transformation circuit includes: The Parker inverse transform circuit has two input terminals, which are used as the two input terminals of the inverse transform circuit. The Parker inverse transform circuit is used to perform Parker inverse transform on the fundamental component of the reference current to obtain the αβ axis current. The inverse Clarke transform circuit has two input terminals connected to the two output terminals of the inverse Parker transform circuit, respectively; and three output terminals connected to the fundamental frequency processing circuit, respectively. The inverse Clarke transform circuit is used to perform an inverse Clarke transform on the αβ axis current to obtain the fundamental frequency component of the target current.
9. The harmonic suppression circuit according to claim 8, characterized in that, Both the first mean filter circuit and the second mean filter circuit include: An integrator, the input of which serves as the input of the first mean filter circuit; the integrator is used to integrate the input d-axis current or q-axis current to obtain a first reference signal; Delay circuit; the delay circuit is connected to the output terminal of the integrator, and is used to delay the first reference signal by T / 6 to obtain the second reference signal; T is the fundamental period; A synthesis circuit is connected to the output of the integrator and the delay circuit, respectively; the synthesis circuit is used to synthesize the first reference signal and the second reference signal into a third reference signal. A filtering circuit, connected to the synthesis circuit, is used to filter the third reference signal using an integral time window to obtain the fundamental component of the reference current.
10. A frequency converter, characterized in that, Includes the harmonic suppression circuit as described in any one of claims 7-9.
11. An electrical device, characterized in that, Includes the harmonic suppression circuit as described in any one of claims 7-9, or the frequency converter as described in claim 10.