A method for inverter voltage fast soft start based on bidirectional inverter

Abstract

The application discloses a kind of based on the method for inverting voltage fast soft start of bidirectional inverter, it is related to energy storage power supply control technical field, comprising: response power supply exception, latch phase state before exception and establish direct current bus voltage;According to the candidate voltage generated by acquisition and target instantaneous voltage, candidate period end inductance current is obtained using LC average discrete prediction model;Executable current domain is constructed considering modulation capacity, current limit and PWM ripple boundary and current projection is carried out;Executable voltage and bridge side voltage are determined reversely and modulation quantity is generated;After inverter output switch is closed and meets takeover condition, preset double-loop control state and switch to double-loop control.Through collaborative constraint voltage step, inductance current and modulation capacity, invert voltage is established, overcurrent and PWM ripple are inhibited, and voltage, current mutation when double-loop takeover is reduced.

Description

Technical Field

[0001] This invention relates to the field of energy storage power supply control technology, specifically a method for fast soft-start of inverter voltage based on a bidirectional inverter. Background Technology

[0002] With the development of distributed photovoltaic power generation and energy storage systems, bidirectional inverters are widely used in scenarios such as home energy storage, uninterruptible power supply, and backup power supply for electrical equipment. A bidirectional inverter typically includes a bidirectional DC / DC converter unit, a DC bus, a DC / AC inverter bridge, and an LC filter. When the mains power is normal, the load is powered by the mains, and the energy storage battery can be charged through the bidirectional inverter. When the mains power is abnormal, the mains input path needs to be disconnected. The energy storage battery establishes a DC bus voltage through the bidirectional DC / DC converter unit, and then establishes an AC output voltage through the DC / AC inverter bridge to continue supplying power to the load.

[0003] For loads with high requirements for power supply continuity, such as computers, communication equipment, televisions, and precision instruments, excessively long power interruption times during the switch from mains power to battery inverter power can lead to load shutdown, restart, or loss of operational status. Therefore, shortening the inverter voltage settling time while ensuring the safety of inverter power devices and filters is a crucial technical issue in the mains-inverter switching control of bidirectional inverters.

[0004] One existing inverter soft-start method involves gradually increasing the effective value or amplitude of the inverter voltage from low to high according to a preset slope after a mains power failure and disconnection of the mains input switch. The inverter output switch is then closed only after the inverter voltage reaches the rated voltage. This method has simple control logic and can reduce the starting inrush current to some extent. However, its voltage build-up process typically requires more than one power frequency cycle, and some schemes even require two to three power frequency cycles. This results in a long power supply interval for the load bus, making it difficult to meet the rapid switching requirements of sensitive loads. Furthermore, this method usually uses the effective voltage value or a fixed amplitude as the starting target, failing to fully utilize the phase state before the mains power failure and the residual voltage already present in the filter capacitors, easily leading to unnecessary repeated voltage build-up processes.

[0005] Another existing approach is to directly use the rated output voltage as the setpoint for the voltage closed loop after a mains power anomaly, and then quickly increase the inverter voltage through a proportional-integral (PI) or proportional-integral-derivative (PI-DE) regulator. While this method can shorten the voltage settling time, the voltage error is relatively large in the initial startup phase, which can easily cause the regulator output to increase rapidly or the integral state to accumulate continuously, leading to filter inductor current surges, inverter bridge overcurrent, or system current limiting protection. Even after the inverter voltage approaches the target value, the accumulated control state may still cause output voltage overshoot and oscillation, making it difficult to maintain stable voltage quality for several power frequency cycles after the switch.

[0006] The LC filter at the inverter output also creates a tradeoff between the rate of change of the inverter voltage and the filter inductor current. When the output voltage changes significantly within a short period, the charging and discharging current required by the filter capacitor will be provided by the filter inductor and the DC / AC inverter bridge. If a fixed step size is set only based on the output voltage difference, or only the average modulation amount is limited, without simultaneously considering the DC bus voltage, the inverter bridge modulation capability, the parameters of the filter inductor and filter capacitor, the load branch current, and the inverter bridge's allowable current, the required voltage change may not be achievable within the current control cycle. Setting the fixed step size too small will prolong the soft-start time, while setting it too large may cause the filter inductor current to exceed the device's allowable range.

[0007] In actual PWM control, the filter inductor current is also affected by the command switching state, dead-time freewheeling state, switching timing error, and current zero crossing. Even if the cycle start current and cycle end current calculated according to the control cycle average model are within the allowable range, the current ripple that occurs during the PWM update cycle may still cause the instantaneous current to exceed the inverter bridge's allowable current. Especially when the filter inductor current may cross zero during the dead-time period, the freewheeling path will change with the current direction. Therefore, relying solely on a single current direction or the average current change for current limiting judgment is difficult to accurately reflect the actual current peak value within the control cycle.

[0008] Furthermore, when the inverter output switch switches from an open to a closed state, there may be amplitude and phase differences between the voltage of the filter capacitor on the inverter side and the residual voltage on the load bus side. There is usually an action delay between receiving the closing command and the actual contact closure of the inverter output switch, and the actual contact closure time may fall within different control cycles or PWM switching states. If only a one-time verification is performed based on the voltage state at the time the closing command is issued, or if the inverter bridge is controlled according to a fixed action delay, a large transient closing current may be generated when the contacts actually close. Contact closure also changes the output branch current; if the output branch current collected before closure is used for prediction, subsequent current predictions may also be inaccurate.

[0009] When switching from rapid voltage build-up control to dual-loop control consisting of an outer voltage loop and an inner current loop, if the current input of the outer voltage loop is inconsistent with the target inductor current during the rapid voltage build-up phase, or if the bridge-side voltage input of the inner current loop is inconsistent with the bridge-side voltage before the switch, modulation jumps, inductor current abrupt changes, or output voltage oscillations may occur instantaneously during the control mode switch. Using only the output voltage reaching a preset range as the switching condition is also insufficient to guarantee that the bus voltage, inductor current, modulation margin, and inverter output switching status all meet the stable takeover requirements. Summary of the Invention

[0010] Based on the shortcomings of the prior art described above, the purpose of this invention is to provide a method for fast soft-start of inverter voltage based on a bidirectional inverter, so as to solve the above-mentioned technical problems.

[0011] To achieve the above objectives, the present invention provides the following technical solution: a method for fast soft-start of inverter voltage based on a bidirectional inverter, comprising: A bidirectional inverter, comprising a bidirectional DC / DC converter unit, a DC bus, a DC / AC inverter bridge, an LC filter, a mains input switch, an inverter output switch, a sampling unit, and a controller, wherein the output of the LC filter is connected to the load bus via the inverter output switch, is characterized by comprising: In response to a mains power failure, the phase state prior to the failure is latched, the mains power input switch is disconnected, and the bidirectional DC / DC converter unit is controlled to establish the bus voltage using the energy storage battery. Once the bus voltage reaches the starting range, the output voltage, filter inductor current, output branch current, and bus voltage are collected, with the output voltage used as the initial executable voltage. The target instantaneous voltage at the end of the next control cycle is determined based on the phase state, and candidate voltages are generated according to the difference range and direction between the target instantaneous voltage and the executable voltage of the previous cycle. Based on the LC average discrete prediction model, the candidate inductor current at the end of the cycle is determined according to the candidate voltage and the acquired quantity; the inductor current domain at the end of the executable cycle is determined according to the bus voltage, the maximum allowable modulation ratio, LC parameters, the inverter bridge allowable current and the PWM ripple boundary; the candidate inductor current at the end of the cycle is projected onto the current domain to obtain the target inductor current at the end of the cycle. Substitute the inductor current at the end of the target cycle into the average discrete prediction model to determine the executable voltage and the executable bridge-side voltage in reverse. Generate the modulation amount based on the executable bridge-side voltage and the bus voltage, and use the executable voltage as the starting value for generating candidate voltages in the next cycle. When the inverter output switch is closed and the output voltage and inductor current meet the control conditions, the control states of the voltage outer loop and the current inner loop are set so that the voltage outer loop output matches the inductor current at the end of the target cycle for the first time, and the current inner loop output matches the last executable bridge-side voltage for the first time, switching to dual-loop control.

[0012] The present invention is further configured to determine the target instantaneous voltage at the end of the next control cycle, including: When the mains power is normal, the mains phase and mains angular frequency are continuously obtained through the phase-locked unit to determine whether the mains phase and mains angular frequency are valid; When the mains amplitude, mains frequency, or continuous mains absence time meets the mains abnormality conditions, latch the last valid mains phase and mains angular frequency. Based on the latched mains phase, mains angular frequency, elapsed time after mains anomaly and control cycle, extrapolate the target phase corresponding to the end of the next control cycle, and determine the target instantaneous voltage based on the target phase and rated voltage amplitude; After the mains input switch disconnects and the feedback is effective, and before the DC / AC inverter bridge outputs the first active modulation pulse, the output voltage across the filter capacitor is collected and determined as the initial executable voltage.

[0013] The present invention is further configured to generate candidate voltages, including: The difference between the target instantaneous voltage at the end of the next control cycle and the executable voltage of the previous control cycle is determined as the target difference. Set two or more difference intervals, and set the step size for each difference interval; Select the step size based on the difference range where the absolute value of the target difference is located, and determine the smaller of the selected step size and the absolute value of the target difference as the actual step size; Based on the positive or negative direction of the target difference, the actual step amount is superimposed on the executable voltage of the previous control cycle to obtain the candidate voltage, so that the candidate voltage does not exceed the target instantaneous voltage at the end of the next control cycle.

[0014] The present invention is further configured to define the filter inductor current flowing from the DC / AC inverter bridge to the output node of the LC filter as positive, and define the current flowing from the output node to the filter capacitor branch and the output branch other than the filter capacitor branch as positive, and determine the inductor current at the end of the candidate cycle, including: When the state of the inverter output switch remains unchanged, the output branch current collected in the current control cycle is used as the predicted average output branch current for the next control cycle. In the first effective sampling period after the inverter output switch switches from the open state to the closed state, the output branch current collected after closing is used as the predicted average output branch current, and the output branch current collected before closing is discarded. The average filter capacitor current during the candidate period is determined based on the voltage change between the candidate voltage and the current output voltage, the filter capacitor value, and the control period. The candidate period average filter capacitor current is added to the predicted average output branch current to obtain the candidate period average filter inductor current. Based on the trapezoidal discretization relationship used in the LC average discrete prediction model, the inductor current at the end of the candidate period is determined according to the current filter inductor current and the average filter inductor current of the candidate period.

[0015] The present invention is further configured such that the control period is the same as the PWM update period, and the sampling unit completes sampling at a preset sampling time of the PWM update period to determine the inductor current domain at the end of the executable period, including: The maximum and minimum available bridge-side voltages are determined based on the bus voltage, the bus voltage utilization factor of the inverter bridge topology, and the maximum allowable modulation ratio. The maximum and minimum available bridge-side voltages are used as the bridge-side voltage boundaries of the LC average discrete prediction model. Based on the current output voltage, current filter inductor current, predicted average output branch current, and LC parameters, the upper and lower limits of the inductor current at the end of the cycle are determined. For the inductor current at the end of the test cycle located between the upper and lower limits of the reachable limit, the average current change trajectory within a control cycle is determined based on the current filtered inductor current and the inductor current at the end of the test cycle. The corresponding output voltage at the end of the cycle, the executable bridge-side voltage and the modulation amount are determined by the LC average discrete prediction model. The sequence of command switch states and the duration of each command switch state within a PWM update cycle are determined based on the modulation amount. A dead-zone freewheeling state is added between adjacent command switch states. The dead-zone freewheeling state is determined based on the direction of the filter inductor current before entering the dead zone. When the predicted filter inductor current may pass through zero during the dead zone, the calculation is performed according to the dead-zone freewheeling state corresponding to the two current directions. The range of values ​​for the switching state of each instruction and the duration of the dead-zone freewheeling state are determined based on the switching timing error. Based on the predicted range of output voltage, the value of the filter inductor, the equivalent series resistance of the filter inductor, and the allowable range of the filter inductor current within the control cycle, determine the upper and lower bounds of the deviation rate of the actual filter inductor current change rate relative to the average current change trajectory under each command switching state and dead-zone freewheeling state. With the cumulative current deviation at the start of the PWM update cycle as zero, according to the order of instruction switching state and dead-time freewheeling state, the upper and lower bounds of the deviation change rate corresponding to each state are accumulated during their duration to obtain the upper and lower bounds of the cumulative deviation at the end of each state. The maximum positive value of the cumulative deviation in all current direction calculation results is determined as the positive PWM ripple boundary, and the absolute value of the minimum negative value of the cumulative deviation is determined as the reverse PWM ripple boundary. The sum of the larger of the current filter inductor current and the inductor current at the end of the test cycle and the positive PWM ripple boundary is determined as the upper bound of the predicted current, and the difference between the smaller of the two and the reverse PWM ripple boundary is determined as the lower bound of the predicted current. The inductor current domain at the end of all cycles to be tested, where the upper bound of the predicted current does not exceed the upper limit of the forward allowable current of the inverter bridge, the lower bound of the predicted current is not lower than the lower limit of the reverse allowable current of the inverter bridge, and the executable bridge-side voltage is between the maximum and minimum available bridge-side voltage, is formed.

[0016] The present invention is further configured to reversely determine the executable voltage and the executable bridge-side voltage, including: Based on the trapezoidal discrete relationship, the target period average filter inductor current is determined according to the current filter inductor current and the inductor current at the end of the target period. Subtract the predicted average output branch current from the target period average filter inductor current to obtain the executable period average filter capacitor current. The executable voltage at the end of the next control cycle is determined based on the average filter capacitor current, filter capacitor value, control cycle, and current output voltage of the executable cycle. The periodic average output voltage is determined based on the current output voltage and the executable voltage. The executable bridge-side voltage is determined based on the periodic average output voltage, the target periodic average filter inductor current, the equivalent series resistance of the filter inductor, and the change in the inductor current at the end of the target period relative to the current filter inductor current. The modulation amount is determined based on the modulation relationship corresponding to the executable bridge-side voltage, bus voltage, and inverter bridge topology, and the modulation amount is updated to the PWM control unit; wherein, the inductor current at the end of the target cycle belongs to the inductor current domain at the end of the executable cycle.

[0017] The present invention is further configured to project the candidate cycle-end inductor current to the executable cycle-end inductor current domain, including: When the candidate period's end-of-cycle inductor current belongs to the domain of the executable period's end-of-cycle inductor current, the candidate period's end-of-cycle inductor current is determined as the target period's end-of-cycle inductor current. When the candidate period-end inductor current does not belong to the executable period-end inductor current domain, the executable period-end inductor current with the smallest absolute difference from the candidate period-end inductor current is selected from the current domain as the target period-end inductor current. When there are two or more executable cycle-end inductor currents with the same absolute difference, and the current control cycle is not the first control cycle of fast soft start, select the executable cycle-end inductor current with the smallest change between it and the target cycle-end inductor current of the previous control cycle. When there are two or more executable cycle-end inductor currents with the same absolute difference, and the current control cycle is the first control cycle of fast soft start, the executable cycle-end inductor current with the smallest absolute value of the corresponding executable bridge-side voltage is selected; if the corresponding executable bridge-side voltages are still the same, the executable cycle-end inductor current with the smaller absolute value is selected. The executable voltage determined by the reverse inductor current at the end of the target cycle will be used as the starting value for generating candidate voltages in the next control cycle. When the inductor current domain is empty at the end of the executable cycle, the bus voltage exceeds the protection range, or the filter inductor current reaches the hardware protection threshold, the execution voltage is stopped from being increased, so that the DC / AC inverter bridge enters the safe freewheeling state determined by its topology, and the energy stored in the filter inductor is released through the freewheeling path. After the filter inductor current drops to the preset safe current threshold, the fast soft start is terminated and the system enters the protection state.

[0018] The present invention is further configured such that the takeover condition is met for a consecutive preset number of control cycles: The absolute error between the output voltage at the current sampling moment and the target instantaneous voltage determined at the sampling moment in the previous control cycle is not greater than the preset voltage error threshold; the absolute error between the current filter inductor current and the target inductor current at the end of the previous control cycle is not greater than the preset current error threshold; the bus voltage is within the preset control voltage range; the absolute value of the modulation amount is not greater than the control modulation threshold, and the control modulation threshold is less than the maximum allowable modulation ratio; the closed feedback of the inverter output switch is continuously effective, and there is no overcurrent, bus undervoltage, bus overvoltage, or output short circuit protection.

[0019] The present invention is further configured such that both the outer voltage loop and the inner current loop are regulators that include integral states, and the integral states of the outer voltage loop and the inner current loop are configured as follows: In the last control cycle that meets the takeover conditions, obtain the current voltage error, current current error, inductor current at the end of the target cycle, and the last executable bridge-side voltage; Set the integral state of the voltage outer loop based on the non-integral output generated by the voltage outer loop under the current voltage error, so that the first total output after the voltage outer loop takes over is equal to the inductor current at the end of the target cycle. The initial total output after the outer voltage loop is taken over is used as the initial current reference for the inner current loop; Based on the non-integral output generated by the current inner loop under the current error and the voltage feedforward output of the current inner loop, the integral state of the current inner loop is set so that the first total output after the current inner loop takes over is equal to the last executable bridge side voltage. The integral states of the outer voltage loop and the inner current loop are loaded at the boundary of the same control cycle, and the control mode is switched so that the bridge-side voltage setpoint remains continuous before and after the control mode switch.

[0020] The present invention is further configured to keep the inverter output switch open during the initial voltage establishment period of fast soft start, and to collect the filter capacitor voltage on the inverter side and the residual voltage on the load bus side. The action delay range from receiving the closing command to the actual closing of the contacts of the inverter output switch is obtained; When preparing to issue a closing command for the inverter output switch, and in each control cycle where a closing command has been issued but the closing feedback has not yet been effective, a rolling closing verification is performed based on the currently collected output voltage, filter inductor current, output branch current, and bus voltage. Rolling closing verification includes: establishing a disconnection scenario where the contacts remain open during the next control cycle, and a closing scenario where the contacts close at any time during the next control cycle; For disconnection scenarios, determine the first executable bridge-side voltage domain that keeps the predicted inductor current in the next control cycle within the allowable current range of the inverter bridge; For each bridge-side voltage under test and each allowable closing moment of the contact in the next control cycle, the predicted inductor current and the maximum value of the closing transient current from the contact closing to the next sampling moment are determined based on the load current boundary and the closing circuit parameters. The second executable bridge-side voltage domain is formed by ensuring that the predicted inductor current corresponding to all allowed closing times is within the allowable current range of the inverter bridge, and that the maximum value of the closing transient current corresponding to all allowed closing times is not greater than the preset closing current threshold. The intersection of the first executable bridge-side voltage domain and the second executable bridge-side voltage domain is determined as the common executable bridge-side voltage domain for closing in this control cycle; For each candidate bridge-side voltage in the common executable bridge-side voltage domain for closing, the predicted output voltage at the end of the next control cycle under the disconnection scenario and each closing scenario is determined, and the maximum value of the absolute error between each predicted output voltage and the target instantaneous voltage is determined. Select the executable bridge-side voltage with the smallest maximum value from the common executable bridge-side voltage domain for closing, and control the DC / AC inverter bridge; When the voltage domain of the common-operable bridge side is not empty and the disconnection feedback of the mains input switch is effective, the drive to close the inverter output switch is issued or maintained. When the voltage domain of the common execution bridge is empty, the DC / AC inverter bridge enters the safe freewheeling state, and the closing drive of the inverter output switch is canceled before the closing feedback is effective. If no closure feedback is received after the upper limit of the action delay interval since the first closure command was issued in this closure attempt, the closure is determined to have failed and the closure drive is canceled; the next closure attempt can only be restarted after confirming that the inverter output switch is in the open state. After the feedback of the inverter output switch closure is effective, the current prediction of the next control cycle is made using the sampled value of the first effective output branch current after closure. The fast soft-start control based on the inductor current domain at the end of the executable cycle is continued for at least one control cycle. After the takeover conditions are met, the control is switched to dual-loop control.

[0021] This invention provides a method for fast soft-start of inverter voltage based on a bidirectional inverter. When the mains power is abnormal, the phase state is latched, and the bidirectional DC / DC converter unit is controlled to establish a bus voltage using a storage battery. The acquired output voltage is used as the initial executable voltage, and a candidate voltage is generated based on the target instantaneous voltage at the end of the next control cycle. An inductor current domain at the end of the executable cycle is constructed using an LC average discrete prediction model and PWM ripple boundaries. The inductor current at the end of the candidate cycle is projected, and the executable voltage and the executable bridge-side voltage are determined in reverse. When the inverter output switch is closed and the takeover conditions are met, the control states of the outer voltage loop and the inner current loop are preset and switched to dual-loop control. The beneficial effects include: 1. By latching the phase state before the mains power failure and tracking the target instantaneous voltage starting from the actual output voltage, the inverter voltage is prevented from being re-established from zero, the inverter soft start and power supply switching time are shortened, and the risk of sensitive load restarting after power failure is reduced. 2. By comprehensively considering the bus voltage, modulation capability, LC parameters, allowable current, and PWM ripple boundary, the inductor current domain at the end of the executable cycle is constructed. The candidate inductor current is then projected and solved in reverse to ensure that the generated voltage command meets the actual modulation capability and current safety constraints of the inverter bridge, thereby reducing the risk of start-up overcurrent and protection shutdown. 3. By matching the first output of the voltage outer loop with the inductor current at the end of the target cycle and matching the first total output of the current inner loop with the last executable bridge-side voltage, the continuous takeover from fast soft-start control to dual-loop control is achieved, reducing modulation jumps, output voltage overshoot, and filter inductor current oscillations.

[0022] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In the drawings: Figure 1 This is a schematic diagram of the system structure of the bidirectional inverter in an embodiment of the present invention; Figure 2 This is a flowchart of a fast soft-start method for inverter voltage based on a bidirectional inverter, as described in an embodiment of the present invention. Detailed Implementation

[0024] The embodiments of the present invention will be described below with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be understood that the preferred embodiments are only for illustrating the present invention and not for limiting the scope of protection of the present invention.

[0025] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0026] In the following description, numerous details are explored to provide a more thorough explanation of embodiments of the invention. However, it will be apparent to those skilled in the art that embodiments of the invention may be practiced without these specific details. In other embodiments, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring embodiments of the invention.

[0027] A method for fast soft-start of inverter voltage based on a bidirectional inverter includes: A bidirectional inverter, comprising a bidirectional DC / DC converter unit, a DC bus, a DC / AC inverter bridge, an LC filter, a mains input switch, an inverter output switch, a sampling unit, and a controller, wherein the output of the LC filter is connected to the load bus via the inverter output switch, is characterized by comprising: In response to a mains power failure, the phase state prior to the failure is latched, the mains power input switch is disconnected, and the bidirectional DC / DC converter unit is controlled to establish the bus voltage using the energy storage battery. Once the bus voltage reaches the starting range, the output voltage, filter inductor current, output branch current, and bus voltage are collected, with the output voltage used as the initial executable voltage. The target instantaneous voltage at the end of the next control cycle is determined based on the phase state, and candidate voltages are generated according to the difference range and direction between the target instantaneous voltage and the executable voltage of the previous cycle. Based on the LC average discrete prediction model, the candidate inductor current at the end of the cycle is determined according to the candidate voltage and the acquired quantity; the inductor current domain at the end of the executable cycle is determined according to the bus voltage, the maximum allowable modulation ratio, LC parameters, the inverter bridge allowable current and the PWM ripple boundary; the candidate inductor current at the end of the cycle is projected onto the current domain to obtain the target inductor current at the end of the cycle. Substitute the inductor current at the end of the target cycle into the average discrete prediction model to determine the executable voltage and the executable bridge-side voltage in reverse. Generate the modulation amount based on the executable bridge-side voltage and the bus voltage, and use the executable voltage as the starting value for generating candidate voltages in the next cycle. When the inverter output switch is closed and the output voltage and inductor current meet the control conditions, the control states of the voltage outer loop and the current inner loop are set so that the voltage outer loop output matches the inductor current at the end of the target cycle for the first time, and the current inner loop output matches the last executable bridge-side voltage for the first time, switching to dual-loop control.

[0028] Specifically, such as Figure 1 As shown, this embodiment uses a single-phase bidirectional inverter for illustration. The bidirectional inverter includes an energy storage battery, a bidirectional DC / DC conversion unit, a DC bus, a DC / AC inverter bridge, an LC filter, a mains input switch, an inverter output switch, a sampling unit, and a controller. The energy storage battery is connected to the DC bus via the bidirectional DC / DC conversion unit. The DC bus is connected to the DC side of the DC / AC inverter bridge. The AC side of the DC / AC inverter bridge is connected to the inverter output switch via the LC filter. The other end of the inverter output switch is connected to the load bus. The mains input terminal is connected to the load bus via the mains input switch.

[0029] The LC filter includes a filter inductor connected in series between the DC / AC inverter bridge and the output node, and a filter capacitor connected between the output node and the AC neutral terminal. The sampling unit includes at least a bus voltage sampling circuit, an output voltage sampling circuit, a filter inductor current sampling circuit, and an output branch current sampling circuit; when performing the closing control of the inverter output switch, the sampling unit also collects the residual voltage on the load bus side. The controller can be a digital signal processor, microcontroller, or other processor with PWM output function to perform mains state judgment, phase latching, LC state prediction, current domain construction, current projection, PWM updating, closing control, and dual-loop control.

[0030] Figure 1 The photovoltaic input unit, communication board, display unit, and parallel operation unit shown can all be used as optional functional units of the bidirectional inverter. When they do not participate in the fast soft-start control of this embodiment, they do not affect the implementation of the method of the present invention. Figure 1 The filtering unit in the inverter uses an LC filter. The inverter control board corresponds to the controller in this embodiment. The voltage and current detection lines connected to the inverter control board together constitute the sampling unit.

[0031] In this embodiment, the current flowing from the DC / AC inverter bridge to the output node of the LC filter is defined as positive, as are the currents flowing from the output node to the filter capacitor branch and the currents flowing from the output node to other output branches besides the filter capacitor branch. The output voltage at the k-th sampling time is denoted as u_o(k), the filter inductor current as i_L(k), the output branch current as i_o(k), the bus voltage as V_dc(k), the control period as T_s, the filter inductor value as L, the filter capacitor value as C, and the equivalent series resistance of the filter inductor as r_L.

[0032] The control cycle is the same as the PWM update cycle. The sampling unit completes sampling at a preset sampling time in each PWM update cycle. The preset sampling time can be set at the midpoint of the PWM carrier cycle or at a position far from the switching edge to reduce the influence of switching noise on the sampling results. In a specific embodiment, the PWM frequency is 20kHz and the control cycle T_s is 50μs.

[0033] like Figure 2 As shown, the fast soft start in this embodiment includes the following process: During periods of normal mains power, the controller continuously acquires the mains phase and mains angular frequency through the phase-locked loop (PLL) unit and determines whether the acquired mains phase and angular frequency are valid. Valid phase conditions may include: the mains amplitude is within a preset normal amplitude range, the mains frequency is within a preset normal frequency range, the phase increment between adjacent sampling periods does not exceed a preset phase increment range, and the PLL unit has not lost lock. The controller saves the last valid mains phase, its corresponding mains angular frequency, and the sampling time.

[0034] When the mains voltage amplitude is below the abnormal amplitude threshold, the mains frequency exceeds the allowable frequency range, or the continuous mains voltage loss time reaches the preset loss time, the controller determines that the mains voltage is abnormal. In response to the mains voltage abnormality, the controller latches the last valid mains phase θ_0 and mains angular frequency ω_0 before the abnormality and issues a disconnect command to the mains input switch. After receiving the disconnect feedback from the mains input switch, the controller controls the bidirectional DC / DC converter unit to operate in battery discharge boost mode, enabling the energy storage battery to supply power to the DC bus and establish the bus voltage.

[0035] After the bus voltage reaches the preset start-up range and remains stable for a preset number of control cycles, the DC / AC inverter bridge is allowed to enter a fast soft-start state. The preset start-up range is determined based on the rated AC voltage, the bus voltage utilization factor of the inverter bridge topology, and the maximum allowable modulation ratio, and should ensure that the DC bus has the voltage margin required to generate the target AC voltage. When the bus voltage has not yet reached the start-up range, the controller continues to control the bidirectional DC / DC converter unit to establish the bus voltage and keeps the DC / AC inverter bridge in a state where active modulation is prohibited.

[0036] After the mains input switch disconnection feedback is effective and before the DC / AC inverter bridge outputs the first active modulation pulse, the sampling unit acquires the actual output voltage across the filter capacitor and determines this output voltage as the initial executable voltage. Thus, fast soft start begins from the actual voltage state at the inverter output when the mains power is abnormal, rather than restarting from zero voltage. When the mains power is abnormal near its peak voltage, the inverter voltage can be directly established from the actual voltage close to the peak, thereby shortening the power supply interruption time of the load bus.

[0037] At the end of the next control cycle, the controller extrapolates the phase based on the latched phase state. The target phase at the end of the next control cycle can be determined by the following formula: θ_ref(k+1)=θ_0+ω_0·[t(k+1)-t_0]; where t_0 is the time of the latched phase state, and t(k+1) is the time corresponding to the end of the next control cycle.

[0038] The target instantaneous voltage is determined according to the following formula: u_ref(k+1)=U_m·sin[θ_ref(k+1)]; where U_m is the rated AC voltage amplitude; when the rated AC voltage is 230V RMS, U_m is approximately 325V. Since the calculation of the target phase includes the elapsed time after the mains power anomaly and the current control cycle, even if there is a certain delay in establishing the bus voltage, the determined target instantaneous voltage is still continuous with the mains power phase before the anomaly.

[0039] When the phase-locked unit fails to obtain a valid phase state before the mains power is abnormal, or when the latched mains angular frequency exceeds the allowable range, the controller does not perform phase continuity quick takeover, but instead keeps the inverter output switch open and enters the normal inverter start-up or protection state.

[0040] The controller generates candidate voltages based on the difference between the target instantaneous voltage and the executable voltage of the previous control cycle. The target difference is denoted as: e_u(k) = u_ref(k+1) - u_exe(k); where u_exe(k) is the executable voltage determined in the previous control cycle. The controller sets two or more difference intervals and assigns corresponding step values ​​to each interval.

[0041] When the absolute value of the target difference falls into the j-th difference interval, the selected step size is ΔU_j, and the actual step size is Δu(k)=min{|e_u(k)|,ΔU_j}. The candidate voltage is determined according to the following formula: u_can(k+1)=u_exe(k)+sgn[e_u(k)]·Δu(k).

[0042] Therefore, the candidate voltage changes along the positive or negative direction of the target difference, and will not exceed the target instantaneous voltage at the end of the next control cycle. This stepping method is suitable for both establishing the inverter voltage towards the positive or negative peak value and for reverse adjustment when the absolute value of the target instantaneous voltage decreases.

[0043] The candidate voltage only represents the desired voltage and is not directly used as a PWM control quantity. The controller further uses an LC average discrete prediction model to determine whether the candidate voltage can be achieved under the current bus voltage, device current capability, and actual PWM switching conditions.

[0044] When the state of the inverter output switch remains unchanged, the output branch current i_o(k) collected in the current control cycle is used as the predicted average output branch current î_o(k) for the next control cycle. When the inverter output switch is open and the output node is not connected to other branches, the predicted average output branch current can be zero; when the output node is connected to a bleed resistor or an auxiliary power supply branch, the predicted average output branch current uses the actual sampled value of the corresponding branch.

[0045] When the inverter output switch changes from the open state to the closed state, the output branch current obtained before closing cannot represent the output branch current after the load is connected. Therefore, in the first effective sampling period after closing, the controller discards the output branch current collected before closing and uses the first effective output branch current collected after the inverter output switch closes as the predicted average output branch current.

[0046] Based on the current relationship of the filter capacitor, the average filter capacitor current of the candidate period is determined according to the following formula: ī_C,can(k)=C·[u_can(k+1)-u_o(k)] / T_s.

[0047] The average filter inductor current for the candidate period is: ī_L,can(k)=ī_C,can(k)+î_o(k).

[0048] The LC average discrete prediction model uses a trapezoidal discretization relationship, representing the average filter inductor current within a control cycle as the arithmetic midpoint between the inductor current at the beginning of the cycle and the inductor current at the end of the cycle. Therefore, the inductor current at the end of the candidate cycle is determined by the following formula: i_L,can(k+1)=2ī_L,can(k)-i_L(k).

[0049] The above calculations convert the output voltage variation requirements into the current requirements that the filter inductor needs to provide. For example, when the filter capacitor is 10μF and the candidate voltage varies by 250V within 50μs, the theoretical average current required to charge the filter capacitor alone can reach 50A. Therefore, the candidate voltage cannot be directly used as the executable voltage, but needs to be constrained based on the actual current capability of the inverter bridge.

[0050] The controller determines the maximum and minimum available bridge-side voltages based on the bus voltage, the bus voltage utilization factor of the inverter bridge topology, and the maximum allowable modulation ratio. Let the bus voltage utilization factor of the inverter bridge topology be denoted as K_top, and the maximum allowable modulation ratio as m_max. Then, in the symmetrical full-bridge embodiment: u_br,max(k) = K_top·m_max·V_dc(k); u_br,min(k) = -K_top·m_max·V_dc(k).

[0051] For topologies with asymmetrical modulation capabilities in the positive and negative directions, the voltage boundaries of the two bridge sides are determined by the corresponding positive bus voltage utilization factor, reverse bus voltage utilization factor, and allowable modulation ratio, respectively.

[0052] For any inductor current i at the end of the test cycle, according to the trapezoidal discretization relationship, the corresponding average filter inductor current of the cycle is [i_L(k)+i] / 2, and the corresponding output voltage at the end of the cycle is: u_o,i(k+1)=u_o(k)+T_s / C·{[i_L(k)+i] / 2-î_o(k)}.

[0053] The average output voltage over the period is [u_o(k)+u_o,i(k+1)] / 2. Based on the voltage relationship of the filter inductor, the corresponding executable bridge-side voltage is: u_br(i)=[u_o(k)+u_o,i(k+1)] / 2+r_L·[i_L(k)+i] / 2+L·[i-i_L(k)] / T_s.

[0054] Substituting the maximum and minimum available bridge-side voltages into the above relationship, the upper and lower limits of the achievable inductor current at the end of the cycle can be determined. Since the available bridge-side voltage monotonically increases with respect to the inductor current at the end of the cycle under test when L, C, and T_s are all positive, the two reachable boundaries can be obtained by direct solution, interval bisection, or table lookup.

[0055] For the inductor current at the end of the test cycle, which lies between the lower and upper reach limits, the controller determines the average current variation trajectory within a control cycle based on the current filtered inductor current and the inductor current at the end of the test cycle. The average current variation trajectory can be represented as a linear trajectory connecting i_L(k) and i. Simultaneously, the controller determines the output voltage at the end of the cycle, the executable bridge-side voltage, and the modulation amount corresponding to the test current using an LC average discrete prediction model.

[0056] Based on the executable bridge-side voltage and bus voltage, the controller obtains the modulation amount according to the modulation relationship corresponding to the inverter bridge topology, and determines the sequence of command switching states and the nominal duration of each command switching state within a PWM update cycle. For a full-bridge inverter, the bridge-side voltage corresponding to the command switching state can include positive bus voltage state, zero voltage state, and negative bus voltage state.

[0057] A dead time is set between adjacent commanded switching states to prevent the upper and lower switching devices of the same bridge arm from conducting simultaneously. During the dead time, the filter inductor current freewheels through the anti-parallel diodes or synchronous freewheeling devices of the switching devices. The dead-time freewheeling state depends on the direction of the filter inductor current before entering the dead time. When it is predicted that the filter inductor current may pass through zero during the dead time, the controller calculates the dead-time freewheeling state according to the forward current and reverse current respectively, and retains the union of the two calculation results to cover the actual bridge-side voltage changes caused by current commutation.

[0058] The actual switching time of the switching devices is affected by the PWM counting resolution, driver propagation delay, dead-time error, and device switching delay. The controller determines the range of values ​​for the duration of each commanded switching state and the dead-time freewheeling state based on the pre-calibrated switching time error. If the nominal duration of the j-th state is τ_j, and the allowable time error is Δτ_j, then its duration range can be determined as [max(0, τ_j-Δτ_j), min(T_s, τ_j+Δτ_j)], while simultaneously satisfying that the sum of the durations of all states within one PWM update cycle is T_s.

[0059] The controller determines the predicted range of the output voltage within the control cycle based on the LC model, and, in conjunction with the filter inductor value, the equivalent series resistance of the filter inductor, and the allowable range of the filter inductor current, determines the boundary of the deviation rate of the actual filter inductor current change rate relative to the average current change trajectory under each command switching state and dead-zone freewheeling state.

[0060] Specifically, the deviation between the actual filter inductor current and the average current change trajectory is denoted as δ_i. For any switching state with bridge-side voltage u_s, the rate of change of the deviation satisfies: dδ_i / dt=(u_s-u_o-r_L·i_L) / L-[i-i_L(k)] / T_s.

[0061] By substituting the possible bridge-side voltage range, output voltage prediction range, and inductor current allowable range into the above formula, the lower bound and upper bound of the deviation change rate can be obtained respectively.

[0062] Starting with zero cumulative current deviation at the beginning of the PWM update cycle, the deviation change rate interval for each state is multiplied by its duration interval, following the order of command switching and dead-time freewheeling states, to obtain the deviation increment interval for that state. This increment interval is then added to the cumulative deviation interval at the end of the previous state. This yields the upper and lower bounds of the cumulative deviation at the end of each state. Since a deviation change rate boundary covering all operating conditions of each state is used, the current deviation within a state is also covered by the cumulative boundary at the end of the adjacent state.

[0063] When a current zero-crossing may occur during the dead zone, the above cumulative calculation is performed according to both current directions. The maximum positive value of the cumulative deviation in all current direction calculation results is determined as the positive PWM ripple boundary ρ_+, and the absolute value of the minimum negative value of the cumulative deviation is determined as the reverse PWM ripple boundary ρ_-.

[0064] For the inductor current i at the end of the test cycle, the sum of the larger of i_L(k) and i and the positive PWM ripple boundary is determined as the upper bound of the predicted current: I_pre,+=max{i_L(k),i}+ρ_+; The difference between the smaller of i_L(k) and i and the reverse PWM ripple boundary is determined as the lower bound of the predicted current: I_pre,-=min{i_L(k), i}-ρ_-.

[0065] Only when the upper bound of the predicted current does not exceed the upper limit of the forward allowable current of the inverter bridge, the lower bound of the predicted current is not lower than the lower limit of the reverse allowable current of the inverter bridge, and the corresponding executable bridge-side voltage is between the maximum available bridge-side voltage and the minimum available bridge-side voltage, can the inductor current at the end of the test cycle belong to the inductor current domain at the end of the executable cycle.

[0066] The controller can represent the inductor current domain at the end of the executable cycle as one or more closed intervals. In actual operation, the reachable current range can be obtained first based on the bridge-side voltage boundary, and then the parts that do not meet the PWM ripple constraints and current constraints can be eliminated by interval determination and boundary binary search, thereby avoiding traversing all current values ​​point by point.

[0067] After obtaining the inductor current domain at the end of the executable cycle, the controller projects the candidate inductor current at the end of the cycle onto this current domain. When the candidate inductor current at the end of the cycle belongs to the inductor current domain at the end of the executable cycle, the candidate inductor current at the end of the cycle is directly determined as the target inductor current at the end of the cycle; when the candidate inductor current at the end of the cycle does not belong to this current domain, the current value with the smallest absolute difference from the candidate inductor current at the end of the cycle is selected as the target inductor current at the end of the cycle.

[0068] When there are two or more executable current values ​​with the same absolute difference, and the current control cycle is not the first control cycle of fast soft start, select the current value with the smallest change between the inductor current at the end of the target cycle of the previous control cycle, so as to reduce the control jump between adjacent control cycles.

[0069] When the current control cycle is the first control cycle of fast soft start, the target inductor current at the end of the previous control cycle does not yet exist. At this time, the current value with the smallest absolute value of the corresponding executable bridge-side voltage is selected from the executable current values ​​with the same absolute difference; if the absolute values ​​of the corresponding bridge-side voltages are still the same, the current value with the smaller absolute value is selected.

[0070] Let the inductor current at the end of the target period be denoted as i_L,tar(k+1), and the average filter inductor current of the target period be: ī_L,tar(k)=[i_L(k)+i_L,tar(k+1)] / 2.

[0071] Subtract the predicted average output branch current from the target period average filter inductor current to obtain the executable period average filter capacitor current: ī_C,exe(k)=ī_L,tar(k)-î_o(k).

[0072] The executable voltage at the end of the next control cycle is: u_exe(k+1)=u_o(k)+T_s·ī_C,exe(k) / C.

[0073] The periodic average output voltage is: ū_o,exe(k)=[u_o(k)+u_exe(k+1)] / 2.

[0074] The executable bridge-side voltage is: u_br,exe(k)=ū_o,exe(k)+r_L·ī_L,tar(k)+L·[i_L,tar(k+1)-i_L(k)] / T_s.

[0075] The controller determines the modulation amount m(k) based on the modulation relationship corresponding to the executable bridge-side voltage, bus voltage, and inverter bridge topology, and updates the modulation amount to the PWM control unit. The inductor current at the end of the target cycle originates from the inductor current domain at the end of the executable cycle; therefore, the corresponding executable bridge-side voltage and modulation amount will not exceed the determined bridge-side voltage boundary and the maximum allowable modulation ratio.

[0076] When under no-load or light-load conditions, and with small voltage drops in both the filter inductor and equivalent series resistance, the executable bridge-side voltage is close to the executable output voltage. In this case, the modulation relationship described above can be simplified to an open-loop feedforward relationship, where the PWM modulation amount equals the executable voltage multiplied by the conversion coefficient from the AC voltage per unit to the bus voltage per unit. This embodiment modifies this open-loop feedforward relationship using an LC average discrete prediction model, enabling it to be used in operating conditions with load connection, bus voltage variations, and non-negligible LC parameters.

[0077] The controller uses the executable voltage determined in the reverse of the current control cycle, rather than an unconstrained candidate voltage, as the starting value for generating candidate voltages in the next control cycle. Therefore, when a candidate voltage cannot be fully realized due to current limitations, bus modulation capability, or PWM ripple limitations, unexecutable voltage differences will not accumulate in subsequent control cycles.

[0078] When the inductor current domain is empty at the end of the executable cycle, the bus voltage exceeds the protection range, or the filter inductor current reaches the hardware protection threshold, the controller stops increasing the executable voltage and puts the DC / AC inverter bridge into a safe freewheeling state predetermined by its topology. The safe freewheeling state can be achieved by using a combination of switches that release the filter inductor current through an anti-parallel diode, a synchronous freewheeling device, or a zero-voltage vector. The specific combination is determined based on the current inductor current direction to avoid forcibly cutting off the inductor current.

[0079] The upper and lower limits of the inverter bridge's allowable current are control constraint thresholds. Hardware protection thresholds are set outside these control constraint thresholds to handle extreme situations caused by sampling delays or device malfunctions. When the filter inductor current drops to the preset safe current threshold, the controller terminates the current fast soft start and enters protection mode. The preset safe current threshold can be set to a certain percentage of the rated current, but lower than the current threshold that allows re-enabling active modulation.

[0080] In a preferred embodiment, the inverter output switch is kept open during the initial voltage build-up period of the fast soft start to prevent direct connection to the load before the inverter output voltage has been established. The sampling unit collects the filter capacitor voltage on the inverter side and the residual voltage on the load bus side, respectively. The residual voltage on the load bus side may originate from the load input capacitor, the back electromotive force of the rotating load, or residual energy after the mains power is disconnected.

[0081] The controller pre-determines the action delay range from receiving a closing command to the actual contact closure of the inverter output switch. This action delay range can be determined based on the product parameters of the switching device, temperature testing, and the results of multiple operation calibrations. For mechanical relays or contactors, this range also includes coil response delay and contact action dispersion; for solid-state switches, this range includes drive propagation delay and zero-crossing control delay.

[0082] When preparing to issue a closing command for the inverter output switch, and in each control cycle where a closing command has been issued but the closing feedback has not yet been effective, the controller performs a rolling closing verification based on the currently acquired output voltage, filter inductor current, output branch current, and bus voltage.

[0083] The rolling closing verification establishes two scenarios: the first is the disconnection scenario where the contacts remain open during the next control cycle; the second is the closing scenario where the contacts close at any permissible moment during the next control cycle. The permissible closing moment is determined jointly based on the time of issuance of the closing command, the action delay interval, and the time range of the current control cycle.

[0084] For disconnection scenarios, the controller uses the LC average discrete prediction model to determine the first executable bridge-side voltage domain that ensures the predicted filter inductor current remains within the inverter bridge's allowable current range during the next control cycle.

[0085] For closed-circuit scenarios, the equivalent resistance of the closing circuit is denoted as R_cl, the equivalent inductance as L_cl, and the residual voltage of the load bus as u_load. The closing transient after contact closure can be described by the following formula: L_cl·di_cl / dt=u_o-u_load-R_cl·i_cl; where i_cl is the closing transient current flowing through the inverter output switch. The load current boundary can be determined based on the last obtained load current, load rated power, load equivalent impedance, and load bus residual voltage before the mains power anomaly. When the load type cannot be accurately identified, the upper and lower limits of the load current that cover the allowable load range are used.

[0086] For each bridge-side voltage under test and each permissible closing moment of the contacts within the next control cycle, the controller divides the control cycle into a pre-closing sub-interval and a post-closing sub-interval. The pre-closing sub-interval is calculated based on the opening scenario, while the post-closing sub-interval is calculated based on the LC average discrete prediction model, load current boundary, and closing circuit model. The output voltage, inductor current, and closing transient current remain continuous at the boundary moments between the two sub-intervals.

[0087] The controller uses interval calculations to cover all permissible closing times within the action delay interval, determining the range of the predicted filter inductor current from contact closure to the next sampling time, as well as the maximum value of the closing transient current. This ensures that the predicted filter inductor current for all permissible closing times is within the inverter bridge's permissible current range, and that the maximum value of the closing transient current for all permissible closing times is not greater than a preset closing current threshold, forming a second executable bridge-side voltage domain.

[0088] The preset closing current threshold is determined based on the allowable turn-on current of the inverter output switch, the short-time current capability of the DC / AC inverter bridge, and the allowable current of the filter inductor, and is set to not exceed the minimum value among the allowable values ​​of the aforementioned components. Therefore, the closing verification is not based solely on the instantaneous difference between the inverter-side voltage and the residual voltage of the load bus, but also considers the uncertainty of the switch action time, the load current range, and the closing circuit parameters.

[0089] The controller determines the intersection of the first and second executable bridge-side voltage domains as the common executable bridge-side voltage domain for closing in the current control cycle. For each candidate bridge-side voltage in the common executable bridge-side voltage domain, the predicted output voltage at the end of the next control cycle under both the open and closed scenarios is determined, and the absolute error between each predicted output voltage and the target instantaneous voltage is calculated. The maximum value of the above absolute errors is taken as the worst-case error of the candidate bridge-side voltage, and the executable bridge-side voltage with the smallest worst-case error is selected from the common executable bridge-side voltage domain to control the DC / AC inverter bridge. If there are multiple candidate bridge-side voltages with the same worst-case error, the bridge-side voltage with the smaller absolute value can be selected first.

[0090] When the common-operable bridge-side voltage domain for closing is not empty, and the disconnection feedback of the mains input switch remains effective, the controller issues or maintains the closing drive of the inverter output switch. When the common-operable bridge-side voltage domain for closing is empty, the controller puts the DC / AC inverter bridge into a safe freewheeling state; if the closing feedback of the inverter output switch is not yet effective, the closing drive of the inverter output switch is canceled to prevent the contacts from closing in the absence of a common safety control quantity.

[0091] If no closure feedback is received after the upper limit of the action delay interval since the first closure command was issued in this closure attempt, the controller determines that the closure has failed and cancels the closure drive. The controller can only restart the next closure attempt after confirming that the inverter output switch is in the open state, thereby avoiding repeated closure drives when the contact state is uncertain.

[0092] After the inverter output switch closes and the feedback is effective, the controller uses the first effective output branch current sample value after closure to predict the current of the next control cycle, and continues to execute fast soft-start control based on the inductor current domain at the end of the executable cycle for at least one control cycle, so that the filter inductor current and output voltage after the load is connected enter a predictable state.

[0093] The controller switches from fast soft-start control to dual-loop control consisting of a voltage outer loop and a current inner loop only when the takeover conditions are met for a consecutive preset number of control cycles. The takeover conditions for each control cycle include: The absolute error between the output voltage at the current sampling moment and the target instantaneous voltage determined at the sampling moment in the previous control cycle is not greater than the preset voltage error threshold. The absolute error between the current filter inductor current and the target inductor current at the end of the previous control cycle is not greater than the preset current error threshold. The bus voltage is within the preset control voltage range; The absolute value of the current modulation amount is not greater than the takeover modulation threshold, and the takeover modulation threshold is less than the maximum allowable modulation ratio, so as to reserve modulation margin for dynamic adjustment after dual-ring takeover; The closing feedback of the inverter output switch remained effective, and there were no overcurrent, bus undervoltage, bus overvoltage, or output short-circuit protection issues.

[0094] The number of consecutive preset cycles can be set to more than two control cycles based on sampling noise and dynamic response requirements. For example, at a control frequency of 20kHz, it can be set to 3 to 10 consecutive control cycles. The preset voltage error threshold and preset current error threshold are determined based on the output voltage sampling accuracy, rated output voltage, rated current, and allowable switching disturbance, respectively.

[0095] Both the outer voltage loop and the inner current loop employ regulators that incorporate integral states. During the fast soft-start phase, the outer voltage loop and the inner current loop do not directly drive the PWM; their integral states remain frozen. After the takeover conditions are met, the controller obtains the current voltage error, the current current error, the inductor current at the end of the target cycle, and the last executable bridge-side voltage within the last fast soft-start control cycle.

[0096] Let F_v be the non-integral output generated by the outer voltage loop under the current voltage error, and let X_v be the integral state of the outer voltage loop. Then, set the integral state of the outer voltage loop according to the following formula: X_v = i_L,tar - F_v.

[0097] Therefore, the initial total output after the outer voltage loop takes over is equal to the inductor current at the end of the target cycle. The controller uses this initial total output as the initial current setpoint for the inner current loop.

[0098] Let F_i be the non-integral output generated by the inner current loop under the current error, u_ff be the voltage feedforward output of the inner current loop, and X_i be the integral state of the inner current loop. Then, the integral state of the inner current loop is set according to the following formula: X_i = u_br,last - F_i - u_ff; where u_br,last is the last executable bridge-side voltage. Therefore, the first total output after the inner current loop takes over is equal to the last executable bridge-side voltage.

[0099] When discrete PI regulators are used for the outer voltage loop and inner current loop, F_v and F_i respectively include the proportional outputs of the corresponding regulators. When the regulator also includes decoupling terms, load feedforward terms, or limiting compensation terms, the above non-integral outputs also include the corresponding non-integral control components. Since the inductor current at the end of the target cycle belongs to the executable current domain and the last executable bridge-side voltage belongs to the allowable bridge-side voltage range, the set integral state will not require the controller output to exceed the control boundaries verified in the fast soft-start phase.

[0100] The controller loads the integral states of the outer voltage loop and inner current loop at the boundary of the same control cycle, switches the control mode, and updates the PWM. This ensures that the initial current setpoint of the outer voltage loop is continuous with the target inductor current during the fast soft-start phase, and that the initial bridge-side voltage setpoint of the inner current loop is continuous with the last executable bridge-side voltage. During the fast soft-start phase, the target instantaneous voltage, which already contains phase information, is used directly without being multiplied by a sinusoidal reference coefficient. After switching to dual-loop control, the normal reference voltage generation unit continues to use the same extrapolated phase to generate the sinusoidal voltage setpoint, avoiding phase jumps caused by control mode switching.

[0101] This embodiment thus forms two continuous control stages: in the first stage, the normal dual-loop regulator is not activated, but the output voltage is quickly established by using the target instantaneous voltage, segmented step, LC average discrete prediction, current domain projection and bridge-side voltage inverse calculation; in the second stage, the voltage outer loop and current inner loop are switched without disturbance by the integral state preset to ensure steady-state voltage quality and load dynamic response.

[0102] In one parameter implementation, the rated AC voltage is 230V, the rated frequency is 50Hz, and the PWM frequency is 20kHz. The following candidate voltage step settings can be used for different power levels and LC parameters.

[0103] For inverters with an output power of no more than 5kW, sufficient bus voltage margin, and filter inductance of no more than 1mH, when the absolute value of the target difference is greater than 250V, the candidate step size is set to 250V; when the absolute value of the target difference is no more than 250V, the actual step size does not exceed the remaining target difference, and the takeover conditions are determined.

[0104] For inverters with an output power of 5kW to 10kW, when the absolute value of the target difference is greater than 250V, the candidate step size is set to 250V; when the absolute value of the target difference is greater than 170V but not greater than 250V, the candidate step size is set to 170V; when the absolute value of the target difference is not greater than 170V, the actual step size does not exceed the remaining target difference, and the inverter enters the takeover condition determination stage.

[0105] For inverters with an output power of not less than 10kW, a filter inductance of not less than 3mH, a small bus voltage margin, or high sensitivity to load current, the candidate step size is set to 300V when the absolute value of the target difference is greater than 300V; the candidate step size is set to 200V when the absolute value of the target difference is between 200V and 300V; the candidate step size is set to 100V when the absolute value of the target difference is between 100V and 200V; and when the absolute value of the target difference is less than 100V, the actual step size does not exceed the remaining target difference, and the inverter enters the takeover condition determination stage.

[0106] The 250V, 170V, 300V, 200V, and 100V mentioned above are candidate step values, not the actual voltage changes that are forcibly applied to the LC filter. The inductor current at the end of the cycle corresponding to the candidate step still needs to be projected into the inductor current domain at the end of the executable cycle. Therefore, when the bus modulation capability, inductor current, or PWM ripple does not allow for the candidate step, the controller automatically reduces the actual executable voltage change.

[0107] When the bus voltage margin is sufficient, the inverter is under no-load or light-load conditions, and current domain projection correction is not triggered, the candidate voltage change rate corresponding to 250V / 50μs is approximately 5000V / ms, which allows the inverter voltage to approach or reach the rated instantaneous voltage corresponding to the phase within 5ms. Under conditions of heavy load or large closing transients, the controller prioritizes current safety constraints, and the actual settling time can be extended accordingly.

[0108] Each difference interval, candidate step size, bus voltage start-up range, inverter bridge allowable current, PWM timing error, control error threshold, closing action delay interval, and closing current threshold can be calibrated based on the inverter topology, LC filter parameters, device short-time current capability, sampling accuracy, and load characteristics, and stored in the controller. Adjusting the specific values ​​mentioned above does not change the technical concept of this invention, which targets instantaneous voltage, limits the actual voltage establishment process with the executable current domain, and seamlessly switches to dual-loop control.

[0109] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for fast soft-start of inverter voltage based on a bidirectional inverter, applied to a bidirectional inverter including a bidirectional DC / DC conversion unit, a DC bus, a DC / AC inverter bridge, an LC filter, a mains input switch, an inverter output switch, a sampling unit, and a controller, wherein the output terminal of the LC filter is connected to the load bus via the inverter output switch, characterized in that, include: In response to a mains power failure, the phase state prior to the failure is latched, the mains power input switch is disconnected, and the bidirectional DC / DC converter unit is controlled to establish the bus voltage using the energy storage battery. Once the bus voltage reaches the starting range, the output voltage, filter inductor current, output branch current, and bus voltage are collected, with the output voltage used as the initial executable voltage. The target instantaneous voltage at the end of the next control cycle is determined based on the phase state, and candidate voltages are generated according to the difference range and direction between the target instantaneous voltage and the executable voltage of the previous cycle. Based on the LC average discrete prediction model, the candidate inductor current at the end of the cycle is determined according to the candidate voltage and the acquired quantity; the inductor current domain at the end of the executable cycle is determined according to the bus voltage, the maximum allowable modulation ratio, LC parameters, the inverter bridge allowable current and the PWM ripple boundary; the candidate inductor current at the end of the cycle is projected onto the current domain to obtain the target inductor current at the end of the cycle. Substitute the inductor current at the end of the target cycle into the average discrete prediction model to determine the executable voltage and the executable bridge-side voltage in reverse. Generate the modulation amount based on the executable bridge-side voltage and the bus voltage, and use the executable voltage as the starting value for generating candidate voltages in the next cycle. When the inverter output switch is closed and the output voltage and inductor current meet the control conditions, the control states of the voltage outer loop and the current inner loop are set so that the voltage outer loop output matches the inductor current at the end of the target cycle for the first time, and the current inner loop output matches the last executable bridge-side voltage for the first time, switching to dual-loop control.

2. The method for fast soft-start of inverter voltage based on a bidirectional inverter according to claim 1, characterized in that, Determine the target instantaneous voltage at the end of the next control cycle, including: When the mains power is normal, the mains phase and mains angular frequency are continuously obtained through the phase-locked unit to determine whether the mains phase and mains angular frequency are valid; When the mains amplitude, mains frequency, or continuous mains absence time meets the mains abnormality conditions, latch the last valid mains phase and mains angular frequency. Based on the latched mains phase, mains angular frequency, elapsed time after mains anomaly and control cycle, extrapolate the target phase corresponding to the end of the next control cycle, and determine the target instantaneous voltage based on the target phase and rated voltage amplitude; After the mains input switch disconnects and the feedback is effective, and before the DC / AC inverter bridge outputs the first active modulation pulse, the output voltage across the filter capacitor is collected and determined as the initial executable voltage.

3. The method for fast soft-start of inverter voltage based on a bidirectional inverter according to claim 1, characterized in that, Generate candidate voltages, including: The difference between the target instantaneous voltage at the end of the next control cycle and the executable voltage of the previous control cycle is determined as the target difference. Set two or more difference intervals, and set the step size for each difference interval; Select the step size based on the difference range where the absolute value of the target difference is located, and determine the smaller of the selected step size and the absolute value of the target difference as the actual step size; Based on the positive or negative direction of the target difference, the actual step amount is superimposed on the executable voltage of the previous control cycle to obtain the candidate voltage, so that the candidate voltage does not exceed the target instantaneous voltage at the end of the next control cycle.

4. The method for fast soft-start of inverter voltage based on a bidirectional inverter according to claim 1, characterized in that, The filter inductor current flowing from the DC / AC inverter bridge to the output node of the LC filter is defined as positive, and the current flowing from the output node to the filter capacitor branch and the output branches other than the filter capacitor branch are defined as positive. The candidate cycle-end inductor current is determined, including: When the state of the inverter output switch remains unchanged, the output branch current collected in the current control cycle is used as the predicted average output branch current for the next control cycle. In the first effective sampling period after the inverter output switch switches from the open state to the closed state, the output branch current collected after closing is used as the predicted average output branch current, and the output branch current collected before closing is discarded. The average filter capacitor current during the candidate period is determined based on the voltage change between the candidate voltage and the current output voltage, the filter capacitor value, and the control period. The candidate period average filter capacitor current is added to the predicted average output branch current to obtain the candidate period average filter inductor current. Based on the trapezoidal discretization relationship used in the LC average discrete prediction model, the inductor current at the end of the candidate period is determined according to the current filter inductor current and the average filter inductor current of the candidate period.

5. The method for fast soft-start of inverter voltage based on a bidirectional inverter according to claim 4, characterized in that, The control cycle is the same as the PWM update cycle. The sampling unit completes sampling at the preset sampling time of the PWM update cycle to determine the inductor current domain at the end of the executable cycle, including: The maximum and minimum available bridge-side voltages are determined based on the bus voltage, the bus voltage utilization factor of the inverter bridge topology, and the maximum allowable modulation ratio. The maximum and minimum available bridge-side voltages are used as the bridge-side voltage boundaries of the LC average discrete prediction model. Based on the current output voltage, current filter inductor current, predicted average output branch current, and LC parameters, the upper and lower limits of the inductor current at the end of the cycle are determined. For the inductor current at the end of the test cycle located between the upper and lower limits of the reachable limit, the average current change trajectory within a control cycle is determined based on the current filtered inductor current and the inductor current at the end of the test cycle. The corresponding output voltage at the end of the cycle, the executable bridge-side voltage and the modulation amount are determined by the LC average discrete prediction model. The sequence of command switch states and the duration of each command switch state within a PWM update cycle are determined based on the modulation amount. A dead-zone freewheeling state is added between adjacent command switch states. The dead-zone freewheeling state is determined based on the direction of the filter inductor current before entering the dead zone. When the predicted filter inductor current may pass through zero during the dead zone, the calculation is performed according to the dead-zone freewheeling state corresponding to the two current directions. The range of values ​​for the switching state of each instruction and the duration of the dead-zone freewheeling state are determined based on the switching timing error. Based on the predicted range of output voltage, the value of the filter inductor, the equivalent series resistance of the filter inductor, and the allowable range of the filter inductor current within the control cycle, determine the upper and lower bounds of the deviation rate of the actual filter inductor current change rate relative to the average current change trajectory under each command switching state and dead-zone freewheeling state. With the cumulative current deviation at the start of the PWM update cycle as zero, according to the order of instruction switching state and dead-time freewheeling state, the upper and lower bounds of the deviation change rate corresponding to each state are accumulated during their duration to obtain the upper and lower bounds of the cumulative deviation at the end of each state. The maximum positive value of the cumulative deviation in all current direction calculation results is determined as the positive PWM ripple boundary, and the absolute value of the minimum negative value of the cumulative deviation is determined as the reverse PWM ripple boundary. The sum of the larger of the current filter inductor current and the inductor current at the end of the test cycle and the positive PWM ripple boundary is determined as the upper bound of the predicted current, and the difference between the smaller of the two and the reverse PWM ripple boundary is determined as the lower bound of the predicted current. The inductor current domain at the end of all cycles to be tested, where the upper bound of the predicted current does not exceed the upper limit of the forward allowable current of the inverter bridge, the lower bound of the predicted current is not lower than the lower limit of the reverse allowable current of the inverter bridge, and the executable bridge-side voltage is between the maximum and minimum available bridge-side voltage, is formed.

6. The method for fast soft-start of inverter voltage based on a bidirectional inverter according to claim 5, characterized in that, The reverse determination of the executable voltage and the executable bridge-side voltage includes: Based on the trapezoidal discrete relationship, the target period average filter inductor current is determined according to the current filter inductor current and the inductor current at the end of the target period. Subtract the predicted average output branch current from the target period average filter inductor current to obtain the executable period average filter capacitor current. The executable voltage at the end of the next control cycle is determined based on the average filter capacitor current, filter capacitor value, control cycle, and current output voltage of the executable cycle. The periodic average output voltage is determined based on the current output voltage and the executable voltage. The executable bridge-side voltage is determined based on the periodic average output voltage, the target periodic average filter inductor current, the equivalent series resistance of the filter inductor, and the change in the inductor current at the end of the target period relative to the current filter inductor current. The modulation amount is determined based on the modulation relationship corresponding to the executable bridge-side voltage, bus voltage, and inverter bridge topology, and the modulation amount is updated to the PWM control unit; wherein, the inductor current at the end of the target cycle belongs to the inductor current domain at the end of the executable cycle.

7. The method for fast soft-start of inverter voltage based on a bidirectional inverter according to claim 5, characterized in that, Projecting the candidate cycle-end inductor current to the executable cycle-end inductor current domain includes: When the candidate period's end-of-cycle inductor current belongs to the domain of the executable period's end-of-cycle inductor current, the candidate period's end-of-cycle inductor current is determined as the target period's end-of-cycle inductor current. When the candidate period-end inductor current does not belong to the executable period-end inductor current domain, the executable period-end inductor current with the smallest absolute difference from the candidate period-end inductor current is selected from the current domain as the target period-end inductor current. When there are two or more executable cycle-end inductor currents with the same absolute difference, and the current control cycle is not the first control cycle of fast soft start, select the executable cycle-end inductor current with the smallest change between it and the target cycle-end inductor current of the previous control cycle. When there are two or more executable cycle-end inductor currents with the same absolute difference, and the current control cycle is the first control cycle of fast soft start, the executable cycle-end inductor current with the smallest absolute value of the corresponding executable bridge-side voltage is selected; if the corresponding executable bridge-side voltages are still the same, the executable cycle-end inductor current with the smaller absolute value is selected. The executable voltage determined by the reverse inductor current at the end of the target cycle will be used as the starting value for generating candidate voltages in the next control cycle. When the inductor current domain is empty at the end of the executable cycle, the bus voltage exceeds the protection range, or the filter inductor current reaches the hardware protection threshold, the execution voltage is stopped from being increased, so that the DC / AC inverter bridge enters the safe freewheeling state determined by its topology, and the energy stored in the filter inductor is released through the freewheeling path. After the filter inductor current drops to the preset safe current threshold, the fast soft start is terminated and the system enters the protection state.

8. The method for fast soft-start of inverter voltage based on a bidirectional inverter according to claim 1, characterized in that, The takeover condition is that the control cycles for a consecutive preset number of times are met: The absolute error between the output voltage at the current sampling moment and the target instantaneous voltage determined at the sampling moment in the previous control cycle is not greater than the preset voltage error threshold. The absolute error between the current filter inductor current and the target inductor current at the end of the previous control cycle is not greater than the preset current error threshold. The bus voltage is within the preset control voltage range; the absolute value of the modulation amount is not greater than the control modulation threshold, and the control modulation threshold is less than the maximum allowable modulation ratio; the closed feedback of the inverter output switch is continuously effective, and there is no overcurrent, bus undervoltage, bus overvoltage, or output short circuit protection.

9. A method for fast soft-start of inverter voltage based on a bidirectional inverter according to claim 8, characterized in that, Both the outer voltage loop and the inner current loop are regulators that include integral states. The integral states of the outer voltage loop and the inner current loop are set, including: In the last control cycle that meets the takeover conditions, obtain the current voltage error, current current error, inductor current at the end of the target cycle, and the last executable bridge-side voltage; Set the integral state of the voltage outer loop based on the non-integral output generated by the voltage outer loop under the current voltage error, so that the first total output after the voltage outer loop takes over is equal to the inductor current at the end of the target cycle. The initial total output after the outer voltage loop is taken over is used as the initial current reference for the inner current loop; Based on the non-integral output generated by the current inner loop under the current error and the voltage feedforward output of the current inner loop, the integral state of the current inner loop is set so that the first total output after the current inner loop takes over is equal to the last executable bridge side voltage. The integral states of the outer voltage loop and the inner current loop are loaded at the boundary of the same control cycle, and the control mode is switched so that the bridge-side voltage setpoint remains continuous before and after the control mode switch.

10. A method for fast soft-start of inverter voltage based on a bidirectional inverter according to claim 6, characterized in that, During the initial voltage build-up period of fast soft start, the inverter output switch is kept open, and the voltage of the filter capacitor on the inverter side and the residual voltage on the load bus side are collected. The action delay range from receiving the closing command to the actual closing of the contacts of the inverter output switch is obtained; When preparing to issue a closing command for the inverter output switch, and in each control cycle where a closing command has been issued but the closing feedback has not yet been effective, a rolling closing verification is performed based on the currently collected output voltage, filter inductor current, output branch current, and bus voltage. Rolling closing verification includes: establishing a disconnection scenario where the contacts remain open during the next control cycle, and a closing scenario where the contacts close at any time during the next control cycle; For disconnection scenarios, determine the first executable bridge-side voltage domain that keeps the predicted inductor current in the next control cycle within the allowable current range of the inverter bridge; For each bridge-side voltage under test and each allowable closing moment of the contact in the next control cycle, the predicted inductor current and the maximum value of the closing transient current from the contact closing to the next sampling moment are determined based on the load current boundary and the closing circuit parameters. The second executable bridge-side voltage domain is formed by ensuring that the predicted inductor current corresponding to all allowed closing times is within the allowable current range of the inverter bridge, and that the maximum value of the closing transient current corresponding to all allowed closing times is not greater than the preset closing current threshold. The intersection of the first executable bridge-side voltage domain and the second executable bridge-side voltage domain is determined as the common executable bridge-side voltage domain for closing in this control cycle; For each candidate bridge-side voltage in the common executable bridge-side voltage domain for closing, the predicted output voltage at the end of the next control cycle under the disconnection scenario and each closing scenario is determined, and the maximum value of the absolute error between each predicted output voltage and the target instantaneous voltage is determined. Select the executable bridge-side voltage with the smallest maximum value from the common executable bridge-side voltage domain for closing, and control the DC / AC inverter bridge; When the voltage domain of the common-operable bridge side is not empty and the disconnection feedback of the mains input switch is effective, the drive to close the inverter output switch is issued or maintained. When the voltage domain of the common execution bridge is empty, the DC / AC inverter bridge enters the safe freewheeling state, and the closing drive of the inverter output switch is canceled before the closing feedback is effective. If no closure feedback is received after the upper limit of the action delay interval since the first closure command was issued in this closure attempt, the closure is determined to have failed and the closure drive is canceled; the next closure attempt can only be restarted after confirming that the inverter output switch is in the open state. After the feedback of the inverter output switch closure is effective, the current prediction of the next control cycle is made using the sampled value of the first effective output branch current after closure. The fast soft-start control based on the inductor current domain at the end of the executable cycle is continued for at least one control cycle. After the takeover conditions are met, the control is switched to dual-loop control.

Images