Power device driving circuit and design method with integrated crosstalk suppression and false pass prevention

Abstract

The application provides a power device driving circuit and design method integrating crosstalk suppression and false conduction prevention, which is used for solving the problems of serious crosstalk and gate false conduction in the high-frequency switching process of the existing GaN device. The driving circuit comprises a driving module and an auxiliary clamping circuit. The output end of the driving module is connected with the gate of a GaN HEMT device through a first resistor. The auxiliary clamping circuit comprises first and second auxiliary switching tubes. The drain of the first auxiliary switching tube is connected with one end of an RC coupling circuit and the anode of a clamping diode. The cathode of the clamping diode is connected with one end of a third resistor. The other end of the third resistor is connected with the drain of the second auxiliary switching tube. The gate of the second auxiliary switching tube is connected with one end of a second resistor. The other end of the second resistor and the other end of the RC coupling circuit are both connected with the output end of the driving module. The source of the first auxiliary switching tube is connected with the gate of the GaN HEMT device. The application effectively avoids the bridge arm through and the gate breakdown, and improves the reliability of the power conversion system.

Description

Technical Field

[0001] This invention relates to the field of power electronics and electric drive technology, and in particular to a power device drive circuit and design method that integrates crosstalk suppression and anti-misoperation. Background Technology

[0002] Wide-bandgap power semiconductor devices, represented by gallium nitride high electron mobility transistors (GaN HEMTs), have attracted increasing attention in the field of power electronics due to their fast switching speed and low conduction losses. However, GaN HEMTs are characterized by low threshold voltage and extremely high transient voltage change rate (dv / dt) and current change rate (di / dt), making them highly susceptible to interference in practical applications. In half-bridge circuits based on GaN HEMTs, the device's switching transients face severe challenges from crosstalk and mis-enabling. Specifically, when the active transistor is turned on, the high dv / dt generated by current commutation will pass through the Miller capacitance C of the passive transistor. gd Displacement current is generated, leading to a positive crosstalk voltage peak at the gate of the passive transistor, which poses a risk of bridge arm shoot-through. When the active transistor is turned off, its high dv / dt and di / dt not only cause a negative crosstalk voltage spike in the passive transistor, increasing the risk of gate negative breakdown, but also cause severe gate oscillation in the active transistor due to the combined effects of high-frequency parasitic inductance and capacitance, thus triggering a false turn-on during turn-off. Under certain conditions, the aforementioned false turn-on or bridge arm crosstalk can also cause more severe multimode undamped oscillations, which will further reduce system reliability.

[0003] To suppress device crosstalk and prevent undamped oscillations, various methods have been proposed in the industry, but all have significant limitations. First, actively reducing device switching speed or increasing gate impedance: Adding extra capacitance to the gate and source or increasing the gate resistance reduces dv / dt and di / dt. While this effectively suppresses oscillations, it directly sacrifices the core high-frequency advantage of GaN devices and increases switching losses. Second, the traditional 0V turn-off drive scheme: This scheme avoids the superposition effect of negative voltage bias on negative crosstalk voltage and has a good effect on suppressing negative crosstalk. However, its ability to suppress positive crosstalk voltage peaks is severely insufficient, and it is difficult to effectively suppress high-frequency interference during turn-off transients. It is highly susceptible to passive transistors being mis-turned on due to positive crosstalk, or to gate oscillations after the active transistor is turned off causing mis-turn-on. Third, traditional constant negative voltage methods, such as active negative voltage turn-off drive schemes, while increasing safety margins and effectively suppressing positive crosstalk, suffer from low turn-off steady-state bias. After negative crosstalk occurs, the gate-source voltage can easily exceed the device's maximum gate-source withstand negative voltage, posing a serious risk of gate negative breakdown. Furthermore, since GaN HEMTs lack a body diode, excessively high constant negative voltages significantly increase reverse conduction losses during the dead time. More importantly, complex active negative voltage drive schemes require additional isolation power supplies or control logic, resulting in bulky auxiliary circuitry and soaring costs, making them difficult to widely apply in practical engineering.

[0004] In summary, existing crosstalk suppression research suffers from problems such as complex driver design, high cost, or difficulty in simultaneously suppressing both positive and negative crosstalk (suppressing positive crosstalk increases the risk of breakdown, while suppressing negative crosstalk increases the risk of shoot-through). Therefore, there is an urgent need to research a passive suppression scheme that is suitable for practical operating conditions, low in cost, and does not sacrifice device switching speed, in order to comprehensively eliminate gate mis-conduction and crosstalk risks, and improve the operational reliability of GaN high-frequency power conversion systems. Summary of the Invention

[0005] The purpose of this invention is to provide a power device drive circuit and design method that integrates crosstalk suppression and anti-misoperation switching. This addresses the issue of high voltage change rate during the high-frequency switching process of existing GaN devices. and high current change rate This leads to severe crosstalk and gate misconduction problems.

[0006] First, this application provides a power device driving circuit that integrates crosstalk suppression and anti-false turn-on protection. The power device is a GaN HEMT device. The driving circuit includes a driving module and an auxiliary clamping circuit. The output terminal of the driving module is connected to the gate of the GaN HEMT device through a first resistor.

[0007] The auxiliary clamping circuit includes a first auxiliary switch and a second auxiliary switch. The drain of the first auxiliary switch is connected to one end of an RC coupling circuit and the anode of a clamping diode. The cathode of the clamping diode is connected to one end of a third resistor. The other end of the third resistor is connected to the drain of the second auxiliary switch. The gate of the second auxiliary switch is connected to one end of a second resistor. The other ends of the second resistor and the RC coupling circuit are both connected to the output terminal of the drive module. The source of the first auxiliary switch is connected to the gate of a GaN HEMT device.

[0008] Optionally, the drain of the GaN HEMT device is used as the high-voltage input, the source of the GaN HEMT device is grounded through a first source inductor and a common source inductor, and the gate of the first auxiliary switch and the source of the second auxiliary switch are grounded.

[0009] Optionally, the GaN HEMT device has internal parasitic capacitance, which includes gate-source capacitance, Miller capacitance, and drain-source capacitance.

[0010] Optionally, the RC coupling circuit includes a first capacitor and a coupling resistor connected in series, and the RC coupling circuit is used to detect the rate of change of the driving voltage.

[0011] Optionally, the first auxiliary switch is a P-type MOSFET, and the second auxiliary switch is an N-type MOSFET.

[0012] Secondly, this application provides a half-bridge circuit, including two sets of power device drive circuits with integrated crosstalk suppression and anti-misoperation protection as described above.

[0013] Optionally, the two GaN HEMT devices can be defined as the upper power transistor and the lower power transistor, respectively;

[0014] When the current power transistor turns on and causes crosstalk in the bridge arm, and a negative spike appears at the gate of the upper power transistor, the auxiliary clamping branch quickly turns on to discharge the negative voltage spike at the gate and prevent gate breakdown due to negative voltage.

[0015] When the current power transistor is turned off, causing crosstalk in the bridge arm, and a positive spike appears at the gate of the upper power transistor, the auxiliary clamping branch actively pulls down the gate potential, shunts the Miller current, and suppresses misleading turn-on.

[0016] When the drive circuit outputs a normal turn-on signal, the gate of the power transistor is charged through the first resistor, and the auxiliary clamping branch remains off, which does not affect the normal turn-on process.

[0017] When the drive circuit outputs a normal turn-off signal, the gate of the power transistor discharges through the first resistor, and the auxiliary clamping branch helps to pull down the gate potential, thereby achieving turn-off.

[0018] Secondly, this application provides a design method for a power device drive circuit that integrates crosstalk suppression and anti-misoperation, applied to the aforementioned power device drive circuit that integrates crosstalk suppression and anti-misoperation, with the following specific steps:

[0019] S1: Quantitative analysis of the safety margin of positive and negative crosstalk voltages in GaN HEMT devices;

[0020] S2: Establish a crosstalk voltage calculation model and perform theoretical calculations on positive and negative crosstalk voltages;

[0021] S3: Based on the crosstalk suppression target, complete the quantitative design of key component parameters of the drive circuit.

[0022] Optionally, in step S2, the peak values ​​of positive and negative crosstalk voltages are calculated according to the crosstalk voltage estimation method. and The prediction is:

[0023]

[0024]

[0025] in, Negative bias for crosstalk. This represents the equivalent impedance of the gate circuit. This is the gate-source capacitance value. Miller capacitance value Input voltage, For input capacitance, equal and The sum of The drain-source voltage fall time. This represents the rise time of the drain-source voltage.

[0026] Optionally, the key components of the drive circuit in step S3 need to meet the following requirements:

[0027]

[0028] in, This is the first resistance value. This is the coupling resistance value. This represents the parasitic gate resistance value inside the GaN HEMT device. Dead time, It is the gate-source voltage conduction time. Based on a system of inequality equations, the value range of key components in the drive circuit is determined.

[0029] Because of the adoption of the above technical solution, the present invention has the following advantages:

[0030] 1. In the half-bridge circuit, this application can quickly discharge the negative gate spike and suppress the positive mis-conduction by shunt Miller current through the auxiliary clamping circuit, while not interfering with the normal switching process, effectively avoiding bridge arm shoot-through and gate breakdown, and improving the system reliability of the power conversion system.

[0031] 2. This application only adopts a simple passive device architecture, without the need for an external independent negative voltage source or complex control logic. With a simple and low-cost circuit, gate mis-conduction and bridge arm crosstalk suppression can be achieved, thereby preventing the generation of undamped oscillations and significantly improving the reliability and efficiency of the power conversion system.

[0032] Other advantages, objectives, and features of the invention will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art from the following examination, or may be learned from practice of the invention. The objectives and other advantages of the invention can be realized and obtained through the following description. Attached Figure Description

[0033] The accompanying drawings of this invention are described below.

[0034] Figure 1 This is a schematic diagram of the power device drive circuit of the present invention.

[0035] Figure 2 This is a diagram showing the selection area for the RC coupling circuit of this invention.

[0036] Figure 3 This is a circuit diagram of the power transistor when the present invention is operating in the first stage.

[0037] Figure 4 This is a circuit diagram of the power transistor when the present invention is operating in the second stage.

[0038] Figure 5 This is a circuit diagram of the power transistor when the present invention is operating in the third stage.

[0039] Figure 6 This is a circuit diagram of the power transistor when the present invention is operating in the fourth stage.

[0040] Figure 7 This is a waveform diagram showing the overall working process of the present invention.

[0041] Figure 8 The graph shows the effect of different methods on negative crosstalk spike suppression.

[0042] Figure 9 The graph shows the effect of different methods on suppressing positive crosstalk spikes.

[0043] Figure 10 The waveform diagram is from an experiment on suppressing misconduction of a power transistor driven by a traditional 0V.

[0044] Figure 11 The waveform diagram is an experimental waveform diagram of power transistor misconduction suppression driven by the present invention. Detailed Implementation

[0045] The present invention will be further described below with reference to the accompanying drawings and embodiments. The terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. In the description of the embodiments of the present invention, it should be noted that, unless otherwise expressly specified and limited, the terms "connected" or "linked" should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, an integral connection, an electrical connection, or a signal connection; it can be a direct connection or an indirect connection through an intermediate medium.

[0046] Example 1:

[0047] like Figure 1 The diagram illustrates a power device drive circuit integrating crosstalk suppression and anti-false turn-on protection. The power device is a GaN HEMT device. The drive circuit includes a drive module and an auxiliary clamping circuit. The output terminal of the drive module is connected to a first resistor. Connected to the gate of a GaN HEMT device;

[0048] The auxiliary clamping circuit includes a first auxiliary switching transistor. Second auxiliary switch The first auxiliary switch tube The drain and one end of the RC coupling circuit and the clamping diode The anode connection of the clamping diode Cathode and third resistor One end is connected to the third resistor. The other end is connected to the second auxiliary switch. The drain connection of the second auxiliary switch transistor The gate and the second resistor One end is connected, the second resistor The other end of both the auxiliary switch and the RC coupling circuit is connected to the output of the drive module. The source is connected to the gate of the GaN HEMT device.

[0049] The drain of the GaN HEMT device serves as the high-voltage input, and the source of the GaN HEMT device is connected through a first source inductor. and common source inductor Grounding; the first auxiliary switch transistor Gate and second auxiliary switch The source of the first auxiliary switch is grounded; It is a P-type MOSFET, and the second auxiliary switch is... It is an N-type MOSFET.

[0050] The GaN HEMT device has internal parasitic capacitance, which includes gate-source capacitance. Miller capacitors and drain-source capacitance The RC coupling circuit includes a first capacitor connected in series. and coupling resistor The RC coupling circuit is used to detect the rate of change of the driving voltage. .

[0051] Example 2:

[0052] A design method for a power device drive circuit integrating crosstalk suppression and anti-misoperation, applying the power device drive circuit with integrated crosstalk suppression and anti-misoperation described in Example 1, includes the following specific steps:

[0053] S1: Based on the GaN-HEMT device's own threshold voltage and maximum negative withstand voltage, determine the threshold values ​​for positive and negative crosstalk spikes, and set a margin of 1.5 times as a safety margin for positive and negative crosstalk voltages; specifically, to ensure the safe operation of the device and achieve good crosstalk suppression, positive crosstalk voltage spikes should generally not exceed the threshold voltage. Negative crosstalk voltage spikes should not exceed the device's maximum negative withstand voltage. To further ensure safe operation, a margin of 1.5 times should be allowed. Therefore, the following relationship needs to be satisfied:

[0054]

[0055]

[0056]

[0057] in, This is the peak value of the positive crosstalk voltage. The peak value of the negative crosstalk voltage. This is the device threshold voltage. This is the maximum negative withstand voltage of the device. This is the device's shutdown drive voltage.

[0058] In this embodiment, setting positive and negative crosstalk voltage safety margins is to address crosstalk fluctuations caused by environmental variations and parameter drift in high-frequency switching scenarios. This ensures that the device remains stable within a safe operating range even under complex and changing conditions, thereby improving the long-term reliability of the system. By defining the constraints, the upper and lower limits of crosstalk for safe device operation are established, providing a clear evaluation criterion for subsequent crosstalk optimization and determining whether the crosstalk suppression scheme meets safety requirements.

[0059] S2: By constructing an equivalent model of the gate circuit under high-frequency operating conditions and solving the circuit differential equations, prediction formulas for positive and negative crosstalk peak values ​​are derived; the specific method is as follows:

[0060] Because the crosstalk duration is extremely short, the first capacitor can be used under high-frequency operating conditions. Considered a short circuit, the equivalent impedance of the gate circuit can be expressed as:

[0061]

[0062] At this time, the relationship between the gate circuit voltage and current is:

[0063]

[0064] in, Negative bias for crosstalk. Gate-source voltage, Miller voltage, This is the gate-source capacitance value. Miller capacitance value.

[0065] By applying the differential equation gate-source voltage By solving this problem, we can obtain... and The prediction formula:

[0066]

[0067]

[0068] in, This represents the equivalent impedance of the gate circuit. Input voltage, For input capacitance, equal and The sum of The drain-source voltage fall time. This represents the rise time of the drain-source voltage.

[0069] In this embodiment, based on the prediction formula, design parameters such as the equivalent impedance of the gate circuit and the values ​​of resistance and capacitance can be adjusted in a targeted manner to control the crosstalk amplitude within the safe range defined by S1, providing quantitative theoretical support for the selection of devices and parameter settings of the drive circuit.

[0070] S3: Based on the crosstalk suppression target, complete the quantitative design of key component parameters for the drive circuit; the specific method is as follows:

[0071] like Figure 2The diagram shows the RC circuit options area. To effectively reduce reverse conduction losses and lower the possibility of reverse breakdown, the gate-source voltage of the device should recover to zero as quickly as possible when negative crosstalk voltage is generated. Based on the above analysis, the following relationship needs to be satisfied:

[0072]

[0073] in, This is the first resistance value. This is the coupling resistance value. This represents the parasitic gate resistance value inside the GaN HEMT device. Dead time, It is the gate-source voltage conduction time. Based on a system of inequality equations, the value range of key components in the drive circuit is determined.

[0074] In this embodiment, the other key components are: diode 1SS315TPH3F, MOSFET... IRLML2030TRPBF was selected. SN7002N is selected.

[0075] Example 3:

[0076] A half-bridge circuit includes two sets of power device drive circuits with integrated crosstalk suppression and anti-misoperation protection as described in Embodiment 1; and uses the design method described in Embodiment 2 for parameter design, defining two GaN HEMT devices as the upper power transistors. and lower power transistor The half-bridge circuit includes four operating stages:

[0077] Phase 1: When the current power transistor is turned off, causing bridge arm crosstalk and a positive spike appears at the gate of the current power transistor, the auxiliary clamping branch actively pulls down the gate potential, shunting the Miller current and suppressing false turn-on; specifically:

[0078] like Figure 3 As shown, in Before the time, the power transistor When in the off state, the lower power transistor When the gate is high, it operates in synchronous rectification and freewheeling mode; At that moment, the power transistor The drive remains unchanged, lower power transistor The drive signal changes from high level to zero; based on the first capacitor. The property that the voltage across the terminals cannot change abruptly, when When the potential on the left side becomes zero, the potential on the right side becomes negative. At this time, the clamping diode... The anode is at a negative potential and is subjected to the second resistor. The delay effect affects the second auxiliary switch. The diode remains in the on state during this stage, thus clamping the diode. The cathode potential is approximately zero. Therefore, the clamping diode... The anode potential is clamped at a negative voltage. Simultaneously, the first auxiliary switch... The gate is grounded and the source is at a negative potential, therefore It is in a conductive state. Therefore... The voltage through The power will be applied to the lower power transistor. A negative voltage bias is achieved at the gate and source ends during turn-off. Since the circuit has no external power supply, Voltage through and The voltage decay rate depends on the circuit where it is discharged. , , The time constant constituted.

[0079] During this period, with the power transistor Turn on, lower power transistor The drain-source voltage and drain current change accordingly, and this is reflected in the lower power transistor via the Miller capacitance. A positive crosstalk voltage is induced at the gate. Although the positive crosstalk voltage causes a rise in the gate-source voltage, it benefits from... The provided negative bias significantly reduces the peak positive crosstalk voltage, ensuring it remains below the threshold voltage of the GaNHEMT device. After the positive crosstalk voltage decays... The voltage continues to decay through the circuit until it reaches zero.

[0080] Phase 2: When the current power transistor turns on, causing bridge arm crosstalk and a negative voltage spike appears at the gate of the current power transistor, the auxiliary clamping branch quickly turns on to discharge the negative voltage spike at the gate and prevent gate breakdown due to negative voltage. Specifically:

[0081] like Figure 4 As shown, in At that moment, the power transistor Turning off causes the lower power transistor to... The drain-source voltage drops rapidly. During this transient process, the high... via Miller capacitance This generates a negative displacement current, which in turn induces a negative crosstalk voltage spike at the gate. At this time, the first capacitor... The potential on the left is zero. , , The body diode forms a low-impedance loop to quickly release the displacement current. Furthermore, the gate-source voltage has recovered to 0. Compared to traditional constant negative voltage drive, this circuit can reduce the peak value of the negative crosstalk voltage, lowering the risk of negative gate voltage breakdown in GaN HEMT devices.

[0082] Phase 3: When the drive circuit outputs a normal turn-on signal, the gate of the power transistor is charged through the first resistor, and the auxiliary clamping branch remains off, thus not affecting the normal turn-on process; specifically:

[0083] like Figure 5 As shown, in At that moment, the lower power transistor The drive signal changes from low to high level, and the power transistor... Entering the power-on phase. The driver chip, while providing drive current to the main power circuit, simultaneously... right The input capacitor is charged. This is to ensure that the power transistor is not affected. The opening speed should be made The gate-source voltage remains below its turn-on threshold during this phase, ensuring... Maintaining the off state, therefore The resistance is much greater than At this time, due to , , The body diode forms a low-impedance circuit, and the driver chip is the lower power transistor. The input capacitor is used for fast charging. At that moment, the lower power transistor Complete the switching process.

[0084] Phase 4: When the drive circuit outputs a normal turn-off signal, the gate of the power transistor discharges through the first resistor, and the auxiliary clamping branch helps pull down the gate potential, thus achieving turn-off; specifically:

[0085] like Figure 6 As shown, in At that moment, the lower power transistor The activation process has been completed. The gate-source voltage exceeds its threshold voltage. With the drain and source conducting, the driver chip will pass through , , , for To charge, adjust resistance control The charging speed. When Voltage rises to This phase ends when the circuit reaches steady-state operation. The proposed auxiliary circuit does not generate additional static power loss after entering steady-state operation, and thus has virtually no impact on the overall efficiency of the drive circuit.

[0086] In summary, during the device turn-on phase, the driving circuit in this application uses an internal loop to power the first capacitor. Energy storage during charging; during the device turn-off phase, the capacitor voltage is applied in reverse across the gate and source to establish a dynamic negative bias. For passive transistors (lower power transistors) This negative bias effectively suppresses positive crosstalk caused by the high voltage change rate when the active transistor is turned on, and releases displacement current using a low-impedance loop during the transient process of generating negative crosstalk, reducing the risk of breakdown; for the active transistor (lower power transistor) This negative bias effectively suppresses gate voltage oscillations during its turn-off transient, preventing false turn-on.

[0087] Experimental verification:

[0088] like Figure 7 The diagram shows the key waveforms of the gate-source voltage during the entire switching process. Figure 7 As can be seen, based on the driving circuit of this application, positive and negative crosstalk is accurately suppressed.

[0089] like Figure 8 and Figure 9 As shown, tests were conducted under four operating conditions: bus voltage of 100V, 200V, 300V, and 400V. Figure 8 The figure shows a comparison of the negative crosstalk voltage waveforms of this invention with traditional 0V turn-off and -4V constant negative voltage turn-off schemes. At 100V, this invention limits the negative peak to -5.85V, a reduction of 11.4% and 40.8% compared to the 0V and -4V schemes, respectively. Even at 400V, its negative peak is only -7.47V, always remaining within the safe operating range. Figure 9 The figure shows a comparison of the positive crosstalk voltage waveforms of this invention with those of traditional 0V turn-off and -4V constant negative voltage turn-off schemes. Even under a low voltage condition of 100V, the peak value of the positive crosstalk voltage reaches 2.78V, exceeding the threshold voltage of 1.7V. As the voltage increases, the peak value of the positive crosstalk voltage reaches 4.12V. Under a 400V condition, the peak value is 1.55V, which is about 60% lower than that of the 0V scheme.

[0090] like Figure 10 and Figure 11 As shown, Figure 10 Experimental waveforms of a conventional 0V turn-off drive under different bus voltages are shown. The experiments tested four operating conditions ranging from 100V to 400V. It can be observed that the gate voltage v... gs2The voltage failed to stabilize at 0V after turn-off. Due to the combined effects of high-frequency parasitic inductance and device parasitic capacitance, severe waveform oscillations occurred. Gate oscillations caused the gate-source voltage to exceed the threshold voltage again after the turn-off process. . Figure 11 The experimental waveforms of the auxiliary drive circuit of this invention under the same conditions are shown. When the downtransistor drive signal changes from high to low, the device begins to turn off. The gate-source voltage drops rapidly to below 0V. Thanks to the establishment of negative bias, the margin between the gate-source voltage and the threshold voltage is significantly increased, and the gate-source voltage will not exceed the threshold voltage when gate oscillation occurs. Experimental verification shows that this invention can effectively reduce positive and negative crosstalk and prevent the device from being mis-turned on.

[0091] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A power device drive circuit integrating crosstalk suppression and anti-misdirection, wherein the power device is a GaN HEMT device, characterized in that, The driving circuit includes a driving module and an auxiliary clamping circuit. The output terminal of the driving module is connected to the gate of the GaN HEMT device through a first resistor. The auxiliary clamping circuit includes a first auxiliary switch and a second auxiliary switch. The drain of the first auxiliary switch is connected to one end of an RC coupling circuit and the anode of a clamping diode. The cathode of the clamping diode is connected to one end of a third resistor. The other end of the third resistor is connected to the drain of the second auxiliary switch. The gate of the second auxiliary switch is connected to one end of a second resistor. The other ends of the second resistor and the RC coupling circuit are both connected to the output terminal of the drive module. The source of the first auxiliary switch is connected to the gate of a GaN HEMT device.

2. The power device drive circuit integrating crosstalk suppression and anti-misdirection as described in claim 1, characterized in that, The drain of the GaN HEMT device serves as the high-voltage input, and the source of the GaN HEMT device is grounded through a first source inductor and a common source inductor. The gate of the first auxiliary switch and the source of the second auxiliary switch are grounded.

3. The power device drive circuit with integrated crosstalk suppression and anti-misdirection as described in claim 1 or 2, characterized in that, The GaN HEMT device has internal parasitic capacitances, which include gate-source capacitance, Miller capacitance, and drain-source capacitance.

4. The power device drive circuit with integrated crosstalk suppression and anti-misdirection as described in claim 1, characterized in that, The RC coupling circuit includes a first capacitor and a coupling resistor connected in series, and the RC coupling circuit is used to detect the rate of change of the driving voltage.

5. The power device drive circuit integrating crosstalk suppression and anti-misdirection as described in claim 1, characterized in that, The first auxiliary switch is a P-type MOSFET, and the second auxiliary switch is an N-type MOSFET.

6. A half-bridge circuit, characterized in that, It includes two sets of power device drive circuits with integrated crosstalk suppression and anti-misdirection as described in any one of claims 1-5.

7. A half-bridge circuit according to claim 6, characterized in that, Define two GaN HEMT devices as the upper power transistor and the lower power transistor, respectively. When the current power transistor turns on and causes crosstalk in the bridge arm, and a negative spike appears at the gate of the upper power transistor, the auxiliary clamping branch quickly turns on to discharge the negative voltage spike at the gate and prevent gate breakdown due to negative voltage. When the current power transistor is turned off, causing crosstalk in the bridge arm, and a positive spike appears at the gate of the upper power transistor, the auxiliary clamping branch actively pulls down the gate potential, shunts the Miller current, and suppresses misleading turn-on. When the drive circuit outputs a normal turn-on signal, the gate of the power transistor is charged through the first resistor, and the auxiliary clamping branch remains off, which does not affect the normal turn-on process. When the drive circuit outputs a normal turn-off signal, the gate of the power transistor discharges through the first resistor, and the auxiliary clamping branch helps to pull down the gate potential, thereby achieving turn-off.

8. A design method for a power device drive circuit integrating crosstalk suppression and anti-misdirection, characterized in that, The power device drive circuit with integrated crosstalk suppression and anti-misdirection as described in any one of claims 1-5 comprises the following steps: S1: Quantitative analysis of the safety margin of positive and negative crosstalk voltages in GaN HEMT devices; S2: Establish a crosstalk voltage calculation model and perform theoretical calculations on positive and negative crosstalk voltages; S3: Based on the crosstalk suppression target, complete the quantitative design of key component parameters of the drive circuit.

9. The design method of the power device drive circuit integrating crosstalk suppression and anti-misdirection as described in claim 8, characterized in that, In step S2, based on the crosstalk voltage estimation method, the peak values ​​of positive and negative crosstalk voltages are... and The prediction is: in, Negative bias for crosstalk. This represents the equivalent impedance of the gate circuit. This is the gate-source capacitance value. Miller capacitance value Input voltage, For input capacitance, equal and The sum of The drain-source voltage fall time. This represents the rise time of the drain-source voltage.

10. The design method of the power device drive circuit integrating crosstalk suppression and anti-misdirection as described in claim 8, characterized in that, The key components of the drive circuit in step S3 need to meet the following requirements: in, This is the first resistance value. This is the coupling resistance value. This represents the parasitic gate resistance value inside the GaN HEMT device. Dead time, It is the gate-source voltage conduction time. Based on a system of inequality equations, the value range of key components in the drive circuit is determined.

Images