A power frequency avoidance and functional safety level power line carrier communication method and system for a power control system

Abstract

The application relates to a power frequency avoidance and functional safety level power line carrier communication method and system for a power control system, which comprises the following steps: according to the safety operation code attribute, the payload length and the tolerant delay time of the to-be-sent data in bus communication data, the to-be-sent data is divided into at least three priorities; the first priority data with the highest priority is sent without delay by forcibly occupying the bus, and continuous blind retransmission is initiated according to a preset micro time slot interval when the first sending fails; the micro time slot interval and the half cycle of the power frequency alternating current are in an inverse harmonic constraint relationship in the time scale; under limited computing power, the safety instruction can be reached with extremely low delay and certainty in the extreme interference environment, the high reliability control requirement of heavy industry is met, and the problems of high response delay of emergency control instructions, long message blocking and channel collision caused by synchronous power frequency pulse noise in an industrial field can be solved.

Description

Technical Field

[0001] This invention relates to the field of industrial fieldbus communication and automated measurement and control technology, and in particular to a power frequency avoidance and functional safety level power line carrier communication method and system for power control systems. Background Technology

[0002] In heavy industrial settings such as coal conveying control systems in thermal power plants and metallurgical mines, traditional control systems typically require laying massive amounts of dedicated control cables, resulting in high construction costs, complex wiring, and difficult maintenance. In recent years, combining fieldbus technology with low-voltage power line carrier (PLC) technology to directly reuse existing ordinary control cables (such as VV and KVV cables) or power cables for digital signal transmission has become a significant trend in the development of the Industrial Internet of Things (IIoT). These systems typically do not rely on bulky and expensive standardized high-speed carrier chips, but instead employ lightweight microprocessors combined with modulation and demodulation techniques such as frequency shift keying (FSK), offering advantages such as flexible network topology and low implementation costs.

[0003] However, the physical channels in heavy industrial sites present extremely harsh electromagnetic interference environments. The silicon-controlled rectifiers (thyristors), high-power frequency converters, and large relay contactors widely used in these sites inject high-energy, sudden pulse noise into the cables during operation and frequent start-stop cycles. Research and engineering practice show that this type of strong pulse noise exhibits a significant "periodic characteristic synchronized with the power frequency," with its outbreak time strictly synchronized with the peaks, troughs, and near zero-crossing points of the 50Hz or 60Hz AC sine wave.

[0004] Existing industrial carrier communication mechanisms exhibit the following serious engineering flaws when dealing with the aforementioned special electromagnetic environments: 1. The harmonic resonance trap of "periodic arc interference" and "conventional redundancy retransmission mechanism" In existing fault-tolerance mechanisms, when data packet loss occurs due to interference, continuous blind transmission or redundant retransmission is typically employed. For example, Chinese patent application CN1499741A, "Power Line Carrier Communication Protocol and Device Thereof," discloses a scheme that uses a microprocessor as the main controller and "adopts frame redundancy retransmission" in the link to improve reliability. However, because industrial arc interference has a timing characteristic that is synchronized with the half-cycle of AC power (10 milliseconds at 50Hz), if the transmitting end blindly adopts fixed continuous frame redundancy retransmission and the retransmission period is not decoupled from the power frequency physical phase, it is very easy for all subsequent retransmitted messages to "continuously hit the interference beat," resulting in harmonic resonance-induced total failure. This not only fails to correct errors but also seriously wastes bus bandwidth.

[0005] 2. The "functional safety" of control commands conflicts with the "channel preemption" of the CSMA / CD mechanism. Fieldbus is a half-duplex shared communication medium. As disclosed in patent CN1499741A, an improved CSMA / CD (Carrier Sense Multiple Access / Collision Detection) protocol is used as the underlying media access control protocol. However, in heavy industrial control, functional safety commands such as "emergency stop" have extremely small data volumes but require extremely low latency (e.g., must be received within 10 milliseconds); while the bus is often filled with a large number of lengthy daily telemetry status packets. The traditional CSMA / CD mechanism follows the principle of "listen first, then send, collision backoff," and does not grant absolute preemption privileges for the safety semantics of commands at the underlying level. When a sudden emergency occurs, short safety commands are often blocked in the transmission queue by the long telemetry packets that are being transmitted; if an emergency node forces a signal, it is very easy to cause signal collisions on a single cable, resulting in a response delay far exceeding the industrial safety tolerance limit.

[0006] 3. Microprocessor computing power bottlenecks and error detection vulnerabilities in the face of sudden, consecutive bit errors. Once an electric arc pulse occurs, it can instantly destroy multiple consecutive data bits (burst consecutive bit errors). Traditional modern strong error correction algorithms (such as LDPC codes) involve massive matrix operations, and the computing power of ordinary microprocessors cannot support their microsecond-level real-time decoding. On the other hand, existing lightweight protocols that only use simple parity checks or checksums have an extremely high "missed detection rate" when faced with burst even-number bit errors, which can easily lead to control nodes executing garbled data as legitimate instructions, resulting in major production accidents.

[0007] In summary, industrial sites urgently need a new communication mechanism that can integrate the underlying "AC physical phase characteristics" with the top-level "functional safety scheduling logic" across layers, so as to completely solve the fatal threat of sudden periodic pulse noise to emergency safety control commands with extremely low computing power overhead. Summary of the Invention

[0008] This invention addresses the technical problems existing in the prior art by providing a power frequency avoidance and functional safety-level power line carrier communication method and system for power control systems. Based on the semantics of the instruction opcode and the payload length, data is divided into multiple heterogeneous priority levels. When the first priority instruction of the functional safety level is triggered, the transmitting end forcibly interrupts the current regular transmission task to implement a zero-delay first transmission. If the first transmission fails, a cross-phase continuous blind retransmission is initiated based on the anti-harmonic phase offset model, ensuring that at least one frame of the message accurately falls within the quiet period. This achieves extremely low-delay deterministic delivery of safety instructions in extreme interference environments with limited computing power, meeting the high reliability control requirements of heavy industry. It can solve the problems of high response delay of emergency control instructions caused by synchronous power frequency pulse noise in industrial sites, and susceptibility to long message blocking and channel collisions.

[0009] According to a first aspect of the present invention, a power frequency avoidance and functional safety level power line carrier communication method for power control systems is provided, comprising: Step 1: Based on the security operation code attribute, payload length, and tolerance delay time of the data to be transmitted in the bus communication data, divide the data to be transmitted into at least three priorities; Step 2: The highest priority data is sent without delay by forcibly preempting the bus, and continuous blind retransmission is initiated according to the preset micro-time slot interval when the first transmission fails; wherein, the micro-time slot interval has an anti-harmonic constraint relationship with the half-cycle of the power frequency AC on the time scale; the other priority data to be sent are sent according to time periods.

[0010] Based on the above technical solution, the present invention can also be improved as follows.

[0011] Optionally, the method may further include the following steps prior to step 1: Step 0: Obtain the phase information of the on-site power frequency AC, and dynamically divide the communication cycle into high-noise periods including the peak and a set time range near the zero crossing point, and quiet periods between adjacent high-noise periods.

[0012] Optionally, the microtime slot interval in step 2 Simultaneously satisfying the following antiharmonic phase offset constraint equations: ; and ; in, The physical transmission time for a single first-priority data transmission. The cycle of power frequency alternating current, This is an estimated maximum duration for the high-noise period. The physical transmission time of the response frame, This refers to the processing time at the receiving end.

[0013] Optionally, the first priority data is jointly encoded using forward error correction code and cyclic redundancy check. In the underlying execution logic of the receiving end microprocessor, the decoding and error correction process of the forward error correction code is completed by reading the constant mapping table pre-fixed in the read-only memory and performing direct addressing with a time complexity of O(1); After forward error correction is completed, the final error detection is performed through the cyclic redundancy check. If the error detection fails, the frame is discarded and the system waits for subsequent messages in the continuous blind transmission sequence.

[0014] Optionally, during the transmission of the first priority data, when the receiving end receives multiple frames of damaged messages that have failed verification in the same blind retransmission sequence, it performs cross-frame XOR concatenation or majority voting on the instruction payloads of the multiple damaged messages. If the result of XOR concatenation or majority voting exactly matches the unique opcode in the first priority data, the receiving end will forcibly accept the instruction of the first priority data and immediately execute the corresponding physical control action.

[0015] Optionally, after the receiving end listens to the first priority data and verifies or votes successfully, it directly drives the external physical interface to perform microsecond-level control actions through a hardware interrupt service function; at the same time, it suspends the successful acknowledgment message and starts carrier listening until it detects that the bus is in an idle state of the micro-time slot interval or the blind transmission sequence has completely ended, and then sends a successful acknowledgment message back to the sending end.

[0016] Optionally, in step 1, the data to be sent is divided into three priorities: emergency safety short instructions are set as the first priority data, regular sequential control instructions are set as the second priority data, and long packet turntable data are set as the third priority data. The rule for dividing the data to be sent into three priorities is as follows: First priority data: The opcode belongs to the preset emergency safety instruction set, and the payload length is... And tolerate delay time ; Second priority data: The opcode belongs to the regular sequential control instruction set, and the payload length is... ; Third priority data: Status telemetry data that does not contain control opcodes, and the payload length ; in, The cycle of power frequency alternating current, and The preset byte length threshold and .

[0017] Optionally, the process of sending the second priority data in step 2 includes: The second priority data is encoded using forward error correction code and cyclic redundancy check. When it is determined that the current period is the noise period, the second priority data is sent. If the receiving end fails to verify the received second priority data, it waits for the sending end to retransmit in the next noise period through the automatic retransmission request mechanism. The process of sending the third priority data in step 2 includes: Cyclic redundancy check is used to encode the third priority data; the sending end delivers the third priority data in long frames across all power frequency periods; when the receiving end fails to verify the received third priority data, it directly discards the message and relies on the timed polling mechanism of the next cycle to overwrite the data.

[0018] Optionally, the estimated maximum duration of the high-noise period. For adaptive dynamic updates, the update process includes: During bus idle periods, communication nodes continuously acquire the background noise envelope amplitude of the physical channel using carrier sensing. Using the power frequency zero-crossing point as a synchronization reference, they perform a moving average statistical analysis of the noise envelope over multiple power frequency cycles, and adaptively and dynamically adjust the maximum duration estimate based on the statistical results. .

[0019] According to a second aspect of the present invention, a power frequency avoidance and functional safety level power line carrier communication system for power control systems is provided, comprising: a transmitting end and a receiving end; Both the transmitting end and the receiving end include: a microprocessor and a power line carrier modulation and demodulation module; The microprocessor includes: a power frequency sensing module, a hierarchical processing module, and a heterogeneous scheduling module; The power line carrier modulation and demodulation module is used to perform data modulation and transmission and carrier reception and demodulation to realize bidirectional communication on the power line. The power frequency sensing module is used to dynamically divide the communication cycle into high-noise periods that include a set time range near the peak and zero crossing, and quiet periods between adjacent high-noise periods. The hierarchical processing module is used to divide the data to be sent into at least three priorities based on the security operation code attribute, payload length, and tolerance delay time of the data to be sent in the bus communication data. The heterogeneous scheduling module is used to send the highest priority data (first priority) without delay through forced preemption of the bus, and to initiate continuous blind retransmission according to a preset micro-time slot interval when the first transmission fails; wherein, the micro-time slot interval has an anti-harmonic constraint relationship with the half-cycle of the power frequency AC on the time scale; and to send the other priority data to be sent according to time periods.

[0020] The present invention provides a power frequency avoidance and functional safety-level power line carrier communication method and system for power control systems, the beneficial effects of which include: Breaking the harmonic resonance trap and achieving deterministic delivery of emergency commands with extremely low latency: This invention's unique anti-harmonic micro-time slot blind transmission mechanism overcomes the dilemma of conventional retransmissions easily hitting interference beats from both mathematical and physical perspectives. Through deliberately set phase offsets, even if the initial transmission falls completely at the center of the power frequency arc, subsequent messages will perfectly slide into the silence period. The system strictly locks the command response delay under worst-case conditions within half a power frequency cycle (e.g., 10 milliseconds), completely solving the technical problem of slow emergency stop command transmission in harsh environments.

[0021] Constructing a semantic-level privileged preemption and collision-free execution mechanism to ensure functional safety: This invention breaks away from the conventional approach of queuing by node number in traditional protocols, pioneering a forced preemption mechanism based on security semantics. In critical situations, the system utilizes the microprocessor's underlying mechanism to instantly cut off lengthy status messages being transmitted, making way for emergency commands. Simultaneously, the "action and response decoupling" mechanism allows the receiving end to cut off physical output in microseconds, perfectly avoiding collisions between response messages and continuous host messages caused by half-duplex media, greatly improving the anti-blocking capability of the industrial bus.

[0022] Breaking through the microprocessor computing power bottleneck and constructing a highly robust heterogeneous fault-tolerant system: Addressing the challenge that low-end microprocessors cannot run complex error correction matrices, this invention designs an extremely simple heterogeneous concatenated encoding. For core short instructions, an O(1) complexity instantaneous forward error correction is achieved using a constant mapping table embedded in ROM; CRC checksum is used for absolute fallback against missed detections, and a cross-frame fragment voting mechanism is pioneered.

[0023] Perfectly balancing extreme security and overall network channel throughput utilization: This invention achieves refined channel slot management. It allocates the high-noise, high-intensity regions to a large number of long-lived status packets relying on polling fault tolerance (supplemented by efficient hardware CRC error prevention), while delegating clean, quiet regions and priorities to a small number of security control commands. This enables adaptive optimal allocation of QoS (Quality of Service) for the telemetry and control network. Attached Figure Description

[0024] Figure 1 A flowchart of a power frequency avoidance and functional safety level power line carrier communication method for power control systems provided by the present invention; Figure 2 The antiharmonic blind transmission timing and anti-collision flow diagram of the first priority data under sudden interference provided in the embodiments of the present invention; Figure 3 A flowchart of a multi-level heterogeneous data scheduling process based on functional safety semantics is provided for embodiments of the present invention. Figure 4 This is a schematic diagram of the underlying hardware architecture and time slot partitioning logic of the system provided in an embodiment of the present invention. Detailed Implementation

[0025] The principles and features of the present invention are described below with reference to the accompanying drawings. The examples given are only for explaining the present invention and are not intended to limit the scope of the present invention.

[0026] Figure 1 A flowchart of a power frequency avoidance and functional safety level power line carrier communication method for power control systems provided by this invention is shown below. Figure 1 As shown, the carrier communication method includes: Step 1: Based on the security operation code attribute, payload length, and tolerance delay time of the data to be transmitted in the bus communication data, divide the data to be transmitted into at least three priorities.

[0027] Step 2: The highest priority data is sent without delay by forcibly preempting the bus, and continuous blind retransmission is initiated according to the preset micro-time slot interval when the first transmission fails; wherein, the micro-time slot interval and the half-cycle of the power frequency AC are in an anti-harmonic constraint relationship on the time scale; other priority data to be sent are sent according to time periods.

[0028] To address the issues of high response delays in emergency control commands and susceptibility to long message blocking and channel collisions caused by synchronous power frequency pulse noise in industrial settings, this invention provides a power frequency avoidance and functional safety-level power line carrier communication method for power control systems. Based on command opcode semantics and payload length, data is divided into multiple heterogeneous priority levels. When the first priority command of the functional safety level is triggered, the transmitting end forcibly interrupts the current regular transmission task to implement a zero-delay first transmission. If the first transmission fails, a cross-phase continuous blind retransmission is initiated based on the anti-harmonic phase offset model, ensuring that at least one message frame accurately falls within the quiet period. This achieves extremely low-delay deterministic delivery of safety commands in extreme interference environments with limited computing power, meeting the high reliability control requirements of heavy industry.

[0029] Example 1

[0030] Embodiment 1 of this invention provides an example of a power frequency collision avoidance and functional safety-level power line carrier communication method for power control systems. Through cross-layer fusion of low-level physical phase sensing and high-level control semantics, a differentiated heterogeneous data scheduling model and an anti-harmonic time diversity anti-collision mechanism are constructed. This achieves extremely low-latency deterministic delivery of safety commands under extreme conditions without increasing complex hardware computing power. Combined with... Figure 1 It can be seen that embodiments of this carrier communication method include: Step 0: Obtain the phase information of the on-site power frequency AC, and dynamically divide the communication cycle into high-noise periods including the peak and the set time range near the zero crossing point, and quiet periods between adjacent high-noise periods.

[0031] Step 1: Based on the security operation code attribute, payload length, and tolerance delay time of the data to be transmitted in the bus communication data, divide the data to be transmitted into at least three priorities.

[0032] In one possible embodiment, in step 1, the data to be sent is divided into three priorities: emergency security short instructions are set as first priority data, regular sequential control instructions are set as second priority data, and long packet turntable data are set as third priority data.

[0033] The rule for dividing the data to be sent into three priorities is as follows: First priority data: The opcode belongs to the preset emergency safety instruction set, and the payload length is... And tolerate delay time .

[0034] Second priority data: The opcode belongs to the regular sequential control instruction set, and the payload length is... .

[0035] Third priority data: Status telemetry data that does not contain control opcodes, and the payload length .

[0036] in, The cycle of power frequency alternating current, and The preset byte length threshold and .

[0037] Step 2: The highest priority data is sent without delay by forcibly preempting the bus, and continuous blind retransmission is initiated according to the preset micro-time slot interval when the first transmission fails; wherein, the micro-time slot interval and the half-cycle of the power frequency AC are in an anti-harmonic constraint relationship on the time scale; other priority data to be sent are sent according to time periods.

[0038] like Figure 2 The diagram shown is a sequence diagram of antiharmonic blind transmission and anti-collision flow of first priority data under sudden interference provided in an embodiment of the present invention. Figure 2 It can be seen that, when dealing with sudden, extremely strong impulse noise, the timing sequence of the first priority data flow includes: Antiharmonic micro-time slot parameter constraints: preset continuous blind repeat interval Satisfy the equation: Furthermore, its lower bound is greater than the estimated maximum duration of the high-noise period. This constraint ensures that the continuous blind transmission timing generates a forced phase sequence slip relative to power frequency interference.

[0039] Communication timing flow under extreme harsh conditions: Assume that the emergency shutdown requirement happens to occur at the center of the noisiest period of pulse interference.

[0040] Silent Discard: The first zero-delay blind transmission (instruction A) is damaged due to being trapped in a high-noise period. The receiver O(1) looks up the table to correct the error, but the limit is exceeded and the CRC check fails. The receiver remains silent.

[0041] Antiharmonic sliding blind transmission: Transmitter waiting After receiving no response, command B was issued. Thanks to the antiharmonic constraint, the physical channel had now slipped out of the high-noise period, and command B precisely fell into the clean, quiet period of the channel.

[0042] Rapid control execution: The receiver successfully verifies instruction B. The microprocessor immediately drives the GPIO in the hardware receive interrupt, cutting off the physical relay in microseconds, ensuring that the emergency action is reliably completed within half a power frequency cycle.

[0043] Action and acknowledgment decoupling: After completing the shutdown action, the receiving end does not immediately send an acknowledgment, but instead suspends the acknowledgment message (ACK) and starts carrier listening. It only sends back the ACK when it detects a bus blind transmission gap or idle time. Upon receiving the ACK, the transmitting end immediately stops the subsequent retransmission sequence and releases bus control.

[0044] Specifically, in one possible embodiment, the micro-time slot interval in step 2 Simultaneously satisfying the following antiharmonic phase offset constraint equations: .

[0045] and .

[0046] in, The physical transmission time for a single first-priority data transmission. The cycle of power frequency alternating current, This is an estimated maximum duration for the high-noise period. The physical transmission time of the response frame, This refers to the processing time at the receiving end.

[0047] This allows continuously blindly retransmitted messages to slide in phase order relative to the high-noise period on the time axis, ensuring that at least one frame of message falls completely into the quiet period.

[0048] This invention provides an antiharmonic micro-time slot blind transmission mechanism that breaks through the dilemma of conventional retransmissions easily coinciding with interference cycles from both mathematical and physical perspectives. Through deliberately set phase offsets, even if the initial transmission falls perfectly into the center of the power frequency arc, subsequent messages will inevitably slide perfectly into the silence period. The worst-case command response delay is strictly locked within half a power frequency cycle (e.g., 10 milliseconds), completely solving the technical problem of slow emergency stop command transmission in harsh environments.

[0049] In one possible implementation, the first priority data is jointly encoded using forward error correction codes and cyclic redundancy check (CRC).

[0050] In the underlying execution logic of the receiving microprocessor, the decoding and error correction process of the forward error correction code is completed by reading the constant mapping table pre-fixed in the read-only memory and performing direct addressing with a time complexity of O(1).

[0051] After forward error correction is completed, a final error detection is performed through cyclic redundancy check. If the error detection fails, the frame is discarded and the system waits for subsequent messages in the continuous blind transmission sequence to avoid the risk of forward algorithm miscorrection caused by strong burst noise.

[0052] To address the challenge of low-end microprocessors being unable to run complex error correction matrices, this invention provides a simplified heterogeneous concatenated encoding method. For core short instructions, an instantaneous forward error correction with O(1) complexity is achieved using a constant mapping table embedded in ROM; CRC checksum is used for absolute fallback to prevent missed detections, and a cross-frame fragment voting mechanism is pioneered.

[0053] In one possible embodiment, the receiving end has a cross-frame voting function when processing continuous blind retransmission messages of first priority data: during the transmission of first priority data, when the receiving end receives multiple frames of damaged messages that have failed verification in the same blind retransmission sequence, it performs cross-frame XOR concatenation or majority voting on the instruction payloads of the multiple damaged messages.

[0054] If the result of XOR concatenation or majority voting exactly matches the unique opcode in the first priority data, the receiving end will forcibly accept the instruction of the first priority data and immediately execute the corresponding physical control action.

[0055] In one possible implementation, the receiving end employs an action and acknowledgment decoupling mechanism for the first priority data: after the receiving end detects the first priority data and successfully verifies or votes on it, it directly drives the external physical interface to perform microsecond-level control actions through a hardware interrupt service function; at the same time, it suspends the successful acknowledgment message and starts carrier sensing until it detects that the bus is in an idle state of a micro-time slot interval or the blind transmission sequence has completely ended, before sending a successful acknowledgment message back to the sending end.

[0056] This invention provides a carrier communication method that breaks away from the conventional approach of queuing by node number in traditional protocols, pioneering a forced preemption method based on security semantics. In critical situations, the system utilizes microprocessor-level mechanisms to instantly interrupt lengthy status messages being transmitted, making way for emergency commands. Simultaneously, the "action and response decoupling" mechanism allows the receiving end to cut off physical output in microseconds, perfectly avoiding collisions between response messages and continuous host messages caused by half-duplex media, greatly improving the anti-blocking capability of the industrial bus.

[0057] like Figure 3 The flowchart of multi-level heterogeneous data scheduling based on functional safety semantics provided in this embodiment of the invention, combined with Figure 3 It can be seen that before sending data, the microprocessor performs differentiated scheduling based on the instruction opcode and payload length: Third priority (telemetry status data): long length, high latency tolerance. Additional cyclic redundancy check (CRC) is applied, and the data is delivered in full frames across time periods. If the receiver fails the check, the data is discarded without waiting for a response; it is overwritten via polling in the next cycle.

[0058] Second priority (regular control instructions): Continuously poll the hardware timer, triggering transmission only during the "squelch period". Forward error correction and CRC concatenation are used; if the receiver's verification fails, automatic retransmission (ARQ) is initiated in the next squelch period.

[0059] First priority (emergency control instructions and preemption): The highest priority interrupt is generated when the hardware safety interlock is triggered. The microprocessor immediately executes transmit abort (Tx Abort), forcibly clears the underlying transmit register, and achieves zero-latency first transmission regardless of the current phase.

[0060] In one possible embodiment, the heterogeneous scheduling mechanism for second-priority data and third-priority data specifically includes: the process of sending the second-priority data in step 2 includes: The second priority data is encoded using forward error correction code and cyclic redundancy check. When it is determined that the current period is a quiet period, the second priority data is sent. If the receiving end fails to verify the received second priority data, it waits for the sending end to retransmit in the next quiet period through the automatic retransmission request (ARQ) mechanism.

[0061] Step 2, which involves sending the third-priority data, includes: Cyclic Redundancy Check (CRC) is used to encode the third-priority data; the sending end delivers the third-priority data in long frames across all power frequency periods; when the receiving end fails to verify the received third-priority data, it directly discards the message without initiating a retransmission request, and relies on the timed polling mechanism of the next cycle to overwrite the data.

[0062] In the specific implementation process, when the microprocessor of the transmitting end captures a hardware interrupt that triggers the first priority data, if the transmitting end is sending the second or third priority data at this time, the current data frame transmission sequence is immediately stopped, the transmission register is cleared, and the first priority data is forcibly inserted for the first transmission, and the first transmission ignores the current power frequency phase period.

[0063] This invention provides a carrier communication method that achieves refined channel time slot management. It allocates the high-noise, high-intensity regions to a large number of long status packets relying on polling fault tolerance (supplemented by efficient hardware CRC error prevention), while relinquishing clean, quiet regions and priority to a small number of security control commands. This enables adaptive optimal allocation of QoS (Quality of Service) for the telemetry and control network.

[0064] In one possible embodiment, the estimated maximum duration of the high-noise period is... For adaptive dynamic updates, the update process includes: During bus idle periods, communication nodes continuously acquire the background noise envelope amplitude of the physical channel using carrier sensing. Using the power frequency zero-crossing point as a synchronization reference, they perform a moving average statistical analysis of the noise envelope over multiple power frequency cycles, and adaptively and dynamically adjust the maximum duration estimate based on the statistical results. To track electromagnetic environment drift caused by the aging of field equipment.

[0065] In one possible embodiment, the carrier communication method provided by the present invention further includes an extreme timeout anomaly degradation mechanism for first priority data: if the transmitting end fails to detect a successful acknowledgment message returned by the receiving end after completing multiple rounds of cross-phase continuous blind retransmission within a preset complete communication period, a communication anomaly alarm is triggered to request manual intervention; at the same time, the transmitting end state machine enters a continuous emergency retransmission mode until an acknowledgment message is detected or a device-level hardware safety interlock action is triggered on-site.

[0066] Example 2

[0067] Embodiment 2 of this invention is an embodiment of a power frequency avoidance and functional safety-level power line carrier communication system for power control systems. It is applicable to harsh electromagnetic environments (such as coal conveying systems in thermal power plants), utilizing ordinary low-voltage power or control cables as the transmission medium. This embodiment is a power frequency avoidance and functional safety-level power line carrier anti-interference communication system implemented based on a lightweight microprocessor (MCU). The embodiment includes: A carrier communication system includes a transmitter and a receiver.

[0068] Both the transmitting and receiving ends include a microprocessor and a power line carrier modulation and demodulation module.

[0069] The microprocessor includes: a power frequency sensing module, a hierarchical processing module, and a heterogeneous scheduling module.

[0070] The power line carrier modulation and demodulation module is used for data modulation and transmission and carrier reception and demodulation to realize bidirectional communication on the power line.

[0071] The power frequency sensing module is used to dynamically divide the communication cycle into high-noise periods that include the peak and a set time range near the zero crossing, as well as quiet periods between adjacent high-noise periods.

[0072] The hierarchical processing module is used to divide the data to be transmitted into at least three priorities based on the security opcode attribute, payload length, and tolerance delay time of the data to be transmitted in the bus communication data.

[0073] The heterogeneous scheduling module is used to send the highest priority data (first priority) without delay by forcibly preempting the bus, and to initiate continuous blind retransmission according to the preset micro-time slot interval when the first transmission fails; wherein, the micro-time slot interval and the half-cycle of the power frequency AC are in an anti-harmonic constraint relationship on the time scale; other priority data to be transmitted are sent according to time periods.

[0074] It is understood that the power frequency avoidance and functional safety level power line carrier communication system for power control systems provided by this invention corresponds to the power frequency avoidance and functional safety level power line carrier communication method for power control systems provided in the foregoing embodiments. The relevant technical features of the power frequency avoidance and functional safety level power line carrier communication system for power control systems can be referred to the relevant technical features of the power frequency avoidance and functional safety level power line carrier communication method for power control systems, and will not be repeated here.

[0075] like Figure 4 The diagram shown is a schematic representation of the underlying hardware architecture and time slot partitioning logic of the system provided in an embodiment of the present invention. Figure 4 As can be seen, this embodiment provides a low-level architecture for a power line carrier communication network for power control systems. This architecture, in the form of network topology, fully demonstrates the half-duplex bidirectional interaction process of carrier signals in harsh electromagnetic physical channels.

[0076] The system includes at least one communication node A (as the transmitter / master control device) and one communication node B (as the receiver / sub-control device), which are connected by multiplexed industrial field low-voltage control cables or power cables (i.e., power line carrier networks).

[0077] Zero-crossing synchronization and environmental awareness (network common reference): Both node A and node B are configured with zero-crossing detection circuits in parallel. This circuit directly extracts the power frequency phase reference of the 220V / 380V AC power from the cable network and triggers an external hardware interrupt (EXTI) to their respective internal microprocessors (MCUs). Thus, the transmitting and receiving parties achieve absolute clock synchronization based on the same physical power grid, providing a physical basis for dynamically defining "high-noise periods" and "quiet periods".

[0078] A challenging physical channel model: In the control cable network connecting nodes A and B, there are heavy industrial equipment such as frequency converters and thyristors. These devices, acting as sources of strong pulse interference, continuously inject periodic arc noise synchronized with the power frequency phase into the channel, creating an extremely harsh communication environment.

[0079] The bidirectional flow logic of Node A (the transmitter): Node A focuses on command preemption and acknowledgment reception. When the external "emergency stop button / pull cord switch" is activated, an emergency stop signal is input to the MCU, triggering the highest-level safety interrupt. The MCU forcibly clears the regular transmission task, generates a first-priority emergency stop message containing concatenated codes, and delivers it to the FSK modem module for modulation via the bidirectional backbone link, and injects it into the cable network through an isolation coupling circuit. Simultaneously, this bidirectional link allows the MCU to receive and demodulate a successful acknowledgment (ACK) signal from Node B during blind transmission intervals, thus prematurely terminating transmission.

[0080] The bidirectional flow logic of node B (receiving end): Node B focuses on rapid action execution and response feedback. After the signal is extracted from the grid by the isolation coupling circuit, it is demodulated by the FSK module and enters the MCU. After the MCU completes O(1) table lookup error correction and verification in the receive interrupt, it directly performs hardware-level action driving and cuts off the external "emergency stop relay / actuator". After the action is completed, the MCU generates an ACK response message, modulates it in reverse along the same internal bidirectional link and injects it into the grid, completing the anti-collision closed-loop flow of "action and response decoupling".

[0081] The present invention provides a power frequency avoidance and functional safety-level power line carrier communication method and system for power control systems, the beneficial effects of which include: Breaking the harmonic resonance trap and achieving deterministic delivery of emergency commands with extremely low latency: This invention's unique anti-harmonic micro-time slot blind transmission mechanism overcomes the dilemma of conventional retransmissions easily hitting interference beats from both mathematical and physical perspectives. Through deliberately set phase offsets, even if the initial transmission falls completely at the center of the power frequency arc, subsequent messages will perfectly slide into the silence period. The system strictly locks the command response delay under worst-case conditions within half a power frequency cycle (e.g., 10 milliseconds), completely solving the technical problem of slow emergency stop command transmission in harsh environments.

[0082] Constructing a semantic-level privileged preemption and collision-free execution mechanism to ensure functional safety: This invention breaks away from the conventional approach of queuing by node number in traditional protocols, pioneering a forced preemption mechanism based on security semantics. In critical situations, the system utilizes the microprocessor's underlying mechanism to instantly cut off lengthy status messages being transmitted, making way for emergency commands. Simultaneously, the "action and response decoupling" mechanism allows the receiving end to cut off physical output in microseconds, perfectly avoiding collisions between response messages and continuous host messages caused by half-duplex media, greatly improving the anti-blocking capability of the industrial bus.

[0083] Breaking through the microprocessor computing power bottleneck and constructing a highly robust heterogeneous fault-tolerant system: Addressing the challenge that low-end microprocessors cannot run complex error correction matrices, this invention designs an extremely simple heterogeneous concatenated encoding. For core short instructions, an O(1) complexity instantaneous forward error correction is achieved using a constant mapping table embedded in ROM; CRC checksum is used for absolute fallback against missed detections, and a cross-frame fragment voting mechanism is pioneered.

[0084] Perfectly balancing extreme security and overall network channel throughput utilization: This invention achieves refined channel slot management. It allocates the high-noise, high-intensity regions to a large number of long-lived status packets relying on polling fault tolerance (supplemented by efficient hardware CRC error prevention), while delegating clean, quiet regions and priorities to a small number of security control commands. This enables adaptive optimal allocation of QoS (Quality of Service) for the telemetry and control network.

[0085] It should be noted that the descriptions of each embodiment in the above embodiments have different focuses. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0086] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0087] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0088] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0089] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0090] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0091] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A power frequency avoidance and functional safety-level power line carrier communication method for power control systems, characterized in that, The carrier communication method includes: Step 1: Based on the security operation code attribute, payload length, and tolerance delay time of the data to be transmitted in the bus communication data, divide the data to be transmitted into at least three priorities; Step 2: The highest priority data is sent without delay by forcibly preempting the bus, and continuous blind retransmission is initiated according to the preset micro-time slot interval when the first transmission fails; wherein, the micro-time slot interval has an anti-harmonic constraint relationship with the half-cycle of the power frequency AC on the time scale; the other priority data to be sent are sent according to time periods.

2. The carrier communication method according to claim 1, characterized in that, Before step 1, the following also applies: Step 0: Obtain the phase information of the on-site power frequency AC, and dynamically divide the communication cycle into high-noise periods including the peak and a set time range near the zero crossing point, and quiet periods between adjacent high-noise periods.

3. The carrier communication method according to claim 1, characterized in that, The microtime slot interval in step 2 Simultaneously satisfying the following antiharmonic phase offset constraint equations: ； and ; in, The physical transmission time for a single first-priority data transmission. The cycle of power frequency alternating current, This is an estimated maximum duration for the high-noise period. The physical transmission time of the response frame, This refers to the processing time at the receiving end.

4. The carrier communication method according to claim 1, characterized in that, The first priority data is jointly encoded using forward error correction code and cyclic redundancy check. In the underlying execution logic of the receiving end microprocessor, the decoding and error correction process of the forward error correction code is completed by reading the constant mapping table pre-fixed in the read-only memory and performing direct addressing with a time complexity of O(1); After forward error correction is completed, the final error detection is performed through the cyclic redundancy check. If the error detection fails, the frame is discarded and the system waits for subsequent messages in the continuous blind transmission sequence.

5. The carrier communication method according to claim 1, characterized in that, During the transmission of the first priority data, when the receiving end receives multiple frames of damaged messages that have failed verification in the same blind retransmission sequence, it performs cross-frame XOR concatenation or majority voting on the instruction payloads of the multiple damaged messages. If the result of XOR concatenation or majority voting exactly matches the unique opcode in the first priority data, the receiving end will forcibly accept the instruction of the first priority data and immediately execute the corresponding physical control action.

6. The carrier communication method according to claim 1, characterized in that, After the receiving end listens to the first priority data and verifies or votes successfully, it directly drives the external physical interface to perform microsecond-level control actions through the hardware interrupt service function; at the same time, it suspends the successful acknowledgment message and starts carrier listening until it detects that the bus is in an idle state of the micro-time slot interval or the blind transmission sequence has completely ended, and then sends a successful acknowledgment message back to the sending end.

7. The carrier communication method according to claim 1, characterized in that, In step 1, the data to be sent is divided into three priorities: emergency safety short instructions are set as the first priority data, regular sequential control instructions are set as the second priority data, and long packet turntable data are set as the third priority data. The rule for dividing the data to be sent into three priorities is as follows: First priority data: The opcode belongs to the preset emergency safety instruction set, and the payload length is... And tolerate delay time ; Second priority data: The opcode belongs to the regular sequential control instruction set, and the payload length is... ; Third priority data: Status telemetry data that does not contain control opcodes, and the payload length ; in, The cycle of power frequency alternating current, and The preset byte length threshold and .

8. The carrier communication method according to claim 7, characterized in that, The process of sending the second priority data in step 2 includes: The second priority data is encoded using forward error correction code and cyclic redundancy check. When it is determined that the current period is the noise period, the second priority data is sent. If the receiving end fails to verify the received second priority data, it waits for the sending end to retransmit in the next noise period through the automatic retransmission request mechanism. The process of sending the third priority data in step 2 includes: Cyclic redundancy check is used to encode the third priority data; the sending end delivers the third priority data in long frames across all power frequency periods; when the receiving end fails to verify the received third priority data, it directly discards the message and relies on the timed polling mechanism of the next cycle to overwrite the data.

9. The carrier communication method according to claim 4, characterized in that, The estimated maximum duration of the high-noise period For adaptive dynamic updates, the update process includes: During bus idle periods, communication nodes continuously acquire the background noise envelope amplitude of the physical channel using carrier sensing functionality. Using the power frequency zero-crossing point as a synchronization reference, a moving average is performed on the noise envelope over multiple power frequency cycles. Based on the statistical results, the estimated maximum duration value is adaptively and dynamically adjusted. .

10. A power frequency avoidance and functional safety-grade power line carrier communication system for power control systems, characterized in that, The carrier communication system includes: a transmitter and a receiver; Both the transmitting end and the receiving end include: a microprocessor and a power line carrier modulation and demodulation module; The microprocessor includes: a power frequency sensing module, a hierarchical processing module, and a heterogeneous scheduling module; The power line carrier modulation and demodulation module is used to perform data modulation and transmission and carrier reception and demodulation to realize bidirectional communication on the power line. The power frequency sensing module is used to dynamically divide the communication cycle into high-noise periods that include a set time range near the peak and zero crossing, and quiet periods between adjacent high-noise periods. The hierarchical processing module is used to divide the data to be sent into at least three priorities based on the security operation code attribute, payload length, and tolerance delay time of the data to be sent in the bus communication data. The heterogeneous scheduling module is used to send the highest priority data (first priority) without delay through forced preemption of the bus, and to initiate continuous blind retransmission according to a preset micro-time slot interval when the first transmission fails; wherein, the micro-time slot interval has an anti-harmonic constraint relationship with the half-cycle of the power frequency AC on the time scale; and to send the other priority data to be sent according to time periods.

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