128*128 l-band matrix adaptive expansion configuration method

Abstract

The application discloses a 128*128 L-band matrix adaptive expansion configuration method, which comprises the following steps: when detecting that a radio frequency exchange module is inserted into a device slot, automatically identifying module information such as a unique module identifier, port specifications, frequency band capacity and pre-stored calibration parameters; combining a preset interconnection relationship between the device slot and a backboard, generating a physical topology structure containing node and link attributes, and determining the effective input and output scale of the matrix; establishing a mapping relationship between the logic ports of the upper computer and the physical ports of the radio frequency module, and guaranteeing the stability of the logic port number when the topology changes; calculating the total loss and total phase shift for all logic signal paths, and performing amplitude and phase equalization calibration; finally, publishing configuration information containing the scale, mapping relationship and calibration results, and completing adaptive expansion. The application can realize hot plug expansion of the L-band large-scale radio frequency matrix, does not need manual configuration of the topology and path-by-path calibration, and effectively guarantees the signal transmission consistency and the upper computer control protocol compatibility after expansion.

Description

Technical Field

[0001] This invention relates to the field of radio frequency switching matrix technology, and in particular to an adaptive expansion configuration method for a 128×128L band matrix. Background Technology

[0002] L-band RF switching matrices are core signal scheduling devices in scenarios such as satellite ground stations and automated RF testing. With the expansion of business operations, the demand for on-demand expansion of ultra-large matrices of 128×128 and above is increasingly prominent. Traditional RF matrix expansion requires power outages, manual topology configuration, and path-by-path calibration, resulting in complex operations, long service interruptions, and difficulties in ensuring signal consistency. Currently, there are relevant technical solutions for topology configuration and topology identification of switching systems: CN112019389A discloses a topology system configuration method. This method constructs a topology mapping system and generates configuration parameters through a host computer, thereby realizing the visualized automatic configuration of an SRIO digital switching system. However, this method is geared towards digital switching networks, does not involve amplitude and phase calibration of radio frequency analog signals, and does not support automatic identification and instant expansion of hot-swappable radio frequency modules, making it unsuitable for L-band radio frequency matrix scenarios.

[0003] CN113792008A discloses a method for obtaining network topology, which automatically constructs a software service network topology by collecting connection data and mapping it inversely to name services. However, this method targets the service call topology of computer programs and is a purely software-level topology identification method. It does not involve the physical interconnection perception of hardware switching modules or radio frequency path calibration, and therefore cannot solve the problems of topology generation and signal consistency after the hardware expansion of the radio frequency matrix.

[0004] CN120128484A discloses a topology virtual mapping method for cross-domain access control. This method simplifies packet routing judgment for PCIe switching chips by mapping endpoint devices to a fixed-level virtual topology. However, it is mainly applied to cross-domain control scenarios of PCIe digital buses, and its core is to optimize routing latency. It does not involve RF module hot-plug identification, automatic physical topology generation, and path amplitude and phase calibration, and cannot meet the requirements of adaptive expansion of RF matrices.

[0005] CN116470979A discloses a clock calibration and topology identification method, which identifies the topology of a low-voltage power line network by calibrating the arrival time of beacon frames. This method is designed for power line carrier communication scenarios, determines node levels based on time differences, and lacks the capabilities for RF switching module expansion configuration, logical port mapping, and path amplitude and phase calibration. Therefore, it cannot be applied to the adaptive expansion of L-band RF matrices.

[0006] In summary, these methods and existing technologies focus on areas such as digital switching networks, software service networks, PCIe bus control, and power line communication. None of them offer effective solutions for the expansion of large-scale RF matrices in the L-band, and they generally suffer from the following shortcomings: First, they do not support hot-swapping and instant access of RF modules, requiring service interruption for expansion; second, they cannot automatically generate RF physical topology, relying on manual configuration, which is inefficient and prone to errors; third, they lack an RF path amplitude and phase equalization calibration mechanism, resulting in poor signal transmission consistency after expansion; and fourth, they lack stable logical-physical port mapping, which can easily lead to the failure of the host computer control protocol after expansion. Summary of the Invention

[0007] The purpose of this section is to outline some aspects of embodiments of the present invention and to briefly describe some preferred embodiments. Simplifications or omissions may be made in this section, as well as in the abstract and title of this application, to avoid obscuring the purpose of these documents; however, such simplifications or omissions should not be construed as limiting the scope of the invention.

[0008] In view of the aforementioned existing problems, this invention is proposed. Therefore, this invention provides a 128×128L band matrix adaptive expansion configuration method to solve the problems mentioned in the background art.

[0009] To solve the above-mentioned technical problems, the present invention provides the following technical solution: a method for adaptive expansion configuration of a 128×128L band matrix, comprising: When the insertion of the RF switching module into the device slot is detected, the module information of the RF switching module is automatically identified; Based on the module information and the preset interconnection relationship of the device slots, the physical topology of the current device is generated; Based on the physical topology, the input and output scale of the 128×128L band matrix is ​​determined; Establish a mapping relationship between the logical ports used by the host computer and the physical ports of the radio frequency switching module; For each signal path formed by the aforementioned logic ports, path equalization calibration is performed; The configuration information, which includes the input / output scale, the mapping relationship, and the path equalization calibration results, is published to complete the adaptive scaling configuration.

[0010] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. This invention enables non-stop access of RF switching modules through RF path hardware isolation, controlled soft-start power-on, and automatic module identification mechanisms, and the expansion process does not interfere with the original operating services; at the same time, it automatically generates physical topology based on the pre-set interconnection relationship of slots, replacing the traditional manual configuration method, reducing the complexity of operation and the probability of human error, and shortening the expansion cycle of large-scale matrices.

[0011] 2. Based on the amplitude and phase frequency parameters and backplane routing transmission parameters pre-stored in the module at the factory, this invention automatically accumulates and calculates the total loss and total phase offset of each signal path. By applying corresponding compensation amounts through digitally controlled attenuators and phase shifters, all logical paths present uniform gain and phase characteristics to the outside world, eliminating the amplitude and phase differences of different physical paths after expansion, and meeting the high-precision scheduling requirements of L-band high-frequency signals.

[0012] 3. In addition, the present invention also adopts an incremental port allocation strategy, which locks the existing logical-physical port mapping relationship during expansion and only allocates continuous idle logical numbers to newly added ports, ensuring that the host computer control protocol and business scripts can be adapted to the expanded matrix without modification; at the same time, it is equipped with configuration version management and main and backup dual board synchronization mechanism, supports power failure state saving and power-on fast recovery, and improves the high availability capability of the system. Attached Figure Description

[0013] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein: Figure 1 This is a flowchart illustrating the overall process of an adaptive expansion configuration method for a 128×128L band matrix according to an embodiment of the present invention. Detailed Implementation

[0014] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0015] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0016] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.

[0017] Furthermore, in the description of this invention, it should be noted that the terms "upper," "lower," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are used solely for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. In addition, the terms "first," "second," or "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0018] Example 1

[0019] Reference Figure 1 This is the first embodiment of the present invention, which provides a method for adaptive expansion configuration of a 128×128L band matrix, including: S1. When the RF switching module is detected to be inserted into the equipment slot, the module information of the RF switching module is automatically identified.

[0020] Specifically, in order to achieve instant expansion of the 128×128L band matrix without power interruption (i.e., hot-swappable expansion), the detection and automatic identification method adopted in this invention is not the traditional simple level reading, but a combination of secure access, status self-test and analysis of underlying physical parameters.

[0021] Furthermore, when the RF switching module is inserted into the device slot, the hot-swap controller on the system backplane first confirms that the module has been physically inserted by detecting the level transition of a specific in-place pin. At this time, in order to prevent transient surge signals generated by the module at the moment of power-on, or reflected signals generated due to unstable impedance, from causing crosstalk to the currently operating 128×128 effective matrix, the system will force the RF path of the newly inserted module to be placed in a high-impedance isolation state at the underlying hardware level. By controlling the RF switch at the front end of the module to be in the off mode, it is ensured that the transient power fluctuation of the new module is limited to an extremely low level, thereby ensuring zero interference to the RF services being transmitted in the original matrix during the expansion process.

[0022] Furthermore, after confirming that the RF path is completely physically isolated, the main control board performs a controlled soft-start power-on on the RF switching module via the power management bus to avoid a sudden surge in current that could lower the system bus voltage. After power-on, the MCU (microcontroller) inside the RF switching module automatically starts a low-level self-test program to check the status of key components such as the RF switch matrix chip, various power supply voltages, and temperature sensors within the module, ensuring that the module's hardware functions are intact and that it has the physical conditions to connect to the system.

[0023] Furthermore, after the module completes its hardware self-test, the main control board accesses the non-volatile memory (e.g., EEPROM) on the RF switching module via an out-of-band management bus (e.g., I2C or SPI bus) to automatically read and parse the module information. According to the system architecture of this invention, the RF switching module is preferably a 16×16 switching module (i.e., a sub-matrix board with 16 input ports and 16 output ports). The module information read by the main control board specifically includes the following: Module UID (Unique Identifier): Used to uniquely identify the physical board in the system and prevent slot configuration conflicts.

[0024] Port specifications and frequency band capabilities: Identify it as a 16×16 size and confirm that it supports the L band (usually 950MHz~2150MHz) to ensure that it matches the overall frequency band and size planning of the system.

[0025] Pre-stored factory calibration parameters: Due to the inherent physical discreteness of RF microwave devices during manufacturing, each 16×16 switching module undergoes precision instrument testing before leaving the factory. The memory pre-stores transmission characteristic data from any input port to any output port within the module at different frequency points. Specifically, this transmission characteristic data includes the inherent amplitude-frequency response (i.e., gain or insertion loss values ​​at different frequencies) and inherent phase-frequency response (i.e., phase offset at different frequencies) of each RF path. By pre-reading this underlying physical reference data, the system provides data input for subsequent adaptive calculation of the entire link compensation and for achieving path equalization calibration.

[0026] Furthermore, once the main control board successfully reads all the module information and confirms the data integrity through a verification algorithm (e.g., CRC check), it determines that the RF switching module is legitimate and ready for use. At this point, the main control board issues a control command to release the RF path isolation state set above, and electrically connects the RF port of the 16×16 RF switching module to the backplane RF bus of the 128×128 L-band matrix. Thus, the module has completed the entire process from physical insertion to logical readiness, and is ready to participate in subsequent matrix topology generation and RF signal exchange.

[0027] S2. Generate the physical topology of the current device based on the module information and the preset interconnection relationship of the device slots.

[0028] It should be noted that after the physical access and low-level information identification of the RF switching module are completed in S1, the system learns the module's own attributes (e.g., 16×16 size and internal calibration parameters), but its position in the entire 128×128 L-band matrix is ​​still unknown. Based on this, the present invention uses software algorithms to map the hardware module into a connected network from a global system perspective, thereby constructing a digital twin model of the current device.

[0029] Furthermore, after the RF switching module is inserted into the chassis, the main control board reads the level combination of the geographical address encoding pins of the corresponding slot on the backplane to deduce the physical slot number where the module is currently located. In physical implementation, a 128×128 ultra-large RF matrix typically uses a multi-level architecture distributed across multiple physical slots. Therefore, the physical slot number determines the physical coordinates of the module on the entire RF backplane and serves as the reference for determining the direction of RF signal flow.

[0030] Furthermore, during the hardware design phase, the RF traces between physical slots and between slots and the device's global external interfaces are already fixed on the chassis backplane using RF microstrip lines or striplines. These fixed physical traces are abstracted into a database of pre-defined interconnect relationships at the software level. The main control board can then retrieve this database from system memory and, based on the obtained slot number, query the system nodes connected to each physical pin on the backplane for that slot (e.g., querying the first output pin of slot 3, which is hardwired to the second input pin of slot 5 on the backplane), thereby providing external routing rules for the integration of new modules.

[0031] In addition, to achieve adaptive expansion, the system maintains a global routing state table (i.e., physical topology) in memory. This topology consists of nodes and directed links, where nodes represent physical radio frequency ports and directed links represent the transmission paths of radio frequency signals. When a new module is inserted, the input data consists of the cross-node information within the module in S1 and the external interconnection rules parsed during the hardware design phase; the output data is the updated global routing state table. The topology construction logic is as follows: First, node expansion is performed. The system dynamically adds 16 input nodes and 16 output nodes of the 16×16 RF switching module to the global routing state table. Then, internal links are generated. Based on the module's internal cross-connection capability, internal logical connections are established between the newly added input and output nodes. Simultaneously, the inherent amplitude-frequency response (loss) and phase-frequency response (phase) read from S1 are bound as link attributes to the corresponding internal connections, ultimately linking to the external link.

[0032] In one possible implementation of this embodiment, the global routing state table is stored using an adjacency matrix or adjacency list data structure. Its input data includes the physical slot number of the new module, the cross-node information within the module, and a pre-stored backplane interconnect database; its output data is the updated directed graph data. Each node in the graph contains attribute fields: [node ID, node type (input / output / intermediate), slot]; each directed link contains attribute fields: [starting point ID, ending point ID, link status (connected / isolated), inherent loss value, inherent phase offset value].

[0033] Then, based on the preset interconnection relationships retrieved from the database, external logical connections are established between the newly added module nodes and the existing backplane nodes of the system. It is important to note that in the updated global routing status table, the system records the connectivity status between any two nodes: if a physical RF connection exists, the loss and phase attributes of the path are recorded; if there is no physical connection, it is marked as RF isolated.

[0034] It should be noted that through the above process, the system can complete the real-time data splicing between the new module and the original matrix.

[0035] Furthermore, to prevent broken paths in the topology due to hardware failures such as backplane pin oxidation or poor contact, after the topology is constructed, the system traverses the updated global routing state table and executes path optimization algorithms (e.g., depth-first search) to verify whether newly added nodes have successfully formed a valid physical loop from the device's global input to its global output. Only after the connectivity self-test passes is the topology officially stored in the main control board's memory. This means that the physical spatial location and interconnection relationships of the underlying hardware have been perceived and digitized by the software system.

[0036] S3. Based on the physical topology, determine the input and output scale of the 128×128L band matrix.

[0037] Specifically, in S2, the system has already constructed a global physical topology (i.e., a routing table reflecting the connection status of all ports), including the newly inserted RF switching module. However, in practice, 128×128 ultra-large RF matrices typically employ a multi-level (e.g., input stage, intermediate stage, output stage) cascaded architecture. The ports of the newly inserted module may be partially used for internal cascading or partially used for external interfaces. Therefore, this invention uses a topology traversal algorithm to extract the truly usable global input and output ports from the internal connections, thereby dynamically calculating the actual service scale of the current matrix.

[0038] Furthermore, the main control unit performs node traversal on the physical topology graph generated in S2.

[0039] Specifically, the system first identifies all nodes that only have radio frequency signals flowing out and no internal radio frequency signals flowing in, and defines them as global physical input ports (i.e., ports directly connected to external antennas or signal sources). Then, it identifies all nodes that only have radio frequency signals flowing in and no internal radio frequency signals flowing out, and defines them as global physical output ports (i.e., ports directly connected to external receivers or spectrum analyzers).

[0040] It should be noted that through this step, the system logically eliminates the hidden ports used for cascading between modules within the device, and accurately locates the boundary ports facing external services.

[0041] Furthermore, simply identifying the boundary ports is insufficient, as some boundary ports may become unconnectable independent parts due to incomplete intermediate cascade modules (i.e., missing hardware). To ensure the true effectiveness of the expanded scale, RF link reachability verification is also required.

[0042] Specifically, a path optimization algorithm (e.g., depth-first search or breadth-first search) is used to search forward along the physical connections in the topology graph, starting from each global physical input port. If, within the maximum cascading depth (e.g., after three levels of switching), the path successfully reaches at least one global physical output port, and the intermediate links all show normal status, it indicates the existence of a continuous RF microstrip line and a closed RF switch path. In this case, the system marks the input port as a valid input port. Similarly, the system performs a reverse path search for output ports, marking output ports that can connect to the input as valid output ports.

[0043] Furthermore, after completing reachability verification of all boundary ports, the system performs a statistical analysis on the ports marked as valid. Assuming that the statistical analysis confirms a total of M valid input ports and N valid output ports connected in the current system, the system automatically updates the current device's valid service scale to M×N. For example, before inserting a new 16×16 module, the matrix size is 64×64; after inserting the module and undergoing the aforementioned topology traversal and connectivity verification, if the system confirms the addition of 16 valid inputs and 16 valid outputs, the system automatically updates the current scale to 80×80.

[0044] Meanwhile, to ensure that adaptive capacity expansion involves not only increasing the number of ports but also matching switching capacity, the system, after determining the M×N scale, will perform a non-blocking capacity verification operation based on the principles of multi-level switching networks. Specifically, the system will count the total number of currently available internal radio frequency links in the intermediate-level switching modules of the topology. Then, it will compare this total number of internal links with the number of currently valid input / output ports. Only when the total number of internal links in the intermediate level is sufficient to support all valid input ports simultaneously initiating connections to valid output ports (i.e., meeting the full concurrency condition) will the system confirm that the M×N scale generated by this expansion has non-blocking full switching capability. If the number of internal links is insufficient, the system will trigger a capacity-limited alarm, indicating that the currently inserted module location cannot provide full-capacity switching.

[0045] In one possible implementation of this embodiment, to verify whether the M×N scale has non-blocking full switching capability, the total number of currently available internal radio frequency links (denoted as K) of the intermediate-level switching modules in the topology can be extracted. According to the Clos network non-blocking theorem, when K≥M+N-1 (or meets the system's preset concurrency threshold), the system determines that the current topology meets the non-blocking full switching condition; if it does not meet the condition, a capacity-limited alarm is triggered.

[0046] S4. Establish the mapping relationship between the logical ports used by the host computer and the physical ports of the RF switching module.

[0047] It's important to note that the host computer (e.g., user control software or automated test scripts) doesn't concern itself with the slot numbers, module types, or complex cascading wiring of the underlying hardware. The host computer only issues cross-connect commands using consecutive logical port numbers (e.g., input ports 1-128, output ports 1-128). Therefore, only a hardware virtualization layer needs to be built, and software algorithms can be used to bind the discrete physical port addresses of the underlying layer to the consecutive logical port numbers of the upper layer.

[0048] Furthermore, in order to implement this binding operation, the present invention constructs and maintains a dynamic mapping table in the memory of the main control board.

[0049] Specifically, each valid physical port selected in S3 is assigned a globally unique physical address. In the system's underlying data structure, this physical address is calculated based on the physical topology of the hardware, specifically composed of the physical slot number where the RF switching module resides and the local port index number within the module (e.g., using a slot number_port number field format). For example, by multiplying the slot number by the maximum port capacity of a single slot and adding the local port index number, the three-dimensional hardware location information (chassis-slot-port) can be reduced to a one-dimensional physical address. Simultaneously, the logical port address space is defined as a continuous set of natural numbers for direct access by the host computer.

[0050] In one possible implementation of this embodiment, the dynamic mapping table includes at least the following fields: [logical port number, physical slot number, local port index number, port status (valid / faulty)]. The algorithm's input is the set of valid physical ports filtered by S3 and the currently occupied logical address space; the output is the updated dynamic mapping table. The system establishes a key-value pair mapping relationship between the smallest unoccupied consecutive logical number interval and the newly added physical address.

[0051] Furthermore, when the physical topology changes (i.e., new modules are inserted leading to capacity expansion), the stability of the original logical port numbers must be maintained. If all ports are reordered and remapped with each capacity expansion, the original control scripts on the host computer will become invalid, resulting in service interruption. Therefore, this invention employs an incremental locking allocation strategy in the system. Specifically, when a new module is detected and the S3 scale confirmation is completed, this strategy first locks all existing mapping entries in the dynamic mapping table. This means that the binding relationship between the logical numbers and physical addresses corresponding to the original service paths is forced to remain unchanged, thereby ensuring backward compatibility with the host computer control protocol. Subsequently, the newly added valid physical port set is extracted, and the smallest unoccupied consecutive number interval is searched in the current logical address space. The newly added physical addresses are sequentially mapped one-to-one with these unoccupied logical numbers according to the hardware arrangement, generating incremental mapping data. Finally, this incremental mapping data is appended to the original dynamic mapping table to complete the update of the mapping relationship. Furthermore, in addition to establishing a forward mapping from logical ports to physical ports (used to parse connection commands issued by the host computer), the system will also simultaneously generate a reverse lookup mechanism from physical ports to logical ports. The purpose of this mechanism is that when the underlying hardware (e.g., a specific physical port of a radio frequency switching module) experiences VSWR anomalies, power overloads, or hardware damage, the underlying monitoring program captures the underlying physical address. By invoking the reverse lookup mechanism, this physical address can be quickly translated into the corresponding logical port number and reported to the host computer. In this way, host computer operators can intuitively see which specific business logic port has failed on the software interface without referring to hardware wiring diagrams, thereby improving system maintainability and fault location efficiency.

[0052] It should be noted that, through the above processing, the host computer only needs to deal with a matrix whose size automatically grows (e.g., smoothly transitioning from 64×64 to 80×80) and whose numbering is continuous, without having to modify the underlying control code, thereby achieving an adaptive expansion effect driven by data.

[0053] S5. Perform path equalization calibration for each signal path composed of logic ports.

[0054] Specifically, in a large-scale RF matrix like 128×128, the physical path length, the number of RF switching modules traversed, and the backplane routing of signals from different input ports to different output ports are all different. This inevitably leads to differences in insertion loss and phase shift between different signal paths. Especially in the L-band, high-frequency signals are extremely sensitive to physical paths. If these differences are not eliminated, the receiver will perceive drastic jumps in signal amplitude and phase when the host computer switches between different logic channels. Therefore, this invention, after establishing the logical mapping relationship, executes a path equalization calibration algorithm at the underlying level, ensuring that all logical paths exhibit completely consistent transmission characteristics externally.

[0055] Furthermore, when the system receives an instruction to establish a logical connection, it first invokes the mapping relationship established in S4 to resolve the logical path into a specific physical route. Then, based on the physical topology generated in S2, it sequentially extracts information about all hardware nodes traversed by the physical route. Based on this node information, it retrieves two types of basic data from the cache: The first category is the pre-stored calibration parameters of the modules identified and read in S1, namely the inherent insertion loss value and inherent phase offset value of each RF switching module at the current operating frequency.

[0056] The second category consists of preset hardware interconnect parameters, namely the transmission loss and phase delay values ​​of the backplane RF traces connecting these modules at the current operating frequency. It is important to emphasize that, since the physical traces of the chassis backplane are fixed at the factory, the aforementioned transmission loss and phase delay values ​​of the backplane RF traces are obtained through actual measurements using a vector network analyzer before the device leaves the factory, and are pre-programmed into the main control board's non-volatile memory as a fixed reference database.

[0057] Furthermore, since the transmission attenuation and phase shift of radio frequency signals in a cascaded system conform to the principle of linear superposition, the system also needs to calculate the physical cumulative effect of the entire current signal path.

[0058] Specifically, the inherent insertion loss values ​​of all RF switching modules along the path are summed with the transmission loss values ​​of all backplane RF traces to obtain the total path loss of the signal path at the current frequency. Similarly, the inherent phase offset values ​​of all modules along the path are summed with the phase delay values ​​of all traces to obtain the total path phase shift of the signal path at the current frequency.

[0059] It should be noted that, through this calculation, the system quantifies the energy attenuation and phase lag experienced by the radio frequency signal during transmission in this specific physical network at the software level.

[0060] Furthermore, to achieve equalization across all paths, this invention pre-defines a global target reference plane within the system (e.g., specifying that the external equivalent gain of all paths is uniformly 0dB, and the equivalent phase is uniformly normalized to 0 degrees). The total path loss calculated above is compared with the pre-defined target gain, and the difference is calculated based on the principle of compensating for the missing amount, to determine the required gain compensation. Simultaneously, the total path phase shift calculated is compared with the pre-defined target phase, and modulo conversion is performed within a 360-degree period to calculate the required phase compensation.

[0061] Furthermore, after generating the theoretical gain compensation and phase compensation values, these values ​​are converted into digital control words that can be recognized by the underlying hardware.

[0062] Specifically, the system sends the gain control word to the DSA (digitally controlled attenuator) or VGA (variable gain amplifier) ​​inside the RF switching module through which the signal path passes; and sends the phase control word to the DPS (digitally controlled phase shifter). By driving these underlying RF devices to change their physical states, the system can forcibly inject compensation values ​​at the physical level that are equal in magnitude but opposite in direction to the inherent attenuation and phase shift of the path.

[0063] It should be noted that, through the above processing, this invention transforms the hardware problem into the logic of parameter accumulation and target approximation in software algorithms. Regardless of how the 128×128 matrix undergoes adaptive expansion or how its physical path changes, after path equalization calibration, every logical path seen by the host computer has exactly the same gain and phase characteristics, thereby achieving consistent transmission of the RF matrix.

[0064] S6. Publish the configuration information, which includes input / output scale, mapping relationship and path equalization calibration results, to complete the adaptive expansion configuration.

[0065] Specifically, after completing S1~S5, the system already possesses the expanded physical switching capabilities at the underlying level. To ensure that this expansion process is secure and transparent to the host computer (user control terminal), this invention also performs the following steps: Before the configuration information is officially released, in order to prevent false expansion and real blockage caused by local hardware defects (such as abnormal VSWR or excessive attenuation of a certain cross link), the system main control program will perform a full traversal verification of the currently confirmed logical input ports and logical output ports.

[0066] Specifically, for each combination of logical input port and logical output port, the following dual rule judgments are performed sequentially: Rule 1 (Physical Connectivity Judgment): Invoke the physical topology generated by S2 and check if there exists at least one continuous RF link from the physical input terminal mapped to the logical input to the physical output terminal mapped to the logical output. If it exists, then this rule is passed.

[0067] Rule 2 (Calibration Validity Judgment): Use the path equalization calibration results generated by S5 to check whether the gain compensation and phase compensation calculated for that path are both within the maximum physical adjustment range of the underlying hardware (e.g., DSA and DPS). If they are not out of range (i.e., the hardware is capable of equalization calibration), then this rule is passed.

[0068] It should be noted that the system only confirms that the expanded matrix (up to 128×128) possesses true non-blocking full switching capability and meets signal consistency requirements when all port combinations simultaneously satisfy the above dual rules. This logical verification mechanism can replace traditional manual testing, improving the reliability of capacity expansion.

[0069] Furthermore, after passing the full verification, the system packages the currently determined input / output scale (e.g., 80×80), the logical-to-physical mapping table, and the equal calibration control words for all paths into a structured configuration information file.

[0070] Furthermore, to meet the stringent HA (High Availability) requirements of telecom-grade equipment, the system generates a globally unique configuration version identifier (e.g., a version number based on a timestamp) for the configuration information file. Subsequently, the main control board synchronizes this version-identified configuration information to the backup control board in real time via its internal high-speed backplane bus. Upon receiving the configuration information, both the main and backup control boards write it to their respective non-volatile memories (e.g., NVRAM or Flash chips) for permanent storage. This ensures that even if the 128×128 ultra-large matrix experiences a sudden power outage during operation, both the main and backup boards can safely retain the latest expanded state. When the equipment is powered on again, the system directly reads the latest version of the configuration information for power-on recovery, instantly restoring the expanded state before the power outage, thus shortening service interruption time; simultaneously, it ensures that in the event of a main control board failure, the backup board can take over promptly without any mapping errors.

[0071] In addition to configuring RF service data, the health status of newly inserted RF switching modules also needs to be included in the management.

[0072] Specifically, the system extracts the addresses of various sensors activated during module self-test in S1, and automatically registers the real-time power consumption data of the newly inserted RF switching module, multi-point temperature monitoring data (e.g., RF chip surface temperature, module air inlet temperature), and RF switch closure status monitoring points to the device's global monitoring platform according to a unified communication protocol format. The advantage of this is that it allows maintenance personnel on the host computer to not only see the increased matrix size but also monitor the health indicators of the newly added hardware in real time. When a new module exceeds its temperature limit due to full load operation, the monitoring platform can trigger an alarm or activate the cooling system immediately, ensuring the long-term reliability of the entire system after expansion.

[0073] Furthermore, after completing all the aforementioned background preparations, the system's main control program switches the current device's state machine from dynamic expansion to normal operation readiness. Finally, the main control board proactively sends a configuration update notification message to the host computer via the external communication interface. Upon receiving this message, the host computer retrieves the latest input / output scale and logical port list. At this point, the available port matrix on the host computer's operating interface instantly expands from its original size (e.g., 64×64) to a new size (e.g., 80×80). Users can directly issue cross-connect commands to the newly added logical ports, and the underlying system will automatically call the mapping table in S4 and the calibration data in S5 to execute them.

[0074] Furthermore, to achieve high system reliability and self-healing capabilities, this invention also includes a dynamic degradation and redundancy switching mechanism for module removal or failure. Specifically, during system operation, when the backplane hot-swap controller detects a removal transition in the in-situ pin level of any RF switching module, or when the main control board detects a communication interruption (i.e., a failure) of a module through heartbeat polling, the system will immediately trigger a hardware interrupt and forcibly isolate all RF physical ports associated with the faulty / removed module at the underlying level. Subsequently, in the global routing status table generated by S2, all nodes corresponding to the faulty / removed module and their associated internal and external links are marked as failed / disconnected. Based on the updated physical topology, the system will re-execute the path optimization algorithm. If a service logic path originally issued by the host computer passes through a node in the failed / disconnected state, the system will first search the topology graph for redundant physical paths connecting the same logical input and output ports (e.g., bypass routing through other idle intermediate-level switching modules). If a redundant path exists, the system automatically maps the logical port to a new physical path and calls S5 to recalibrate the path equalization, achieving seamless self-healing of services. If there are no available redundant paths in the topology graph, the system recalculates the effective input / output scale of the current connection (e.g., from 80×80 back to 64×64), generates a degradation matrix configuration, and pushes the topology degradation alarm and the list of affected logical ports to the host computer through the external communication interface, so that the host computer can reschedule services.

[0075] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for adaptive expansion configuration of a 128×128 L-band matrix, characterized in that, include: When the insertion of the RF switching module into the device slot is detected, the module information of the RF switching module is automatically identified; Based on the module information and the preset interconnection relationship of the device slots, the physical topology of the current device is generated; Based on the physical topology, the input and output scale of the 128×128L band matrix is ​​determined; Establish a mapping relationship between the logical ports used by the host computer and the physical ports of the radio frequency switching module; For each signal path formed by the aforementioned logic ports, path equalization calibration is performed; The configuration information, which includes the input / output scale, the mapping relationship, and the path equalization calibration results, is published to complete the adaptive scaling configuration.

2. The adaptive expansion configuration method for a 128×128L band matrix as described in claim 1, characterized in that, Before identifying the module information of the radio frequency switching module, the following is also included: After the RF switching module is inserted into the device slot, its RF path is isolated first. After the module completes self-test and identification, it is then connected to the valid matrix.

3. The adaptive expansion configuration method for a 128×128L band matrix as described in claim 1, characterized in that, The radio frequency switching module is a 16×16 switching module; the module information includes a unique module identifier, port specifications, frequency band capabilities, and pre-stored calibration parameters.

4. The adaptive expansion configuration method for a 128×128L band matrix as described in claim 1, characterized in that, Generating the physical topology includes: Obtain the device slot information where the RF switching module is located, and construct a topology diagram consisting of nodes and connections by combining the preset interconnection relationship between the device slot and the backplane.

5. The adaptive expansion configuration method for a 128×128L band matrix as described in claim 1, characterized in that, The establishment of the mapping relationship includes: When the physical topology changes, the stability of the logical port number is maintained to ensure compatibility with the host computer control protocol.

6. The adaptive expansion configuration method for a 128×128L band matrix as described in claim 1, characterized in that, Prior to the release of the configuration information, the following is also included: It iterates through all combinations of logic input ports to logic output ports, performs physical connectivity checks and calibration validity checks, and confirms that the generated signal path is valid and that the required gain and phase compensation are within the adjustment range of the underlying hardware.

7. The adaptive expansion configuration method for a 128×128L band matrix as described in claim 1, characterized in that, The publication of the configuration information also includes: A configuration version is created for the generated configuration information, and the configuration information is synchronized to the primary and backup dual control boards to support power-off saving and power-on recovery.

8. The adaptive expansion configuration method for a 128×128L band matrix as described in claim 1, characterized in that, The path equalization calibration includes: The total loss and total phase of the signal path are calculated by accumulating the pre-stored calibration parameters of each RF switching module along the signal path and the preset backplane RF trace transmission parameters. Furthermore, based on the preset target gain and target phase, gain compensation and phase compensation amounts are generated to compensate for the total loss and total phase, and converted into digital control words and sent to the underlying RF devices.

9. The adaptive expansion configuration method for a 128×128L band matrix as described in claim 1, characterized in that, The method further includes: The power, temperature, and status monitoring points of the newly inserted RF switching module are automatically registered to the device's monitoring platform.

10. The adaptive expansion configuration method for a 128×128L band matrix as described in claim 1, characterized in that, The method further includes: When any RF switching module is detected to be unplugged or malfunctioning, the physical topology is automatically updated, and a degradation matrix configuration or redundant path is re-generated based on the updated physical topology.

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