Cyclic scanning acquisition timing method and system

Abstract

The application relates to the technical field of building automation control, and discloses a cyclic scanning type acquisition timing method and system, which comprises the following steps: associating end cold equipment to logical nodes defined by the intersection of a row selection signal channel group and a column reading signal channel group; cyclically switching the excitation state of the row selection signal channel according to a preset timing sequence; synchronously acquiring the feedback state of the column reading signal channel group; determining the running state of the end cold equipment on a specific logical node according to the corresponding relationship between the row selection signal channel and the column reading signal channel; pre-designing a timing variable for each logical node, and accumulating the numerical value of the timing variable according to the determined running state. Through the time-sharing multiplexing acquisition mechanism of the row-column scanning type, in combination with the stable timing and storage functions of a programmable logic controller, the application realizes efficient and reliable state monitoring and accurate cumulative running time statistics of a large number of end cold equipment with extremely few hardware resources.

Description

Technical Field

[0001] This invention relates to the field of building automation control technology, and in particular to a cyclic scanning acquisition and timing method and system. Background Technology

[0002] In modern commercial buildings and large public buildings, central air conditioning systems are major energy consumers, and the fair allocation of their operating costs has become a core challenge for property management. The traditional method of allocating costs based on usable area fails to reflect the actual cooling duration and intensity used by each user, leading to severe billing unfairness. Under this model, users lack energy-saving awareness and easily develop a "use it or lose it" consumption habit, resulting in huge energy waste, increased equipment wear and tear, higher maintenance costs, and frequent disputes between property management and users. To achieve fair billing and promote energy conservation, it is urgently necessary to accurately track the actual operating time of each terminal cooling device (such as fan coil units). However, in large buildings with hundreds or even thousands of terminal devices, traditional technological approaches to achieving this goal face significant challenges. If each terminal device is configured with an independent signal acquisition channel, the central controller (such as a programmable logic controller, PLC) needs a massive number of input / output (I / O) points. This not only leads to a geometric increase in hardware procurement costs but also results in extremely complex on-site wiring and high maintenance costs, significantly reducing the economic viability and feasibility of the solution. Summary of the Invention

[0003] To address the shortcomings of existing technologies, this invention discloses a cyclic scanning acquisition and timing method and system, aiming to solve the problems of high hardware costs, complex wiring, and difficult maintenance caused by the huge number of I / O points required when performing status monitoring on large-scale terminal devices in existing technologies.

[0004] The technical solution of the present invention is as follows: In a first aspect, this invention discloses a cyclic scanning acquisition and timing method for monitoring the status and timing of multiple end-user cooling devices. The method includes: Multiple terminal cooling devices are associated with logical nodes defined by the cross-defined row selection signal channel group and column read signal channel group, respectively. The excitation state of each channel in the row selection signal channel group is switched cyclically according to a preset timing sequence; During the switching of excitation states, the feedback status of the column read signal channel group is collected synchronously; Based on the correspondence between the row selection signal channel currently in the energized state and the column read signal channel that generates the feedback signal, the operating status of the end-user cooling equipment on a specific logical node is determined. The specific logical node refers to the logical node associated with the row selection signal channel in the energized state. Pre-set timing variables for each logical node, and accumulate the values ​​of the timing variables according to the determined running status.

[0005] This technical solution utilizes matrix addressing logic with row and column cross scanning, enabling the monitoring of M×N devices using M+N signal channels. This significantly reduces the number of hardware I / O points and wiring costs, providing an economical, stable, and efficient solution to the technical challenge of large-scale end-device status acquisition and timing.

[0006] Furthermore, the row selection signal channel group corresponds to M output ports of the programmable logic controller, and the column read signal channel group corresponds to N input ports of the programmable logic controller, where M and N are positive integers; The steps of associating multiple terminal cooling devices to logical nodes defined by the cross-defined row selection signal channel group and column read signal channel group include: defining M×N independent logical nodes by combining M output ports and N input ports in a row-column cross-combination, and associating the M×N terminal cooling devices to the logical nodes one by one.

[0007] Furthermore, the method also includes: By adding an expansion interface module to the programmable logic controller, the number of channels in the row selection signal channel group or column read signal channel group can be increased linearly, thereby achieving dynamic expansion of the logic node size.

[0008] Furthermore, the step of cyclically switching the excitation state of each channel in the row selection signal channel group according to a preset timing sequence includes: At a speed of milliseconds, the row selection signal channel group is cyclically controlled to output high-level excitation states in sequence; In this process, only one row selection signal channel is controlled to output a high-level excitation state at a time, while all other row selection signal channels are kept in a low-level inactive state.

[0009] Furthermore, during the switching of excitation states, the steps for synchronously acquiring the feedback status of the column read signal channel group include: During the entire time window in which any row select signal channel remains in a high-level excitation state, the instantaneous level state of the column read signal channel group is read synchronously and in parallel.

[0010] Furthermore, based on the correspondence between the row selection signal channel currently in an excited state and the column read signal channel that generates the feedback signal, the steps for determining the operating status of the terminal cooling equipment on a specific logic node include: Identify and determine the row selection signal channel that is currently in a high-level excitation state; Based on the row selection signal channel that is currently in a high-level excitation state, and combined with the real-time level state of each column read signal channel, a logical AND operation is performed on each specific logic node; When the result of the logical AND operation is true, it is determined that the end-of-line cooling device on the specific logical node is in working state; the result of the logical AND operation is true, which means that the row selection signal channel corresponding to the specific logical node is currently in a high-level excitation state and the corresponding column read signal channel is currently in a high-level feedback state. Otherwise, the terminal cooling device corresponding to the specific logical node is determined to be in a non-working state.

[0011] Furthermore, the steps of pre-setting a timing variable for each logical node and accumulating the value of the timing variable according to the determined running status include: In a programmable logic controller, an independent internal register is pre-allocated for each logic node to store the preset timing variables of the logic node; For each logical node, whenever the logical node is a specific logical node and the associated terminal cooling device is in working state, the corresponding internal register is called, and the value in the internal register is accumulated using the pulse integral algorithm to convert the instantaneous working state of the terminal cooling device into continuous time-quantized data.

[0012] Furthermore, the internal registers use a 32-bit unsigned data format; The steps for accumulating the values ​​in the internal register using the pulse integration algorithm include: Using seconds as the smallest unit of time, the system determines that the end-user cooling device at a specific logic node is in working condition, and increments the internal register by one when each consecutive second pulse signal arrives. The system utilizes 32-bit storage space to ensure that the timing variable does not overflow within the preset device lifecycle.

[0013] Furthermore, the method also includes: In the non-volatile memory area of ​​the programmable logic controller, a backup memory unit corresponding one-to-one with the internal registers is allocated; The system monitors changes in the values ​​in the internal registers in real time. When the changes reach a preset synchronization threshold, the current values ​​in the internal registers are synchronized to the corresponding backup storage unit. During the initialization phase after the programmable logic controller is powered on again, the values ​​recorded in the backup storage unit are read and loaded into the internal register to enable the power-off resume transmission of data for the operation of the end-user cooling equipment.

[0014] Secondly, the present invention also discloses a cyclic scanning acquisition and timing system for performing the steps in any of the foregoing methods, including: The association module is used to associate multiple end-user cooling devices with logical nodes defined by the cross-defined row selection signal channel group and column read signal channel group; The switching module is used to cyclically switch the excitation state of each channel in the row selection signal channel group according to a preset timing sequence; The acquisition module is used to synchronously acquire the feedback status of the column read signal channel group during the switching of excitation state; The determination module is used to determine the operating status of the end-user cooling equipment on a specific logical node based on the correspondence between the row selection signal channel currently in the energized state and the column read signal channel that generates the feedback signal. The specific logical node refers to the logical node associated with the row selection signal channel in the energized state. The timing module is used to preset timing variables for each logical node and accumulate the values ​​of the timing variables according to the determined running status.

[0015] This technical solution provides a clear system implementation scheme corresponding to the method, decomposing complex functions into independent logical modules, and providing clear architectural guidance for the hardware implementation and productization of this timing method.

[0016] In summary, this invention provides a cyclic scanning data acquisition and timing method and system. The method cleverly constructs an M×N logic matrix by using M output ports of a PLC as row selection channels and N input ports as column reading channels, thereby enabling the monitoring of up to M×N end devices using M+N I / O ports. Compared to traditional technologies requiring M×N I / O ports, this invention significantly reduces the demand for controller hardware resources, substantially saving hardware costs and on-site wiring. Furthermore, this method, based on an industrial-grade PLC and hardwiring, inherits the advantages of high stability and strong anti-interference capabilities of industrial control systems, avoiding the uncertainties brought about by complex network communication protocols. Ultimately, this invention not only achieves accurate time statistics for a large number of end devices in a highly economical way, providing a reliable data foundation for fair billing, but also achieves social and economic benefits by promoting energy conservation and reducing building operating costs. Attached Figure Description

[0017] Figure 1 This is a flowchart illustrating a cyclic scanning acquisition timing method provided in an embodiment of the present invention.

[0018] Figure 2 This is a schematic diagram of a cyclic scanning acquisition and timing system provided in an embodiment of the present invention.

[0019] Labeling Explanation: 210, Association Module; 220, Switching Module; 230, Acquisition Module; 240, Judgment Module; 250, Timing Module. Detailed Implementation

[0020] The technical solutions of this invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are merely some, not all, of the embodiments of this invention. The components of this invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.

[0021] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this invention, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0022] In modern large-scale commercial buildings, such as high-rise office buildings, shopping malls, or hotels, energy management and cost allocation for central air conditioning systems has long been a management challenge. These buildings often contain hundreds or even thousands of terminal cooling devices, such as fan coil units, controlled independently by different tenants or departments. To achieve fair billing and avoid energy waste and user disputes caused by area-based allocation, accurate and reliable recording of the actual operating time of each terminal device is essential. However, traditional monitoring solutions typically require laying a separate signal cable to the central control room for each terminal device and connecting it to a separate input port of a programmable logic controller (PLC). This one-to-one monitoring approach, when dealing with large-scale device groups, results in the PLC needing to be configured with a massive number of input / output (I / O) points. This not only drastically increases hardware procurement costs but also leads to extremely large and complex on-site wiring projects. Subsequent troubleshooting and maintenance also become exceptionally difficult and time-consuming, making this solution neither economically nor practically advantageous.

[0023] Firstly, please see Figure 1 This invention provides a cyclic scanning acquisition and timing method for monitoring the status and timing of multiple end-user cooling devices. The method includes: S1. Associate multiple terminal cooling devices with logical nodes defined by the cross-defined row selection signal channel group and column read signal channel group respectively; S2. Cyclicly switch the excitation state of each channel in the row selection signal channel group according to the preset timing. S3. During the switching of excitation state, the feedback status of the column read signal channel group is collected synchronously. S4. Based on the correspondence between the row selection signal channel currently in the energized state and the column read signal channel that generates the feedback signal, determine the operating status of the end-user cooling equipment on a specific logical node. The specific logical node refers to the logical node associated with the row selection signal channel in the energized state. S5. Preset timing variables for each logical node and accumulate the values ​​of the timing variables according to the determined running status.

[0024] Specifically, a logical node is not a physically existing physical device, but rather an abstract, unique address coordinate defined through circuit design and software programming. In the context of this technical solution, each logical node is uniquely determined by the intersection of a row selection signal channel and a column read signal channel. The entire monitoring network can be imagined as a giant two-dimensional matrix or chessboard, where the row selection signal channels are the rows, the column read signal channels are the columns, and each intersection point, i.e., the logical node, is a cell on the chessboard. Each end-user device to be monitored is pre-assigned and associated with a unique cell during physical wiring. By specifying the row and column numbers, any end-user device can be precisely located.

[0025] The row selection signal channel group and the column read signal channel group are the two core electrical channels for implementing the matrix addressing described above. The row selection signal channel group actively sends "strobe" or "query" signals, acting like a searchlight that illuminates only a specific row in the matrix at any given time. The column read signal channel group passively receives and feeds back status signals, acting like observation posts distributed in each column. When a row is illuminated by a searchlight, the device located in that row and in operation will send a signal, which will be captured by the observation posts in its column.

[0026] The stimulated state refers to a row selection signal channel being placed in a level state that enables the entire row of logical nodes associated with it to provide feedback. When a row selection channel is in the stimulated state, it can be understood that the row is "activated" or "selected," and the system is ready to poll the status of all devices on that row. Conversely, the destimulated state indicates that the row is in a "dormant" or "unselected" state, and even if the devices on that row are working, their status signals will not be transmitted.

[0027] Specifically, the overall workflow of this cyclic scanning acquisition timing method can be understood as a high-speed, continuous, and repetitive "roll call" process.

[0028] First, during the system deployment phase, physical wiring and logical associations need to be completed. This involves connecting each end-user cooling device, such as the fan coil units installed in each office, to a pre-defined circuit network via signal lines. For example, an office building with 800 fan coil units can be designed with a 40-row, 20-column logic matrix. The row selection signal channel group would then contain 40 independent channels, and the column read signal channel group would contain 20 independent channels. The fan coil unit located in Room 501, Building A, might be associated with the logical node in row 1, column 1; the device in Room 502, Building A, would be associated with the logical node in row 1, column 2; and the device in Room 303, Building B, might be associated with the logical node in row 30, column 15. This association is accomplished through on-site area relay boxes and signal cable wiring, ensuring that each device has a unique "row and column coordinate."

[0029] Secondly, after the system is put into operation, the core controller begins to perform cyclic scanning according to a preset timing sequence. This process is fully automatic. The controller first puts the first row selection signal channel into the energized state, while keeping the remaining 39 row selection channels in the de-energized state. This energized state is maintained for a very short time window.

[0030] Within this time window, the controller synchronously and in parallel acquires the feedback status of all 20 column read signal channels. Parallel acquisition means that the controller reads the signals from all column channels at the same time, rather than reading them one by one sequentially. If, at this moment, the device in row 1 and column 2 (the fan coil unit in room 502 of building A) is running, its operating status will be transmitted to the column read signal channel of column 2 through a closed contact or a high-level signal, causing that channel to generate a valid feedback signal. If other devices in row 1 are not running, their corresponding column channels will not have any feedback signals.

[0031] Next, the controller determines the status based on the collected information. Since the first row selection channel is currently in an activated state, the controller knows it is "querying" all devices in the first row. When it detects a feedback signal from the second column read channel, it can accurately determine that the end device corresponding to logical node (1,2) is working using the "row 1" and "column 2" information. For column channels without feedback signals, such as columns 1, 3, 4...20, the controller determines that the devices on the logical nodes intersecting these columns with the current activated row are in a non-working state.

[0032] After completing the scanning and judgment of the first row, the controller immediately restores the first row selection channel to the non-excited state and then puts the second row selection signal channel into the excited state. Then, it repeats the above acquisition and judgment process to check the status of all devices on the second row. This process will be carried out sequentially, from the first row to the 40th row. After completing one complete cycle, it will immediately start again from the first row, repeating endlessly.

[0033] Finally, the timing accumulation process occurs simultaneously with the determination that a device is in operation. The system pre-allocates an independent timing variable in memory for each logical node (i.e., each end device), typically with an initial value of zero. Think of it as providing each device with its own dedicated stopwatch. When the controller determines that the device at logical node (1,2) is operating, it locates the timing variable for that node and increments its value. The accumulation can be done by incrementing the variable by one every fixed time unit (e.g., per second) whenever a device is detected as operating. In this way, through continuous high-speed scanning and status determination, the instantaneous operating state of each device is transformed into continuously accumulated runtime data.

[0034] By adopting this cyclic scanning matrix addressing method, a system that originally required 800 independent input ports to monitor 800 devices can now be completed with only 40 output channels and 20 input channels, totaling 60 I / O channels. This significantly reduces the hardware resource requirements of the core controller, thereby substantially lowering hardware procurement costs. Simultaneously, cabling is simplified; instead of running a long cable from each end device to the central control room, regional relay boxes can be set up on each floor or in each area for signal aggregation and matrix conversion, significantly reducing cabling complexity and workload.

[0035] In one specific implementation, the row selection signal channel group corresponds to M output ports of the programmable logic controller, and the column read signal channel group corresponds to N input ports of the programmable logic controller, where M and N are positive integers; The steps of associating multiple terminal cooling devices to logical nodes defined by the cross-defined row selection signal channel group and column read signal channel group include: defining M×N independent logical nodes by combining M output ports and N input ports in a row-column cross-combination, and associating the M×N terminal cooling devices to the logical nodes one by one.

[0036] This solution maps the aforementioned abstract channel concept to hardware widely used in industrial practice. Programmable Logic Controllers (PLCs) are ideally chosen as the core controller due to their high reliability, strong anti-interference capabilities, and mature programming environment. In this architecture, the PLC's digital output (DO) ports are used as row selection signal channel groups. For example, a PLC module with 16 DO points can serve as 16 row selection channels. The PLC's digital input (DI) ports are used as column read signal channel groups; a module with 16 DI points can serve as 16 column read channels. Thus, a PLC with 16 DO and 16 DI points can theoretically monitor 16 × 16 = 256 end devices. The values ​​of M and N depend on the number of I / O points of the selected PLC and its expansion modules. For example, by selecting a PLC with 8 built-in DOs and 8 DIs, and adding a 16-point DO expansion module and a 16-point DI expansion module, then M equals 8 + 16 = 24, N equals 8 + 16 = 24, and the total monitoring capacity reaches 24 × 24 = 576 points. This approach of combining technical solutions with standard industrial hardware not only ensures system stability and environmental adaptability, but also allows the system's design, implementation, and maintenance to be based on mature industrial automation technologies, lowering the technical threshold.

[0037] In one specific implementation, the step of cyclically switching the excitation state of each channel in the row selection signal channel group according to a preset timing sequence includes: At a speed of milliseconds, the row selection signal channel group is cyclically controlled to output high-level excitation states in sequence; In this process, only one row selection signal channel is controlled to output a high-level excitation state at a time, while all other row selection signal channels are kept in a low-level inactive state.

[0038] Specifically, millisecond-level speed refers to the duration of a single row selection signal channel maintaining a high-level excitation state in milliseconds, meaning the excitation duration of a single channel does not exceed 100 milliseconds.

[0039] The specific physical implementation and switching method of the excitation state are clearly defined here. The excitation state is defined as "high level," which in the industrial standard 24V DC control system typically means outputting a voltage close to 24V. Conversely, the non-excitation state is "low level," meaning outputting a voltage close to 0V. The PLC's DO port drives external relays or indicator lights by outputting high and low levels. The scanning speed is set in milliseconds; for example, the high-level excitation state of each row selection channel can last for 20 milliseconds. This means that for a system with 40 rows, completing a full scan of all rows takes only 40 × 20 milliseconds = 800 milliseconds, less than 1 second. Such a high scanning frequency ensures that even if the user only briefly turns on the air conditioner, this action can be accurately captured by the system, avoiding timing omissions. More importantly, there is the principle of "controlling only one row selection signal channel to output a high level at a time." This is a "time-division multiplexing" or "exclusive" excitation mechanism, which fundamentally guarantees the uniqueness of signal positioning. At any given moment, only one row in the entire matrix is ​​"lit up," so the source row of any feedback signal from a column channel is unambiguous. If multiple row channels are allowed to output high levels simultaneously, then when a feedback signal appears on a column channel, it will be impossible to determine which row the signal originated from, leading to the collapse of the entire addressing logic.

[0040] In one specific implementation, the step of synchronously acquiring the feedback status of the column read signal channel group during the switching of excitation states includes: During the entire time window in which any row select signal channel remains in a high-level excitation state, the instantaneous level state of the column read signal channel group is read synchronously and in parallel.

[0041] This scheme further refines the timing of signal acquisition. It emphasizes that the acquisition action must occur within the "entire time window" during which the row selection channel remains high. For example, if the set excitation time window is 20 milliseconds, the PLC's program logic should ensure that the status of all DI input ports is continuously read, or read at a higher frequency, during these 20 milliseconds. Modern PLCs typically have scan cycles in the microsecond or millisecond range, much faster than the row excitation switching speed, thus they are fully capable of completing multiple parallel reads within a 20-millisecond window. "Parallel reading" means that the PLC can read the level status of all input ports into its internal input image register at once within a scan cycle. This means that whether there is a signal in one column or multiple columns simultaneously, the PLC can capture all these signals at the same time. This parallel processing capability greatly improves the efficiency of data acquisition, ensuring that no device status feedback is missed due to serial polling of column channels within the short row selection window.

[0042] In one specific implementation, the step of determining the operating status of the end-user cooling equipment on a specific logic node based on the correspondence between the row selection signal channel currently in an excited state and the column read signal channel that generates the feedback signal includes: Identify and determine the row selection signal channel that is currently in a high-level excitation state; Based on the row selection signal channel that is currently in a high-level excitation state, and combined with the real-time level state of each column read signal channel, a logical AND operation is performed on each specific logic node; When the result of the logical AND operation is true, it is determined that the end-of-line cooling device on the specific logical node is in working state; the result of the logical AND operation is true, which means that the row selection signal channel corresponding to the specific logical node is currently in a high-level excitation state and the corresponding column read signal channel is currently in a high-level feedback state. Otherwise, the terminal cooling device corresponding to the specific logical node is determined to be in a non-working state.

[0043] This section describes the specific algorithm implementation for state determination, namely the logical AND operation. This is a basic logic instruction that is very easy to implement in PLC ladder diagrams or structured text programming. The PLC program maintains a variable to record which row selection channel is currently being activated. For example, when the program controls the 5th DO port (Y5) to output a high level, the value of this variable is 5. Simultaneously, the PLC reads the status of all DI ports and stores it in the input image area, such as X0 to X19. The program performs a loop judgment: when the row number is 5, it checks the status of X0 to X19 in sequence. For logic node (5,7), the condition for determining its working state is that "Y5 is high" and "X7 is high". In the PLC program, this can be represented as a simple series contact logic: one normally open contact is associated with the output state of Y5, and another normally open contact is associated with the input state of X7. These two contacts are connected in series to drive an internal flag bit. Current can only flow when Y5 and X7 are both high, and the flag bit is set, indicating that device (5,7) is working. For any combination that does not meet this condition, such as Y5 being high but X8 being low, the result of the logical AND operation is false, and the corresponding device (5,8) is determined to be in a non-working state. This logical AND-based determination method is simple to calculate, highly efficient, and very suitable for high-speed, real-time operations in resource-constrained PLCs.

[0044] Building upon the basic cyclic scanning scheme, this invention also proposes a series of optimized implementation methods to address issues such as scalability, data storage, and power outage safety that may be encountered in practical engineering.

[0045] In some application scenarios, building projects may be constructed in phases, or additional monitoring points may be needed due to functional changes during use. If the system lacks good scalability, each addition of equipment may require replacing the core controller, leading to significant cost and project interruptions. To address this, this invention provides a dynamic expansion solution.

[0046] The method also includes: By adding an expansion interface module to the programmable logic controller, the number of channels in the row selection signal channel group or column read signal channel group can be increased linearly, thereby achieving dynamic expansion of the logic node size.

[0047] Specifically, modern mainstream PLC products generally adopt a modular design. Their core CPU unit typically has one or more high-speed bus interfaces on its side. When the number of I / O points needs to be increased, technicians do not need to replace the entire PLC host. The operation process is very intuitive: first, power off the PLC system; then, take a new I / O expansion module (such as a 16-point digital output module or a 16-point digital input module), and physically attach it to the side of the CPU unit or the last expansion module; the bus interface will automatically connect. After completing the hardware installation, power on the PLC again. In the PLC programming software (such as Siemens' TIA Portal or Mitsubishi's GX Works), by performing operations such as "hardware update" or "read PLC configuration," the software will automatically detect the newly added module and its type and address. Engineers only need to confirm the module in the software's hardware configuration, and the system will automatically assign it an I / O address.

[0048] For example, an initial system uses a single CPU module with 16 output points (M=16) and 16 input points (N=16), capable of monitoring 16×16=256 end devices. Later, in the second phase of the project, 150 more devices need to be monitored. At this point, engineers can add a 16-point output expansion module and a 16-point input expansion module. After installation and configuration, the number of row selection channels M becomes 16+16=32, the number of column read channels N becomes 16+16=32, and the total monitoring capacity increases to 32×32=1024 points, far exceeding the new requirement. The entire expansion process only requires the addition of two standard modules, with almost no impact on the core scanning logic of the original program, greatly improving the system's flexibility and cost-effectiveness over its lifecycle.

[0049] Relying on an external computer or dedicated timer for the specific implementation of timing accumulation would increase system complexity and potential points of failure. To build a highly cohesive and reliable system, this invention deeply integrates the timing function within the PLC.

[0050] The steps of pre-setting a timing variable for each logical node and accumulating the value of the timing variable according to the determined running status include: In a programmable logic controller, an independent internal register is pre-allocated for each logic node to store the preset timing variables of the logic node; For each logical node, whenever the logical node is a specific logical node and the associated terminal cooling device is in working state, the corresponding internal register is called, and the value in the internal register is accumulated using the pulse integral algorithm to convert the instantaneous working state of the terminal cooling device into continuous time-quantized data.

[0051] In practice, the PLC's internal data registers (such as the D register in a Mitsubishi Q-series PLC or the DB data block in a Siemens S7-1500 series PLC) are used to establish a dedicated "ledger" for each logical node. If the system monitors M×N devices, an array of registers of size M×N will be created in the program. For example, for a 256-point system, 256 data registers, D1000 to D1255, can be allocated. D1000 is used to record the time taken for logical node (1,1), D1001 records the time taken for node (1,2), and so on.

[0052] The pulse integration algorithm is the core of the accumulation process. PLCs typically have an internal system clock driven by a high-precision crystal oscillator, which generates standard clock pulses. For example, many PLCs provide a special internal relay (such as M8013) that operates on a 1-second cycle, holding the ON state for 0.5 seconds and the OFF state for another 0.5 seconds. The rising edge of this 1-second pulse (the instant from OFF to ON) is used as the trigger signal. The PLC program executes as follows: at the rising edge of each 1-second pulse, the program iterates through the status flags of all logic nodes. If a node (e.g., node (5,7)) is found to have a "working" status flag, the program executes an increment instruction (INC) to operate on the corresponding register (e.g., D1056) and increment its value by 1. In this way, the value stored in the register directly corresponds to the cumulative number of seconds the device has been running, cleverly integrating the discrete "ON / OFF" status signal into a continuous quantized time.

[0053] When performing long-term timing, the capacity of data storage is a critical factor that must be considered; otherwise, data overflow may occur, rendering the timing invalid.

[0054] The internal registers use a 32-bit unsigned data format; The steps for accumulating the values ​​in the internal register using the pulse integration algorithm include: Using seconds as the smallest unit of time, the system determines that the end-user cooling device at a specific logic node is in working condition, and increments the internal register by one when each consecutive second pulse signal arrives. The system utilizes 32-bit storage space to ensure that the timing variable does not overflow within the preset device lifecycle.

[0055] In PLC programming, data registers have different data types. A standard 16-bit unsigned integer (Word) has a maximum value of 65535. If used for timing in seconds, the register would overflow and return to zero after the equipment runs continuously for 65535 seconds (approximately 18.2 hours), resulting in data loss. This is completely unacceptable for central air conditioning billing, which is typically done monthly or even quarterly.

[0056] Therefore, this scheme explicitly adopts a 32-bit unsigned data format (such as Double Word or DINT). The maximum value of a 32-bit unsigned integer can reach 2^32-1, or 4,294,967,295. When the timing unit is seconds, this register can record up to 4.29 billion seconds. Calculations show that this is equivalent to more than 136 years (4,294,967,295 seconds ÷ 3600 seconds / hour ÷ 24 hours / day ÷ 365.25 days / year ≈ 136.2 years). This time span far exceeds the design lifespan of any commercial building or its central air conditioning system. Therefore, by selecting a 32-bit data format, it is fundamentally ensured that the timing data will not overflow throughout the entire equipment lifespan, thus guaranteeing the absolute accuracy and reliability of long-term billing data.

[0057] Furthermore, the internal data registers used for high-speed calculations in a PLC are typically volatile memory (RAM), meaning that all accumulated time data stored in them will be lost should the PLC experience an unexpected power outage. This is a fatal flaw for a timing system.

[0058] The method also includes: In the non-volatile memory area of ​​the programmable logic controller, a backup memory unit corresponding one-to-one with the internal registers is allocated; The system monitors changes in the values ​​in the internal registers in real time. When the changes reach a preset synchronization threshold, the current values ​​in the internal registers are synchronized to the corresponding backup storage unit. During the initialization phase after the programmable logic controller is powered on again, the values ​​recorded in the backup storage unit are read and loaded into the internal register to enable the power-off resume transmission of data for the operation of the end-user cooling equipment.

[0059] To address this issue, this solution establishes a power-loss protection and data recovery mechanism based on non-volatile memory. Most PLCs provide on-chip non-volatile memory (such as EEPROM or Flash) or support the configuration of a "power-down retention register".

[0060] During implementation, firstly, a one-to-one backup storage unit (such as ER1000) is created for each volatile timing register (such as D1000) in the non-volatile storage area.

[0061] To avoid frequent writes to non-volatile memory (which would shorten its lifespan), synchronization is not performed every second, but rather using a threshold-triggered mechanism. For example, a synchronization threshold of 3600 can be set, representing one hour. The program compares the current value of the working register D1000 with the value stored in the backup unit ER1000 in real time. When the difference (D1000 - ER1000) is greater than or equal to 3600, the program performs a synchronization operation, writing the current value of D1000 completely into ER1000.

[0062] The data recovery logic is implemented in the PLC's startup program. During the first scan cycle after each power-on, the PLC executes a special initialization program block. The function of this program block is to transfer the values ​​in all non-volatile backup units (ER1000 to ER1255) back to the corresponding working registers (D1000 to D1255) one by one.

[0063] This mechanism ensures that even in the event of a sudden power outage, the amount of data lost is at most the incremental portion since the last synchronization (i.e., the portion less than the synchronization threshold, such as less than one hour of usage time), while the vast majority of usage time data accumulated over months or even years is safely preserved. When power is restored, the system can automatically resume accumulating from the last backup point, achieving "power outage resume" of billing data, greatly enhancing the robustness of the system and the reliability of the billing data.

[0064] Secondly, see Figure 2 The present invention also provides a cyclic scanning acquisition and timing system for performing the steps in any of the foregoing methods, including: The association module 210 is used to associate multiple terminal cooling devices to a logical node defined by the cross-defined row selection signal channel group and column read signal channel group respectively; The switching module 220 is used to cyclically switch the excitation state of each channel in the row selection signal channel group according to a preset timing sequence; The acquisition module 230 is used to synchronously acquire the feedback status of the column read signal channel group during the switching of excitation state; The determination module 240 is used to determine the operating status of the end-user cooling equipment on a specific logical node based on the correspondence between the row selection signal channel currently in the energized state and the column read signal channel that generates the feedback signal. The specific logical node refers to the logical node associated with the row selection signal channel in the energized state. The timing module 250 is used to preset timing variables for each logical node and accumulate the values ​​of the timing variables according to the determined running status.

[0065] The system clearly defines the hardware and software architecture for implementing cyclic scanning acquisition timing through modular functional division.

[0066] The associated module 210, at the physical level, mainly consists of field terminals, zone relay boxes, and signal cables connecting these components. Its core function is to accurately connect each end-user cooling device (such as the operating status output contacts of a fan coil unit) to the preset row and column intersections in the matrix network. For example, a zone relay box may contain multiple relays; one end of each relay's coil is connected to a row selection channel, one end of its normally open contact is connected to the signal output of the end-user device, and the other end is connected to a column read channel. This hardware wiring completes the mapping from physical devices to logical nodes.

[0067] The switching module 220's core entity is the CPU of a programmable logic controller (PLC) and its digital output (DO) module. The control program running inside the PLC, based on a preset scan cycle, controls internal coils to sequentially set different DO ports to high level, thereby driving the row selection signal channels to generate an excitation state. The software portion of this module is responsible for generating precise timing sequences to ensure that only one row channel is excited at a time and controlling the duration of the excitation.

[0068] The acquisition module 230 mainly consists of the PLC's digital input (DI) module. This module can sense the level changes of external input terminals in real time. When there is a feedback signal (high level) on a certain column read channel, the opto-isolation circuit inside the DI module will conduct and transmit this state change to the CPU. The CPU reads the state of all DI points in parallel within one scan cycle and stores these states in the input image area for use by the judgment module 240.

[0069] The determination module 240 is a purely software logic module that runs within the PLC's CPU. It obtains the currently activated row number from the switching module 220 and the status of all column channels from the acquisition module 230. By performing the aforementioned logical AND operation, this module can quickly decode which specific logical node's device is operating and output a status flag.

[0070] The timing module 250 is also a software module running inside the PLC. It manages a 32-bit internal data register for each logic node. When it receives the working status flag of a node from the judgment module 240, this module uses the PLC's system clock pulse to increment the register corresponding to that node, thereby accumulating the running time. Simultaneously, this module also includes logic for data backup and recovery with non-volatile memory to ensure data is not lost in the event of power failure.

[0071] These modules work together to form a complete, closed-loop automated monitoring and timing system, which can stably, economically, and efficiently complete the tasks of status monitoring and time statistics for large-scale terminal cooling equipment.

[0072] The above description is merely an embodiment of the present invention and is not intended to limit the scope of protection of the present invention. For those skilled in the art, the present invention can have various modifications and variations. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A cyclic scanning data acquisition and timing method for monitoring the status and timing of multiple end-user cooling devices, characterized in that, The method includes: Multiple terminal cooling devices are associated with logical nodes defined by the cross-defined row selection signal channel group and column read signal channel group, respectively. The excitation state of each channel in the row selection signal channel group is switched cyclically according to a preset timing sequence; During the switching of the excitation state, the feedback state of the column read signal channel group is collected synchronously; Based on the correspondence between the row selection signal channel currently in the energized state and the column read signal channel that generates the feedback signal, the operating status of the end-user cooling equipment on a specific logical node is determined. The specific logical node refers to the logical node associated with the row selection signal channel in the energized state. A timer variable is preset for each logical node, and the timer variable is incremented according to the determined running state.

2. The cyclic scanning acquisition and timing method according to claim 1, characterized in that, The row selection signal channel group corresponds to M output ports of the programmable logic controller, and the column read signal channel group corresponds to N input ports of the programmable logic controller, where M and N are positive integers; The step of associating multiple terminal cooling devices to logical nodes defined by the cross-defined row selection signal channel group and column read signal channel group includes: defining M×N independent logical nodes by combining the M output ports with the N input ports in a row-column cross-combination, and associating the M×N terminal cooling devices to the logical nodes one by one.

3. The cyclic scanning acquisition and timing method according to claim 2, characterized in that, The method further includes: By adding an expansion interface module to the programmable logic controller, the number of channels in the row selection signal channel group or the column read signal channel group can be increased linearly, thereby achieving dynamic expansion of the logic node size.

4. The cyclic scanning acquisition and timing method according to claim 1, characterized in that, The step of cyclically switching the excitation state of each channel in the row selection signal channel group according to a preset timing sequence includes: The row selection signal channel group is cyclically controlled to output high-level excitation states in milliseconds. In this process, only one of the row selection signal channels is controlled to output a high-level excitation state at any given time, while all other row selection signal channels are kept in a low-level inactive state.

5. The cyclic scanning acquisition and timing method according to claim 4, characterized in that, The step of synchronously acquiring the feedback status of the column read signal channel group during the switching of the excitation state includes: During the entire time window in which any of the row selection signal channels remains in a high-level excitation state, the instantaneous level state of the column read signal channel group is read synchronously and in parallel.

6. The cyclic scanning acquisition and timing method according to claim 1, characterized in that, The step of determining the operating status of the end-user cooling equipment on a specific logic node based on the correspondence between the row selection signal channel currently in the excitation state and the column read signal channel that generates the feedback signal includes: Identify and determine the row selection signal channel that is currently in a high-level excitation state; Based on the row selection signal channel currently in a high-level excitation state, and combined with the real-time level state of each column read signal channel, a logical AND operation is performed on each specific logic node; When the result of the logical AND operation is true, it is determined that the end-of-line cooling device on the specific logic node is in working state; the result of the logical AND operation being true means that the row selection signal channel corresponding to the specific logic node is currently in a high-level excitation state and the corresponding column read signal channel is currently in a high-level feedback state. Otherwise, the terminal cooling device corresponding to the specific logical node is determined to be in a non-working state.

7. The cyclic scanning acquisition and timing method according to claim 2, characterized in that, The step of presetting a timing variable for each logical node and accumulating the value of the timing variable according to the determined operating state includes: In the programmable logic controller, an independent internal register is pre-allocated for each logic node to store the preset timing variables of the logic node; For each of the logical nodes, whenever the logical node is a specific logical node and the associated terminal cooling device is in working state, the corresponding internal register is called, and the value in the internal register is accumulated using a pulse integral algorithm to convert the instantaneous working state of the terminal cooling device into continuous time-quantized data.

8. The cyclic scanning acquisition and timing method according to claim 7, characterized in that, The internal registers use a 32-bit unsigned data format; The step of accumulating the value in the internal register using the pulse integration algorithm includes: Using seconds as the smallest unit of time, the system determines that the end-user cooling device at a specific logic node is in working condition, and increments the internal register by one each time a consecutive second pulse signal arrives. The system utilizes 32-bit storage space to ensure that the timing variable does not overflow within the preset device lifecycle.

9. The cyclic scanning acquisition and timing method according to claim 7, characterized in that, The method further includes: A backup storage unit corresponding to each of the internal registers is opened in the non-volatile memory area of ​​the programmable logic controller; The changes in the value in the internal register are monitored in real time. When the changes reach a preset synchronization threshold, the current value in the internal register is synchronized to the corresponding backup storage unit. During the initialization phase after the programmable logic controller is powered on again, the values ​​recorded in the backup storage unit are read and loaded into the internal register to enable the power-off continuation of data transmission during the operation of the terminal cooling equipment.

10. A cyclic scanning acquisition and timing system for performing the steps of the method according to any one of claims 1 to 9, characterized in that, include: The association module is used to associate multiple end-user cooling devices with logical nodes defined by the cross-defined row selection signal channel group and column read signal channel group; The switching module is used to cyclically switch the excitation state of each channel in the row selection signal channel group according to a preset timing sequence; The acquisition module is used to synchronously acquire the feedback status of the column read signal channel group during the switching of the excitation state; The determination module is used to determine the operating status of the end-user cooling equipment on a specific logical node based on the correspondence between the row selection signal channel currently in the energized state and the column read signal channel that generates the feedback signal. The specific logical node refers to the logical node associated with the row selection signal channel in the energized state. The timing module is used to preset timing variables for each of the logical nodes and to accumulate the values ​​of the timing variables according to the determined running state.

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