A process for implementing a stepped pattern on a PCB product
Patent Information
- Application Number
- CN202611054404.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-15
- Publication Date
- 2026-09-25
AI Technical Summary
[0006]本发明提供一种在PCB产品上实现阶梯图形的工艺,解决了现在蚀刻工序中,阶梯槽线路易出现过蚀、断线、线宽偏差超标等品质缺陷的问题
[0033]本发明提供一种在PCB产品上实现阶梯图形的工艺,通过抗蚀金属层代替感光介质层,通过精密激光烧除抗蚀金属层形成图形,实现阶梯槽底部的图形转移,配合图形电镀流程,实现阶梯区域和非阶梯区域一起完成蚀刻过程,精密激光工艺流程简单,仅在正常图形电镀流程上增加1个精密激光烧除抗蚀金属层工艺流程,且加工的品质良好可控,线路品质优良,无任何负面加工问题。
Smart Images

Figure CN122825342A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of PCB manufacturing, and more particularly to a process for implementing stepped patterns on PCB products. Background Technology
[0002] As AI servers and data networks evolve towards higher speeds, and with the increase in SERDES speeds, high-speed products demand higher data processing capabilities. PCBs need to support higher frequency and higher speed signal transmissions, increasing from 800G to 1.6T. This leads to an increase in the number of PCB layers and board thickness. To reduce connector insertion space, meet rack slot spacing requirements, and ensure that the number of rack trays is not affected, the thickness of the I / O connection area needs to be limited.
[0003] The stepped design addresses the need for component assembly, ensuring that increased component space does not affect the number of rack trays. Simultaneously, as SERDES speeds increase and board thickness increases, signal transmission paths lengthen, leading to increased signal loss (SI). To shorten these transmission paths, a stepped design is employed to improve the SI level of high-speed I / O signals, bypassing the power layer and enabling direct connection between high-speed modules and the PCB's high-speed signal layer.
[0004] Traditional processes rely entirely on photosensitive media layers for pattern anti-corrosion protection when processing stepped and non-stepped areas simultaneously. However, stepped grooves are three-dimensional recessed structures with poor board surface flatness, which easily leads to uneven adhesion, wrinkles, hollow areas, and missing coating of the photosensitive media layer. This causes the anti-corrosion protection effect of the stepped groove area to fail. In the subsequent unified etching process, stepped groove lines are prone to quality defects such as over-etching, broken lines, and excessive line width deviations. Non-stepped planar lines are prone to problems such as residual copper and side etching. It is impossible to achieve synchronous and precise etching of stepped and non-stepped areas, resulting in a low product yield.
[0005] Therefore, it is necessary to provide a process for implementing stepped patterns on PCB products to solve the above-mentioned technical problems. Summary of the Invention
[0006] This invention provides a process for implementing stepped patterns on PCB products, which solves the quality defects such as over-etching, broken lines, and excessive line width deviation that are common in current etching processes for stepped groove lines.
[0007] To solve the above-mentioned technical problems, the present invention provides a process for implementing stepped patterns on PCB products, comprising the following steps:
[0008] S1: Inner layer graphic creation: Graphics are produced according to customer requirements;
[0009] S2: Pressing: Pressing and bonding on the stepped surface, and using high-temperature tape to stick to the stepped groove area to remove the stepped groove when it is on the outer layer;
[0010] S3: Drill holes: Drill all PTH holes;
[0011] S4: Cavity / Step: Blindly retrieve the tape from L1 to LX layer without reaching LX+1 layer. The high-temperature tape between LX and LX+1 is retrieved through the stepped groove process.
[0012] S5: Pattern plating: All holes are plated with copper. The non-stepped areas are patterned using a photosensitive medium layer, while the stepped groove areas are fully covered with a corrosion-resistant metal layer.
[0013] S6: Stepped Graphics: a) By optimizing the software of the precision laser machine, the path is optimized, and the corresponding graphic path is burned out according to the customer's design data;
[0014] b) The stepped area has electroplated holes. The electroplated holes in the stepped area are directly used as reference holes, and the position of the stepped graphic is automatically calculated based on the hole position.
[0015] c) There is a gap in copper thickness between the stepped surface and the top & bottom surface, which is mainly affected by the base copper and the outer layer process. The copper thickness difference between the stepped surface and the surface is calculated, and there will only be a case where the copper thickness of the stepped surface is greater than that of the surface copper. Copper reduction is performed during precision laser processing.
[0016] S7: Etching: All patterns are etched together in both stepped and non-stepped areas using alkaline etching;
[0017] S8: AOI inspection: Optical inspection is performed separately for stepped and non-stepped areas;
[0018] S9: Ink: The bottom of the steps needs to be covered with ink. The ink at the bottom of the stepped groove is achieved by spraying process, and the bottom ink pattern is transferred by LDI exposure.
[0019] S10: Surface treatment: Perform conventional surface treatments such as immersion gold, immersion tin, and OSP according to PCB standard procedures;
[0020] S11: Molding Electrical Testing: After the outer shape is formed by milling, perform routine electrical performance tests for continuity and insulation;
[0021] S12: Appearance inspection: Conduct a full inspection of the board surface, the inner wall of the stepped groove, the ink at the bottom of the groove, and the appearance of the circuit, and complete the finished product inspection.
[0022] Preferably, in step S3, if there is no POFV, all PTH holes are drilled at once; if there is a POFV design, all PTH holes are drilled in two drilling processes, with the PTH through holes drilled after the POFV drilling.
[0023] Preferably, the standard pattern electroplating process in step S5 is: lamination, exposure, development, pattern electroplating, and plating of an anti-corrosion metal layer.
[0024] Preferably, in step S6b), the design of the stepped area without electroplated holes uses the reference hole on the edge of the PNL board or the electroplated hole or pattern in the non-stepped area as a reference, and the hole position is automatically calculated.
[0025] Preferably, in step S6, c) the copper thickness deviation between the stepped surface and the Top & Bottom surface is less than or equal to 0.2 mil.
[0026] Preferably, in step S6, c) the synchronous etching requirement is met, and the compensation of the stepped surface is consistent with that of the outer layer.
[0027] Preferably, step S8 adopts a partitioned independent detection mode, dividing the PCB board surface into a stepped groove special area and a regular flat area, and performing optical scanning by matching exclusive detection parameters and defect judgment standards respectively.
[0028] Preferably, in step S9, there are designed texts at the bottom of the steps, and the text markings are achieved by welding the text during ink exposure.
[0029] Preferably, in step S9, a spraying process is used to fully cover the bottom of the tank with solder resist ink.
[0030] Preferably, after the ink is fully sprayed, LDI laser direct exposure imaging technology is used to complete the precise transfer of the ink pattern at the bottom of the tank, accurately forming the solder resist pattern at the bottom of the tank required by the customer.
[0031] Preferably, the aforementioned.
[0032] Compared with related technologies, the process for implementing stepped patterns on PCB products provided by this invention has the following advantages:
[0033] This invention provides a process for implementing stepped patterns on PCB products. By replacing the photosensitive dielectric layer with an anti-corrosion metal layer, the pattern is formed by burning off the anti-corrosion metal layer with a precision laser, thereby transferring the pattern at the bottom of the stepped groove. Combined with the pattern electroplating process, the stepped and non-stepped areas are etched together. The precision laser process is simple, adding only one precision laser process to the normal pattern electroplating process to burn off the anti-corrosion metal layer. The processing quality is good and controllable, the circuit quality is excellent, and there are no negative processing problems. Attached Figure Description
[0034] Figure 1 This is a schematic diagram of the structure of a first embodiment of a process for implementing stepped patterns on a PCB product according to the present invention.
[0035] Figure 2 This is a schematic diagram of a second embodiment of a process for implementing stepped patterns on PCB products provided by the present invention. Detailed Implementation
[0036] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0037] First Embodiment
[0038] Please refer to the following: Figure 1 ,in, Figure 1 This is a schematic diagram of a first embodiment of a process for implementing a stepped pattern on a PCB product according to the present invention. The process for implementing a stepped pattern on a PCB product includes the following steps:
[0039] S1: Inner layer graphic creation: Graphics are produced according to customer requirements;
[0040] S2: Pressing: Pressing and stepping surfaces adopt the Cavity process, which uses high-temperature tape to be attached to the step groove area to achieve the step groove being removed when the outer layer is applied.
[0041] S3: Drill holes: Drill all PTH holes;
[0042] S4: Cavity / Step: Blindly retrieve the tape from L1 to LX layer without reaching LX+1 layer. The high-temperature tape between LX and LX+1 is retrieved through the stepped groove process.
[0043] S5: Pattern plating: All holes (including those in the stepped groove area) are plated with copper (belonging to copper plating). Through the standard pattern plating process, the non-stepped areas are patterned using a photosensitive medium layer, while the stepped groove area is fully covered with a corrosion-resistant metal layer.
[0044] S6: Stepped pattern: a) By optimizing the software of the precision laser machine, the path is optimized and the corresponding pattern path is burned out according to the customer's design data. This mode adopts the negative film mode. The area where the anti-corrosion metal layer is burned is the area to be etched, and the area that has not been passed through the precision laser is the area of the customer's designed pattern.
[0045] b) The stepped area has electroplated holes. The electroplated holes in the stepped area are directly used as reference holes, and the position of the stepped graphic is automatically calculated based on the hole position.
[0046] c) There is a gap in copper thickness between the stepped surface and the top & bottom surfaces, mainly affected by the base copper and the outer layer process. The copper thickness difference between the stepped surface and the surface is calculated, and there will only be a case where the copper thickness of the stepped surface is greater than that of the surface copper. Copper reduction is performed during precision laser processing to ensure that the theoretical deviation of the copper thickness between the stepped surface and the top & bottom surfaces is <= 0.2mil, which meets the requirements of synchronous etching. Under normal circumstances, the compensation of the stepped surface is consistent with that of the outer layer.
[0047] S7: Etching: All patterns are etched together in both stepped and non-stepped areas using alkaline etching;
[0048] S8: AOI inspection: Optical inspection is performed separately for stepped and non-stepped areas;
[0049] S9: Ink: The bottom of the steps needs to be covered with ink. The ink at the bottom of the stepped groove is achieved by spraying process, and the bottom ink pattern is transferred by LDI exposure.
[0050] S10: Surface treatment: Perform conventional surface treatments such as immersion gold, immersion tin, and OSP according to PCB standard procedures;
[0051] S11: Molding Electrical Testing: After the outer shape is formed by milling, perform routine electrical performance tests for continuity and insulation;
[0052] S12: Appearance inspection: Conduct a full inspection of the board surface, the inner wall of the stepped groove, the ink at the bottom of the groove, and the appearance of the circuit, and complete the finished product inspection.
[0053] Using an anti-corrosion metal layer as the medium for transferring the pattern at the bottom of the stepped groove, the stepped surface pattern is formed by alkaline etching, thus realizing the stepped pattern structure.
[0054] In step S3, if there is no POFV, all PTH holes are drilled at once. If there is a POFV design, all PTH holes are drilled in two drilling processes, after drilling the PTH through holes following the POFV.
[0055] The standard pattern electroplating process in step S5 is as follows: lamination, exposure, development, pattern electroplating, and plating of an anti-corrosion metal layer.
[0056] In step S6b), the design of electroplated holes in the stepped area is used to capture the reference hole on the edge of the PNL board or the electroplated hole or pattern in the non-stepped area as a reference, and the hole position is automatically calculated.
[0057] To ensure the positional accuracy of the stepped area graphic, two alignment methods are used:
[0058] Method 1: The stepped area has electroplated holes. The electroplated holes in the stepped area are directly used as reference holes, and the position of the stepped pattern is automatically calculated based on the hole position.
[0059] Method 2: Design without electroplated holes in stepped areas. Use the reference hole on the edge of the PNL board or the electroplated hole or pattern in the non-stepped area as a reference, and automatically calculate based on the hole position.
[0060] In step S6, c) satisfies the requirement for synchronous etching, and the compensation of the stepped surface is consistent with that of the outer layer.
[0061] In step S8, a partitioned independent detection mode is adopted, which divides the PCB board surface into a special stepped groove area and a regular flat area, and performs optical scanning by matching exclusive detection parameters and defect judgment standards to each area.
[0062] In step S9, there are designed texts at the bottom of the steps, and the text markings are achieved by welding the text during ink exposure.
[0063] The steps for precision laser ablation of the corrosion-resistant metal layer are as follows:
[0064] 1) The design of the bottom of the stepped groove needs to be compensated according to the copper thickness to complete the working draft of the precision laser pre-processing data;
[0065] 2) The software for precision laser equipment needs to allow for free setting of the number of outer rings, the spacing between rings, and the spacing of the internal laser path. The distance between the outer ring and the outer contour of the original data needs to be flexibly adjusted to convert the working draft of the bottom data of the stepped groove into a precision laser program.
[0066] 3) Select the through hole in the stepped groove area as the reference hole, set the precision laser energy, and burn out the relevant pattern;
[0067] 4) After the anti-corrosion metal layer is burned off by precision laser, the copper surface of the area to be etched is exposed. This allows the outer layer to be etched simultaneously during the etching process, and the pattern at the bottom of the stepped groove is completed together with the outer layer pattern during the outer layer etching process.
[0068] The following three points ensure the quality of the precision laser ablation process for the corrosion-resistant metal layer:
[0069] A: Positioning System: Divided into two modes: stepped areas with PTH holes and stepped areas without holes but only patterns. When there are PTH holes in the stepped area, the PTH hole closest to the edge of the four corners of the stepped area is directly selected as the reference hole for precision laser. The system automatically adjusts the hole position and pulls it in and out according to the hole position. Based on the precision program path, the relevant pattern is burned out. In this way, the hole and pattern positions in the stepped area are optimal. When there are no holes in the stepped area but only relevant patterns, the PNL reference hole and the PTH hole near the stepped area are used as the reference hole for precision laser. This ensures that the pattern position tolerances in the stepped area and non-stepped area are consistent. The system also automatically adjusts the relative pull value according to the actual pull of the reference hole, thus ensuring the position of the pattern and the hole.
[0070] B: Treatment methods for stepped surfaces and differences in surface copper thickness
[0071] The stepped and non-stepped areas undergo different plating processes, only sharing the same electroplating process on the outer layer. The outer layer L1 / Ln may have a sub-board process, while the stepped Lx+1 layer starts plating from base copper. During the outer layer pattern plating, the L1 / Ln pattern is protected by a photosensitive medium during the double copper plating, while the stepped surface, lacking this protection, undergoes an additional copper plating layer. This results in a copper thickness difference between the three surfaces: L1 (Top), Lx+1 (Stepped), and Ln (Bottom). To simultaneously reduce the copper layer on the stepped surface while burning out the resist metal layer with a precision laser, copper reduction can be achieved by adjusting the precision laser parameters and operating conditions, ensuring pattern accuracy. At the same time, by controlling the base copper and the amount of thinning before the outer layer on the three surfaces L1, Lx+1, and Ln, the difference in copper thickness among the three surfaces can be reduced. Finally, when the resist metal layer is burned off by the precision laser, the copper thickness of the stepped surface and the copper thickness of the outer layer are adjusted to the same theoretical center value, solving the problem of asynchronous etching.
[0072] C: Precision laser path optimization
[0073] The precision laser equipment boasts powerful software capabilities, featuring a unique processing path for stepped areas, significantly improving processing results. It optimizes the trajectory and enhances processing efficiency. Using different spot sizes (15µm, 20µm, 25µm, or 30µm), it can execute over a million laser paths within the burning area. The software system's powerful graphic editing function provides intuitive, convenient, and rapid data processing, allowing for further path optimization. The distance between the outer ring and the original data's outer contour can be flexibly adjusted. The number of outer rings, the spacing between rings, and the internal laser path can all be freely set as needed, ensuring that the outer ring is a complete circle. This ensures that the graphic is smooth and even after precision laser processing, guaranteeing excellent processing quality for stepped areas.
[0074] The working principle of the process for implementing stepped patterns on PCB products provided by this invention is as follows:
[0075] When using it, S1: Inner layer graphic creation: Create graphics according to customer requirements;
[0076] S2: Pressing: Pressing and bonding on the stepped surface, and using high-temperature tape to stick to the stepped groove area to remove the stepped groove when it is on the outer layer;
[0077] S3: Drill holes: Drill all PTH holes;
[0078] S4: Cavity / Step: Blindly retrieve the tape from L1 to LX layer without reaching LX+1 layer. The high-temperature tape between LX and LX+1 is retrieved through the stepped groove process.
[0079] S5: Pattern plating: All holes are plated with copper. The non-stepped areas are patterned using a photosensitive medium layer, while the stepped groove areas are fully covered with a corrosion-resistant metal layer.
[0080] S6: Stepped Graphics: a) By optimizing the software of the precision laser machine, the path is optimized, and the corresponding graphic path is burned out according to the customer's design data;
[0081] b) The stepped area has electroplated holes. The electroplated holes in the stepped area are directly used as reference holes, and the position of the stepped graphic is automatically calculated based on the hole position.
[0082] c) There is a gap in copper thickness between the stepped surface and the top & bottom surface, which is mainly affected by the base copper and the outer layer process. The copper thickness difference between the stepped surface and the surface is calculated, and there will only be a case where the copper thickness of the stepped surface is greater than that of the surface copper. Copper reduction is performed during precision laser processing.
[0083] S7: Etching: All patterns are etched together in both stepped and non-stepped areas using alkaline etching;
[0084] S8: AOI inspection: Optical inspection is performed separately for stepped and non-stepped areas;
[0085] S9: Ink: The bottom of the steps needs to be covered with ink. The ink at the bottom of the stepped groove is achieved by spraying process, and the bottom ink pattern is transferred by LDI exposure.
[0086] S10: Surface treatment: Perform conventional surface treatments such as immersion gold, immersion tin, and OSP according to PCB standard procedures;
[0087] S11: Molding Electrical Testing: After the outer shape is formed by milling, perform routine electrical performance tests for continuity and insulation;
[0088] S12: Appearance inspection: Conduct a full inspection of the board surface, the inner wall of the stepped groove, the ink at the bottom of the groove, and the appearance of the circuit, and complete the finished product inspection.
[0089] Compared with related technologies, the process for implementing stepped patterns on PCB products provided by this invention has the following advantages:
[0090] This invention provides a process for implementing stepped patterns on PCB products. By replacing the photosensitive dielectric layer with an anti-corrosion metal layer, the pattern is formed by burning off the anti-corrosion metal layer with a precision laser, thereby transferring the pattern at the bottom of the stepped groove. Combined with the pattern electroplating process, the stepped and non-stepped areas are etched together. The precision laser process is simple, adding only one precision laser process to the normal pattern electroplating process to burn off the anti-corrosion metal layer. The processing quality is good and controllable, the circuit quality is excellent, and there are no negative processing problems.
[0091] Second Embodiment
[0092] Please refer to the following: Figure 2 Based on the first embodiment of this application, which provides a process for implementing stepped patterns on a PCB product, the second embodiment of this application proposes another process for implementing stepped patterns on a PCB product. The second embodiment is merely a preferred embodiment of the first embodiment, and the implementation of the second embodiment will not affect the separate implementation of the first embodiment.
[0093] Specifically, the second embodiment of this application provides a different process for implementing stepped patterns on PCB products, in that the S9 step uses a spraying process to fully cover the bottom of the groove with solder resist ink.
[0094] After the ink is fully sprayed, LDI laser direct exposure imaging technology is used to complete the precise transfer of the ink pattern at the bottom of the tank, accurately forming the solder resist pattern at the bottom of the tank required by the customer.
[0095] By using a solder resist spraying process to fully cover the bottom of the stepped groove, it can adapt to the irregular three-dimensional structure of the groove bottom, effectively avoiding the problems of suspension, wrinkles, and poor adhesion that exist in traditional dry film lamination. It ensures that the solder resist ink layer at the bottom of the groove is of uniform thickness, the board surface is dense without bubbles, pinholes, or local missing coating defects, and guarantees the basic insulation and protection performance of the bottom of the stepped groove.
[0096] After the ink has cured, the high-precision LDI laser direct exposure imaging technology is used to complete the fine pattern transfer of the bottom of the tank. No film is required. The bottom window, sealing hole and circuit solder mask pattern can be accurately matched according to the customer's design data. This effectively solves the quality problems of traditional film exposure process, such as pattern deformation, edge jaggedness, development residue, local missing printing and misalignment caused by insufficient depth of field and light scattering.
[0097] This results in strong adaptability, high graphic precision, and high yield rate. It can stably achieve solder mask forming at the bottom of stepped grooves with fine pitch and complex structures, greatly improving the insulation protection stability of the stepped area and the consistency of product appearance, and adapting to the mass production needs of high-precision stepped PCBs.
[0098] Compared with related technologies, the process for implementing stepped patterns on PCB products provided by this invention has the following advantages:
[0099] This invention provides a process for implementing stepped patterns on PCB products. By using a solder resist spraying process to fully cover the bottom of the stepped groove, it can adapt to the irregular three-dimensional structure of the groove bottom. It effectively avoids the problems of suspension, wrinkles, and poor adhesion that exist in traditional dry film lamination, ensuring that the solder resist ink layer at the bottom of the groove is of uniform thickness, the board surface is dense without bubbles, pinholes, or local missing coating defects, and ensuring the basic insulation and protection performance of the bottom of the stepped groove.
[0100] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural or procedural transformations made based on the content of the present invention's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present invention.
Claims
1. A process for implementing stepped patterns on PCB products, characterized in that, Including: the following step: S1: Inner layer graphic creation: Graphics are produced according to customer requirements; S2: Pressing: Pressing and bonding on the stepped surface, and using high-temperature tape to stick to the stepped groove area to remove the stepped groove when it is on the outer layer; S3: Drill holes: Drill all PTH holes; S4: Cavity / Step: Blindly retrieve the tape from L1 to LX layer without reaching LX+1 layer. The high-temperature tape between LX and LX+1 is retrieved through the stepped groove process. S5: Pattern plating: All holes are plated with copper. The non-stepped areas are patterned using a photosensitive medium layer, while the stepped groove areas are fully covered with a corrosion-resistant metal layer. S6: Stepped Graphics: a) By optimizing the software of the precision laser machine, the path is optimized, and the corresponding graphic path is burned out according to the customer's design data; b) The stepped area has electroplated holes. The electroplated holes in the stepped area are directly used as reference holes, and the position of the stepped graphic is automatically calculated based on the hole position. c) There is a gap in copper thickness between the stepped surface and the top & bottom surface, which is mainly affected by the base copper and the outer layer process. The copper thickness difference between the stepped surface and the surface is calculated, and there will only be a case where the copper thickness of the stepped surface is greater than that of the surface copper. Copper reduction is performed during precision laser processing. S7: Etching: All patterns are etched together in both stepped and non-stepped areas using alkaline etching; S8: AOI inspection: Optical inspection is performed separately for stepped and non-stepped areas; S9: Ink: The bottom of the steps needs to be covered with ink. The ink at the bottom of the stepped groove is achieved by spraying process, and the bottom ink pattern is transferred by LDI exposure. S10: Surface treatment: Complete conventional surface treatments such as immersion gold, immersion tin, and OSP according to PCB standard procedures; S11: Molding Electrical Testing: After the outer shape is formed by milling, perform routine electrical performance tests for continuity and insulation; S12: Appearance inspection: Conduct a full inspection of the board surface, the inner wall of the stepped groove, the ink at the bottom of the groove, and the appearance of the circuit, and complete the finished product inspection.
2. The process for implementing stepped patterns on a PCB product according to claim 1, characterized in that, In step S3, if there is no POFV, all PTH holes are drilled at once. If there is a POFV design, all PTH holes are drilled in two drilling processes, after drilling the PTH through holes following the POFV.
3. The process for implementing stepped patterns on a PCB product according to claim 1, characterized in that, The standard pattern electroplating process in step S5 is as follows: lamination, exposure, development, pattern electroplating, and plating of an anti-corrosion metal layer.
4. The process for implementing stepped patterns on a PCB product according to claim 1, characterized in that, In step S6b), the design of electroplated holes in the stepped area is used to capture the reference hole on the edge of the PNL board or the electroplated hole or pattern in the non-stepped area as a reference, and the hole position is automatically calculated.
5. The process for implementing stepped patterns on a PCB product according to claim 4, characterized in that, In step S6, c) the copper thickness deviation between the stepped surface and the Top & Bottom surface is less than or equal to 0.2 mil.
6. The process for implementing stepped patterns on a PCB product according to claim 1, characterized in that, In step S6, c) satisfies the requirement for synchronous etching, and the compensation of the stepped surface is consistent with that of the outer layer.
7. The process for implementing stepped patterns on a PCB product according to claim 1, characterized in that, In step S8, a partitioned independent detection mode is adopted, which divides the PCB board surface into a special stepped groove area and a regular flat area, and performs optical scanning by matching exclusive detection parameters and defect judgment standards to each area.
8. The process for implementing stepped patterns on a PCB product according to claim 1, characterized in that, In step S9, there are designed texts at the bottom of the steps, and the text markings are achieved by welding the text during ink exposure.
9. The process for implementing stepped patterns on a PCB product according to claim 8, characterized in that, In step S9, a spraying process is used to fully cover the bottom of the tank with solder resist ink.
10. The process for implementing stepped patterns on a PCB product according to claim 9, characterized in that, After the ink is fully sprayed, LDI laser direct exposure imaging technology is used to complete the precise transfer of the ink pattern at the bottom of the tank, accurately forming the solder resist pattern at the bottom of the tank required by the customer.