Photoelectric conversion apparatus, photoelectric conversion system, and mobile body

Abstract

The present application relates to a photoelectric conversion apparatus, a photoelectric conversion system, and a mobile body. The photoelectric conversion apparatus includes a first substrate having a first semiconductor device layer including a plurality of photoelectric conversion units and a well, and a second substrate having a second semiconductor device layer including a circuit configured to process a signal obtained by the plurality of photoelectric conversion units, wherein the first substrate and the second substrate are laminated together, wherein the first semiconductor device layer includes an effective pixel region, an optical black pixel region, and a peripheral region, wherein, in a plan view, a light-shielding region formed by a light-shielding layer overlaps with the optical black pixel region and does not overlap with the peripheral region, wherein the peripheral region has a charge drain region including a semiconductor region of the same conductive type as a signal charge, and wherein a fixed potential is supplied to the charge drain region.

Description

[0001] (This application is a divisional application of the application filed on October 28, 2021, with application number 2021112652627, entitled "Photoelectric Conversion Device, Photoelectric Conversion System and Mobile Body".) Technical Field

[0002] This invention relates to photoelectric conversion devices, photoelectric conversion systems, and mobile bodies. Background Technology

[0003] A photoelectric conversion device is known to have an effective pixel region comprising multiple pixels and an optically black (OB) region arranged around the effective pixel region and shielded from light. Japanese Patent Application Laid-Open No. 2011-97418 describes a back-illuminated photoelectric conversion device. In this back-illuminated photoelectric conversion device, light is incident from a surface of a semiconductor substrate opposite to the surface on which the wiring layer is disposed. According to Japanese Patent Application Laid-Open No. 2011-97418, charge-discharge pixels are arranged between the effective pixel region and the OB region. These charge-discharge pixels discharge signal charge leaking from the effective pixel region to the region between the effective pixel region and the OB region or to the OB region. These charge-discharge pixels forcibly discharge signal charge leaking from the effective pixel region.

[0004] Japanese Patent Application Publication No. 2011-97418 discusses excess charge mixing into the OB region from the effective pixel region, but it does not discuss excess charge mixing into the OB region from its periphery. In other words, as described in Japanese Patent Application Publication No. 2011-97418, when OB pixels are placed at the ends of the substrate, if signal charge generated around the OB region mixes into the OB region, the black level reference signal will fluctuate. Therefore, it is also necessary to prevent excess charge from mixing into the OB region. In particular, in the case of laminated photoelectric conversion devices, it is not necessary to place signal processing circuitry for processing signals output from pixels around the OB region. Therefore, the effects of the present invention become even more significant. Summary of the Invention

[0005] This invention relates to a photoelectric conversion device for preventing excess charge from entering the OB region in a laminated photoelectric conversion device and for more accurate detection of the black level reference signal.

[0006] According to an aspect of the present invention, a photoelectric conversion device includes: a first substrate having a first semiconductor device layer, the first semiconductor device layer including a plurality of photoelectric conversion units and a well arranging the plurality of photoelectric conversion units; and a second substrate having a second semiconductor device layer, the second semiconductor device layer including circuitry configured to process signals obtained by the plurality of photoelectric conversion units, wherein the first substrate and the second substrate are laminated together, wherein the first semiconductor device layer includes an effective pixel region, an optical black pixel region, and an outer peripheral region, the effective pixel region having the plurality of photoelectric conversion units, the optical black pixel region being disposed between an end of the effective pixel region and the first semiconductor device layer and having the plurality of photoelectric conversion units, the outer peripheral region being disposed between an end of the optical black pixel region and the first semiconductor device layer, wherein, in a plan view, a light-shielding region formed by a light-shielding layer overlaps with the optical black pixel region, and the light-shielding region does not overlap with the outer peripheral region, wherein the outer peripheral region has a charge discharge region, the charge discharge region including a semiconductor region of the same conductivity type as the signal charge, and wherein a fixed potential is supplied to the charge discharge region.

[0007] A photoelectric conversion system includes: the photoelectric conversion device according to the above description; and a signal processing unit configured to process a signal output from the photoelectric conversion device.

[0008] A mobile body includes: the photoelectric conversion device according to the above; a distance information acquisition unit configured to acquire distance information related to the distance relative to an object based on a signal from the photoelectric conversion device; and a control unit configured to control the mobile body based on the distance information.

[0009] Further features of the invention will become apparent from the following description of typical embodiments with reference to the accompanying drawings. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of the semiconductor substrate of the photoelectric conversion device according to the first embodiment.

[0011] Figure 2 This is a schematic top view of a semiconductor substrate according to the first embodiment.

[0012] Figure 3 It is along Figure 2 A schematic cross-sectional view of X-X' in the diagram.

[0013] Figure 4 This is a schematic top view of a semiconductor substrate according to the second embodiment.

[0014] Figure 5 It is along Figure 4 A schematic cross-sectional view of X-X' in the diagram.

[0015] Figure 6 This is a schematic top view of a semiconductor substrate according to the third embodiment.

[0016] Figure 7 It is along Figure 6 A schematic cross-sectional view of X-X' in the diagram.

[0017] Figure 8 This is a schematic cross-sectional view of the photoelectric conversion device according to the fourth embodiment.

[0018] Figure 9 This is a schematic cross-sectional view of the photoelectric conversion device according to the fifth embodiment.

[0019] Figure 10 This is a schematic cross-sectional view of the photoelectric conversion device according to the sixth embodiment.

[0020] Figure 11 This is a schematic plan view of the light-shielding layer of the photoelectric conversion device according to the sixth embodiment.

[0021] Figure 12 This is a schematic plan view of another example of the light-shielding layer of the photoelectric conversion device according to the sixth embodiment.

[0022] Figure 13 This is a block diagram illustrating a photoelectric conversion system according to the seventh embodiment.

[0023] Figure 14A and Figure 14B This is a block diagram illustrating a photoelectric conversion system according to the eighth embodiment.

[0024] Figure 15 This is a flowchart of the photoelectric conversion system according to the eighth embodiment. Detailed Implementation

[0025] The embodiments shown below are merely embellishments of the technical concept of the present invention and are not intended to limit the invention. The sizes of the components and the positional relationships between them shown in the accompanying drawings are exaggerated in some cases for clarity. In the following description, similar components are designated by the same reference numerals, and their descriptions are omitted.

[0026] In the following description, the semiconductor region of the first conductivity type in which the majority carriers of the same conductivity type as the signal charge are N-type semiconductor regions, and the semiconductor region of the second conductivity type is a P-type semiconductor region. The invention also applies when the signal charge is a hole. In this case, the semiconductor region of the first conductivity type in which the majority carriers of the same conductivity type as the signal charge are P-type semiconductor regions, and the semiconductor region of the second conductivity type is an N-type semiconductor region.

[0027] In the specification and claims, the term "impurity concentration" means the net impurity concentration compensated by impurities of the opposite conductivity type. That is, "impurity concentration" refers to the net doping concentration. Regions with a higher concentration of P-type added impurities than N-type added impurities are P-type semiconductor regions. Conversely, regions with a higher concentration of N-type added impurities than P-type added impurities are N-type semiconductor regions.

[0028] In this specification, a "plan view" refers to a view taken in a direction perpendicular to the light incident surface of the semiconductor substrate. A "section" refers to a surface in a direction perpendicular to the light incident surface of the semiconductor substrate. In cases where the light incident surface of the semiconductor substrate is rough when viewed microscopically, the plan view is defined based on the light incident surface of the semiconductor substrate when viewed macroscopically.

[0029] In this specification, the depth direction is the direction from the light incident surface (first surface) of the semiconductor substrate toward the side of the semiconductor substrate on which the transistors are arranged (second surface).

[0030] The first embodiment will be described. Figure 1 A photoelectric conversion device 500 according to a first embodiment is shown. The photoelectric conversion device 500 is a semiconductor device integrated circuit (IC). The photoelectric conversion device 500 according to this embodiment can be used as, for example, an image sensor, a light sensor, or a distance sensor.

[0031] The photoelectric conversion device 500 is a laminated photoelectric conversion device in which all or part of substrates 1 and 2 are laminated and bonded together. Substrates 1 and 2 can be in the state of a chip obtained by dicing a wafer after lamination, or they can be in the state of a wafer. The photoelectric conversion device 500 is a laminated back-illuminated photoelectric conversion device.

[0032] Substrate 1 has a semiconductor device layer 11 (first semiconductor device layer) and a wiring structure 12 (first wiring structure), wherein the semiconductor device layer 11 includes pixel circuitry included in pixel 10. In this specification, "semiconductor device layer" includes not only the semiconductor layer but also the gate of a transistor formed within the semiconductor layer. Wiring layers in the wiring structure are not included in the "semiconductor device layer". Substrate 2 has a wiring structure 24 (second wiring structure) and a semiconductor device layer 23 (second semiconductor device layer) including an electrical circuit. As described below, the wiring structure 12 of substrate 1 and the wiring structure 24 of substrate 2 are joined together by metal bonding portions formed by bonding the wiring layers included in wiring structures 12 and 24. Each metal bonding portion is a structure in which the metal forming the wiring layer is directly bonded together.

[0033] Although details will be provided below, the components included in pixel 10 are arranged in semiconductor device layer 11. Some components of pixel 10 may be arranged in semiconductor device layer 11, and others may be arranged in semiconductor device layer. In this case, examples of components of the pixel circuit arranged in semiconductor device layer 11 in pixel 10 include photoelectric conversion elements such as photodiodes. In the plan view, the pixel circuit including photoelectric conversion elements is arranged in a two-dimensional array in semiconductor device layer 11. Semiconductor device layer 11 includes pixel regions in which multiple pixel circuits are arranged in a two-dimensional array. Figure 1 In the semiconductor device layer 11, multiple photoelectric conversion elements included in multiple pixel circuits are arranged in a two-dimensional array along the row and column directions.

[0034] Wiring structure 12 includes M (M is an integer greater than or equal to 1) wiring layers and interlayer insulation material. Wiring structure 24 includes N (N is an integer greater than or equal to 1) wiring layers and interlayer insulation material.

[0035] Semiconductor device layer 23 includes an electrical circuit for processing signals obtained from photoelectric conversion units arranged in semiconductor device layer 11. For ease of explanation, in... Figure 1 In this context, the components shown on the top of substrate 2 are those arranged in the semiconductor device layer 23. For example, the electrical circuit is... Figure 1 Any one of the transistors included in the row scanning circuit 20, column scanning circuit 21, and signal processing circuit 22 shown. For example, the signal processing circuit 22 is at least one of an amplifier circuit, a selection circuit, a logic operation circuit, an analog-to-digital (AD) conversion circuit, a memory, circuits for performing compression and synthesis processing, and some components of the pixel 10 (such as an amplifying transistor, a selection transistor, and a reset transistor).

[0036] Pixel 10 can refer to the smallest unit of circuitry repeatedly configured to form an image. The pixel circuitry included in each pixel 10 and arranged in the semiconductor device layer 11 only needs to include at least a photoelectric conversion element. The pixel circuitry can include components other than the photoelectric conversion element. For example, the pixel circuitry can also include at least one of a transfer transistor, a floating diffuser (FD), a reset transistor, an amplifying transistor, a capacitance transistor, and a selection transistor. Typically, a pixel 10 includes a selection transistor and a set of elements connected to a signal line via the selection transistor. That is, the selection transistor can be the outer edge of the pixel circuitry. Optionally, a group of photoelectric conversion elements and transfer transistors can also be included in a pixel 10. Further alternatively, a pixel 10 can include a group of one or more photoelectric conversion elements and a single amplification circuit or a single analog-to-digital (AD) conversion circuit.

[0037] Figure 2 A schematic top view of the end of the semiconductor device layer 11 according to the first embodiment is shown. In the pixel region of the semiconductor device layer 11, an effective pixel region 100 and an optical black pixel region 101 are provided. Effective pixels that use signal charges incident on the effective pixels as signals are arranged in the effective pixel region 100, and optical black pixels (OB pixels) that detect black level reference values ​​are arranged in the optical black pixel region 101. In the OB pixel region 101, a light-shielding layer 13 is provided. In the plan view, the light-shielding layer 13 is placed around the effective pixel region 100 and blocks light incident on the photoelectric conversion unit in the OB pixel region 101. In other words, in the plan view, the light-shielding area formed by the light-shielding layer 13 overlaps with the OB pixel region 101. "Surrounding" does not need to be the entire surrounding area, but only needs to be at least any portion of the top, bottom, left, right, or right sides of the effective pixel region 100. Furthermore, in the following description, unless otherwise stated, "surrounding" also includes portions that are not the entire surrounding area. "Light shielding" is not limited to 100% light shielding, and for example refers to 50% or more light shielding.

[0038] Within the semiconductor device layer 11, a well region 14 and an outer peripheral region 15 surrounding the well region 14 are arranged. In a plan view, the light-shielding region formed by the light-shielding layer 13 does not overlap with the outer peripheral region 15. In this embodiment, the outer peripheral region 15 and the light-shielding region do not completely overlap in a plan view, but can partially overlap as described in the embodiments below. At least a portion of the pixel 10 is formed in the well region 14. A pad portion 16 is provided in the outer peripheral region 15.

[0039] Pads 16 are disposed between the end of the semiconductor device layer 11 and the well region 14. In a plan view, the shortest distance L1 between the semiconductor device layer 11 and the light-shielding layer 13 is, for example, greater than or equal to 100 μm and less than or equal to 250 μm. It is desirable that the shortest distance L1 be greater than or equal to 100 μm and less than or equal to 150 μm. In a plan view, the shortest distance L2 between the center of each pad 16 and the light-shielding layer 13 is, for example, greater than or equal to 30 μm and less than or equal to 200 μm. It is desirable that the shortest distance L2 be greater than or equal to 50 μm and less than or equal to 100 μm. To avoid formation failure due to manufacturing errors during pad formation, a predetermined distance or greater is required. On the other hand, to expand the area of ​​the effective pixel region 100 without expanding the area of ​​the semiconductor device layer 11, it is desirable that the shortest distance L2 be a predetermined distance or less. The center of the pad 16 refers to the center of the groove in the pad. Although details will be explained later, the shorter the distance between the center of the pad 16 and the OB pixel region 101, the more significant the effect of this embodiment. The shortest distance L3 between the center of the pad 16 and the pixel 10 in the OB pixel region 101 is, for example, greater than or equal to 100 μm and less than or equal to 500 μm. It is desirable that the shortest distance L3 be greater than or equal to 250 μm and less than or equal to 350 μm.

[0040] Figure 3 Show along Figure 2 A schematic cross-sectional view taken by line X-X'. Substrates 1 and 2 are bonded and laminated together on bonding surface 3. Wiring structure 12 of substrate 1 and wiring structure 24 of substrate 2 are located between semiconductor device layer 11 of substrate 1 and semiconductor device layer 23 of substrate 2. Figure 3 In the above, the wiring structure 12 includes three wiring layers 121, 122 and 123, and the wiring structure 24 includes three wiring layers 241, 242 and 243.

[0041] The wiring structure 12 includes three wiring layers 121, 122, and 123. Wiring layers 121, 122, and 123 can be, for example, copper (Cu) wiring layers. Figure 3 In the wiring layer 123, a metal portion 31 of a metal junction 30 is formed. The metal portion 31 is embedded in a recess formed in the interlayer insulating film, and each has a matte (Damascene) structure.

[0042] The wiring structure 24 includes three wiring layers 241, 242, and 243. Wiring layers 241, 242, and 243 can be Cu wiring layers. Figure 3 In the wiring layer 243, a metal portion 32 of a metal junction 30 is formed. The metal portion 32 is embedded in a recess formed in the interlayer insulating film, and each has an inlay structure.

[0043] An interlayer insulating film including a recess with a metal portion 31 and an interlayer insulating film including a recess with a metal portion 32 are joined (in contact) to each other through the metal portions 31 and 32. The metal joint portion 30 is formed by joining the metal portions 31 and 32.

[0044] The via plug 124 formed in the interlayer insulating film of wiring layer 123 enables electrical conductivity between the metal portions 31 and wiring layer 122. The via plug 244 formed in the interlayer insulating film of wiring layer 243 enables electrical conductivity between the metal portions 32 and wiring layer 242. The metal junction 30 to which the via plugs 124 and 244 are connected electrically connects to semiconductor device layers 11 and 23.

[0045] For example, wiring layer 123 includes: wiring pattern 123a, which is connected to the wiring pattern of an upper wiring layer above wiring layer 123; and wiring pattern 123b, which is not connected to the wiring pattern of the upper wiring layer above wiring layer 123. Wiring layer 243 includes: wiring pattern 243a, which is connected to the wiring pattern of a lower wiring layer below wiring layer 243; and wiring pattern 243b, which is not connected to the wiring pattern of the lower wiring layer below wiring layer 243. For example, in Figure 3 In this configuration, wiring pattern 123a is connected to the wiring pattern of the upper wiring layer above it via through-hole plug 124. Wiring pattern 243a is connected to the wiring pattern of the lower wiring layer below it via through-hole plug 244. The through-hole plug is not required, and the wiring patterns can be connected to the wiring patterns of the upper or lower layer in direct contact with each other.

[0046] exist Figure 3 In the diagram, wiring patterns 123a and 243a are electrically connected to semiconductor device layers 11 and 23. None of the wiring patterns 123a and 243a need to be connected to semiconductor device layers 11 and 23, and a portion of the wiring patterns 123a and 243a may be connected to either semiconductor device layer 11 or 23. Optionally, a portion of the wiring patterns 123a and 243a may be connected to any wiring layer, and may not be connected to any semiconductor device layer 11 or 23.

[0047] like Figure 3 As shown, the semiconductor device layer 11 includes a well region 14 with a well 19 disposed thereon, and an outer peripheral region 15 located between the end of the semiconductor device layer 11 and the well region 14. For example, the well 19 is a region doped with P-type impurities by ion implantation, and the outer peripheral region 15 is a region without wells 19 disposed thereon. The outer peripheral region 15 is an N-type semiconductor region, or a region having a P-type impurity concentration lower than that of the well 19.

[0048] In well 19, multiple photoelectric conversion units of effective pixel region 100 and multiple photoelectric conversion units of OB pixel region 101 are arranged. In well region 14, effective pixel region 100 and OB pixel region 101 are arranged. In OB pixel region 101, a light-shielding layer 13 is arranged on the light-incident surface side of semiconductor device layer 11. For example, the light-shielding layer 13 is arranged on the light-incident surface of semiconductor device layer 11 via an insulating material. Microlenses are arranged on the light-incident surface side of semiconductor device layer 11 via an insulating material. Figure 5 In this configuration, a color filter is arranged between the microlens and the insulating material. The configuration of the color filter can be appropriately selected. For example, the color filter configuration can be a Bayer configuration. Optionally, multiple photoelectric conversion units can be arranged for a single microlens. Although in Figure 3 Microlenses are also arranged in the OB pixel region 101, but these microlenses are not essential. A structure can be adopted where, in the planar view, the microlenses are not positioned to overlap with the light-shielding layer 13. For example... Figure 3 As shown, in the effective pixel area 100, in a planar view, the light-shielding layer 13 can be arranged between a certain pixel 10 and another pixel adjacent to that pixel 10. This can reduce crosstalk between pixels in the effective pixel area 100.

[0049] A pad 16 is arranged in the outer peripheral region 15. For example... Figure 2 As shown, a plurality of pads 16 are arranged in the outer peripheral region 15. The plurality of pads 16 conduct electricity between the photoelectric conversion device 500 and a signal processing device arranged outside the photoelectric conversion device 500. The plurality of pads 16 include pads that output signals from the photoelectric conversion device 500 to the outside and pads that input power supply voltage to the photoelectric conversion device 500.

[0050] like Figure 3 As shown, a groove serving as a pad 16 is formed at the end of the semiconductor device layer 11. The groove is formed along the depth direction from the light incident surface of the semiconductor device layer 11 and is formed to the depth of the wiring pattern reaching the wiring layer 242 of the substrate 2. The pad 16 is connected to the wiring layer 242 formed in the substrate 2 by wire bonding.

[0051] Wiring layer 242 can be an aluminum (Al) wiring layer. The entire wiring layer 242 does not need to be Al. Only the wiring connected to pad 16 can be Al wiring, and the other wiring can be Cu wiring. Although an example of wire bonding is illustrated, through-holes (through silicon vias (TSVs)) filled with metal can also be used.

[0052] The groove of the pad 16 can be formed to the depth of the wiring layer of the substrate 1.

[0053] As described above, since a groove needs to be formed in the pad 16, the light-shielding layer 13 cannot be positioned close to the pad 16. In the case of a back-illuminated photoelectric conversion device, the thickness (length in the depth direction) of the semiconductor device layer 11 is more likely to be smaller than that in a front-illuminated photoelectric conversion device. For example, the thickness of the semiconductor device layer 11 is less than or equal to 11 μm. Therefore, long-wavelength light, such as infrared light, incident from the light incident surface of the semiconductor device layer 11 is very likely to be reflected by the side of the semiconductor device layer 11 where the transistor is formed, and excess charge will be generated. In particular, such as Figure 3 As shown, in the structure of a laminated back-illuminated photoelectric conversion device where peripheral circuits such as scanning circuits and signal processing circuits are not mounted on the substrate 1, the distance between the end of the substrate 1 and the OB pixel region 101 is small. In other words, in the structure of the laminated back-illuminated photoelectric conversion device, no circuit elements are arranged between the pad 16 and the well 19. Therefore, if light is incident on a non-shielded area such as a portion of the well region 14 or the outer peripheral region 15, photoelectric conversion can be performed on the light, and charge can be generated. If excess charge generated in the non-shielded area mixes into the OB pixel region 101 via the well region 14, the detection of the black level reference value becomes inaccurate, and the pixel value of the effective pixel region 100 cannot be correctly corrected.

[0054] In this embodiment, a drain portion 17 for discharging excess charge is provided in the outer peripheral region 15. The drain portion 17 serves as a charge discharge region for discharging excess charge. A semiconductor region 171 of the same conductivity type as the outer peripheral region 15 is arranged in the drain portion 17. The semiconductor region 171 can be formed by ion implantation to dope with impurities of the same conductivity type as the outer peripheral region 15. The semiconductor region 171 is a region with a higher impurity concentration than the outer peripheral region 15. A contact plug 172 is formed in the semiconductor region 171. A fixed potential is applied to the drain portion 17 via the wiring layer 121 and the contact plug 172. For example, when the outer peripheral region 15 is N-type and the well region 14 is P-type, a power supply voltage with a positive potential is applied. When the outer peripheral region 15 is P-type and the well region 14 is N-type, a power supply voltage with a negative potential is applied. For example, when the outer peripheral region 15 is P-type, a ground potential is applied. Therefore, the drain portion 17 can discharge excess charge. A potential difference is generated between the drain region 17 and the well region 14, thereby preventing charge from entering the OB pixel region 101. Similarly, charge generated as dark current at the end of the substrate 1 can also be prevented from entering the OB pixel region 101. Therefore, the black level reference value can be accurately detected.

[0055] It is desirable to arrange the semiconductor region 171 and the well 19 as close as possible. For example, it is desirable that the distance between the semiconductor region 171 and the well 19 be greater than or equal to 0 μm, preferably greater than or equal to 1 μm, and less than or equal to 100 μm. Therefore, it is easier to prevent excess charge in the peripheral region 15, such as charge generated by photoelectric conversion near the well 19 or noise charge (dark current), from mixing into the OB pixel region 101 through the well 19.

[0056] As the wiring pattern of the wiring layer 121 connected to the drain portion 17, a wiring pattern that is common to the wiring pattern used to supply power to the drain of the transistor for the pixel can be used. For example, the wiring pattern used to supply VDD power to the reset transistor and the wiring pattern used to supply VDD power to the drain portion 17 can be common to each other.

[0057] exist Figure 2 In the plan view, a pad 16 is arranged between the upper end of the semiconductor device layer 11 and the well region 14, and between the left end of the semiconductor device layer 11 and the well region 14. In the plan view, the pad 16 can also be arranged between the lower end of the semiconductor device layer 11 and the well region 14, and between the right end of the semiconductor device layer 11 and the well region 14. That is, in the plan view, the peripheral region 15 where the pad 16 is arranged can be arranged to surround the entire periphery of the well region 14 of the semiconductor device layer 11. In this case, the area of ​​the region between the OB pixel region 101 and the peripheral region 15 where the light-shielding layer 13 is not arranged can be large. Therefore, the effect of detecting the black level reference value can be obtained more accurately and significantly. In the plan view, it is not necessary for the pad 16 to be arranged to surround the entire periphery of the well region 14 of the semiconductor device layer 11. Similarly, even without the pad 16 arranged as described above, the effects of the present invention can be obtained as long as the pad 16 is arranged in at least a portion between the end of the semiconductor device layer 11 and the well region 14 in the plan view. For example, it can be done as follows: in the plan view, a pad 16 is arranged between the upper end of the semiconductor device layer 11 and the well region 14, and no pad 16 is arranged between the left end of the semiconductor device layer 11 and the well region 14. Similarly, in this case, the detection of the black level reference value can be obtained more accurately.

[0058] The second embodiment will be described. Figure 4 A schematic top view of the end of the semiconductor device layer 11 according to the second embodiment is shown. Figure 5 Show along Figure 4 The schematic cross-sectional view is taken by line X-X'. The difference between this embodiment and the first embodiment is that the light-shielding layer 13 is positioned to cover the trap region 14. Apart from this difference and the points described below, the features are substantially the same as those in the first embodiment and therefore will not be described further.

[0059] like Figure 5 As shown, in this embodiment, in the plan view, the light-shielding layer 13 is arranged to partially overlap with the outer peripheral region 15. That is, in the cross-sectional view, the light-shielding layer 13 protrudes from the end of the trap region 14 toward the pad portion 16.

[0060] In the first embodiment, a portion of the well region 14 is not shielded, thus creating a possibility that excess charge generated in the well region 14 through photoelectric conversion may mix into the OB pixel region 101 near this excess charge. In the second embodiment, the well region 14 is shielded, therefore no photoelectric conversion occurs in the well region 14. In other words, in a plan view, the well 19 is not exposed from the shielded area. That is, in a plan view, the end of the well 19 and the end of the shielding layer 13 are at the same position, or the end of the shielding layer 13 protrudes further into the semiconductor device layer 11 than the end of the well 19. In this case, excess charge is generated only in the outer peripheral region 15, which is a non-shielded area at the end of the semiconductor device layer 11. Since the drain portion 17 is provided in the outer peripheral region 15 and drains the excess charge, charge mixing into the OB pixel region 101 can be prevented to a greater extent compared to the first embodiment. Therefore, the black level reference value can be detected more accurately.

[0061] The third embodiment will be described. Figure 6 A schematic top view of the end of the semiconductor device layer 11 according to the third embodiment is shown. Figure 7 Show along Figure 6 The schematic cross-sectional view is taken by line X-X'. The difference between this embodiment and the second embodiment is that a separation region 18 is placed around the pad 16 of the semiconductor device layer 11. Apart from this difference and the items described below, the features are substantially the same as those in the second embodiment and will not be described further.

[0062] In the plan view, the separation region 18 is arranged to surround the entire periphery of each pad 16. The separation region 18 is an isolation portion obtained by embedding an insulating film, such as a silicon dioxide film or a silicon nitride film, in a trench formed within the semiconductor device layer 11.

[0063] In the second embodiment, if the wire bond contacts the side of the groove of the pad 16 of the semiconductor device layer 11 where the pad 16 is formed, a short circuit occurs between the wire bond and the voltage-applied peripheral region 15. On the other hand, in the third embodiment, the separation region 18 separates the peripheral region 15 near the groove of the pad 16 and near the well 19. That is, the separation region 18 insulates the side of the groove of the semiconductor device layer 11 where the pad 16 is formed from the voltage-applied peripheral region 15 where the drain portion 17 is disposed. Therefore, similar to the second embodiment, a short circuit between the wire bond and the peripheral region 15 can be prevented while more accurately detecting the black level reference value.

[0064] The fourth embodiment will be described. Figure 8 A schematic cross-sectional view of a laminated back-illuminated photoelectric conversion device according to a fourth embodiment is shown. This embodiment differs from the third embodiment in that the semiconductor device layer 11 includes an avalanche photodiode (hereinafter referred to as "APD"). This embodiment also differs from the third embodiment in that the distance L4 between the semiconductor region 161 of the second conductivity type to which the APD driving voltage is applied and the semiconductor region 171 that discharges excess charge is larger than the distance between the well 19 and the semiconductor region 171 in the third embodiment. Features other than these differences and the points described below are substantially the same as those in the third embodiment and will therefore not be described further.

[0065] Each APD placed on substrate 1 has a semiconductor region 151 of a first conductivity type and a semiconductor region 152 of a second conductivity type. The avalanche multiplication charge is transmitted to substrate 2 via metal junction 30. Quenching circuitry and counter circuitry are arranged in substrate 2, and signals are transmitted to the counter circuitry in substrate 2 via metal junction 30. Therefore, metal junction 30 connecting semiconductor device layers 11 and 23 is arranged for each APD.

[0066] To drive the APD, a high voltage must be applied to the semiconductor region 152 of the second conductivity type. The difference between the voltage applied to semiconductor region 151 and the voltage applied to semiconductor region 152 is, for example, greater than or equal to 20V. As an example of the voltage applied to semiconductor region 152, a negative voltage with a larger absolute value than -20V is used. The voltage applied to semiconductor region 152 is supplied from semiconductor region 161 of the second conductivity type via semiconductor region 153 of the second conductivity type. Therefore, the aforementioned high voltage is applied to semiconductor region 161 of the second conductivity type.

[0067] On the other hand, the semiconductor region 171 used to discharge excess charge is formed as a semiconductor region of the first conductivity type. Therefore, if the semiconductor region 171 is near the semiconductor region 161 of the second conductivity type, an avalanche multiplication region is formed between the semiconductor regions 161 and 171. That is, there is a possibility that an avalanche multiplication region is formed in a region other than the pixel region, and excess charge is avalanche multiplied and incident on the OB pixel region 101.

[0068] Therefore, when the photoelectric conversion unit placed in the substrate 1 is an APD, the distance L4 between the semiconductor region 161 of the second conductivity type surrounding the pixel region and the semiconductor region 171 of the first conductivity type needs to be set to a distance that will not cause avalanche multiplication.

[0069] According to this embodiment, due to the large distance L4, the black level reference value can be accurately detected while preventing the formation of an avalanche multiplication region between semiconductor regions 161 and 171.

[0070] The distance L4 can be greater than or equal to 1 μm and less than or equal to 10 μm. The desired distance L4 should be greater than or equal to 3 μm and less than or equal to 6 μm.

[0071] like Figure 8 As shown in the plan view, the semiconductor region 171 and the light-shielding layer 13 can overlap each other.

[0072] The fifth embodiment will be described. Figure 9 A schematic cross-sectional view of a laminated back-illuminated photoelectric conversion device according to a fifth embodiment is shown. This embodiment differs from the fourth embodiment in that the drain portion 17 is connected to the pad portion 16 within the same substrate. Apart from this difference and the points described below, the features are substantially the same as those in the fourth embodiment and will not be described further.

[0073] In this embodiment, the groove of the pad 16 is formed to reach the depth of the wiring pattern of the wiring layer 122 of the substrate 1, and the wiring pattern of the wiring layer 122 is connected to the bonding wire. Then, the wiring pattern to which the bonding wire is connected is connected to the drain portion 17 via the contact plug 172 and the wiring pattern of the wiring layer 121.

[0074] As described in the fourth embodiment, when the photoelectric conversion unit placed in the substrate 1 is an APD, a high voltage is required to drive the APD. On the other hand, the substrate 2 is typically formed using a microfabrication process, so from a voltage withstand perspective, it is not desirable to apply the high voltage used to drive the APD to the semiconductor device layer 23 of the substrate 2. Therefore, it is desirable to supply the high voltage used to drive the APD from the pad placed in the substrate 1. In this case, excess charge discharged from the drain portion 17 of the substrate 1 is discharged to the outside of the photoelectric conversion device via the pad portion 16 placed in the substrate 1.

[0075] If the depth of the groove of the pad 16 supplying voltage to the components arranged in the drive substrate 2 is different from the depth of the groove of the pad 16 supplying voltage to the APD arranged in the drive substrate 1, the process may become complicated and the difficulty of the process may increase.

[0076] Therefore, in this embodiment, it is desirable to also apply the voltage used to drive the components placed in the substrate 2 to the pad formed in the substrate 1, and then supply the voltage to the semiconductor device layer 23 of the substrate 2 via the metal bonding portion 40.

[0077] According to this embodiment, similar to the fourth embodiment, the black level reference value can be accurately detected while preventing the formation of an avalanche multiplication region between semiconductor regions 161 and 171. Furthermore, since a high voltage is not applied to the semiconductor device layer 23 of the substrate 2, it is easier to ensure the reliability of the photoelectric conversion device when using an APD.

[0078] The sixth embodiment will be described. Figure 10 A schematic cross-sectional view of a laminated back-illuminated photoelectric conversion device according to the sixth embodiment is shown. Figure 11 A schematic plan view of the light-shielding layer from the light-incident surface side of the photoelectric conversion device according to the sixth embodiment is shown. To facilitate understanding of the position of the through-hole plug in the plan view, Figure 11 The location of the through-hole plugs is also shown. This embodiment differs from the fifth embodiment in that the semiconductor region 161 of the second conductivity type and the light-shielding layer 13 are connected together via through-hole plugs 191a, 191b, and 191c. This embodiment also differs from the fifth embodiment in that color filters of different colors are arranged. Features other than these differences are substantially the same as those in the fifth embodiment and will therefore not be described further.

[0079] like Figure 10As shown, the light-shielding layer 13 and the semiconductor region 161 of the second conductivity type are connected to the through-hole plugs 191a, 191b, and 191c. As described in the fourth embodiment, a high voltage, which is a negative voltage with a larger absolute value than -20V, is applied to the semiconductor region 161 of the second conductivity type. This voltage is also applied to the light-shielding layer 13 via the through-hole plugs 191a, 191b, and 191c. That is, the light-shielding layer 13 and the semiconductor region 161 have the same potential. If the potential difference between the semiconductor region 161 and the light-shielding layer 13 is large, dielectric breakdown may occur in the insulating film disposed between the light-shielding layer 13 and the semiconductor region 161. However, according to this embodiment, dielectric breakdown in the insulating film can be prevented.

[0080] exist Figure 10 In this configuration, the light-shielding layer 13 and the semiconductor region 161 are connected together via three through-hole plugs, but they can be connected together via one or two through-hole plugs, or they can be connected together via four or more through-hole plugs.

[0081] like Figure 10 As shown, it is desirable to arrange the semiconductor region 161 such that the semiconductor region 161 has a width larger than the pixel region including the OB pixel region 101. That is, it is desirable to place the semiconductor region 161 such that, in the cross-sectional view, the width of the semiconductor region 161 is greater than the width of the pixel region. Therefore, it is easier to connect the light-shielding layer 13 and the semiconductor region 161 via the through-hole plug. Although Figure 10 Only a single cross-section is shown, but it is desirable to place the semiconductor region 161 such that along with... Figure 10 In the cross-sections of the intersecting cross-sections, the width of semiconductor region 161 is also greater than the width of pixel region 100.

[0082] In the planar view, the second conductivity type semiconductor region 152 forming the avalanche multiplication region of the APD can be placed on the entire surface of the pixel region. In this case, the end of the second conductivity type semiconductor region 152 can be included in the second conductivity type semiconductor region 161, or can be in contact with the outer periphery of the second conductivity type semiconductor region 161.

[0083] exist Figure 11 In this configuration, the light-shielding layer 13 is positioned to partially surround the openings of each pad 16 in a plan view. For example, if the opening is rectangular, the light-shielding layer 13 is positioned to surround three of the four sides forming the rectangle in a plan view. As described above, it is desirable to position the light-shielding layer 13 as close as possible to the end of the semiconductor device layer 11.

[0084] like Figure 11As shown, through-hole plugs 191a, 191b, and 191c are positioned to enclose the effective pixel region 100 and the OB pixel region 101 in the plan view. Along with... Figure 10 In the cross-sections where the cross-sections intersect, the through-hole plugs 191a and 191b are also connected to the semiconductor region 161. As described above, the through-hole plugs are positioned to surround the entire periphery of the effective pixel region 100 and the OB pixel region 101, thereby preventing dielectric breakdown in the insulating film between the light-shielding layer 13 and the semiconductor region 161 regardless of the position of the light-shielding layer 13.

[0085] Optionally, such as Figure 12 As shown, the light-shielding layer 13 can be arranged to surround the entire periphery of each pad 16 in the plan view. Therefore, with Figure 11 Compared to the example shown, this reduces the amount of light entering the semiconductor device layer 11.

[0086] although Figure 12 Not shown Figure 11 The through-hole plugs 191a, 191b, and 191c are shown, but through-hole plugs 191a, 191b, and 191c can be arranged. Furthermore, they can be arranged... Figure 11 The OB pixel area 101 is shown.

[0087] According to this embodiment, similar to the fifth embodiment, the black level reference value can be accurately detected while preventing the formation of an avalanche multiplication region between semiconductor regions 161 and 171. Furthermore, since a high voltage is not applied to the semiconductor device layer 23 of the substrate 2, it is easier to ensure the reliability of the photoelectric conversion device when using an APD. Additionally, dielectric breakdown in the insulating film disposed between the light-shielding layer 13 and the semiconductor region 161 can be prevented.

[0088] The seventh embodiment will be described. Figure 13 This is a block diagram illustrating the structure of a photoelectric conversion system 1200 according to this embodiment. The photoelectric conversion system 1200 according to this embodiment includes a photoelectric conversion device 1204. Any of the photoelectric conversion devices described in the above embodiments can be applied to the photoelectric conversion device 1204. The photoelectric conversion system 1200 can be used as, for example, a camera system. Specific examples of camera systems include digital still cameras, digital video cameras, and surveillance cameras. Figure 13 A digital still camera is shown as an example of a photoelectric conversion system 1200.

[0089] Figure 13The photoelectric conversion system 1200 shown includes a photoelectric conversion device 1204, a lens 1202 for forming an optical image of a subject on the photoelectric conversion device 1204, an aperture 1203 for making the amount of light passing through the lens 1202 variable, and a baffle 1201 for protecting the lens 1202. The lens 1202 and the aperture 1203 are an optical system for collecting light onto the photoelectric conversion device 1204.

[0090] The photoelectric conversion system 1200 includes a signal processing unit 1205 for processing the output signal from the photoelectric conversion device 1204. The signal processing unit 1205 performs signal processing operations to perform various types of correction and compression on the input signal as needed and output the resulting signal. Furthermore, the photoelectric conversion system 1200 includes a buffer memory unit 1206 for temporarily storing image data and an external interface unit (external I / F unit) 1209 for communicating with an external computer. Additionally, the photoelectric conversion system 1200 includes a recording medium 1211, such as a semiconductor memory, for recording or retrieving captured data, and a recording medium control interface unit (recording medium control I / F unit) 1210 for recording or retrieving captured data relative to the recording medium 1211. The recording medium 1211 can be built into the photoelectric conversion system 1200, or it can be attached to the photoelectric conversion system 1200 and detachable from the photoelectric conversion system 1200. The photoelectric conversion system 1200 can communicate wirelessly with the recording medium 1211 via the recording medium control I / F unit 1210, or it can communicate wirelessly via the external I / F unit 1209.

[0091] Furthermore, the photoelectric conversion system 1200 includes a general control / computing unit 1208 for performing various calculations and controlling the entire digital still camera, and a timing generation unit 1207 for outputting various timing signals to the photoelectric conversion device 1204 and the signal processing unit 1205. The timing signals can be input from an external source, and the photoelectric conversion system 1200 only needs to include at least the photoelectric conversion device 1204 and the signal processing unit 1205 for processing the output signals from the photoelectric conversion device 1204. As described in the fourth embodiment, the timing generation unit 1207 can be disposed within the photoelectric conversion device 1204. The general control / computing unit 1208 and the timing generation unit 1207 can be configured to perform part or all of the control functions of the photoelectric conversion device 1204.

[0092] The photoelectric conversion device 1204 outputs an image signal to the signal processing unit 1205. The signal processing unit 1205 performs predetermined signal processing on the image signal output from the photoelectric conversion device 1204 and outputs image data. The signal processing unit 1205 uses the image signal to generate an image. The signal processing unit 1205 can perform distance calculation on the signal output from the photoelectric conversion device 1204. The signal processing unit 1205 and the timing generation unit 1207 can be disposed within the photoelectric conversion device 1204. That is, the signal processing unit 1205 and the timing generation unit 1207 can be disposed on a substrate on which pixels are arranged. Optionally, a structure can be adopted in which the signal processing unit 1205 and the timing generation unit 1207 are disposed on another substrate. By using the various photoelectric conversion devices according to the above embodiments to construct an imaging system, an imaging system capable of acquiring images with better quality can be realized.

[0093] The eighth embodiment will be described. Reference will be made to... Figure 14A , Figure 14B and Figure 15 The photoelectric conversion system and the moving body according to this embodiment will be explained. Figure 14A and Figure 14B This is a schematic diagram illustrating an example of the structure of the photoelectric conversion system and the moving body according to this embodiment. Figure 15 This is a flowchart illustrating the operation of the photoelectric conversion system according to this embodiment. In this embodiment, a vehicle-mounted camera is illustrated as an example of the photoelectric conversion system.

[0094] Figure 14A and Figure 14B An example of a vehicle system and an image-capturing photoelectric conversion system installed on the vehicle system is shown. The photoelectric conversion system 1301 includes a photoelectric conversion device 1302, an image preprocessing unit 1315, an integrated circuit 1303, and an optical system 1314. The optical system 1314 forms an optical image of a subject on the photoelectric conversion device 1302. The photoelectric conversion device 1302 converts the optical image of the subject formed by the optical system 1314 into an electrical signal. The photoelectric conversion device 1302 is a photoelectric conversion device according to any embodiment of the above embodiments. The image preprocessing unit 1315 performs predetermined signal processing on the signal output from the photoelectric conversion device 1302. The function of the image preprocessing unit 1315 can be built into the photoelectric conversion device 1302. In the photoelectric conversion system 1301, at least two sets of optical systems 1314, photoelectric conversion devices 1302, and image preprocessing units 1315 are provided, such that the output from the image preprocessing units 1315 in each set is input to the integrated circuit 1303.

[0095] Integrated circuit 1303 is an integrated circuit used in the camera system and includes an image processing unit 1304 containing a memory 1305, an optical ranging unit 1306, a ranging calculation unit 1307, an object recognition unit 1308, and an anomaly detection unit 1309. The image processing unit 1304 performs display processing or image processing, such as defect correction, on the output signals from each image preprocessing unit 1315. The memory 1305 primarily stores captured images or stores the locations of defects in camera pixels. The optical ranging unit 1306 focuses on the subject or measures the distance relative to the subject. The ranging calculation unit 1307 calculates ranging information based on multiple image data acquired by multiple photoelectric conversion devices 1302. The object recognition unit 1308 identifies subjects such as vehicles, roads, signs, or people. If an anomaly is detected in the photoelectric conversion device 1302, the anomaly detection unit 1309 notifies the main control unit 1313 of the anomaly.

[0096] Integrated circuit 1303 can be implemented by hardware specifically designed for integrated circuit 1303, or by software modules, or by a combination of both. Alternatively, integrated circuit 1303 can be implemented by a field-programmable gate array (FPGA) or an application-specific integrated circuit (ASIC), or by a combination of these.

[0097] The main control unit 1313 performs overall control of the operation of the photoelectric conversion system 1301, vehicle sensor 1310, and control unit 1320. Alternatively, the main control unit 1313 may not be included, and the photoelectric conversion system 1301, vehicle sensor 1310, and control unit 1320 may each include a communication interface, and each may send and receive control signals via a communication network (e.g., a Controller Area Network (CAN) standard).

[0098] Integrated circuit 1303 has the function of sending control signals or setting values ​​to each photoelectric conversion device 1302 by receiving control signals from the main control unit 1313 or by using the control unit of integrated circuit 1303.

[0099] The photoelectric conversion system 1301 is connected to the vehicle sensor 1310 and can detect the operating status of the vehicle equipped with the photoelectric conversion system 1301 (such as speed, yaw LV, and steering angle), the external environment of the vehicle, and the status of other vehicles and obstacles. The vehicle sensor 1310 is also a distance information acquisition unit for acquiring distance information related to the distance relative to an object. The photoelectric conversion system 1301 is also connected to a driver assistance control unit 1311 for performing various types of driver assistance functions such as automatic steering, automatic cruise control, and collision avoidance. In particular, regarding the collision detection function, the collision detection unit estimates a collision with another vehicle or obstacle or determines whether a collision with another vehicle or obstacle exists based on the detection results of the photoelectric conversion system 1301 or the vehicle sensor 1310. Therefore, if a collision is estimated, avoidance control is performed. Furthermore, when a collision occurs, safety devices are activated.

[0100] The photoelectric conversion system 1301 is also connected to an alarm device 1312, which is used to issue an alert to the driver based on the judgment result of the collision judgment unit. For example, if the collision judgment unit determines that the probability of a collision is high, the main control unit 1313 applies the brakes, returns the accelerator pedal to its original position, or suppresses engine output, thereby controlling the vehicle to avoid a collision and reduce damage. The alarm device 1312 warns the user by emitting an alarm such as an sound, displaying alarm information on the screen of the car navigation system or the instrument panel display unit, or applying vibration to the seat belt or steering gear.

[0101] In this embodiment, the photoelectric conversion system 1301 captures images of the vehicle's surroundings, such as the front or rear. Figure 14B An example of the placement of the photoelectric conversion system 1301 in the case of photographing the front of a vehicle is shown.

[0102] Two photoelectric conversion devices 1302 are arranged at the front of the vehicle 1300. Specifically, the centerline of the vehicle 1300's direction of movement or shape (e.g., width) is considered as the axis of symmetry, and the two photoelectric conversion devices 1302 are arranged linearly symmetrically with respect to this axis of symmetry. This is desirable for obtaining distance information related to the distance between the vehicle 1300 and the object being photographed, or for determining the likelihood of a collision. It is also desirable that the photoelectric conversion devices 1302 are positioned so as not to obstruct the driver's view when visually confirming the situation outside the vehicle 1300 from the driver's seat. It is also desirable that the alarm device 1312 be positioned so that it is easily accessible to the driver.

[0103] Next, refer to Figure 15 This section explains the fault detection operations for each photoelectric conversion device 1302 in the photoelectric conversion system 1301. Based on... Figure 15The steps S1410 to S1480 shown are used to perform fault detection operations on the photoelectric conversion device 1302.

[0104] In step S1410, settings are performed when the photoelectric conversion device 1302 is started. That is, the settings for operating the photoelectric conversion device 1302 are sent from outside the photoelectric conversion system 1301 (e.g., the main control unit 1313) or inside the photoelectric conversion system 1301, and the camera operation and fault detection operation of the photoelectric conversion device 1302 are started.

[0105] Next, in step S1420, a pixel signal is acquired from the valid pixel. Furthermore, in step S1430, an output value from the fault detection pixel set for fault detection is acquired. Similar to the valid pixel, the fault detection pixel includes a photoelectric conversion unit. A predetermined voltage is written to the photoelectric conversion unit. The fault detection pixel outputs a signal corresponding to the voltage written to the photoelectric conversion unit. Steps S1420 and S1430 can be reversed.

[0106] Next, in step S1440, it is determined whether the expected output value and the actual output value of the fault detection pixel are consistent. If, as a result of the determination in step S1440, the expected output value and the actual output value are consistent ("Yes" in step S1440), the process proceeds to step S1450. In step S1450, it is determined that the camera operation is proceeding normally. Then, the process proceeds to step S1460. In step S1460, the pixel signals in the scan line are sent to and stored once in memory 1305. Then, the process returns to step S1420. In step S1420, the fault detection operation continues. On the other hand, if, as a result of the determination in step S1440, the expected output value and the actual output value are inconsistent ("No" in step S1440), the process proceeds to step S1470. In step S1470, it is determined that an abnormality exists in the camera operation. Then, an alarm is issued to the main control unit 1313 or the alarm device 1312. The alarm device 1312 displays an indication that an anomaly has been detected on the display unit. Then, in step S1480, the photoelectric conversion device 1302 is stopped, and the operation of the photoelectric conversion system 1301 is terminated.

[0107] In this embodiment, an example of the flowchart is shown for each line of a loop. Optionally, the flowchart can be for multiple lines of loops, or it can perform fault detection operations for each frame. When an alarm is issued in step S1470, the information can be notified to the outside of the vehicle 1300 via a wireless network.

[0108] In this embodiment, a description of control for preventing a collision between a vehicle and another vehicle is provided. Optionally, this embodiment can also be applied to control for autonomous driving of a vehicle by following another vehicle, or to control for autonomous driving of a vehicle to remain in a lane. Furthermore, the photoelectric conversion system 1301 can be applied not only to vehicles such as vehicles equipped with the photoelectric conversion system 1301, but also to mobile bodies (mobile devices) such as ships, aircraft, or industrial robots. Furthermore, the photoelectric conversion system 1301 can be applied not only to mobile bodies, but also to devices that widely use object recognition, such as Intelligent Transportation Systems (ITS).

[0109] The following structure can be adopted: The photoelectric conversion device according to the present invention can further acquire various information such as distance information.

[0110] According to the present invention, a laminated photoelectric conversion device can be provided to prevent excess charge from entering the OB region and to detect the black level reference signal more accurately.

[0111] Although the invention has been described with reference to embodiments, it should be understood that the invention is not limited to the disclosed embodiments. The scope of the appended claims is to be interpreted in the broadest sense to include all such modifications, equivalent structures, and functions.

Claims

1. A photoelectric conversion device, comprising: A first substrate has a first semiconductor device layer, the first semiconductor device layer including a plurality of photoelectric conversion units and a well on which the plurality of photoelectric conversion units are arranged; as well as A second substrate has a second semiconductor device layer, the second semiconductor device layer including circuitry configured to process signals obtained by the plurality of photoelectric conversion units. The first substrate and the second substrate are stacked together. The first semiconductor device layer includes an effective pixel region, an optical black pixel region, and a peripheral region. The effective pixel region has a portion of the plurality of photoelectric conversion units. The optical black pixel region is disposed between the effective pixel region and the end of the first semiconductor device layer and also has a portion of the plurality of photoelectric conversion units. The peripheral region is disposed between the optical black pixel region and the end of the first semiconductor device layer. In the planar view, the light-shielding area formed by the light-shielding layer overlaps with the optical black pixel area. In the plan view, a pad configured to conduct electricity between the photoelectric conversion device and the outside is arranged in the outer peripheral region, wherein a gap exists between the pad and the light-shielding area. Specifically, in the outer peripheral region, a charge discharge region is arranged between the pad and the well. The charge discharge region includes a semiconductor region where the majority carriers are of the same conductivity type as the signal charge, and A fixed potential is supplied to the charge discharge region.

2. The photoelectric conversion device according to claim 1, wherein, In the plan view, the gap overlaps with the charge discharge region.

3. The photoelectric conversion device according to claim 1 or 2, wherein, In the plan view, the light-shielding area overlaps with the charge discharge area.

4. The photoelectric conversion device according to claim 1 or 2, wherein, An isolation portion arranged to penetrate the first semiconductor device layer is disposed between the charge discharge region and the pad portion.

5. The photoelectric conversion device according to claim 1 or 2, wherein, The outer peripheral region is of N-type conductivity, and a positive potential is applied to the charge discharge region.

6. The photoelectric conversion device according to claim 1 or 2, wherein, The outer peripheral region is P-type conductive, and a ground potential is applied to the charge discharge region.

7. The photoelectric conversion device according to claim 1 or 2, wherein, In the plan view, the light-shielding area overlaps with the trap and a portion of the outer peripheral area.

8. The photoelectric conversion device according to claim 7, wherein, The trap is not exposed from the shaded area.

9. The photoelectric conversion device according to claim 4, wherein, The isolation section includes a region in which insulating material is embedded.

10. The photoelectric conversion device according to claim 1 or 2, wherein, The distance between the center of the pad and the light-shielding layer is greater than or equal to 30 μm and less than or equal to 200 μm.

11. The photoelectric conversion device according to claim 1 or 2, in, Each of the aforementioned photoelectric conversion units is an avalanche photodiode, and The distance between the well and the charge discharge region is greater than or equal to 1 μm and less than or equal to 10 μm.

12. The photoelectric conversion device according to claim 1 or 2, in, Each of the aforementioned photoelectric conversion units is an avalanche photodiode, and The trap and the charge discharge region are configured to be separated from each other at a distance that will not cause avalanche multiplication.

13. The photoelectric conversion device according to claim 1 or 2, wherein, The pad is connected to the wiring layer disposed in the first substrate.

14. The photoelectric conversion device according to claim 1 or 2, wherein, In the first semiconductor device layer, no circuit elements are arranged between the pad and the well.

15. A photoelectric conversion system, comprising: The photoelectric conversion device according to any one of claims 1 to 14; as well as A signal processing unit is configured to process the signal output from the photoelectric conversion device.

16. A mobile body, comprising: The photoelectric conversion device according to any one of claims 1 to 14; A distance information acquisition unit is configured to acquire distance information related to the distance relative to an object based on a signal from the photoelectric conversion device. as well as A control unit is configured to control the moving body based on the distance information.

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