A high-density indium gallium arsenide detector array with micro-mesa isolation and method of fabrication

Abstract

The present application relates to the technical field of short-wave infrared photoelectric detector, and particularly relates to a micro-mesa isolated high-density indium gallium arsenide detector array, which comprises a plurality of photosensitive units. The photosensitive units are formed by plane selective diffusion, so that the corresponding PN junction of each photosensitive unit is only locally formed below the diffusion hole, and there is no PN junction distribution between the adjacent photosensitive units. In the PN junction-free area between the adjacent photosensitive units, a micro-mesa isolation groove is etched. The micro-mesa isolation groove penetrates into the intrinsic absorption layer, and the PN junction is not exposed to the sidewall of the groove. The present application also comprises a preparation method. The present application utilizes the micro-mesa isolation structure, retains the advantages of low dark current and simple passivation process of the plane type detector, effectively suppresses the electrical crosstalk between the pixels in the high-density array through physical isolation, and meets the application requirements of large-scale and high-density focal plane detectors. The preparation process of the present application is compatible with the existing plane type detector process, and the plane type and micro-mesa devices can be prepared on the same material at the same time.

Description

Technical Field

[0001] This invention relates to the field of shortwave infrared photodetector technology, and in particular to a high-density indium gallium arsenide detector array with micro-mesa isolation and its fabrication method. Background Technology

[0002] Short-wave infrared InGaAs detectors exhibit excellent performance at room temperature and have broad application prospects in fields such as medical imaging, aerospace remote sensing, and industrial inspection. With the continuous improvement of application requirements, a significant development trend in InGaAs short-wave infrared detectors is the continuous reduction of the photoelement center-to-center distance and the increasing size of the array. Reducing the size of the photoelement not only helps to reduce the size, weight, power consumption, and cost of the detector system, but also helps to improve the spatial resolution and operating temperature of the detector.

[0003] However, as the center-to-center distance of photosensitive elements continues to decrease, when the diffusion length of photogenerated carriers exceeds the center-to-center distance, electrical crosstalk will occur between the photosensitive elements of the detector. This leads to a decrease in the modulation transfer function (MTF) of the imaging system, ultimately resulting in a deterioration in the imaging quality of the image sensor. Therefore, fabricating high-density InGaAs short-wave infrared focal plane array detectors requires not only exploring fabrication processes and reducing device dark current, but also addressing the problem of increasing crosstalk between photosensitive elements as the center-to-center distance decreases.

[0004] Currently, InGaAs infrared detectors are mainly divided into planar detectors and mesa detectors. Planar detectors obtain their PN junctions by doping the N-type cap layer with P, with the PN junction buried within the epitaxial material. They offer advantages such as low dark current and simple passivation processes, but suffer from severe crosstalk between photosensitive elements. Mesa detectors, on the other hand, form independent photosensitive elements through etching, offering the advantage of low crosstalk. However, etching exposes the PN junction, requiring sophisticated passivation processes, and their dark current is typically greater than that of planar devices.

[0005] To address the aforementioned issues, it is necessary to develop a novel detector structure that can combine the advantages of low dark current in planar detectors with low crosstalk in mesa detectors. Summary of the Invention

[0006] The purpose of this invention is to provide a high-density indium gallium arsenide detector array with micro-mesa isolation and its fabrication method, which mainly solves the problems existing in the prior art. It combines the advantages of low dark current of planar detectors with the advantages of low crosstalk of mesa detectors. Based on planar diffusion junction formation, micro-mesa isolation trenches are etched between adjacent photosensitive elements to suppress crosstalk between adjacent high-density photosensitive elements.

[0007] To achieve the above objectives, the technical solution adopted by the present invention is to provide a high-density indium gallium arsenide detector array with micro-mesa isolation. The detector array comprises multiple photosensitive elements; the photosensitive elements are formed by planar selective diffusion, such that the PN junction corresponding to each photosensitive element is only locally formed below the diffusion aperture, and there is no PN junction distribution in the region between adjacent photosensitive elements; in the region between adjacent photosensitive elements without the PN junction, micro-mesa isolation trenches are etched; the micro-mesa isolation trenches extend into the intrinsic absorption layer, and the PN junctions are not exposed on the trench sidewalls.

[0008] Furthermore, the center-to-center distance of the photosensitive elements is less than or equal to 5 μm.

[0009] Furthermore, the width of the micro-platform isolation trench is 0.5 to 1 μm, and the depth is 0.5 to 1.5 μm.

[0010] Furthermore, the detector array is fabricated on an epitaxial material; the epitaxial material comprises, from bottom to top, an N-type substrate, an N-type buffer layer, the intrinsic absorption layer, and an N-type cap layer; a mask layer is formed on the surface of the N-type cap layer; the detector array adopts a back-illuminated structure, and the incident light enters from one side of the N-type substrate.

[0011] Furthermore, the detector array is interconnected to the readout circuit via indium bump flip-soldering to achieve signal output; wherein the P electrode of each photosensitive element is connected to an interconnect indium bump, and the common N electrode is connected to at least one N-region interconnect indium bump.

[0012] Furthermore, the detector array also includes at least one N-electrode slot; the N-electrode slot extends from top to bottom, penetrating the mask layer, the N-type cap layer and the intrinsic absorption layer, until the N-type buffer layer is exposed; the common N-electrode is disposed in the N-electrode slot and forms electrical contact with the N-type buffer layer.

[0013] This invention also discloses a method for fabricating a high-density indium gallium arsenide detector array with micro-mesa isolation as described above, characterized by comprising the following steps:

[0014] Step S100: Provide epitaxial material;

[0015] Step S200: A mask layer is formed on the surface of the epitaxial material;

[0016] In step S300, diffusion holes are formed in the mask layer by photolithography and etching; the position and size of the diffusion holes determine the position and area of ​​each photosensitive element.

[0017] Step S400: A photosensitive element P region is formed below the diffusion hole using a selective diffusion process; the photosensitive element P region extends downward to form the PN junction of the photosensitive element; the PN junction is formed only in a local area below the diffusion hole, and there is no PN junction in the area between adjacent diffusion holes;

[0018] Step S500: Etch in the region between adjacent photosensitive elements to form the micro-mesa isolation trench; the micro-mesa isolation trench is located in the region without the PN junction, so that the PN junction is not exposed to the trench sidewall;

[0019] Step S600: Form a passivation layer;

[0020] Step S700: At least one N-electrode trench is formed by photolithography and etching; the N-electrode trench extends from top to bottom, penetrating the passivation layer, the mask layer, the N-type cap layer and the intrinsic absorption layer, until the N-type buffer layer is exposed;

[0021] Step S800: Form the P electrode and common N electrode of the photosensitive element;

[0022] In step S900, an indium interconnect bump is generated on the P electrode of each photosensitive element through thermal evaporation and photolithography, and at least one indium interconnect bump is generated on the common N electrode; the indium interconnect bump is used for flip-soldering interconnect to the readout circuit.

[0023] Furthermore, the micro-mesa isolation trench is formed by Ar ion etching; the etching depth is 0.5 to 1.5 μm, allowing the trench to enter the intrinsic absorption layer; the etching width is 0.5 to 1 μm, ensuring that the trench does not expose the PN junction.

[0024] Furthermore, the selective diffusion process uses Zn3P2 as the doping source; the diffusion temperature is 500 to 550°C, and the diffusion time is 5 to 20 minutes.

[0025] Furthermore, the epitaxial material is an N-InP / I-InGaAs / N-InP structure, comprising an N-type substrate and an N-type buffer layer, an intrinsic absorption layer and an N-type cap layer sequentially stacked on the N-type substrate.

[0026] In view of the above technical features, the high-density indium gallium arsenide detector array and fabrication method of the present invention, based on planar diffusion junction formation, etches micro-mesa isolation trenches between adjacent photosensitive elements, which has the following significant advantages compared with the prior art:

[0027] 1. The micro-mesa isolation structure in this invention retains the advantages of low dark current and simple passivation process of planar detectors, while effectively suppressing electrical crosstalk between pixels in high-density arrays through physical isolation.

[0028] 2. The micro-mesa isolation trench in this invention does not contact the PN junction, thus avoiding the problems of increased dark current and passivation caused by PN junction exposure in mesa-type devices.

[0029] 3. This invention is applicable to high-density arrays, and the center-to-center distance of photosensitive elements can be as small as 5μm or less, meeting the application requirements of large-scale, high-density focal plane detectors.

[0030] 4. The fabrication process of this invention is compatible with existing planar detector processes, and can simultaneously fabricate planar and micro-mesa devices on the same material.

[0031] 5. By optimizing the width and depth of the isolation trench, this invention can achieve the best balance between dark current and crosstalk suppression, thereby optimizing device performance. Attached Figure Description

[0032] Figure 1 This is a cross-sectional structural schematic diagram of a preferred embodiment of the micro-mesa isolated high-density indium gallium arsenide detector array of the present invention;

[0033] Figure 2 This is a partially enlarged cross-sectional view of a preferred embodiment of the micro-mesa isolated high-density indium gallium arsenide detector array of the present invention;

[0034] Figure 3 This is a top view schematic diagram of a preferred embodiment of the micro-mesa isolated high-density indium gallium arsenide detector array of the present invention;

[0035] Figure 4 This is a flowchart of a preferred embodiment of the fabrication method of the micro-mesa isolated high-density indium gallium arsenide detector array of the present invention.

[0036] In the figure: 1-N-type substrate, 2-N-type buffer layer, 3-intrinsic absorption layer, 4-N-type cap layer, 5-mask layer, 6-diffusion hole, 7-photosensitive element P-region, 8-micro-mesa isolation trench, 9-passivation layer, 10-P-electrode hole, 11-N-electrode trench, 12-photosensitive element P-electrode, 13-common N-electrode, 14-photosensitive element interconnect indium bump, 15-N-region interconnect indium bump. Detailed Implementation

[0037] The present invention will be further described below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, it should be understood that after reading the teachings of this invention, those skilled in the art can make various alterations or modifications to the invention, and these equivalent forms also fall within the scope defined by the appended claims.

[0038] Example 1: A high-density indium gallium arsenide detector array with micro-mesa isolation.

[0039] Please see Figure 1 , Figure 2 and Figure 3 This invention discloses a micro-mesa isolated high-density indium gallium arsenide (InGaAs) detector array. As shown in the figure, a preferred embodiment provides a micro-mesa isolated high-density indium gallium arsenide (InGaAs) detector array suitable for short-wave infrared focal plane detectors with a 5μm center-to-center distance and a 640×512 element size.

[0040] The detector array is fabricated from epitaxial material. The epitaxial material is formed from bottom to top, starting with an N-type substrate 1, and includes an N-type buffer layer 2, an intrinsic absorber layer 3, and an N-type cap layer 4. In this embodiment, the N-type substrate 1 is an N-type InP material with a thickness of 350 μm, a diameter of 2 inches, and a doping concentration of 3 × 10⁻⁶. 18 cm -3 This serves as the back-illuminated incident surface. An N-type buffer layer 2 (material InP, thickness 1 μm, doping concentration 3 × 10⁻⁶) is sequentially formed on the N-type substrate 1. 18 cm -3 ), serving as an electron transverse transport channel, intrinsic absorption layer 3 (material is InGaAs, thickness 2.5μm, doping concentration 5×10), 15 cm -3 ), used to absorb light energy to generate photogenerated carriers, and N-type cap layer 4 (material is InP, thickness is 1μm, doping concentration is 5×10). 16 cm -3 ).

[0041] The mask layer 5 is located on the surface of the N-type cap layer 4, and is made of SiNx with a thickness of approximately 300 nm. Multiple diffusion holes 6 are formed in the mask layer 5. These diffusion holes 6 are arranged in an array (640 × 512 elements) with a center-to-center spacing of 5 μm. Each diffusion hole 6 has a diameter of Φ1.5 μm, and each diffusion hole 6 corresponds to one photosensitive element; therefore, the center-to-center spacing of the photosensitive elements in this device is also 5 μm.

[0042] A photosensitive P-region 7 is formed in the epitaxial material below the diffusion aperture 6. The photosensitive P-region 7 extends downward into the intrinsic absorption layer 3, forming a PN junction with the surrounding N-type material. Due to the presence of the mask layer 5, the PN junction is only locally formed below the diffusion aperture 6, and there is no PN junction distribution in the region between adjacent diffusion apertures 6.

[0043] In the PN junction-free region between adjacent diffusion holes 6, a micro-mesa isolation trench 8 is formed. The micro-mesa isolation trench 8 extends downward into the intrinsic absorption layer 3, with a depth of 0.5 to 1.5 μm, specifically 1.4 μm in this embodiment. Its width is 0.5 to 1 μm, specifically 1 μm in this embodiment, ensuring that the micro-mesa isolation trench 8 does not expose the PN junction. Specifically, the micro-mesa isolation trench 8 is horizontally offset from the PN junction (located in the PN junction-free gap), thus preserving the advantage of low dark current of the planar detector. At the same time, the micro-mesa isolation trench 8 penetrates deep into the intrinsic absorption layer 3, effectively blocking the lateral diffusion of photogenerated carriers within the intrinsic absorption layer 3 and suppressing electrical crosstalk between pixels.

[0044] A passivation layer 9 of SiNx material, approximately 300 nm thick, is also deposited on the chip surface. P-electrode holes 10, with a diameter of Φ1 μm, are formed in the passivation layer 9 and the mask layer 5, exposing the underlying photosensitive element P-region 7. Simultaneously, at least one N-electrode groove 11 is also provided in the detector array. The N-electrode groove 11 extends from top to bottom, penetrating the mask layer 5, the N-type cap layer 4, and the intrinsic absorption layer 3, until it exposes the N-type buffer layer 2. In this embodiment, the N-electrode groove 11 has a width of 20 μm and a length of 3200 μm, with one located on each side of the array. The photosensitive element P-electrode 12, made of Au material, has a diameter of Φ2 μm and a thickness of 200 nm, and is disposed within the P-electrode hole 10, forming an electrical contact with the photosensitive element P-region 7. The common N-electrode 13, also made of Au material, has a thickness of 200 nm, and is disposed within the N-electrode groove 11, forming an electrical contact with the N-type buffer layer 2.

[0045] Each photosensitive element P electrode 12 has a photosensitive element interconnect indium bump 14. At least one N-region interconnect indium bump 15 is provided on the common N electrode 13. In this embodiment, the common N electrode 13 has one indium bump on each of the upper and lower sides of the array as N-region interconnect indium bumps 15. The photosensitive element interconnect indium bumps 14 and N-region interconnect indium bumps 15 have a ball diameter of Φ2μm and a height of 3μm. The photosensitive element interconnect indium bumps 14 and N-region interconnect indium bumps 15 are used to flip-solder the detector array to the readout circuit to achieve signal output.

[0046] Example 2: A method for fabricating a high-density indium gallium arsenide detector array with micro-mesa isolation.

[0047] Please see Figure 1 , Figure 2 and Figure 4 This invention discloses a method for fabricating a high-density indium gallium arsenide (IGaAs) detector array with micro-mesa isolation. As shown in the figure, a preferred embodiment focuses on fabricating a micro-mesa isolated InGaAs detector array with a 5μm center-to-center spacing and a scale of 640×512 elements. The fabrication method is described in detail, including the following steps:

[0048] Step S100: Provide epitaxial material.

[0049] Provide N-type substrate 1 (material InP, thickness 350 μm, diameter 2 inches, doping concentration 3 × 10⁻⁶) 18 cm -3 An N-type buffer layer 2 (material: InP, thickness: 1 μm, doping concentration: 3 × 10⁻⁶) was sequentially epitaxially grown on the substrate using molecular beam epitaxy (MBE). 18 cm -3 Intrinsic absorption layer 3 (material: InGaAs, thickness: 2.5 μm, doping concentration: 5 × 10⁻⁶) 15 cm -3 ), and N-type cap layer 4 (material InP, thickness 1μm, doping concentration 5×10⁻⁶). 16 cm -3 ).

[0050] Step S200: Form a mask layer.

[0051] A 300 nm thick mask layer 5, made of SiNx, is grown on the surface of the epitaxial material using plasma-enhanced chemical vapor deposition (PECVD).

[0052] Step S300: Form diffusion holes.

[0053] The positions of the diffusion holes 6 (photosensitive element center-to-center distance 5 μm, 640×512 array) are defined on the mask layer 5 using photolithography. Reactive ion etching is then used to remove the mask layer 5 in the diffusion hole region, forming the diffusion holes 6. The diameter of the diffusion holes 6 is designed to be Φ1.5 μm. The position and size of the diffusion holes 6 determine the position and area of ​​each photosensitive element.

[0054] Step S400: Selective diffusion forms a PN junction.

[0055] Zn3P2 was used as the dopant source for closed-tube diffusion, with the diffusion temperature controlled between 500 and 550°C and the diffusion time between 5 and 20 minutes. In this embodiment, the diffusion temperature was 530°C and the diffusion time was 10 minutes.

[0056] During diffusion, Zn atoms enter the epitaxial material through diffusion holes 6, forming a P-type region (i.e., photosensitive P-region 7) below diffusion holes 6. The P-region extends downward into the intrinsic absorption layer 3, forming a PN junction with the surrounding N-type material. Due to the blocking effect of the mask layer 5, Zn atoms cannot enter the non-diffusion hole region. Therefore, the PN junction is only formed locally below diffusion holes 6, and there is no PN junction distribution in the region between adjacent diffusion holes 6.

[0057] Step S500: Form an isolation trench.

[0058] The location of the micro-mesa isolation trench 8 is defined by photolithography. The micro-mesa isolation trench 8 is located in the PN junction-free region between adjacent photosensitive elements. Ar ion etching is used to form the isolation trench. The etching depth is controlled within the range of 0.5 to 1.5 μm, and in this embodiment, it is 1.4 μm, allowing the micro-mesa isolation trench 8 to penetrate the intrinsic absorption layer 3. Simultaneously, the etching width is controlled within the range of 0.5 to 1 μm, and in this embodiment, it is 1 μm, ensuring that the micro-mesa isolation trench 8 does not expose the PN junction from the side.

[0059] Since the micro-mesa isolation trench 8 is located in the PN junction-free region (horizontally offset from the PN junction), the etching depth can be relatively deep without worrying about exposing the PN junction. However, the etching width must be strictly controlled to avoid lateral expansion into the PN junction region below the diffusion via 6.

[0060] Step S600: Form a passivation layer.

[0061] On the chip surface, a 300nm thick passivation layer 9 of SiNx material is grown by PECVD.

[0062] Step S700: Form the N-electrode groove and the P-electrode hole.

[0063] The positions of the N-electrode trenches are defined using photolithography. In this embodiment, one N-electrode trench (20 μm wide and 3200 μm long) is set on each of the upper and lower sides of the array. Reactive ion etching is used to remove the passivation layer 9, mask layer 5, N-type cap layer 4, and intrinsic absorption layer 3 in the selected area until the N-type buffer layer 2 is exposed. In this embodiment, the etching depth is approximately 4.0 μm.

[0064] Photolithography and reactive ion etching are used to open the P-electrode hole (Φ1μm) of the photosensitive element in the passivation layer 9 and the mask layer 5, exposing the P-region of the photosensitive element.

[0065] Step S800: Form the P electrode and the common N electrode.

[0066] A single layer of Au with a thickness of 200 nm was deposited by electron beam evaporation to form a photosensitive element P electrode 12 (Φ2μm) and a common N electrode 13. The common N electrode 13 is disposed in the N electrode groove 11 and forms an electrical contact with the N-type buffer layer 2.

[0067] Step S900: Generate interconnect indium bumps.

[0068] The positions of the indium bumps are defined using photolithography. One indium bump is formed above each photosensitive P-electrode 12, serving as the photosensitive interconnect indium bump 14. At least one indium bump is formed above the common N-electrode, serving as the N-region interconnect indium bump. In this embodiment, the common N-electrode has one indium bump on each of the top and bottom sides of the array. A single layer of In is deposited using thermal evaporation, with a thickness controlled to 3 μm. The photoresist is removed using a lift-off process to form the indium bumps, with a ball diameter of approximately Φ2 μm and a height of approximately 3 μm. The interconnect indium bumps are used for flip-soldering interconnects to the readout circuitry.

[0069] At this point, the high-density indium gallium arsenide (IGaAs) detector array has been successfully fabricated. Next, the fabricated detector chip and readout circuit will be aligned and thermo-bonded using a flip-flop interconnect device. This allows the indium bumps to fuse with the corresponding pads on the readout circuit, forming electrical and mechanical connections.

[0070] The above description is merely a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural or procedural transformations made based on the content of the present invention's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A high-density indium gallium arsenide detector array with micro-mesa isolation, characterized in that, The detector array includes multiple photosensitive elements; the photosensitive elements are formed by planar selective diffusion, so that the PN junction corresponding to each photosensitive element is only locally formed below the diffusion hole, and there is no PN junction distribution in the region between adjacent photosensitive elements; in the region between adjacent photosensitive elements where there is no PN junction, micro-mesa isolation trenches are etched. The micro-mesa isolation trench extends into the intrinsic absorption layer, and the PN junction is not exposed on the trench sidewall.

2. The high-density indium gallium arsenide detector array with micro-mesa isolation according to claim 1, characterized in that, The center-to-center distance of the photosensitive elements is less than or equal to 5 μm.

3. The high-density indium gallium arsenide detector array with micro-mesa isolation according to claim 1, characterized in that, The width of the micro-platform isolation trench is 0.5 to 1 μm, and the depth is 0.5 to 1.5 μm.

4. The high-density indium gallium arsenide detector array with micro-mesa isolation according to claim 1, characterized in that, The detector array is fabricated on an epitaxial material; the epitaxial material comprises, from bottom to top, an N-type substrate, an N-type buffer layer, the intrinsic absorption layer, and an N-type cap layer; a mask layer is formed on the surface of the N-type cap layer; the detector array adopts a back-illuminated structure, and the incident light enters from one side of the N-type substrate.

5. The high-density indium gallium arsenide detector array with micro-mesa isolation according to claim 1, characterized in that, The detector array is interconnected to the readout circuit via indium bump flip-soldering to achieve signal output; wherein the P electrode of each photosensitive element is connected to an interconnect indium bump, and the common N electrode is connected to at least one N-region interconnect indium bump.

6. The high-density indium gallium arsenide detector array with micro-mesa isolation according to claim 1, characterized in that, The detector array further includes at least one N-electrode slot; the N-electrode slot extends from top to bottom, penetrating the mask layer, the N-type cap layer and the intrinsic absorption layer, until the N-type buffer layer is exposed; the common N-electrode is disposed in the N-electrode slot and forms electrical contact with the N-type buffer layer.

7. A method for fabricating a high-density indium gallium arsenide detector array with micro-mesa isolation as described in any one of claims 1 to 6, characterized in that, Includes the following steps: Step S100: Provide epitaxial material; Step S200: A mask layer is formed on the surface of the epitaxial material; In step S300, diffusion holes are formed in the mask layer by photolithography and etching; the position and size of the diffusion holes determine the position and area of ​​each photosensitive element. Step S400: A photosensitive element P region is formed below the diffusion hole using a selective diffusion process; the photosensitive element P region extends downward to form the PN junction of the photosensitive element; the PN junction is formed only in a local area below the diffusion hole, and there is no PN junction in the area between adjacent diffusion holes; Step S500: Etch in the region between adjacent photosensitive elements to form the micro-mesa isolation trench; The micro-mesa isolation trench is located in the region without the PN junction, so that the PN junction is not exposed on the trench sidewall; Step S600: Form a passivation layer; Step S700: At least one N-electrode trench is formed by photolithography and etching; the N-electrode trench extends from top to bottom, penetrating the passivation layer, the mask layer, the N-type cap layer and the intrinsic absorption layer, until the N-type buffer layer is exposed; Step S800: Form the P electrode and common N electrode of the photosensitive element; In step S900, an indium interconnect bump is generated on the P electrode of each photosensitive element through thermal evaporation and photolithography, and at least one indium interconnect bump is generated on the common N electrode; the indium interconnect bump is used for flip-soldering interconnect to the readout circuit.

8. The preparation method according to claim 7, characterized in that, The micro-mesa isolation trenches are formed by Ar ion etching; the etching depth is 0.5 to 1.5 μm, allowing the trenches to penetrate the intrinsic absorption layer; The etching width is 0.5 to 1 μm, so that the trench does not expose the PN junction.

9. The preparation method according to claim 7, characterized in that, The selective diffusion process uses Zn3P2 as the doping source; the diffusion temperature is 500 to 550°C, and the diffusion time is 5 to 20 minutes.

10. The preparation method according to claim 7, characterized in that, The epitaxial material is an N-InP / I-InGaAs / N-InP structure, including an N-type substrate and an N-type buffer layer, an intrinsic absorption layer and an N-type cap layer sequentially stacked on the N-type substrate.

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