A multilayer boron source doped structure, a boron emitter, a preparation method thereof and a solar cell

Abstract

The application provides a multilayer boron source doping structure, a boron emitter, a preparation method of the boron emitter and a solar cell. The multilayer boron source doping structure comprises a first silicide layer, a first amorphous silicon layer, a second silicide layer and a second amorphous silicon layer arranged in sequence on a silicon wafer. The first silicide layer is composed of a silicon oxide film, and the thickness of the first silicide layer is 5-50 nm. The first amorphous silicon layer is composed of an intrinsic amorphous silicon film. The second silicide layer is composed of a silicon oxide film and / or a silicon nitride film. The second amorphous silicon layer is composed of a carbon-containing boron-doped amorphous silicon film. The boron concentration in the second amorphous silicon layer is higher than 2*10 20 cm ‑3 -2, and the carbon concentration is higher than 1*10 20 cm ‑3 -1. The application discloses an innovative multilayer boron source doping structure. By utilizing the difference in boron segregation coefficients between different materials, the boron diffusion can be flexibly controlled, the total concentration and the active concentration of boron on the silicon surface can be reduced, and thus the passivation quality can be improved.

Description

Technical Field

[0001] This invention relates to the field of crystalline silicon solar cell technology, and more specifically, to a multilayer boron source doping structure, a boron emitter and its preparation method, and a solar cell. Background Technology

[0002] Crystalline silicon solar cells, as the mainstream product in solar photovoltaics, have long maintained a large market share. The emitter plays an indispensable role in crystalline silicon solar cells. From the phosphorus emitter in PERC solar cells with P-type silicon substrates, to the boron emitter in the now mainstream N-type TOPCon solar cells, and even the potentially industrialized back-junction TOPCon cells and perovskite-crystalline silicon tandem solar cells, high-quality boron emitters all play a crucial role in improving device performance.

[0003] Currently, industrialized TOPCon batteries employ a front-side boron emitter structure. The industry commonly uses low-pressure chemical vapor deposition (LPCVD) to prepare the boron emitter. This involves reacting boron trichloride (BCl3) with O2 to generate B2O3, which then diffuses into the silicon wafer at high temperatures to form the boron emitter. While this technology allows for flexible control of sheet resistance, it reveals the following structural defects in large-scale production: 1) B2O3 has a high boiling point and is mostly liquid at diffusion temperatures, easily depositing on the silicon wafer surface and producing uneven mass distribution, further exacerbating diffusion uniformity issues. 2) BCl3 produces highly corrosive byproducts such as HCl or Cl2, increasing the difficulty of equipment and pipeline maintenance. 3) LPCVD is a thermal CVD process; the source layer deposits throughout the tube. The B2O3 produced during the reaction adheres to the surfaces of the quartz tube, quartz boat, and other components. As the process progresses, the B2O3 thickness increases, generating significant stress and ultimately leading to the breakage of the quartz tube and boat. 4) The coupling effect with laser selective emitter (SE) technology is limited.

[0004] To address the aforementioned issues, patent documents CN117913156A and CN117913157A disclose a multilayer doped source structure that can balance strong laser absorption capability with high boron doping concentration, resulting in a high passivation level for the boron emitter. However, with further research, the aforementioned source layer structure has encountered bottlenecks, mainly manifested in the following ways: the high boron concentration on the emitter surface obtained by diffusion from the source layer structure makes it difficult to meet the requirements for further improving the passivation quality of the boron emitter; the boron concentration shows a trend of first increasing and then decreasing from the silicon wafer surface to the silicon wafer bulk region, exhibiting a significant arched distribution that forms a barrier to hole transport. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the technical problem to be solved by the present invention is how to reduce the boron concentration in the boron emitter and optimize the boron diffusion distribution.

[0006] To address the aforementioned technical problems, the first aspect of this invention provides a multilayer boron-doped structure, comprising a first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer sequentially disposed on a silicon wafer. The first silicide layer is composed of a silicon oxide thin film with a thickness of 5-50 nm. The first amorphous silicon layer is composed of an intrinsic amorphous silicon thin film. The second silicide layer is composed of a silicon oxide thin film and / or a silicon nitride thin film. The second amorphous silicon layer is composed of a carbon-doped boron amorphous silicon thin film, and the boron concentration in the second amorphous silicon layer is higher than 2 × 10⁻⁶. 20 cm -3 Carbon concentration higher than 1×10 20 cm -3 .

[0007] This invention discloses an innovative multilayer boron source doping structure. By utilizing the difference in the segregation coefficient of boron among different materials, boron diffusion can be flexibly controlled, which helps to reduce the total concentration and activation concentration of boron on the silicon surface, thereby improving the passivation quality. The introduction of carbon elements into the boron source can suppress boron defects in the boron emitter, reduce recombination centers, and also help to increase the surface hydrogen concentration, thereby improving the passivation effect.

[0008] Furthermore, the first amorphous silicon layer contains carbon; and / or, the first amorphous silicon layer contains oxygen, and the oxygen concentration is less than 1 × 10⁻⁶. 20 cm -3 ; and / or, the first amorphous silicon layer contains nitrogen, and the nitrogen concentration is less than 1 × 10⁻⁶. 20 cm -3 ; and / or, the first amorphous silicon layer contains boron, and the boron concentration is less than 1 × 10⁻⁶. 18 cm -3 The first amorphous silicon layer has strong laser coupling capability. After laser treatment, boron concentration can be effectively introduced into the silicon surface, thus ensuring compatibility with SE technology.

[0009] Furthermore, the second silicide layer contains carbon. Carbon doping in the second silicide layer is beneficial for improving the stability of the multilayer structure.

[0010] Furthermore, a nano-silicon oxide layer with a thickness of 0.8~3 nm is provided between the silicon wafer and the first silicide layer. The nano-silicon oxide layer can protect the surface of the silicon wafer, help reduce interface defects, and improve surface quality.

[0011] Furthermore, the thickness of the first amorphous silicon layer is 5~200 nm; and / or, the thickness of the second silicide layer is 10~50 nm; and / or, the thickness of the second amorphous silicon layer is greater than 10 nm. By adjusting the thickness of each layer within a defined range, the boron concentration curve can be adjusted to achieve the technical objective of low total boron concentration and low activation concentration on the silicon surface.

[0012] A second aspect of this invention provides a method for preparing a boron emitter, comprising the following steps: S1. The above-mentioned multilayer boron source doped structure is prepared on a silicon wafer; S2. High-temperature annealing enables boron diffusion, forming a boron emitter on the silicon wafer; S3. Etching to remove the multilayer boron source doped structure; S4. Prepare a hydrogen-containing dielectric layer to passivate the boron emitter.

[0013] Further, step S1 specifically includes: S11. Prepare a nano-silicon oxide layer on a silicon wafer. The preparation method is selected from one of wet chemical oxidation, thermal oxidation, plasma-assisted oxidation, and ozone oxidation. This step can be omitted. S12. The first silicide layer is prepared on a silicon wafer / nano-silicon oxide layer using the PECVD method; S13. A first amorphous silicon layer is prepared on the first silicide layer using the PECVD method; S14. A second silicide layer is prepared on the first amorphous silicon layer using the PECVD method; S15. A second amorphous silicon layer is prepared on the second silicide layer using the PECVD method.

[0014] This invention uses PECVD to prepare a multilayer boron source doped structure with uniform distribution of solid boron doped sources. The source layer is deposited only in the region with a plasma field, so it grows only on the silicon wafer and graphite boat and will not be deposited on the quartz tube wall, thus avoiding damage to the quartz components.

[0015] Furthermore, in step S2, the high-temperature annealing temperature is 900~1100℃. At high temperature, boron gradually diffuses from the dopant source structure into the crystalline silicon substrate, causing the amorphous silicon layer to become a polycrystalline silicon layer.

[0016] A third aspect of the present invention provides a boron emitter prepared by the above-described preparation method.

[0017] Furthermore, the activation concentration of boron on the surface of the boron emitter is less than 1×10⁻⁶. 19 cm -3The boron concentration decreases from the boron emitter surface towards the silicon wafer bulk region. The low activation concentration at the boron emitter surface reduces carrier recombination and improves passivation quality; the boron diffusion curve is more reasonable and does not create a barrier to hole transport and collection.

[0018] Furthermore, the boron emitter contains carbon, oxygen, and hydrogen elements, and the carbon concentration on the surface of the boron emitter is higher than 1 × 10⁻⁶. 18 cm -3 Oxygen concentration higher than 1×10 18 cm -3 Hydrogen concentration higher than 1×10 18 cm -3 The boron emitter contains a high concentration of carbon, oxygen, and hydrogen, which can synergistically passivate interface defects and improve passivation quality.

[0019] A fourth aspect of this invention provides a solar cell comprising the aforementioned boron emitter. The boron emitter of this invention has the advantages of high passivation quality and low recombination current, and is suitable for N-type TOPCon, back-junction TOPCon, perovskite-crystalline silicon tandem cells, etc., providing core technological support for the industrialization of high-efficiency solar cells.

[0020] In summary, the present invention has the following beneficial effects: (1) Reduce the boron concentration on the surface of the boron emitter: The present invention designs a multilayer boron source doping structure. By changing the thickness of each layer of material, annealing temperature and other factors, boron diffusion can be flexibly controlled, which helps to reduce the total concentration and activation concentration of boron on the silicon surface, thereby improving the passivation quality.

[0021] (2) High passivation quality: Using the technical solution of the present invention, for double-sided passivation sheets, iV can be obtained on the textured surface. oc =735-738mV, J 0e =4-5fA / cm 2 Excellent passivation effect; iV can be obtained on a plane. oc =736-740mV, J 0e =2-3fA / cm 2 It exhibits excellent passivation effects.

[0022] (3) Reasonable boron diffusion curve: The emitter prepared by using the multilayer boron source doping structure of the present invention can gradually reduce the boron activation concentration from the silicon surface to the bulk, eliminate the "arched distribution" of the existing process, avoid hole transport barrier, and improve carrier collection efficiency.

[0023] (4) Suppressing boron defects: Carbon elements are introduced into the boron source structure. Carbon elements can suppress the diffusion of boron by forming carbon-boron complexes. The formation of these complexes can effectively reduce the mobility of boron, reduce the possibility of its aggregation and formation of defects in the lattice, thereby suppressing boron defects in the boron emitter and reducing recombination centers.

[0024] (5) Improved surface quality: The silicon surface is protected by a nano silicon oxide layer and a first silicide layer, which helps to reduce interface defects and improve surface quality.

[0025] (6) Boron source is easy to etch: There is a significant etching selectivity between the material components of each layer in the multilayer boron source doped structure, which is easy to wet etch.

[0026] (7) Compatible with SE technology: The boron concentration on the surface of the boron emitter obtained by using a multilayer boron source doping structure is low, and the boron activation concentration in the heavily doped selective emitter region formed after laser SE doping is also lower, making it more compatible with laser selective emitter technology.

[0027] (8) Uniform distribution of boron source: The solid multilayer boron source doped structure prepared by PECVD has good uniformity, and the plasma field only acts on the surface of silicon wafer and graphite boat, avoiding the risk of quartz tube contamination and breakage. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of the multilayer boron source doped structure in a specific embodiment of the present invention.

[0029] Figure 2 This is a schematic diagram of the multilayer boron source doped structure in Embodiment 1 of the present invention.

[0030] Figure 3 This is a schematic diagram of the boron source structure in Comparative Example 1 of the present invention.

[0031] Figure 4 This is a schematic diagram of the boron source structure in Comparative Example 2 of the present invention.

[0032] Figure 5 This is a schematic diagram of the boron source structure in Comparative Example 3 of the present invention.

[0033] Figure 6 This is a schematic diagram of the boron source structure in Comparative Example 4 of the present invention.

[0034] Figure 7 The graph shows the electrochemical capacitance voltage test results of the boron emitters prepared in the embodiments and comparative examples of the present invention.

[0035] Explanation of reference numerals in the attached figures: 1-Silicon wafer, 2-Boron emitter, 3-Nano silicon oxide layer, 4-First silicide layer, 5-First amorphous silicon layer, 6-Second silicide layer, 7-Second amorphous silicon layer, 8-Borosilicate glass layer, 9-Boron-doped amorphous silicon layer, 10-Borosilicate oxide layer. Detailed Implementation

[0036] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the following embodiments are only used to illustrate the implementation methods and typical parameters of the present invention, and are not intended to limit the parameter range described in the present invention. Reasonable variations derived therefrom are still within the protection scope of the claims of the present invention.

[0037] It should be noted that the endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of the various ranges, the endpoint values ​​of the various ranges and individual point values, and individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein.

[0038] Specific embodiments of the present invention provide a multilayer boron source doped structure and a method for fabricating a boron emitter using the multilayer boron source doped structure. A typical structure of the multilayer boron source doped structure is as follows: Figure 1 As shown, the wafer includes a nano-silicon oxide layer 3, a first silicide layer 4, a first amorphous silicon layer 5, a second silicide layer 6, and a second amorphous silicon layer 7 arranged sequentially on a silicon wafer 1. After boron diffusion, a boron emitter 2 is formed on the surface of the silicon wafer 1.

[0039] In a specific embodiment, the nano-silicon oxide layer 3 is composed of a silicon oxide film, mainly composed of silicon and oxygen, with a typical thickness of 1~3nm, and can protect the surface of the silicon wafer 1. In some embodiments, the nano-silicon oxide layer 3 can be omitted.

[0040] In a specific embodiment, the first silicide layer 4 is composed of a silicon oxide thin film, deposited by CVD method, with a typical thickness of 5~50nm.

[0041] In a specific embodiment, the first amorphous silicon layer 5 is composed of an intrinsic amorphous silicon thin film, with a typical thickness of 5~200 nm. The first amorphous silicon layer 5 may contain carbon; it may also contain small amounts of oxygen and nitrogen elements, with a concentration of less than 1×10⁻⁶. 20 cm -3 This layer may also contain trace amounts of boron, with a concentration less than 1 × 10⁻⁶. 18 cm -3 .

[0042] In specific embodiments, the thickness of the second silicide layer 6 is 10-50 nm. In some embodiments, the second silicide layer is composed of a silicon oxide film; in other embodiments, the second silicide layer 6 is composed of a silicon nitride film; in still other embodiments, the second silicide layer 6 is composed of stacked silicon oxide and silicon nitride films. The second silicide layer 6 may contain carbon.

[0043] In a specific embodiment, the thickness of the second amorphous silicon layer 7 is typically greater than 10 nm. This layer is composed of a carbon-doped boron amorphous silicon thin film, wherein the carbon concentration is higher than 1 × 10⁻⁶. 20 cm -3 Boron concentration higher than 1×10 20 cm -3 .

[0044] It should be noted that, in some embodiments, the first silicide layer 4, the first amorphous silicon layer 5, the second silicide layer 6, and the second amorphous silicon layer 7 have a sublayer structure, and the thickness and composition of each layer in the sublayer structure may be the same or different.

[0045] The method for preparing a boron emitter using the above-mentioned multilayer boron source doping structure includes the following steps: (1) Cleaning of silicon wafer 1 surface.

[0046] (2) A nano-silicon oxide layer 3 is prepared on silicon wafer 1. The preparation method can be wet chemical oxidation, thermal oxidation, plasma-assisted oxidation, ozone oxidation, etc.

[0047] (3) A first silicide layer 4, a first amorphous silicon layer 5, a second silicide layer 6 and a second amorphous silicon layer 7 are sequentially deposited on the nano-silicon oxide layer 3 by plasma-enhanced chemical vapor deposition (PECVD) to obtain a five-layer multilayer boron source doped structure.

[0048] (4) High-temperature annealing achieves the diffusion of boron. The typical temperature is 900~1100℃. A boron emitter 2 is formed on the silicon wafer 1. The first amorphous silicon layer 5 is transformed into the first polycrystalline silicon layer, and the second amorphous silicon layer 7 is transformed into the second polycrystalline silicon layer.

[0049] (5) Etching to remove the multilayer boron source doped structure. Specifically, the second polysilicon layer can be cleaned with an alkaline acid-based solution; the second silicide layer 6 can be cleaned with an HF acid-based solution; the first polysilicon layer can be cleaned with an alkaline acid-based solution; and the first silicide layer 4 and the nano-silicon oxide layer 3 can be cleaned with an HF acid-based solution. In some embodiments, various additive materials can be used in the solution cleaning process.

[0050] (6) Prepare a hydrogen-containing dielectric layer to passivate the boron emitter 2. The hydrogen-containing dielectric layer is usually made of materials such as alumina, silicon nitride, silicon oxide, or a combination thereof.

[0051] In a specific embodiment, the activation concentration of boron on the surface of the boron emitter 2 prepared by the above method is less than 1×10⁻⁶. 19 cm -3 The boron concentration decreases from the surface to the bulk region of silicon wafer 1; the boron emitter 2 contains carbon, oxygen, and hydrogen elements, with the carbon surface concentration exceeding 1×10⁻⁶. 18 cm -3 Oxygen surface concentration higher than 1×10 18 cm -3 The surface hydrogen concentration is higher than 5×10 18 cm -3 .

[0052] The above technical solution, by combining a multi-layer boron source doping structure design with PECVD process, systematically solves the problems of poor uniformity, low passivation quality, and safety hazards in traditional boron expansion technology. It reduces the boron activation concentration on the surface of the boron emitter, provides a passivation effect, and ensures process safety and mass production economy. This technology is applicable to various types of solar cells and provides key support for the upgrading of high-efficiency solar cell technology.

[0053] The technical solution and effects of the present invention will be described below through specific embodiments.

[0054] Example 1 In this embodiment, a boron emitter is fabricated, and the multilayer boron source doping structure is as follows: Figure 2 As shown, the specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer 3, approximately 1.6 nm thick, was grown on the surface of silicon wafer 1 using thermal oxidation. A first silicide layer 4, a first amorphous silicon layer 5, a second silicide layer 6, and a second amorphous silicon layer 7 were sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The first silicide layer 4 is a silicon oxide film with a thickness of approximately 10 nm; the first amorphous silicon layer 5 is an intrinsic amorphous silicon film with a thickness of approximately 30 nm; the second silicide layer 6 is a silicon oxide film with a thickness of approximately 30 nm; and the second amorphous silicon layer 7 is a carbon-doped boron amorphous silicon film with a thickness of approximately 36 nm. Multiple samples were subjected to high-temperature annealing at 980 °C for 210 min to achieve boron diffusion, forming a boron emitter 2 on silicon wafer 1, and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polysilicon layer was cleaned using an alkaline-acid solution; the second silicide layer 6 was cleaned using an HF-based acid solution; the first polysilicon layer was cleaned using an alkaline-acid solution; and the first silicide layer 4 and the nano-silicon oxide layer 3 were cleaned using an HF-based acid solution, completely removing the multilayer boron source doped structure. The sample was then subjected to RCA cleaning, and sheet resistance and electrochemical capacitance voltage (ECV) were measured. A 15nm alumina layer was then prepared on the boron emitter 2 for passivation, and the passivation level was measured using a minority carrier lifetime meter (WCT120).

[0055] Example 2 In this embodiment, a boron emitter is fabricated. The multilayer boron source doping structure is similar to that in Example 1. The specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 1.6 nm was grown on the silicon wafer surface using thermal oxidation. A first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer were sequentially deposited on the nano-silicon oxide layer using PECVD. The first silicide layer was a silicon oxide film with a thickness of approximately 10 nm; the first amorphous silicon layer was an intrinsic amorphous silicon film with a thickness of approximately 30 nm; the second silicide layer was a silicon oxide film with a thickness of approximately 30 nm; and the second amorphous silicon layer was a carbon-doped boron amorphous silicon film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980℃ for 210 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polysilicon layer was cleaned using an alkaline-acid solution; the second silicide layer was cleaned using an HF-based acid solution; the first polysilicon layer was cleaned using an alkaline-acid solution; and the first silicide layer and the nano-silicon oxide layer were cleaned using an HF-based acid solution, completely removing the multilayer boron source doped structure. The sample underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15nm alumina layer was fabricated on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0056] Example 3 In this embodiment, a boron emitter is fabricated. The multilayer boron source doping structure is similar to that in Example 1. The specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 1.6 nm was grown on the silicon wafer surface using thermal oxidation. A first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer were sequentially deposited on the nano-silicon oxide layer using PECVD. The first silicide layer was a silicon oxide film with a thickness of approximately 10 nm; the first amorphous silicon layer was an intrinsic amorphous silicon film with a thickness of approximately 60 nm; the second silicide layer was a silicon oxide film with a thickness of approximately 30 nm; and the second amorphous silicon layer was a carbon-doped boron amorphous silicon film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980℃ for 210 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polysilicon layer was cleaned using an alkaline-acid solution; the second silicide layer was cleaned using an HF-based acid solution; the first polysilicon layer was cleaned using an alkaline-acid solution; and the first silicide layer and the nano-silicon oxide layer were cleaned using an HF-based acid solution, completely removing the multilayer boron source doped structure. The sample underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15nm alumina layer was fabricated on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0057] Example 4 In this embodiment, a boron emitter is fabricated. The multilayer boron source doping structure is similar to that in Example 1. The specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 1.6 nm was grown on the silicon wafer surface using thermal oxidation. A first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer were sequentially deposited on the nano-silicon oxide layer using PECVD. The first silicide layer was a silicon oxide film with a thickness of approximately 10 nm; the first amorphous silicon layer was an intrinsic amorphous silicon film with a thickness of approximately 100 nm; the second silicide layer was a silicon oxide film with a thickness of approximately 30 nm; and the second amorphous silicon layer was a carbon-doped boron amorphous silicon film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980℃ for 210 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polysilicon layer was cleaned using an alkaline-acid solution; the second silicide layer was cleaned using an HF-based acid solution; the first polysilicon layer was cleaned using an alkaline-acid solution; and the first silicide layer and the nano-silicon oxide layer were cleaned using an HF-based acid solution, completely removing the multilayer boron source doped structure. The sample underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15nm alumina layer was fabricated on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0058] Example 5 In this embodiment, a boron emitter is fabricated. The multilayer boron source doping structure is similar to that in Example 1. The specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 1.6 nm was grown on the silicon wafer surface using thermal oxidation. A first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer were sequentially deposited on the nano-silicon oxide layer using PECVD. The first silicide layer was a silicon oxide film with a thickness of approximately 10 nm; the first amorphous silicon layer was an intrinsic amorphous silicon film with a thickness of approximately 30 nm; the second silicide layer was a silicon oxide film with a thickness of approximately 30 nm; and the second amorphous silicon layer was a carbon-doped boron amorphous silicon film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 1000℃ for 240 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polysilicon layer was cleaned using an alkaline-acid solution; the second silicide layer was cleaned using an HF-based acid solution; the first polysilicon layer was cleaned using an alkaline-acid solution; and the first silicide layer and the nano-silicon oxide layer were cleaned using an HF-based acid solution, completely removing the multilayer boron source doped structure. The sample underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15nm alumina layer was fabricated on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0059] Example 6 In this embodiment, a boron emitter is fabricated. The multilayer boron source doping structure is similar to that in Example 1. The specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 1.6 nm was grown on the silicon wafer surface using thermal oxidation. A first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer were sequentially deposited on the nano-silicon oxide layer using PECVD. The first silicide layer was a silicon oxide thin film with a thickness of approximately 10 nm; the first amorphous silicon layer was an intrinsic amorphous silicon thin film with a thickness of approximately 30 nm; the second silicide layer was a silicon nitride thin film with a thickness of approximately 30 nm; and the second amorphous silicon layer was a carbon-doped boron amorphous silicon thin film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980℃ for 210 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polysilicon layer was cleaned using an alkaline-acid solution; the second silicide layer was cleaned using an HF-based acid solution; the first polysilicon layer was cleaned using an alkaline-acid solution; and the first silicide layer and the nano-silicon oxide layer were cleaned using an HF-based acid solution, completely removing the multilayer boron source doped structure. The sample underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15nm alumina layer was fabricated on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0060] Example 7 In this embodiment, a boron emitter is fabricated. The multilayer boron source doping structure is similar to that in Example 1. The specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 1.6 nm was grown on the silicon wafer surface using thermal oxidation. A first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer were sequentially deposited on the nano-silicon oxide layer using PECVD. The first silicide layer was a silicon oxide film with a thickness of approximately 10 nm; the first amorphous silicon layer was an intrinsic amorphous silicon film with a thickness of approximately 30 nm, doped with trace amounts of carbon; the second silicide layer was a silicon oxide film with a thickness of approximately 30 nm; and the second amorphous silicon layer was a carbon-doped boron-doped amorphous silicon film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980℃ for 210 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polysilicon layer was cleaned using an alkaline-acid solution; the second silicide layer was cleaned using an HF-based acid solution; the first polysilicon layer was cleaned using an alkaline-acid solution; and the first silicide layer and the nano-silicon oxide layer were cleaned using an HF-based acid solution, completely removing the multilayer boron source doped structure. The sample underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15nm alumina layer was fabricated on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0061] Example 8 In this embodiment, a boron emitter is fabricated. The multilayer boron source doping structure is similar to that in Example 1. The specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 1.6 nm was grown on the silicon wafer surface using thermal oxidation. A first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer were sequentially deposited on the nano-silicon oxide layer using PECVD. The first silicide layer was a silicon oxide film with a thickness of approximately 15 nm; the first amorphous silicon layer was an intrinsic amorphous silicon film with a thickness of approximately 30 nm; the second silicide layer was a silicon oxide film with a thickness of approximately 15 nm; and the second amorphous silicon layer was a carbon-doped boron amorphous silicon film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980℃ for 210 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polysilicon layer was cleaned using an alkaline-acid solution; the second silicide layer was cleaned using an HF-based acid solution; the first polysilicon layer was cleaned using an alkaline-acid solution; and the first silicide layer and the nano-silicon oxide layer were cleaned using an HF-based acid solution, completely removing the multilayer boron source doped structure. The sample underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15nm alumina layer was fabricated on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0062] Example 9 In this embodiment, a boron emitter is fabricated. The multilayer boron source doping structure is similar to that in Example 1. The specific process is as follows: A double-sided planar N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 1.6 nm was grown on the silicon wafer surface using thermal oxidation. A first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer were sequentially deposited on the nano-silicon oxide layer using PECVD. The first silicide layer was a silicon oxide thin film with a thickness of approximately 15 nm; the first amorphous silicon layer was an intrinsic amorphous silicon thin film with a thickness of approximately 30 nm; the second silicide layer was a silicon oxide thin film with a thickness of approximately 15 nm; and the second amorphous silicon layer was a carbon-doped boron amorphous silicon thin film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980℃ for 210 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polysilicon layer was cleaned using an alkaline-acid solution; the second silicide layer was cleaned using an HF-based acid solution; the first polysilicon layer was cleaned using an alkaline-acid solution; and the first silicide layer and the nano-silicon oxide layer were cleaned using an HF-based acid solution, completely removing the multilayer boron source doped structure. The sample underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15nm alumina layer was fabricated on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0063] Example 10 In this embodiment, a boron emitter is fabricated. The multilayer boron source doping structure is similar to that in Example 1. The specific process is as follows: A double-sided planar N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 1.6 nm was grown on the silicon wafer surface using thermal oxidation. A first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer were sequentially deposited on the nano-silicon oxide layer using PECVD. The first silicide layer was a silicon oxide thin film with a thickness of approximately 15 nm; the first amorphous silicon layer was an intrinsic amorphous silicon thin film with a thickness of approximately 30 nm; the second silicide layer was a silicon oxide thin film with a thickness of approximately 30 nm; and the second amorphous silicon layer was a carbon-doped boron amorphous silicon thin film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980℃ for 210 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polysilicon layer was cleaned using an alkaline-acid solution; the second silicide layer was cleaned using an HF-based acid solution; the first polysilicon layer was cleaned using an alkaline-acid solution; and the first silicide layer and the nano-silicon oxide layer were cleaned using an HF-based acid solution, completely removing the multilayer boron source doped structure. The sample underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15nm alumina layer was fabricated on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0064] Comparative Example 1 This comparative example uses LPCVD low-pressure boron diffusion process to prepare boron emitters, and the boron source structure is as follows: Figure 3 As shown, the specific process is as follows: A double-sided textured N-type silicon substrate was prepared and subjected to RCA cleaning. Liquid B₂O₃ and a boron-rich layer (BRL) were formed on silicon wafer 1 using LPCVD with boron tribromide and oxygen as reactants. Multiple samples were subjected to high-temperature diffusion at 1050℃ to form a boron emitter 2 and an outermost borosilicate glass layer 8. The borosilicate glass layer 8 was removed by immersion in high-concentration HF. The samples underwent standard RCA cleaning, and sheet resistance and ECV measurements were performed. A 15nm alumina layer was then prepared on the boron emitter 2 for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0065] Comparative Example 2 This comparative example prepares a boron emitter, and the boron source structure is as follows: Figure 4 As shown, the specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer 3, approximately 1.6 nm thick, was grown on the surface of silicon wafer 1 using thermal oxidation. A first amorphous silicon layer 5 and a second amorphous silicon layer 7 were sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The first amorphous silicon layer 5 was an intrinsic amorphous silicon film with a thickness of approximately 30 nm; the second amorphous silicon layer 7 was a carbon-doped boron amorphous silicon film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980℃ for 210 min to achieve boron diffusion, forming a boron emitter 2 on silicon wafer 1, and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second and first polycrystalline silicon layers were cleaned using an alkaline-acid-based solution; the nano-silicon oxide layer 3 was cleaned using an HF-based acid-based solution to completely remove the boron source structure. The samples underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15 nm alumina layer was prepared on the boron emitter 2 for passivation, and the passivation level of the samples was tested using a minority carrier lifetime meter.

[0066] Comparative Example 3 This comparative example prepares a boron emitter, and the boron source structure is as follows: Figure 5 As shown, the specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer 3, approximately 1.6 nm thick, was grown on the surface of silicon wafer 1 using thermal oxidation. A first silicide layer 4, a first amorphous silicon layer 5, and a boron-doped amorphous silicon layer 9 were sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The first silicide layer 4 is a silicon oxide film with a thickness of approximately 10 nm; the first amorphous silicon layer 5 is an intrinsic amorphous silicon film with a thickness of approximately 30 nm; and the boron-doped amorphous silicon layer 9 is a carbon-free boron-doped amorphous silicon film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980 °C for 210 min to achieve boron diffusion, forming a boron emitter 2 on silicon wafer 1, and transforming the amorphous silicon layer into a polycrystalline silicon layer. The boron-doped polycrystalline silicon layer and the first polycrystalline silicon layer were cleaned using an alkaline-acidic solution; the first silicide layer 4 and the nano-silicon oxide layer 3 were cleaned using an HF acidic solution to completely remove the boron source structure. The sample was subjected to RCA cleaning, and sheet resistance and ECV tests were performed. Then, a 15nm alumina layer was prepared on the boron emitter 2 for passivation, and the passivation level of the sample was tested using a minority carrier lifetime meter.

[0067] Comparative Example 4 This comparative example prepares a boron emitter, and the boron source structure is as follows: Figure 6 As shown, the specific process is as follows: A double-sided textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer 3, approximately 1.6 nm thick, was grown on the surface of silicon wafer 1 using thermal oxidation. A borosilicate oxide layer 10 and a second amorphous silicon layer 7 were sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The borosilicate oxide layer 10 was a borosilicate oxide film with a thickness of approximately 10 nm; the second amorphous silicon layer 7 was a carbon-doped boron amorphous silicon film with a thickness of approximately 54 nm. Multiple samples were subjected to high-temperature annealing at 980℃ for 210 min to achieve boron diffusion, forming a boron emitter 2 on silicon wafer 1, and transforming the amorphous silicon layer into a polycrystalline silicon layer. The second polycrystalline silicon layer was cleaned using an alkaline-acid-based solution; the borosilicate oxide layer 10 and the nano-silicon oxide layer 3 were cleaned using an HF-based acid-based solution to completely remove the boron source structure. The samples underwent RCA cleaning, and sheet resistance and ECV measurements were performed. Then, a 15 nm alumina layer was prepared on the boron emitter 2 for passivation, and the passivation level of the samples was tested using a minority carrier lifetime meter.

[0068] The sheet resistance test results of the boron emitters prepared in the above embodiments and comparative examples are shown in Table 1 below. The numerical ranges shown in the table refer to the range of test results for multiple samples.

[0069] Table 1. Results of boron emitter sheet resistance tests for the examples and comparative examples. sample Examples 1-10 Comparative Example 1 Comparative Example 2 Comparative Example 3 Comparative Example 4 Shear resistance (Ω / sq) 300~600 ~240 ~280 200~300 200~350 It is evident that the sheet resistance of the embodiment is more in line with the wide range of industry requirements at present and future stages and can be adjusted to a higher sheet resistance.

[0070] The ECV test results of the boron emitters prepared in Examples 2, 6, 8, and 9 and Comparative Examples 1 and 2 are as follows: Figure 7 As shown in the figure, the boron surface activation concentration of the boron emitter in the embodiment is lower than that in the comparative example, and there is no arched diffusion curve with a high barrier as in comparative example 1, which is conducive to achieving a better passivation effect. In addition, the junction depth also meets the requirements of laser-assisted sintering (LECO) for boron emitters in the current industry.

[0071] The passivation level test results of the boron emitters in Examples 1-10 and Comparative Examples 1-4 are shown in Table 2 below. The table shows the iV... oc J represents the implied open-circuit voltage. 0,s teff represents the single-sided recombination current density, and teff represents the minority carrier lifetime. The values ​​shown in the table are the average values ​​of test results for multiple samples.

[0072] Table 2. Test results of boron emitter passivation performance in the examples and comparative examples. sample <![CDATA[iV oc (mV)]]> <![CDATA[J 0,s (fA / cm 2 )]]> teff(μs) Example 1 736 5.8 3301 Example 2 735 4.8 3280 Example 3 737 5.5 3369 Example 4 735 5.4 3209 Example 5 736 4.2 3394 Example 6 738 3.8 3601 Example 7 738 4.0 3602 Example 8 737 4.2 3554 Example 9 740 2.6 3651 Example 10 738 3.0 3598 Comparative Example 1 720 12.2 2158 Comparative Example 2 718 13.8 2038 Comparative Example 3 716 13.9 1756 Comparative Example 4 720 12.0 2119 As can be seen from the passivation data, the boron emitter structure prepared in this patent embodiment has a higher implicit open-circuit voltage, a lower single-sided saturation current density, and a higher minority carrier lifetime compared with the comparative example, which is beneficial to improving battery efficiency. Overall, it is more in line with the industrial needs for high passivation and low activation concentration.

[0073] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A multilayer boron source doped structure, characterized in that, The silicon wafer comprises, in sequence, a first silicide layer, a first amorphous silicon layer, a second silicide layer, and a second amorphous silicon layer disposed on a silicon wafer. The first silicide layer is composed of a silicon oxide thin film with a thickness of 5-50 nm. The first amorphous silicon layer is composed of an intrinsic amorphous silicon thin film. The second silicide layer is composed of a silicon oxide thin film and / or a silicon nitride thin film. The second amorphous silicon layer is composed of a carbon-doped boron amorphous silicon thin film with a boron concentration higher than 2 × 10⁻⁶. 20 cm -3 Carbon concentration higher than 1×10 20 cm -3 .

2. The multilayer boron source doping structure according to claim 1, characterized in that, The first amorphous silicon layer contains carbon. And / or, the first amorphous silicon layer contains oxygen, and the oxygen concentration is less than 1 × 10⁻⁶. 20 cm -3 ; And / or, the first amorphous silicon layer contains nitrogen, and the nitrogen concentration is less than 1 × 10⁻⁶. 20 cm -3 ; And / or, the first amorphous silicon layer contains boron, and the boron concentration is less than 1 × 10⁻⁶. 18 cm -3 .

3. The multilayer boron source doping structure according to claim 1, characterized in that, The second silicide layer contains carbon.

4. The multilayer boron source doping structure according to any one of claims 1-3, characterized in that, A nano-silicon oxide layer is provided between the silicon wafer and the first silicide layer, and the thickness of the nano-silicon oxide layer is 0.8~3nm.

5. The multilayer boron source doped structure according to claim 4, characterized in that, The thickness of the first amorphous silicon layer is 5~200nm; And / or, the thickness of the second silicide layer is 10~50 nm; And / or, the thickness of the second amorphous silicon layer is greater than 10 nm.

6. A method for preparing a boron emitter, characterized in that, Includes the following steps: S1. Prepare a multilayer boron source doped structure as described in any one of claims 1-5 on a silicon wafer; S2. High-temperature annealing enables boron diffusion, forming a boron emitter on the silicon wafer; S3. Etching to remove the multilayer boron source doped structure; S4. Prepare a hydrogen-containing dielectric layer to passivate the boron emitter.

7. The method for preparing a boron emitter according to claim 6, characterized in that, Step S1 specifically includes: S11. Prepare a nano-silicon oxide layer on a silicon wafer. The preparation method is selected from one of wet chemical oxidation, thermal oxidation, plasma-assisted oxidation, and ozone oxidation. This step can be omitted. S12. The first silicide layer is prepared on a silicon wafer / nano-silicon oxide layer using the PECVD method; S13. A first amorphous silicon layer is prepared on the first silicide layer using the PECVD method; S14. A second silicide layer is prepared on the first amorphous silicon layer using the PECVD method; S15. A second amorphous silicon layer is prepared on the second silicide layer using the PECVD method.

8. The method for preparing a boron emitter according to claim 6, characterized in that, In step S2, the high-temperature annealing temperature is 900~1100℃.

9. A boron emitter, characterized in that, It is prepared by the preparation method as described in any one of claims 6-8.

10. The boron emitter according to claim 9, characterized in that, The activation concentration of boron on the surface of the boron emitter is less than 1×10⁻⁶. 19 cm -3 The boron concentration decreases from the surface of the boron emitter towards the silicon wafer body.

11. The boron emitter according to claim 10, characterized in that, The boron emitter contains carbon, oxygen, and hydrogen elements, and the carbon concentration on the surface of the boron emitter is higher than 1 × 10⁻⁶. 18 cm -3 Oxygen concentration higher than 1×10 18 cm -3 Hydrogen concentration higher than 1×10 18 cm -3 .

12. A solar cell, characterized in that, Includes the boron emitter as described in any one of claims 9-11.

Images