Composite boron source structure, boron emitter and preparation method thereof, and solar cell

Abstract

The application provides a composite boron source structure, a boron emitter, a preparation method of the boron emitter and a solar cell. The composite boron source structure comprises a first barrier layer, an amorphous silicon layer and a boron silicon nitride layer arranged in sequence on a silicon wafer. The first barrier layer is composed of a silicon oxide film and a silicon nitride film arranged in layers, and the silicon oxide film is arranged close to the silicon wafer, or the first barrier layer is composed of a silicon oxynitride film. The thickness of the first barrier layer is 5-50 nm. The nitrogen concentration in the boron silicon nitride layer is higher than 5*10 21 cm ‑3 -3, and the boron concentration is higher than 1*10 20 cm ‑3 -2. The application discloses an innovative laminated boron doping source structure. The boron concentration on the silicon surface is effectively adjusted by using the difference in boron segregation coefficients between different materials and the blocking effect of silicon nitride / silicon oxynitride on boron diffusion, which helps to reduce the total concentration and active concentration of boron on the silicon surface, thereby improving the passivation quality.

Description

Technical Field

[0001] This invention relates to the field of crystalline silicon solar cell technology, and more specifically, to a composite boron source structure, a boron emitter, a method for preparing the same, and a solar cell. Background Technology

[0002] Crystalline silicon solar cells, as the mainstream product in solar photovoltaics, have long maintained a large market share. The emitter plays an indispensable role in crystalline silicon solar cells. From the phosphorus emitter in PERC solar cells with P-type silicon substrates, to the boron emitter in the now mainstream N-type TOPCon solar cells, and even the potentially industrialized back-junction TOPCon cells and perovskite-crystalline silicon tandem solar cells, high-quality boron emitters all play a crucial role in improving device performance.

[0003] Currently, industrialized TOPCon batteries employ a front-side boron emitter structure. The industry commonly uses low-pressure chemical vapor deposition (LPCVD) to prepare the boron emitter. This involves reacting boron trichloride (BCl3) with O2 to generate B2O3, which then diffuses into the silicon wafer at high temperatures to form the boron emitter. While this technology allows for flexible control of sheet resistance, it reveals the following structural defects in large-scale production: 1) B2O3 has a high boiling point and is mostly liquid at diffusion temperatures, easily depositing on the silicon wafer surface and producing uneven mass distribution, further exacerbating the diffusion uniformity problem. 2) BCl3 produces highly corrosive byproducts such as HCl or Cl2, increasing the difficulty of equipment and pipeline maintenance. 3) LPCVD is a high-temperature chemical vapor deposition process; the source layer deposits everywhere inside the tube. The B2O3 produced during the reaction adheres to the surface of the quartz tube, quartz boat, and other components. As the process progresses, the B2O3 thickness increases, generating significant stress, ultimately leading to the cracking of the quartz tube and boat. 4) The coupling effect with laser selective emitter (SE) technology is limited.

[0004] To address the aforementioned issues, patent documents CN117913156A and CN117913157A disclose a multilayer doped source structure that can balance strong laser absorption capability with high boron doping concentration, resulting in a high passivation level for the boron emitter. However, with further research, the aforementioned source layer structure has encountered bottlenecks, mainly manifested in the following ways: the high boron concentration on the emitter surface obtained by diffusion from the source layer structure makes it difficult to meet the requirements for further improving the passivation quality of the boron emitter; the boron concentration shows a trend of first increasing and then decreasing from the silicon wafer surface to the silicon wafer bulk region, exhibiting a significant arched distribution that forms a barrier to hole transport. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the technical problem to be solved by the present invention is how to reduce the boron concentration in the boron emitter and optimize the boron diffusion distribution.

[0006] To address the aforementioned technical problems, the first aspect of this invention provides a composite boron source structure, comprising a first barrier layer, an amorphous silicon layer, and a borosilicate nitride layer sequentially disposed on a silicon wafer. The first barrier layer is composed of stacked silicon oxide films and silicon nitride films, with the silicon oxide films disposed close to the silicon wafer; alternatively, the first barrier layer is composed of a silicon oxynitride film. The thickness of the first barrier layer is 5-50 nm, and the nitrogen concentration in the borosilicate nitride layer is higher than 5 × 10⁻⁶ nm. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 .

[0007] This invention discloses an innovative stacked boron-doped source structure that utilizes the difference in the segregation coefficient of boron between different materials and the blocking effect of silicon nitride / silicon oxynitride on boron diffusion to effectively regulate the boron concentration on the silicon surface. This helps to reduce the total concentration and activation concentration of boron on the silicon surface, thereby improving the passivation quality.

[0008] Furthermore, the borosilicate nitride layer contains carbon, and the concentration of carbon is higher than 1 × 10⁻⁶. 20 cm -3 Introducing carbon can suppress boron defects in the boron emitter and reduce recombination centers; it also helps to increase the surface hydrogen concentration and improve the passivation effect.

[0009] Furthermore, the first barrier layer contains boron, and the boron concentration in the first barrier layer is lower than the boron concentration in the borosilicate nitride layer. The first barrier layer may be appropriately doped with boron to facilitate uniform boron diffusion; the first barrier layer may also be doped with carbon to improve the stability of the multilayer structure.

[0010] Furthermore, the first barrier layer contains carbon. The carbon doping in the first barrier layer is beneficial for improving the stability of the multilayer structure.

[0011] Furthermore, the amorphous silicon layer contains carbon; and / or, the amorphous silicon layer contains oxygen, and the oxygen concentration is less than 1 × 10⁻⁶. 20 cm -3 ; and / or, the amorphous silicon layer contains nitrogen, and the nitrogen concentration is less than 1 × 10⁻⁶. 20 cm -3 ; and / or, the amorphous silicon layer contains boron, and the boron concentration is less than 1 × 10⁻⁶. 18 cm -3The amorphous silicon layer has strong laser coupling ability. After laser treatment, the boron concentration can be effectively introduced into the silicon surface, thus making it compatible with SE technology. This layer may contain boron, oxygen, and nitrogen elements, but the concentration is significantly lower than that of the borosilicate nitride layer.

[0012] Furthermore, a nano-silicon oxide layer with a thickness of 1-3 nm is provided between the silicon wafer and the first barrier layer. The nano-silicon oxide layer can protect the surface of the silicon wafer, help reduce interface defects, and improve surface quality.

[0013] Furthermore, a second barrier layer is provided between the amorphous silicon layer and the borosilicate nitride layer. The second barrier layer is composed of a silicon nitride thin film or a silicon oxynitride thin film. The second barrier layer blocks the diffusion of boron, further regulating the boron diffusion path and preventing sudden concentration changes.

[0014] Furthermore, the second barrier layer contains carbon. The carbon doping in the second barrier layer is beneficial for improving the stability of the multilayer structure.

[0015] Furthermore, a borosilicate intermediate layer is provided between the first barrier layer and the amorphous silicon layer, and / or a borosilicate intermediate layer is provided between the amorphous silicon layer and the second barrier layer, and / or a borosilicate intermediate layer is provided between the amorphous silicon layer and the borosilicate layer. The boron concentration of the borosilicate intermediate layer is lower than that of the borosilicate layer, and the thickness of the borosilicate intermediate layer is less than that of the borosilicate layer. Providing a borosilicate intermediate layer ensures sufficient diffusion source and optimizes boron diffusion uniformity.

[0016] Furthermore, the thickness of the amorphous silicon layer is 5-100 nm; and / or, the thickness of the second barrier layer is 2-20 nm; and / or, the thickness of the borosilicate nitride layer is greater than 10 nm. By adjusting the thickness of each layer within a defined range, the boron concentration curve can be adjusted to achieve the technical objective of low total boron concentration and low activation concentration on the silicon surface.

[0017] A second aspect of this invention provides a method for preparing a boron emitter, comprising the following steps: S1. The above-mentioned composite boron source structure is prepared on a silicon wafer; S2. High-temperature annealing enables boron diffusion, forming a boron emitter on the silicon wafer; S3. Etching to remove the composite boron source structure; S4. Prepare a hydrogen-containing dielectric layer to passivate the boron emitter.

[0018] Further, step S1 specifically includes: S11. Prepare a nano-silicon oxide layer on a silicon wafer. The preparation method is selected from one of wet chemical oxidation, thermal oxidation, plasma-assisted oxidation, and ozone oxidation. This step can be omitted. S12. The first barrier layer is prepared on the silicon wafer / nano-silicon oxide layer by PECVD method; S13. Prepare a borosilicate intermediate layer on the first barrier layer using PECVD method. This step can be omitted. S14. An amorphous silicon layer is prepared on the first barrier layer / borosilicate intermediate layer using the PECVD method. S15. Prepare a borosilicate intermediate layer on an amorphous silicon layer using PECVD. This step can be omitted. S16. A second barrier layer is prepared on the amorphous silicon layer / borosilicate intermediate layer using PECVD. This step can be omitted. S17. A borosilicate layer is prepared on an amorphous silicon layer / borosilicate intermediate layer / second barrier layer using PECVD.

[0019] This invention uses PECVD to prepare a composite boron source structure with uniform distribution of solid boron doped source; the source layer is deposited only in the region with plasma field, so it only grows on silicon wafers and graphite boats and will not be deposited on the quartz tube wall, thus avoiding damage to quartz components.

[0020] Furthermore, in step S2, the high-temperature annealing temperature is 900~1100℃. At high temperature, boron gradually diffuses from the dopant source structure into the crystalline silicon substrate, causing the amorphous silicon layer to become a polycrystalline silicon layer.

[0021] A third aspect of the present invention provides a boron emitter prepared by the above-described preparation method.

[0022] Furthermore, the activation concentration of boron on the surface of the boron emitter is less than 1×10⁻⁶. 19 cm -3 The boron concentration decreases from the boron emitter surface towards the silicon wafer bulk region. The low activation concentration at the boron emitter surface reduces carrier recombination and improves passivation quality; the boron diffusion curve is more reasonable and does not create a barrier to hole transport and collection.

[0023] Furthermore, the boron emitter contains nitrogen, carbon, oxygen, and hydrogen elements, and the nitrogen concentration on the surface of the boron emitter is higher than 1 × 10⁻⁶. 19 cm -3 Carbon concentration higher than 1×10 18 cm -3 Oxygen concentration higher than 1×10 18 cm -3 Hydrogen concentration higher than 5×10 18 cm -3The boron emitter contains a high concentration of nitrogen, carbon, oxygen, and hydrogen, which can synergistically passivate interface defects and improve passivation quality.

[0024] A fourth aspect of this invention provides a solar cell comprising the aforementioned boron emitter. The boron emitter of this invention has the advantages of high passivation quality and low recombination current, and is suitable for N-type TOPCon, back-junction TOPCon, perovskite-crystalline silicon tandem cells, etc., providing core technological support for the industrialization of high-efficiency solar cells.

[0025] In summary, the present invention has the following beneficial effects: (1) Reduce the boron concentration on the surface of the boron emitter: The present invention designs a composite boron source structure, which adopts a stacked design of silicon oxide, silicon nitride / silicon oxynitride, amorphous silicon, and borosilicate nitride. By utilizing the difference in the segregation coefficient of boron in different materials and the blocking effect of silicon nitride / silicon oxynitride on boron diffusion, the boron concentration on the silicon surface is effectively regulated, significantly reducing the total boron concentration and activation concentration in the boron emitter, thus breaking through the passivation bottleneck of the existing technology.

[0026] (2) Boron distribution curve reconstruction: The emitter prepared by the composite boron source structure of the present invention can gradually reduce the boron activation concentration from the silicon surface to the bulk, eliminate the "arched distribution" of the existing process, avoid hole transport barrier, and improve carrier collection efficiency.

[0027] (3) Improved surface quality: The silicon surface is protected by a nano-silicon oxide layer and a first barrier layer, which helps to reduce interface defects and improve surface quality.

[0028] (4) Suppressing boron defects: Introducing carbon elements into the boron source structure can suppress boron defects in the boron emitter and reduce recombination centers; and it is also beneficial to increase the surface hydrogen concentration and improve the passivation effect.

[0029] (5) Boron source is easy to etch: There is a significant etching selectivity among the material components of each layer in the composite boron source structure, which is easy to wet etch.

[0030] (6) Compatible with SE technology: The boron concentration on the surface of the boron emitter obtained by using the composite boron source structure is lower, and the boron activation concentration in the heavily doped selective emitter region formed after laser SE doping is also lower, making it more compatible with laser selective emitter technology.

[0031] (7) Uniform distribution of boron source: The solid composite boron source prepared by PECVD has good structural uniformity, and the plasma field only acts on the surface of silicon wafer and graphite boat, avoiding the risk of quartz tube contamination and breakage. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the composite boron source structure in a specific embodiment of the present invention.

[0033] Figure 2 This is a schematic diagram of the composite boron source structure in Embodiment 1 of the present invention.

[0034] Figure 3 This is a schematic diagram of the composite boron source structure in Embodiment 2 of the present invention.

[0035] Figure 4 This is a schematic diagram of the composite boron source structure in Embodiment 5 of the present invention.

[0036] Figure 5 This is a schematic diagram of the composite boron source structure in Embodiment 6 of the present invention.

[0037] Figure 6 This is a schematic diagram of the composite boron source structure in Embodiment 8 of the present invention.

[0038] Figure 7 This is a schematic diagram of the composite boron source structure in Embodiment 9 of the present invention.

[0039] Figure 8 This is a schematic diagram of the composite boron source structure in Embodiment 10 of the present invention.

[0040] Figure 9 This is a schematic diagram of the composite boron source structure in Embodiment 12 of the present invention.

[0041] Figure 10 This is a schematic diagram of the boron source structure in Comparative Example 1 of the present invention.

[0042] Figure 11 This is a schematic diagram of the boron source structure in Comparative Example 3 of the present invention.

[0043] Figure 12 This is a schematic diagram of the boron source structure in Comparative Example 4 of the present invention.

[0044] Figure 13 The graph shows the electrochemical capacitance voltage test results of the boron emitters prepared in the embodiments and comparative examples of the present invention.

[0045] Explanation of reference numerals in the attached figures: 1-Silicon wafer, 2-Boron emitter, 3-Nano silicon oxide layer, 4-First barrier layer, 5-Amorphous silicon layer, 6-Second barrier layer, 7-Borosilicate nitride layer, 8-Borosilicate nitride intermediate layer, 9-Borosilicate glass layer, 10-Boron-doped amorphous silicon layer, 11-Silicon nitride layer. Detailed Implementation

[0046] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the following embodiments are only used to illustrate the implementation methods and typical parameters of the present invention, and are not intended to limit the parameter range described in the present invention. Reasonable variations derived therefrom are still within the protection scope of the claims of the present invention.

[0047] It should be noted that the endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of the various ranges, the endpoint values ​​of the various ranges and individual point values, and individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein.

[0048] Specific embodiments of the present invention provide a composite boron source structure and a method for preparing a boron emitter using the composite boron source structure. A typical structure of the composite boron source structure is as follows: Figure 1 As shown, it includes a nano-silicon oxide layer 3, a first barrier layer 4, an amorphous silicon layer 5, a second barrier layer 6 and a borosilicate nitride layer 7 sequentially disposed on a silicon wafer 1, and a boron emitter 2 is formed on the surface of the silicon wafer 1 after boron diffusion.

[0049] In a specific embodiment, the nano-silicon oxide layer 3 is composed of a silicon oxide thin film, mainly composed of silicon and oxygen, with a typical thickness of 1~3 nm, and can protect the surface of the silicon wafer 1. In some embodiments, the nano-silicon oxide layer 3 can be omitted.

[0050] In specific embodiments, the first barrier layer 4 is deposited using CVD, with a typical thickness of 5-50 nm. In some embodiments, this layer consists of stacked silicon oxide and silicon nitride films, wherein the silicon oxide film is disposed close to the silicon wafer 1. In other embodiments, this layer consists of a silicon oxynitride film. The first barrier layer 4 may contain boron, and the boron concentration is lower than that in the borosilicate nitride layer; this layer may also contain carbon.

[0051] In a specific embodiment, the amorphous silicon layer 5 is mainly composed of silicon, with a typical thickness of 5~100 nm. The amorphous silicon layer 5 may contain carbon; it may also contain small amounts of oxygen and nitrogen elements, with a concentration less than 1×10⁻⁶. 20 cm -3 This layer may also contain trace amounts of boron, with a concentration less than 1 × 10⁻⁶. 18 cm -3 .

[0052] In specific embodiments, the thickness of the second barrier layer 6 is 2~20 nm. In some embodiments, the second barrier layer is composed of a silicon nitride thin film; in other embodiments, the second barrier layer 6 is composed of a silicon oxynitride thin film. The second barrier layer 6 may contain carbon elements. In some embodiments, the second barrier layer 6 may be omitted.

[0053] In specific embodiments, the thickness of the borosilicate nitride layer 7 is typically greater than 10 nm, and the main component of this layer is silicon nitride, wherein the nitrogen concentration is higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 In some embodiments, the borosilicate layer 7 further has carbon doping, and the carbon concentration is higher than 1 × 10⁻⁶. 20 cm -3 .

[0054] It should be noted that in some embodiments, the first barrier layer 4, the amorphous silicon layer 5, the second barrier layer 6, and the borosilicate nitride layer 7 have a sublayer structure, and the thickness and composition of each layer in the sublayer structure may be the same or different.

[0055] In some embodiments, a borosilicate intermediate layer (not shown in the figure) may be provided between the first barrier layer 4, the amorphous silicon layer 5, the second barrier layer 6 and the borosilicate layer 7, and the boron concentration and thickness of the borosilicate intermediate layer are less than those of the borosilicate layer 7.

[0056] The method for preparing a boron emitter using the above-mentioned composite boron source structure includes the following steps: (1) Cleaning of silicon wafer 1 surface.

[0057] (2) A nano-silicon oxide layer 3 is prepared on silicon wafer 1. The preparation method can be wet chemical oxidation, thermal oxidation, plasma-assisted oxidation, ozone oxidation, etc.

[0058] (3) A first barrier layer 4, an amorphous silicon layer 5, a second barrier layer 6 and a borosilicate nitride layer 7 were sequentially deposited on the nano-silicon oxide layer 3 by PECVD to obtain a five-layer composite boron source structure.

[0059] (4) High-temperature annealing achieves the diffusion of boron. The typical temperature is 900~1100℃. A boron emitter 2 is formed on the silicon wafer 1, and the amorphous silicon layer 5 is transformed into a polycrystalline silicon layer.

[0060] (5) Etching to remove the composite boron source structure. Specifically, the borosilicate layer 7 and the second barrier layer 6 can be etched using an HF acid-based solution; the polysilicon layer can be etched using an alkaline acid-based solution; and the first barrier layer 4 and the nano-silicon oxide layer 3 can be etched using an HF acid-based solution. In some embodiments, various additive materials can be used in the solution cleaning process.

[0061] (6) Prepare a hydrogen-containing dielectric layer to passivate the boron emitter 2. The hydrogen-containing dielectric layer is usually made of materials such as alumina, silicon nitride, silicon oxide, or a combination thereof.

[0062] In a specific embodiment, the activation concentration of boron on the surface of the boron emitter 2 prepared by the above method is less than 1×10⁻⁶. 19 cm -3 The boron concentration decreases from the surface to the bulk region of silicon wafer 1; the boron emitter 2 contains carbon, oxygen, and hydrogen elements, with the carbon surface concentration exceeding 1×10⁻⁶. 18 cm -3 Oxygen surface concentration higher than 1×10 18 cm -3 The surface hydrogen concentration is higher than 5×10 18 cm -3 .

[0063] The above technical solution, by combining the composite boron source structure design with the PECVD process, systematically solves the problems of poor uniformity, low passivation quality, and safety hazards in traditional boron expansion technology. It reduces the boron activation concentration on the surface of the boron emitter, provides a passivation effect, and ensures process safety and mass production economy. This technology is applicable to various types of solar cells and provides key support for the upgrading of high-efficiency solar cell technology.

[0064] The technical solution and effects of the present invention will be described below through specific embodiments.

[0065] Example 1 In this embodiment, a boron emitter is prepared, and the composite boron source structure is as follows: Figure 2 As shown, the specific process is as follows: Prepare a double-sided textured N-type crystalline silicon substrate and perform RCA cleaning. A nano-silicon oxide layer 3, approximately 2 nm thick, is grown on the surface of silicon wafer 1 using hydrogen peroxide oxidation. A first barrier layer 4, an amorphous silicon layer 5, a second barrier layer 6, and a borosilicate nitride layer 7 are sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The first barrier layer 4 is a stack of 5 nm silicon oxide and 5 nm silicon nitride films; the amorphous silicon layer 5 is approximately 100 nm thick; the second barrier layer 6 is a silicon nitride film approximately 10 nm thick; and the borosilicate nitride layer 7 is approximately 30 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, forming a boron emitter 2 on silicon wafer 1 and transforming the amorphous silicon layer 5 into a polycrystalline silicon layer. The wafer was then held at 800℃ for 90 min and cooled. The borosilicate layer 7 and the second barrier layer 6 were etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer 4 and the nano-silicon oxide layer 3 were etched using an HF acid-based solution, completely removing the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and electrochemical capacitance voltage (ECV) were measured. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter 2 for passivation, and the passivation level was measured using a minority carrier lifetime meter (WCT120).

[0066] Example 2 In this embodiment, a boron emitter is prepared, and the composite boron source structure is as follows: Figure 3 As shown, the specific process is as follows: A double-textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer 3, approximately 2 nm thick, was grown on the surface of silicon wafer 1 using hydrogen peroxide oxidation. A first barrier layer 4, an amorphous silicon layer 5, and a borosilicate nitride layer 7 were sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The first barrier layer 4 is a stack of a 5 nm silicon oxide film and a 5 nm silicon nitride film; the amorphous silicon layer 5 is approximately 100 nm thick; and the borosilicate nitride layer 7 is approximately 30 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer 5 into a polycrystalline silicon layer, and forming a boron emitter 2 on silicon wafer 1. The samples were then held at 800℃ for 90 min and cooled. The boron-silicon nitride layer 7 was etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer 4 and the nano-silicon oxide layer 3 were etched using an HF acid-based solution to completely remove the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV tests were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter 2 for passivation, and the passivation level was tested using a minority carrier lifetime meter.

[0067] Example 3 The boron emitter is prepared in this embodiment, and the specific process is as follows: Prepare a double-textured N-type crystalline silicon substrate and perform RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 2 nm is grown on the silicon wafer surface using hydrogen peroxide oxidation. A first barrier layer, an amorphous silicon layer, a second barrier layer, and a borosilicate nitride layer are sequentially deposited on the nano-silicon oxide layer using PECVD. The first barrier layer is a silicon oxynitride film with a thickness of approximately 10 nm; the amorphous silicon layer is approximately 100 nm thick; the second barrier layer is a silicon nitride film with a thickness of approximately 10 nm; and the borosilicate nitride layer is approximately 30 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer into a polycrystalline silicon layer and forming a boron emitter on the silicon wafer. The samples were then held at 800℃ for 90 min and cooled. The borosilicate layer and the second barrier layer were etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer and the nano-silicon oxide layer were etched again using an HF acid-based solution, completely cleaning and removing the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV measurements were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0068] Example 4 The boron emitter is prepared in this embodiment, and the specific process is as follows: A double-textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer, approximately 2 nm thick, was grown on the silicon wafer surface using hydrogen peroxide oxidation. A first barrier layer, an amorphous silicon layer, and a borosilicate nitride layer were then sequentially deposited on the nano-silicon oxide layer using PECVD. The first barrier layer was a silicon oxynitride film approximately 10 nm thick; the amorphous silicon layer was approximately 100 nm thick; and the borosilicate nitride layer was approximately 30 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer into a polycrystalline silicon layer and forming a boron emitter on the silicon wafer. The samples were then held at 800℃ for 90 min and cooled. The borosilicate layer was etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer and nano-silicon oxide layer were etched again using an HF acid-based solution to completely remove the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV measurements were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0069] Example 5 In this embodiment, a boron emitter is prepared, and the composite boron source structure is as follows: Figure 4 As shown, the specific process is as follows: Prepare a double-sided textured N-type crystalline silicon substrate and perform RCA cleaning. A nano-silicon oxide layer 3, approximately 1.5 nm thick, is grown on the surface of silicon wafer 1 using nitric acid oxidation. A first barrier layer 4, a borosilicate interlayer 8, an amorphous silicon layer 5, and a borosilicate layer 7 are sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The first barrier layer 4 is a stack of a 5 nm silicon oxide film and a 10 nm silicon nitride film; the borosilicate interlayer 8 is approximately 10 nm thick, with a lower boron content than the borosilicate layer 7; the amorphous silicon layer 5 is approximately 50 nm thick; and the borosilicate layer 7 is approximately 50 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer 5 into a polycrystalline silicon layer, and forming a boron emitter 2 on silicon wafer 1. The samples were then held at 800℃ for 90 min and cooled. The borosilicate nitride layer 7 was etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and then the borosilicate intermediate layer 8, the first barrier layer 4, and the nano-silicon oxide layer 3 were etched using an HF acid-based solution to completely remove the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV tests were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter 2 for passivation, and the passivation level was tested using a minority carrier lifetime meter.

[0070] Example 6 In this embodiment, a boron emitter is prepared, and the composite boron source structure is as follows: Figure 5 As shown, the specific process is as follows: Prepare a double-textured N-type crystalline silicon substrate and perform RCA cleaning. A nano-silicon oxide layer 3, approximately 1.5 nm thick, is grown on the surface of silicon wafer 1 using nitric acid oxidation. A first barrier layer 4, a borosilicate nitride interlayer 8, an amorphous silicon layer 5, a second barrier layer 6, and a borosilicate nitride layer 7 are sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The first barrier layer 4 is a stack of a 5 nm silicon oxide film and a 10 nm silicon nitride film; the borosilicate nitride interlayer 8 is approximately 10 nm thick, with a lower boron content than the borosilicate nitride layer 7; the amorphous silicon layer 5 is approximately 50 nm thick; the second barrier layer 6 is a silicon nitride film with a thickness of approximately 10 nm; and the borosilicate nitride layer 7 is approximately 50 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer 5 into a polycrystalline silicon layer, and forming a boron emitter 2 on silicon wafer 1. The samples were then held at 800℃ for 90 min and cooled. The borosilicate layer 7 and the second barrier layer 6 were etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the borosilicate intermediate layer 8, the first barrier layer 4, and the nano-silicon oxide layer 3 were etched using an HF acid-based solution to completely remove the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV tests were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter 2 for passivation, and the passivation level was tested using a minority carrier lifetime meter.

[0071] Example 7 The boron emitter is prepared in this embodiment, and the specific process is as follows: Prepare a double-textured N-type crystalline silicon substrate and perform RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 1.5 nm is grown on the silicon wafer surface using nitric acid oxidation. A first barrier layer, a borosilicate interlayer, an amorphous silicon layer, and a borosilicate nitride layer are sequentially deposited on the nano-silicon oxide layer using PECVD. The first barrier layer is a silicon oxynitride film with a thickness of approximately 15 nm; the borosilicate interlayer is approximately 10 nm thick, with a lower boron content than the borosilicate nitride layer; the amorphous silicon layer is approximately 50 nm thick; and the borosilicate nitride layer is approximately 50 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer 5 into a polycrystalline silicon layer and forming a boron emitter on the silicon wafer. The wafers were then held at 800℃ for 90 min and cooled. The borosilicate nitride layer was etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the borosilicate intermediate layer, first barrier layer, and nano-silicon oxide layer were etched again using an HF acid-based solution to completely remove the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV measurements were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0072] Example 8 In this embodiment, a boron emitter is prepared, and the composite boron source structure is as follows: Figure 6 As shown, the specific process is as follows: Prepare a double-sided textured N-type crystalline silicon substrate and perform RCA cleaning. A nano-silicon oxide layer 3, approximately 1 nm thick, is grown on the surface of silicon wafer 1 using thermal oxidation. A first barrier layer 4, an amorphous silicon layer 5, a borosilicate interlayer 8, and a borosilicate layer 7 are sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The first barrier layer 4 is a silicon oxynitride thin film with a thickness of 20 nm, doped with trace amounts of carbon. The amorphous silicon layer 5 is approximately 50 nm thick. The borosilicate interlayer 8 is approximately 10 nm thick, with a lower boron content than the borosilicate layer 7. The borosilicate layer 7 is approximately 25 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer 5 into a polycrystalline silicon layer, and forming a boron emitter 2 on silicon wafer 1. The samples were then held at 800℃ for 90 min and cooled. The borosilicate nitride layer 7 and the borosilicate intermediate layer 8 were etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer 4 and the nano-silicon oxide layer 3 were etched using an HF acid-based solution, completely removing the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV tests were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter 2 for passivation, and the passivation level was tested using a minority carrier lifetime meter.

[0073] Example 9 In this embodiment, a boron emitter is prepared, and the composite boron source structure is as follows: Figure 7 As shown, the specific process is as follows: Prepare a double-sided textured N-type crystalline silicon substrate and perform RCA cleaning. A nano-silicon oxide layer 3, approximately 1 nm thick, is grown on the surface of silicon wafer 1 using thermal oxidation. A first barrier layer 4, an amorphous silicon layer 5, a second barrier layer 6, a borosilicate interlayer 8, and a borosilicate layer 7 are sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The first barrier layer 4 is a silicon oxynitride film with a thickness of 20 nm, doped with trace amounts of carbon. The amorphous silicon layer 5 is approximately 50 nm thick. The second barrier layer 6 is a silicon nitride film with a thickness of approximately 10 nm, doped with trace amounts of carbon. The borosilicate interlayer 8 is approximately 10 nm thick, with a lower boron content than the borosilicate layer 7. The borosilicate layer 7 is approximately 25 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer 5 into a polycrystalline silicon layer, and forming a boron emitter 2 on silicon wafer 1. The samples were then held at 800℃ for 90 min and cooled. The borosilicate nitride layer 7, the borosilicate intermediate layer 8, and the second barrier layer 6 were etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer 4 and the nano-silicon oxide layer 3 were etched using an HF acid-based solution, completely removing the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV tests were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter 2 for passivation, and the passivation level was tested using a minority carrier lifetime meter.

[0074] Example 10 In this embodiment, a boron emitter is prepared, and the composite boron source structure is as follows: Figure 8 As shown, the specific process is as follows: Prepare a double-sided textured N-type crystalline silicon substrate and perform RCA cleaning. A nano-silicon oxide layer 3, approximately 1 nm thick, is grown on the surface of silicon wafer 1 using thermal oxidation. Then, a first barrier layer 4, an amorphous silicon layer 5, a borosilicate interlayer 8, a second barrier layer 6, and a borosilicate layer 7 are sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The first barrier layer 4 is a silicon oxynitride thin film with a thickness of 20 nm; the amorphous silicon layer 5 is approximately 50 nm thick; the borosilicate interlayer 8 is approximately 10 nm thick, with a lower boron content than the borosilicate layer 7; the second barrier layer 6 is a silicon nitride thin film with a thickness of approximately 10 nm; and the borosilicate layer 7 is approximately 25 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm-3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer 5 into a polycrystalline silicon layer, and forming a boron emitter 2 on silicon wafer 1. The samples were then held at 800℃ for 90 min and cooled. The borosilicate nitride layer 7, the borosilicate intermediate layer 8, and the second barrier layer 6 were etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer 4 and the nano-silicon oxide layer 3 were etched using an HF acid-based solution, completely removing the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV tests were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter 2 for passivation, and the passivation level was tested using a minority carrier lifetime meter.

[0075] Example 11 The boron emitter is prepared in this embodiment, and the specific process is as follows: Prepare a double-textured N-type crystalline silicon substrate and perform RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 2 nm is grown on the silicon wafer surface using hydrogen peroxide oxidation. A first barrier layer, an amorphous silicon layer, a second barrier layer, and a borosilicate nitride layer are sequentially deposited on the nano-silicon oxide layer using PECVD. The first barrier layer is a silicon oxynitride film with a thickness of approximately 15 nm; the amorphous silicon layer is approximately 100 nm thick; the second barrier layer is a silicon oxynitride film with a thickness of approximately 10 nm; and the borosilicate nitride layer is approximately 30 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The samples were then held at 800℃ for 90 min and cooled. The boron-silicon nitride layer and the second barrier layer were etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer and the nano-silicon oxide layer were etched again using an HF acid-based solution, completely removing the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV measurements were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0076] Example 12 In this embodiment, a boron emitter is prepared, and the composite boron source structure is as follows: Figure 9 As shown, the specific process is as follows: Prepare a double-sided textured N-type crystalline silicon substrate and perform RCA cleaning. Then, using PECVD, sequentially deposit a first barrier layer 4, an amorphous silicon layer 5, a second barrier layer 6, and a borosilicate nitride layer 7 on the surface of silicon wafer 1. The first barrier layer 4 is a stack of 5nm silicon oxide and 5nm silicon nitride films; the amorphous silicon layer 5 is approximately 100nm thick; the second barrier layer 6 is a silicon nitride film with a thickness of approximately 10nm; and the borosilicate nitride layer 7 is approximately 30nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, forming a boron emitter 2 on silicon wafer 1 and transforming the amorphous silicon layer 5 into a polycrystalline silicon layer. The wafer was then held at 800℃ for 90 min and cooled. The borosilicate layer 7 and the second barrier layer 6 were etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer 4 and the nano-silicon oxide layer 3 were etched using an HF acid-based solution, completely removing the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV tests were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter 2 for passivation, and the passivation level was tested using a minority carrier lifetime meter.

[0077] Example 13 Prepare a double-textured N-type crystalline silicon substrate and perform RCA cleaning. Then, sequentially deposit a first barrier layer, an amorphous silicon layer, and a borosilicate nitride layer on the silicon wafer surface using PECVD. The first barrier layer is a silicon oxynitride film with a thickness of approximately 10 nm; the amorphous silicon layer is approximately 100 nm thick; and the borosilicate nitride layer is approximately 30 nm thick with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer into a polycrystalline silicon layer and forming a boron emitter on the silicon wafer. The samples were then held at 800℃ for 90 min and cooled. The borosilicate layer was etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer and nano-silicon oxide layer were etched again using an HF acid-based solution to completely remove the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV measurements were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0078] Example 14 In this embodiment, a boron emitter is prepared. The composite boron source structure is the same as in Example 1. The specific process is as follows: A double-sided planar N-type crystalline silicon substrate was prepared, and surface damage was removed using tetramethylammonium hydroxide followed by RCA cleaning. A nano-silicon oxide layer with a thickness of approximately 2 nm was grown on the silicon wafer surface using hydrogen peroxide oxidation. A first barrier layer, an amorphous silicon layer, a second barrier layer, and a borosilicate nitride layer were sequentially deposited on the nano-silicon oxide layer using PECVD. The first barrier layer consisted of a stack of 5 nm silicon oxide and 5 nm silicon nitride films; the amorphous silicon layer was approximately 100 nm thick; the second barrier layer was a silicon nitride film with a thickness of approximately 10 nm; and the borosilicate nitride layer was approximately 30 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3 Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, forming a boron emitter on the silicon wafer and transforming the amorphous silicon layer into a polycrystalline silicon layer. The samples were then held at 800℃ for 90 min and cooled. The boron-silicon nitride layer and the second barrier layer were etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer and the nano-silicon oxide layer were etched again using an HF acid-based solution, completely removing the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV measurements were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0079] Example 15 In this embodiment, a boron emitter is prepared. The composite boron source structure is the same as in Example 3. The specific process is as follows: A nano-silicon oxide layer with a thickness of approximately 2 nm was grown on the surface of a silicon wafer using hydrogen peroxide oxidation. A first barrier layer, an amorphous silicon layer, a second barrier layer, and a borosilicate nitride layer were then sequentially deposited on the nano-silicon oxide layer using PECVD. The first barrier layer is a silicon oxynitride film with a thickness of approximately 10 nm; the amorphous silicon layer is approximately 100 nm thick; the second barrier layer is a silicon nitride film with a thickness of approximately 10 nm; and the borosilicate nitride layer is approximately 30 nm thick, with a nitrogen concentration higher than 5 × 10⁻⁶. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3Multiple samples were subjected to high-temperature annealing at 980℃ and 1000℃ for 240 min to achieve boron diffusion, transforming the amorphous silicon layer into a polycrystalline silicon layer and forming a boron emitter on the silicon wafer. The samples were then held at 800℃ for 90 min and cooled. The borosilicate layer and the second barrier layer were etched using an HF acid-based solution; the polycrystalline silicon layer was etched using an alkaline acid-based solution; and the first barrier layer and the nano-silicon oxide layer were etched again using an HF acid-based solution, completely cleaning and removing the composite boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV measurements were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0080] Comparative Example 1 This comparative example uses LPCVD low-pressure boron diffusion process to prepare boron emitters, and the boron source structure is as follows: Figure 10 As shown, the specific process is as follows: A double-sided textured N-type silicon substrate was prepared and subjected to RCA cleaning. Liquid B₂O₃ and a boron-rich layer (BRL) were formed on silicon wafer 1 using LPCVD with boron tribromide and oxygen as reactants. Multiple samples were subjected to high-temperature diffusion at 1050℃ to form a boron emitter 2 and an outermost borosilicate glass layer 9. The borosilicate glass layer 9 was removed by immersion in high-concentration HF. The samples underwent standard RCA cleaning, and sheet resistance and ECV measurements were performed. A 15nm alumina layer was then prepared on the boron emitter 2 for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0081] Comparative Example 2 This comparative example uses LPCVD low-pressure boron diffusion process to prepare boron emitters. The specific process is as follows: A double-sided textured N-type silicon substrate was prepared and subjected to RCA cleaning. Liquid B₂O₃ and a boron-rich layer (BRL) were formed on the silicon wafer using LPCVD with boron tribromide and oxygen as reactants. Multiple samples underwent high-temperature diffusion at 1050℃ to form a boron emitter and an outermost borosilicate glass layer, followed by holding at 800℃ for 90 min. The borosilicate glass layer was removed by immersion in high-concentration HF. The samples were then subjected to standard RCA cleaning, and sheet resistance and ECV measurements were performed. A 15 nm alumina layer was then prepared on the boron emitter for passivation, and the passivation level was measured using a minority carrier lifetime meter.

[0082] Comparative Example 3 This comparative example prepares a boron emitter, and the boron source structure is as follows: Figure 11 As shown, the specific process is as follows: A double-textured N-type crystalline silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer 3, approximately 2 nm thick, was grown on the surface of silicon wafer 1 using hydrogen peroxide oxidation. A borosilicate nitride layer 7 and a boron-doped amorphous silicon layer 10 were then sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The borosilicate nitride layer 7 was approximately 30 nm thick and contained an oxygen concentration higher than 1 × 10⁻⁶. 22 cm -3 Boron concentration higher than 1×10 20 cm -3 The boron-doped amorphous silicon layer 10 is approximately 30 nm thick and is mainly composed of silicon. The boron concentration in this layer is higher than 1 × 10⁻⁶. 20 cm -3 Multiple samples underwent high-temperature annealing at 1000℃ for 240 min to achieve boron diffusion, forming a boron emitter 2 on silicon wafer 1. The boron-doped amorphous silicon layer 10 was transformed into a boron-doped polycrystalline silicon layer, followed by holding at 800℃ for 90 min and then cooling. The boron-doped polycrystalline silicon layer was etched using an alkaline-acidic solution; then, the boron-silicon nitride layer 7 and the nano-silicon oxide layer 3 were etched using an HF acidic solution, completely removing the boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV tests were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter 2 for passivation, and the passivation level was tested using a minority carrier lifetime meter.

[0083] Comparative Example 4 This comparative example prepares a boron emitter, and the boron source structure is as follows: Figure 12 As shown, the specific process is as follows: A double-sided textured N-type silicon substrate was prepared and subjected to RCA cleaning. A nano-silicon oxide layer 3, approximately 2 nm thick, was grown on the surface of silicon wafer 1 using hydrogen peroxide oxidation. A silicon nitride layer 11 and a borosilicate nitride layer 7 were then sequentially deposited on the nano-silicon oxide layer 3 using PECVD. The silicon nitride layer 11 was approximately 50 nm thick and contained trace amounts of carbon, with a concentration less than 1 × 10⁻⁶. 18 cm -3 The borosilicate nitride layer 7 is approximately 30 nm thick, and the oxygen concentration in this layer is higher than 1 × 10⁻⁶. 22 cm -3 Boron concentration higher than 1×10 20 cm -3 This layer also contains carbon elements at a concentration higher than 1×10⁻⁶. 20 cm -3Multiple samples were subjected to high-temperature annealing at 1000℃ for 240 min to achieve boron diffusion, forming a boron emitter 2 on silicon wafer 1. The wafer was then held at 800℃ for 90 min and cooled. The boron-silicon nitride layer 7, silicon nitride layer 11, and nano-silicon oxide layer 3 were etched using an HF acid-based solution to completely remove the boron source structure. The samples were then subjected to RCA cleaning, and sheet resistance and ECV measurements were performed. A 15 nm alumina layer and a 50 nm silicon nitride layer were then prepared on the boron emitter 2 for passivation. The passivation level of the samples was measured using a minority carrier lifetime meter.

[0084] The sheet resistance test results of boron emitters in Examples 1-15 are shown in Table 1 below, and the sheet resistance test results of boron emitters in Comparative Examples 1-4 are shown in Table 2 below. The numerical ranges shown in the tables refer to the range of test results for multiple samples.

[0085] Table 1. Results of boron emitter sheet resistance test in the example.

[0086] Table 2 Comparative Boron Emitter Sheet Resistance Test Results

[0087] It is evident that the sheet resistance of the embodiment better meets the industry requirement of an adjustable higher sheet resistance range, and satisfies the rule that it decreases as the annealing temperature increases.

[0088] The ECV test results of the boron emitters prepared in Examples 1, 2, 3, and 5 and Comparative Examples 2, 3, and 4 are as follows: Figure 13 As shown in the figure, the boron surface activation concentration of the boron emitter in the embodiment is lower than that in the comparative example, which is beneficial to achieving a better passivation effect. In addition, the junction depth also meets the requirements of the current industry for boron emitters in laser-assisted sintering (LECO).

[0089] The passivation level test results of the boron emitters in Examples 1-15 and Comparative Examples 1-4 are shown in Table 3 below. The table shows the iV... oc J represents the implied open-circuit voltage. 0,s teff represents the single-sided recombination current density, and teff represents the minority carrier lifetime. The test results for each embodiment shown in the table correspond to samples annealed at 1000°C, and the values ​​shown in the table are the average values ​​of test results for multiple samples.

[0090] Table 3. Test results of boron emitter passivation performance in the examples and comparative examples. sample <![CDATA[iV oc (mV)]]> <![CDATA[J 0,s (fA / cm 2 )]]> teff(μs) Example 1 740 4.0 4012 Example 2 739 4.2 3972 Example 3 738 4.5 3820 Example 4 739 4.8 3854 Example 5 736 5.8 3791 Example 6 736 6.2 3697 Example 7 737 6.0 3756 Example 8 738 5.2 3811 Example 9 738 5.6 3987 Example 10 735 6.5 3488 Example 11 736 6.0 3275 Example 12 737 5.2 3787 Example 13 737 5.6 3876 Example 14 740 3.9 3921 Example 15 741 4.0 4005 Comparative Example 1 720 11.2 2023 Comparative Example 2 734 6.1 3774 Comparative Example 3 714 17 1812 Comparative Example 4 718 14.2 2121 As can be seen from the passivation data, the boron emitter structure prepared in this patent embodiment has a higher implicit open-circuit voltage, a lower single-sided saturation current density, and a higher minority carrier lifetime compared with the comparative example, which is beneficial to improving battery efficiency. Overall, it is more in line with the industrial needs for high passivation and low activation concentration.

[0091] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A composite boron source structure, characterized in that, The system comprises a first barrier layer, an amorphous silicon layer, and a borosilicate nitride layer sequentially disposed on a silicon wafer. The first barrier layer consists of a stacked silicon oxide film and a silicon nitride film, with the silicon oxide film disposed close to the silicon wafer. Alternatively, the first barrier layer may consist of a silicon oxynitride film. The thickness of the first barrier layer is 5-50 nm, and the nitrogen concentration in the borosilicate nitride layer is higher than 5 × 10⁻⁶ nm. 21 cm -3 Boron concentration higher than 1×10 20 cm -3 .

2. The composite boron source structure according to claim 1, characterized in that, The borosilicate nitride layer contains carbon, and the concentration of carbon is higher than 1×10⁻⁶. 20 cm -3 .

3. The composite boron source structure according to claim 1, characterized in that, The first barrier layer contains boron, and the boron concentration in the first barrier layer is lower than the boron concentration in the borosilicate nitride layer. And / or, the first barrier layer contains carbon.

4. The composite boron source structure according to claim 1, characterized in that, The amorphous silicon layer contains carbon. And / or, the amorphous silicon layer contains oxygen, and the oxygen concentration is less than 1 × 10⁻⁶. 20 cm -3 ; And / or, the amorphous silicon layer contains nitrogen, and the nitrogen concentration is less than 1 × 10⁻⁶. 20 cm -3 ; And / or, the amorphous silicon layer contains boron, and the boron concentration is less than 1 × 10⁻⁶. 18 cm -3 .

5. The composite boron source structure according to claim 1, characterized in that, A nano-silicon oxide layer is provided between the silicon wafer and the first barrier layer, and the thickness of the nano-silicon oxide layer is 1~3nm.

6. The composite boron source structure according to any one of claims 1-5, characterized in that, A second barrier layer is provided between the amorphous silicon layer and the borosilicate nitride layer, the second barrier layer being composed of a silicon nitride thin film or a silicon oxynitride thin film.

7. The composite boron source structure according to claim 6, characterized in that, The second barrier layer contains carbon.

8. The composite boron source structure according to claim 6, characterized in that, A borosilicate intermediate layer is provided between the first barrier layer and the amorphous silicon layer, and / or a borosilicate intermediate layer is provided between the amorphous silicon layer and the second barrier layer, and / or a borosilicate intermediate layer is provided between the amorphous silicon layer and the borosilicate layer, wherein the boron concentration of the borosilicate intermediate layer is less than the boron concentration of the borosilicate layer, and the thickness of the borosilicate intermediate layer is less than the thickness of the borosilicate layer.

9. The composite boron source structure according to claim 6, characterized in that, The thickness of the amorphous silicon layer is 5~100nm; And / or, the thickness of the second barrier layer is 2~20nm; And / or, the thickness of the borosilicate nitride layer is greater than 10 nm.

10. A method for preparing a boron emitter, characterized in that, Includes the following steps: S1. Prepare the composite boron source structure as described in any one of claims 1-9 on a silicon wafer; S2. High-temperature annealing enables boron diffusion, forming a boron emitter on the silicon wafer; S3. Etching to remove the composite boron source structure; S4. Prepare a hydrogen-containing dielectric layer to passivate the boron emitter.

11. The method for preparing a boron emitter according to claim 10, characterized in that, Step S1 specifically includes: S11. Prepare a nano-silicon oxide layer on a silicon wafer. The preparation method is selected from one of wet chemical oxidation, thermal oxidation, plasma-assisted oxidation, and ozone oxidation. This step can be omitted. S12. The first barrier layer is prepared on the silicon wafer / nano-silicon oxide layer by PECVD method; S13. Prepare a borosilicate intermediate layer on the first barrier layer using PECVD method. This step can be omitted. S14. An amorphous silicon layer is prepared on the first barrier layer / borosilicate intermediate layer using the PECVD method. S15. Prepare a borosilicate intermediate layer on an amorphous silicon layer using PECVD. This step can be omitted. S16. A second barrier layer is prepared on the amorphous silicon layer / borosilicate intermediate layer using PECVD. This step can be omitted. S17. A borosilicate layer is prepared on an amorphous silicon layer / borosilicate intermediate layer / second barrier layer using PECVD.

12. The method for preparing a boron emitter according to claim 11, characterized in that, In step S2, the high-temperature annealing temperature is 900~1100℃.

13. A boron emitter, characterized in that, It is prepared by the preparation method as described in any one of claims 10-12.

14. The boron emitter according to claim 13, characterized in that, The activation concentration of boron on the surface of the boron emitter is less than 1×10⁻⁶. 19 cm -3 The boron concentration decreases from the surface of the boron emitter towards the silicon wafer body.

15. The boron emitter according to claim 14, characterized in that, The boron emitter contains nitrogen, carbon, oxygen, and hydrogen elements, and the nitrogen concentration on the surface of the boron emitter is higher than 1×10⁻⁶. 19 cm -3 Carbon concentration higher than 1×10 18 cm -3 Oxygen concentration higher than 1×10 18 cm -3 Hydrogen concentration higher than 5×10 18 cm -3 .

16. A solar cell, characterized in that, Includes the boron emitter as described in any one of claims 13-15.

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