LED epitaxial wafer with dynamic self-repairing function and preparation method thereof

Abstract

The application relates to the technical field of semiconductors, in particular to an LED epitaxial wafer with a dynamic self-repairing function, which comprises a substrate and an AlN layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type GaN layer, a GST layer, a multi-quantum well light-emitting layer, an electron blocking layer and a P-type GaN layer which are sequentially arranged on the substrate in an epitaxial direction; the GST layer is made of Ge2Sb2Te5, the GST layer has a nano-island array, and the nano-island array comprises a plurality of nano-islands; the nano-island array of the GST layer can be in an amorphous state when the temperature is 850 DEG C to 950 DEG C and in a crystalline state when the temperature is 80 DEG C to 120 DEG C; the multi-quantum well light-emitting layer has a pit, the pit has an opening and a bottom surface, the bottom surface of the pit faces the GST layer, and the electron blocking layer fills the pit. The pit size and density of the multi-quantum well light-emitting layer of the LED epitaxial wafer can be automatically adjusted according to the device temperature, the efficiency decay problem under a large current is solved, and the light-emitting efficiency and working stability of the LED under a large current density are improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an LED epitaxial wafer with dynamic self-healing function and its preparation method. Background Technology

[0002] GaN and its related group III nitrides have extremely excellent electrical, optical and acoustic properties and have been widely used in the fabrication of devices such as light-emitting diodes (LEDs), laser diodes (LDs) and field-effect transistors.

[0003] In GaN-based LED epitaxial growth, V-pits are typically considered defects. However, recent studies have shown that appropriately sized V-pits can form around penetrating dislocations, serving to shield dislocations, relieve stress, and facilitate hole injection. However, the formation of traditional V-pits relies on InGaN / GaN superlattices or low-temperature insertion layers, making precise control of their size and density difficult. Furthermore, V-pits are prone to over-expansion or being filled during subsequent high-temperature growth, rendering their beneficial effects unsustainable. In addition, existing V-pit structures cannot dynamically respond to carrier recombination distribution during device operation. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of the prior art. This invention provides an LED epitaxial wafer with dynamic self-healing function. The size and density of the pits in its multi-quantum well light-emitting layer can be automatically adjusted according to the device temperature, which solves the problem of efficiency decay under high current, thereby improving the luminous efficiency and working stability of LED under high current density.

[0005] To address the aforementioned issues, this invention proposes an LED epitaxial wafer with dynamic self-healing function, comprising a substrate, and an AlN layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type GaN layer, a GST layer, a multi-quantum-well light-emitting layer, an electron blocking layer, and a P-type GaN layer sequentially stacked along the epitaxial direction on the substrate. The GST layer is made of Ge2Sb2Te5 and has a nano-island array, which includes multiple nano-islands. The nano-island array of the GST layer can be in an amorphous state at a temperature of 850℃~950℃ and in a crystalline state at a temperature of 80℃~120℃. The multi-quantum-well light-emitting layer has a pit, the pit having an opening and a bottom surface, the bottom surface of the pit facing the GST layer, and the electron blocking layer filling the pit.

[0006] As an improvement to the above technical solution, the thickness of the GST layer is 5nm~10nm; The distribution density of the nanoislands is 50 per μm.2 ~60 cells / μm 2 The spacing between the nanoislands is 100nm~200nm, the height is 5nm~10nm, and the diameter is 30nm~80nm; The nanoislands are one or more of the following shapes: cylindrical, frustum, conical, hemispherical, inverted frustum, or nanograting.

[0007] As an improvement to the above technical solution, the nano-island has a frustum structure with a bottom diameter of 50nm~80nm, a top diameter of 20nm~40nm, a height of 8nm~12nm, and a sidewall inclination angle of 70°~85°.

[0008] As an improvement to the above technical solution, the opening width of the pit is 50nm~120nm, the bottom width of the pit is 5nm~20nm, and the depth of the pit is 80nm~150nm.

[0009] As an improvement to the above technical solution, the growth thickness of the AlN layer is 16nm~20nm; The growth thickness of the three-dimensional GaN layer is 1μm~2μm; The undoped GaN layer has a growth thickness of 2μm~3μm; The N-type GaN layer has a growth thickness of 1.4 μm to 1.6 μm and comprises a first GaN layer and a second GaN layer alternately stacked along the epitaxial direction. The first GaN layer is undoped, and the Si doping concentration of the second GaN layer is 1 × 10⁻⁶. 19 / cm 3 ~2×10 19 / cm 3 The number of cycles is 40 to 60; The multi-quantum-well light-emitting layer includes an InGaN layer and a GaN barrier layer that are periodically alternating along the epitaxial direction, with a period number of 8 to 20. The InGaN layer is undoped, has a growth thickness of 2nm~3nm, and an In content of 0.3~0.4%. The Si doping concentration of the GaN barrier layer is 1×10⁻⁶. 18 / cm 3 ~2×10 18 / cm 3 The growth thickness is 10nm~12nm; The electron blocking layer is made of AlGaN, and its Al content is 0.2~0.3%. The p-type GaN layer has a growth thickness of 15nm~20nm, and the Mg doping concentration is 2×10⁻⁶. 19 / cm 3 ~3×1019 / cm 3 .

[0010] Accordingly, the present invention also provides a method for preparing an LED epitaxial wafer with dynamic self-healing function, comprising the following steps: Provide substrate; An AlN layer is deposited on the substrate; A three-dimensional GaN layer is deposited on the AlN layer; An undoped GaN layer is deposited on the three-dimensional GaN layer; An N-type GaN layer is deposited on the undoped GaN layer; A GST layer is deposited on the N-type GaN layer, the GST layer being made of Ge2Sb2Te5; A nano-island array is formed on the GST layer by nanoimprinting or laser interference lithography, wherein the nano-island array comprises multiple nano-islands, to obtain an intermediate. The intermediate was placed in an MOCVD reaction chamber and heated to 850℃~950℃ to make the nano-island array of the GST layer in an amorphous state. A multi-quantum-well light-emitting layer is deposited on the GST layer, the multi-quantum-well light-emitting layer having pits; An electron blocking layer is deposited on the multi-quantum-well light-emitting layer, and the electron blocking layer fills the pit; A p-type GaN layer is deposited on the electron blocking layer to obtain the initial product; The initial product is tested at 80℃~120℃ to allow the nano-island array of the GST layer to complete the phase transition from amorphous to crystalline state, thus obtaining the finished product.

[0011] As an improvement to the above technical solution, the GST layer is made by the following method: After depositing the N-type GaN layer, the GST layer is formed by vapor deposition in a CVD equipment with a growth thickness of 5 nm to 10 nm. The distribution density of the nanoislands is 50 per μm. 2 ~60 cells / μm 2 , The spacing between the nanoislands is 100nm~200nm, the height is 5nm~10nm, and the diameter is 30nm~80nm; The nanoislands are one or more of the following shapes: cylindrical, frustum, conical, hemispherical, inverted frustum, or nanograting.

[0012] As an improvement to the above technical solution, the nano-island has a frustum structure with a bottom diameter of 50nm~80nm, a top diameter of 20nm~40nm, a height of 8nm~12nm, and a sidewall inclination angle of 70°~85°. The opening width of the pit is 50nm~120nm, the bottom width of the pit is 5nm~20nm, and the depth of the pit is 80nm~150nm.

[0013] As an improvement to the above technical solution, in the deposition of the N-type semiconductor layer, NH3 and TMGa are used as raw materials, SiH4 is used as an N-type dopant, and the growth temperature is 1000℃~1200℃. In the deposition of the multi-quantum-well light-emitting layer, the multi-quantum-well light-emitting layer is formed by periodically alternating InGaN layers and GaN barrier layers, with a stacking period of 8 to 20; When depositing the InGaN layer, NH3, TEGa and TMI are used as raw materials, the growth temperature is 760℃~800℃, and the growth pressure is 150 torr~250 torr. When depositing the GaN barrier layer, NH3 and TEGa are used as raw materials, the growth temperature is 860°C~900°C, and the growth pressure is 150 torr~250 torr. In the deposition of the P-type semiconductor layer, NH3 and TEGa are used as raw materials, CP2Mg is used as a P-type dopant, and deposition is carried out in an H2 atmosphere; wherein the growth temperature is 980°C~1050°C.

[0014] The implementation of this invention has the following beneficial effects: The LED epitaxial wafer with dynamic self-healing function provided by this invention introduces a GST (Ge2Sb2Te5) layer between an N-type GaN layer and a multi-quantum-well light-emitting layer, and this layer has a nano-island array, which includes multiple nano-islands. In particular, the nano-island array of the GST layer can be in an amorphous state at a temperature of 850℃~950℃ and in a crystalline state at a temperature of 80℃~120℃. During the growth stage, the amorphous GaST surface exhibits Ga-reducible properties, inducing the formation of a semi-closed cavity structure in the multi-quantum-well light-emitting layer. This cavity has an opening, with its bottom facing the GST layer. An electron-blocking layer fills the cavity, effectively shielding penetrating dislocations and assisting in hole injection. During device operation, the GST layer transitions from amorphous to crystalline. The reduction in the volume of the nano-island array generates local tensile stress at the bottom of the cavity, inducing a slight inward closure of the cavity sidewalls. This transforms the originally through-hole V-shaped cavity into a semi-closed cavity structure, resulting in a cavity with an opening and a bottom surface, which acts as a temperature-controlled confinement for charge carriers. As the device temperature increases and charge carrier leakage intensifies, the degree of cavity closure increases, automatically enhancing the electron-blocking capability. This solves the problem of efficiency decay under high current and avoids the morphological degradation of traditional V-shaped cavities during the growth of high-temperature P-type GaN layers, significantly improving the luminous efficiency and operational stability of LEDs at high current densities. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the structure of an LED epitaxial wafer with dynamic self-healing function according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of an undoped GaN layer according to an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of a multi-quantum well light-emitting layer according to an embodiment of the present invention. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings.

[0017] See Figures 1 to 3 As shown, this embodiment of the invention provides an LED epitaxial wafer with dynamic self-healing function, including a substrate 100, and an AlN layer 200, a three-dimensional GaN layer 300, an undoped GaN layer 400, an N-type GaN layer 500, a GST layer 600, a multi-quantum-well light-emitting layer 700, an electron blocking layer 800, and a P-type GaN layer 900 sequentially stacked on the substrate 100 along the epitaxial direction.

[0018] In this embodiment of the invention, a GST layer 600 is introduced between the N-type GaN layer 500 and the multi-quantum-well light-emitting layer 700, through which the shape of the pit 701 in the multi-quantum-well light-emitting layer 700 is adjusted.

[0019] Specifically, the GST layer 600 is made of Ge2Sb2Te5, and the GST layer 600 has a nano-island array 601, which includes a plurality of nano-islands 602. The nano-island array 601 of the GST layer 600 can be in an amorphous state at a temperature of 850℃~950℃ and in a crystalline state at a temperature of 80℃~120℃. The multi-quantum well light-emitting layer 700 has a pit 701, which has an opening and a bottom surface. The bottom surface of the pit 701 faces the GST layer 600, and the electron blocking layer 800 fills the pit 701.

[0020] Between the N-type GaN layer 500 and the multi-quantum-well light-emitting layer 700, a GST layer 600 made of the phase-change material Ge2Sb2Te5 is introduced. This GST layer 600 has a nano-island array 601. During fabrication at temperatures between 850°C and 950°C, the nano-island array 601 of the GST layer 600 is amorphous with a Ga-sparing surface. At this temperature, during the deposition of the multi-quantum-well light-emitting layer 700, the nano-island array 601 can induce the formation of a regular pit array 701, effectively shielding penetrating dislocations and facilitating hole injection. When the fabrication is complete and the device is in operation, the GST layer 600 transforms into a crystalline state, causing the volume of the nano-island array 601 to shrink. This generates localized tensile stress at the bottom of the pits 701, inducing a slight inward closure of the sidewalls of the pits 701, transforming the originally through-hole pits 701 into a semi-closed cavity structure. As the device temperature increases and carrier leakage intensifies, the degree of closure of the pits 701 increases, automatically enhancing their ability to block electrons. This solves the efficiency decay problem under high current and avoids the morphological degradation of traditional pits 701 during the high-temperature growth of the P-type GaN layer 900, improving the luminous efficiency and operational stability of LEDs at high current densities.

[0021] Preferably, the thickness of the GST layer 600 is 5nm to 10nm, and the growth thickness can be 5nm, 7nm, 8nm, 9nm, or 10nm, but is not limited to this. The distribution density of the nanoislands 602 is 50 per μm. 2 ~60 cells / μm 2 The spacing between the nanoislands 602 is 100nm~200nm, the height is 5nm~10nm, and the diameter is 30nm~80nm; The distribution density of nanoislands 602 can be 50 per μm. 2 52 cells / μm 2 55 cells / μm2 58 cells / μm 2 60 cells / μm 2 However, the spacing of the nanoislands 602 can be 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, 180nm, or 200nm, but is not limited to these values. The diameter of the nanoislands 602 can be 30nm, 45nm, 50nm, 55nm, 70nm, or 80nm, but is not limited to these values. The height of the nanoislands 602 can be 5nm, 6nm, 7nm, 8nm, 9nm, or 10nm, but is not limited to these values.

[0022] When the growth thickness of the GST layer 600 is less than 5 nm, Ge2Sb2Te5 cannot form a continuous and complete amorphous thin film, thus affecting the formation of the nano-island array. When the growth thickness of the GST layer 600 is greater than 10 nm, the internal stress of the GST layer 600 in the amorphous state increases, which may cause the film to crack or peel off. At the same time, it will increase the series resistance and light absorption, directly reducing the luminous efficiency and operating voltage characteristics of the LED.

[0023] When the spacing between the nanoislands 602 is less than 100 nm, the density of the pits 701 is too high, and the effective light-emitting area is occupied by a large number of pits 701, resulting in a decrease in internal quantum efficiency. Furthermore, adjacent pits 701 may merge during growth, forming large-size defects and causing severe leakage current. When the spacing between the nanoislands 602 is greater than 200 nm, the density of the pits 701 is too low, which cannot fully cover penetrating dislocations, weakens the dislocation shielding effect, increases the number of non-radiative recombination centers, and raises the leakage current. Insufficient hole injection paths exacerbate the current crowding effect and deteriorate the uniformity of light emission.

[0024] When the height of the nanoisland 602 is less than 5 nm, the height is too low, and the surface sparsity of Ga is insufficient to form effective growth selectivity. The nucleation positions of the pits 701 tend to be random, losing the advantage of array-induced growth and resulting in uncontrollable growth of the pits 701. When the height of the nanoisland 602 is greater than 10 nm, the surface undulations are too large, and the subsequent GaN layer cannot be sufficiently planarized, resulting in a rough quantum well interface, uneven thickness, poor uniformity of emission wavelength, and even the introduction of additional nonradiative recombination centers and leakage channels.

[0025] When the diameter of the nanoisland 602 is less than 30 nm, its specific surface area is too large, making it prone to shrinkage or aggregation during the high-temperature growth stage. This prevents it from functioning stably as a growth mask, thus disrupting the regularity of the pit 701. When the diameter of the nanoisland 602 is greater than 80 nm, the nanoisland occupies too large an area, squeezing the nucleation space of the pit 701. This results in the pit 701 opening being too small or even unable to form, weakening its ability to shield dislocations and assist in hole injection. Simultaneously, large areas of GST regions may obstruct vertical carrier transport, causing localized current blockage.

[0026] The nanoisland 602 is one or more of the following shapes: cylindrical, frustum, conical, hemispherical, inverted frustum, or nanograting.

[0027] Ideally, the nanoisland 602 has a frustum structure with a bottom diameter of 50nm~80nm, a top diameter of 20nm~40nm, a height of 8nm~12nm, and a sidewall inclination angle of 70°~85°.

[0028] A high-curvature region is formed on the top surface of 20nm~40nm, which significantly enhances the surface Ga-sparse properties of amorphous GST. Ga atoms are difficult to adsorb in this region, enabling GaN / InGaN to selectively nucleate in the interstices of nano-islands, ensuring that the pits 701 are formed at predetermined positions. The steep sidewall angle of 70°~85° greatly reduces the lateral growth rate of GaN along the sidewall, preventing adjacent pits 701 from merging and maintaining array regularity.

[0029] The bottom diameter of the nanoisland 602 can be 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, or 80nm, but is not limited to these. The top diameter of the nanoisland 602 can be 20nm, 25nm, 30nm, 35nm, or 40nm, but is not limited to these. The height of the nanoisland 602 can be 8nm, 9nm, 10nm, 11nm, or 12nm, but is not limited to these.

[0030] Preferably, the opening width of the pit 701 is 50nm~120nm, the bottom width of the pit 701 is 5nm~20nm, and the depth of the pit 701 is 80nm~150nm.

[0031] The depth of the pit 701 can be 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, or 150nm, but is not limited thereto. The opening width of the pit 701 can be 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, or 120nm, but is not limited thereto.

[0032] When the depth of the pit 701 is less than 80 nm, the depth is insufficient, and the bottom surface of the pit 701 may still remain within the multi-quantum-well light-emitting layer, failing to penetrate the entire active region. This not only fails to effectively shield dislocations, but also prevents hole injection from reaching the deep quantum wells, reducing the effect of improving carrier distribution. When the depth of the pit 701 is greater than 150 nm, the pit 701 is too deep, leading to excessive etching into the N-type GaN layer 500, resulting in damage to the crystal quality of the N-type GaN layer 500 and reduced conductivity.

[0033] When the opening width of the pit 701 is less than 50 nm, the opening is too narrow, the entrance is too small, and the hole injection efficiency is limited. Moreover, the opening is easily filled by the P-type GaN layer 900 material during subsequent high-temperature growth, causing the pit 701 channel to fail. When the opening width of the pit 701 is greater than 120 nm, the opening is too large, resulting in the etching away of a large area of ​​the active light-emitting material, significantly reducing the light-emitting area and decreasing the overall light output power of the device.

[0034] When the bottom width of the pit 701 is less than 5 nm, the bottom is too sharp, causing the local electric field to be too concentrated. Under high voltage, this leads to carrier tunneling, which becomes a new leakage channel. When the bottom width of the pit 701 is greater than 20 nm, the bottom is too wide, and the landing point of the pit 701 is too wide, which cannot cover the defect, increases the defect density of the device, and forms a new non-radiative recombination region.

[0035] In some embodiments, the growth thickness of the AlN layer 200 is 16nm~20nm, and the growth thickness can be 16nm, 17nm, 18nm, 19nm, or 20nm, but is not limited to these. The growth thickness of the three-dimensional GaN layer 300 is 1μm to 2μm, and the growth thickness can be 1μm, 1.2μm, 1.3μm, 1.5μm, 1.7μm, 1.8μm, 2μm, but is not limited to these. The undoped GaN layer 400 has a growth thickness of 2μm to 3μm, and the growth thickness can be 2μm, 2.2μm, 2.5μm, 2.6μm, 2.8μm, or 3μm, but is not limited to these. The N-type GaN layer 500 has a growth thickness of 1.4 μm to 1.6 μm, and includes a first GaN layer 510 and a second GaN layer 520 alternately stacked along the epitaxial direction. The first GaN layer 510 is undoped, and the Si doping concentration of the second GaN layer 520 is 1 × 10⁻⁶. 19 / cm 3 ~2×10 19 / cm 3 The number of cycles is 40 to 60; The growth thickness of the N-type GaN layer 500 can be 1.4 μm, 1.5 μm, or 1.6 μm, but is not limited to these; the Si doping concentration of the second GaN layer 520 can be 1 × 10⁻⁶. 19 / cm 3 1.2×10 19 / cm 3 1.5×10 19 / cm 3 1.7×10 19 / cm 3 1.8×10 19 / cm3 2×10 19 / cm 3 However, it is not limited to this; the number of cycles can be 40, 45, 50, 55, or 60, but is not limited to this.

[0036] The multi-quantum-well light-emitting layer 700 includes an InGaN layer 710 and a GaN barrier layer 720 that are periodically and alternately grown along the epitaxial direction, with a period number of 8 to 20. The period number can be 8, 12, 15, 18, or 20, but is not limited to these. The InGaN layer 710 is undoped and has a growth thickness of 2nm~3nm, with an In content of 0.3~0.4%. The growth thickness of the InGaN layer 710 can be 2nm, 2.1nm, 2.5nm, 2.7nm, or 3nm, but is not limited to these. The In content can be 0.3%, 0.32%, 0.35%, 0.38%, or 0.4%, but is not limited to these. The Si doping concentration of the GaN barrier layer 720 is 1×10⁻⁶. 18 / cm 3 ~2×10 18 / cm 3 The growth thickness is 10nm~12nm; the Si doping concentration of the GaN barrier layer 720 can be 1×10⁻⁶. 18 / cm 3 1.1×10 18 / cm 3 1.4×10 18 / cm 3 1.5×10 18 / cm 3 1.8×10 18 / cm 3 2×10 18 / cm 3 However, it is not limited to this; the growth thickness can be 10nm, 10.5nm, 11nm, 11.5nm, 12nm, but is not limited to this.

[0037] The electron blocking layer 800 is made of AlGaN with an Al content of 0.2 to 0.3%. The Al content can be 0.2, 0.21, 0.24, 0.25, 0.27, 0.28, or 0.3, but is not limited to these.

[0038] The p-type GaN layer 900 has a growth thickness of 15nm~20nm, and the Mg doping concentration is 2×10⁻⁶. 19 / cm 3 ~3×10 19 / cm 3The thickness of the p-type GaN layer grown at 900 nm can be 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, or 20 nm, but is not limited to these values; the doping concentration of Mg can be 2 × 10⁻⁶. 19 / cm 3 2.1×10 19 / cm 3 2.5×10 19 / cm 3 2.7×10 19 / cm 3 2.8×10 19 / cm 3 2.9×10 19 / cm 3 3×10 19 / cm 3 However, it is not limited to this.

[0039] Accordingly, this invention also provides a method for preparing an LED epitaxial wafer with dynamic self-healing function, comprising the following steps: Substrate 100 is provided; A sapphire substrate was selected and loaded into the MOCVD process. The reaction chamber temperature was controlled at 1000℃~1200℃ and the pressure at 200 torr~600 torr. The sapphire substrate was subjected to high-temperature annealing for 5 min~8 min in an H2 atmosphere to clean the particles and oxides on the surface of the sapphire substrate.

[0040] An AlN layer 200 is deposited on the substrate 100; PVD growth is employed, with sputtering temperature controlled at 600℃~900℃, sputtering power at 1500W~3000W, target material being pure aluminum (purity 99.999%), and sputtering reaction gas being a mixture of N2 and Ar.

[0041] A three-dimensional GaN layer 300 is deposited on the AlN layer 200; H2 was used as the carrier gas, NH3 was introduced as the nitrogen source, TMGa was used as the Ga source, the rotation speed was 800 rpm, the growth pressure was 100 torr to 20 torr, and the growth temperature was 1100℃ to 1250℃.

[0042] An undoped GaN layer 400 is deposited on the three-dimensional GaN layer 300; H2 was used as the carrier gas, NH3 was introduced as the nitrogen source, TMGa was used as the Ga source, the rotation speed was 1200 rpm, the growth pressure was 100 torr to 20 torr, and the growth temperature was 1100℃ to 1250℃.

[0043] An N-type GaN layer 500 is deposited on the undoped GaN layer 400; MOCVD growth was employed, with controlled chamber pressure of 200 torr to 400 torr, temperature of 1080℃ to 1250℃, and rotation speed of 1000 to 1200 rpm. NH3 was used as the N source, TMGa as the Ga source, and SiH4 was used for Si doping. The N-type GaN layer 522 was a cyclic structure. The first stage grew the first GaN layer for 5-8 seconds without SiH4 flow, while the second stage grew the second GaN layer for 5-8 seconds with SiH4 flow. The Si doping concentration was 1×10⁻⁶. 19 ~2×10 19 The two TMGa flows have the same flow rate, with a total of 40~60 cycles.

[0044] A GST layer 600 is deposited on the N-type GaN layer 500, the GST layer 600 being made of Ge2Sb2Te5; A nano-island array 601 is formed on the GST layer 600 by nanoimprinting or laser interference lithography. The nano-island array 601 includes multiple nano-islands 602, thus obtaining an intermediate. The intermediate is placed in the MOCVD reaction chamber and heated to 850℃~950℃ so that the nano-island array 601 of the GST layer 600 is in an amorphous state. A multi-quantum-well light-emitting layer 700 is deposited on the GST layer 600. The multi-quantum-well light-emitting layer 700 has a pit 701, which has an opening and a bottom surface. The bottom surface of the pit faces the N-type GaN layer. The reaction chamber pressure was controlled at 100 to 200 torr, the temperature at 750°C to 850°C, and the rotation speed at 400 to 6000 rpm. NH3 was introduced as the N source, TMIn as the In source, and TEGa as the Ga source. SiH4 was used for Si doping. GaN and In were grown in 8 to 20 cycles. x Ga 1-x The structure is an N-type superlattice with X ranging from 0.3 to 0.4, in which SiH4 is introduced into the GaN layer at a concentration of 1 × 10⁻⁴. 18 / cm 3 ~2×10 18 / cm 3 .

[0045] An electron blocking layer 800 is deposited on the multi-quantum-well light-emitting layer 700, and the electron blocking layer 800 fills the pit 701; The reaction chamber pressure was controlled at 100 torr to 200 torr, the temperature at 950℃ to 1050℃, and the rotation speed at 1000 to 1200 rpm. NH3 was introduced as the N source, TMGa as the Ga source, and TMAl as the Al source.

[0046] A p-type GaN layer 900 is deposited on the electron blocking layer 800 to obtain a preliminary product; MOCVD growth was employed, with the reaction chamber temperature controlled at 900℃~1050℃ and the pressure at 100 torr~600 torr. NH3 was introduced as the N source, N2 and H2 as the carrier gas, TMGa as the Ga source, and CP2Mg as the doping source.

[0047] The initial product is subjected to a working test at 80℃~120℃ to enable the nano-island array 601 of the GST layer 600 to complete the phase transition from amorphous to crystalline state, thereby obtaining the finished product.

[0048] Preferably, the GST layer 600 is manufactured by the following method: After depositing the N-type GaN layer 500, the product is placed in a CVD equipment and the GST layer 600 is formed by vapor deposition with a growth thickness of 5 nm to 10 nm. The distribution density of the nanoislands 602 is 50 per μm. 2 ~60 cells / μm 2 , The spacing between the nanoislands 602 is 100nm~200nm, the height is 5nm~10nm, and the diameter is 30nm~80nm; The nanoisland 602 is one or more of the following shapes: cylindrical, frustum, conical, hemispherical, inverted frustum, or nanograting.

[0049] More preferably, the nanoisland 602 has a frustum structure with a bottom diameter of 50nm~80nm, a top diameter of 20nm~40nm, a height of 8nm~12nm, and a sidewall inclination angle of 70°~85°. The opening width of the pit 701 is 50nm~120nm, the bottom width of the pit 701 is 5nm~20nm, and the depth of the pit 701 is 80nm~150nm.

[0050] In some embodiments, in the deposition of the N-type semiconductor layer 500, NH3 and TMGa are used as raw materials, SiH4 is used as an N-type dopant, and the growth temperature is 1000℃~1200℃. In the deposition of the multi-quantum-well light-emitting layer 700, the multi-quantum-well light-emitting layer 700 is formed by periodically alternating growth of InGaN layer 710 and GaN barrier layer 720, with a stacking period of 8 to 20. When depositing the InGaN layer 10, NH3, TEGa and TMIn are used as raw materials, the growth temperature is 760℃~800℃, and the growth pressure is 150 torr~250 torr. When depositing the GaN barrier layer 720, NH3 and TEGa are used as raw materials, the growth temperature is 860°C~900°C, and the growth pressure is 150 torr~250 torr. In the deposition of the P-type semiconductor layer 900, NH3 and TEGa are used as raw materials, CP2Mg is used as a P-type dopant, and deposition is carried out in an H2 atmosphere; wherein the growth temperature is 980°C~1050°C.

[0051] The present invention will be further illustrated below with specific embodiments.

[0052] Example 1 This invention provides an LED epitaxial wafer with dynamic self-healing function, including a substrate, and an AlN layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type GaN layer, a GST layer, a multi-quantum-well light-emitting layer, an electron blocking layer and a P-type GaN layer sequentially stacked on the substrate along the epitaxial direction; The GST layer is made of Ge2Sb2Te5 and has a nano-island array, which includes multiple nano-islands. Specifically, the GST layer has a thickness of 7.5 nm, the nanoislands have a cylindrical structure, and the distribution density of the nanoislands is 55 per μm. 2 The spacing between the nanoislands is 150 nm, the height is 7.5 nm, and the diameter is 55 nm; The nano-island array of the GST layer can be in an amorphous state at a temperature of 850℃~950℃ and in a crystalline state at a temperature of 80℃~120℃. The multi-quantum-well light-emitting layer has a pit, the pit having an opening and a bottom surface, the bottom surface of the pit facing the GST layer, and the electron blocking layer filling the pit; A method for preparing an LED epitaxial wafer with dynamic self-healing function includes the following steps: Provide substrate; An AlN layer with a thickness of 18 nm is deposited on the substrate; A three-dimensional GaN layer is deposited on the AlN layer, and the thickness of the three-dimensional GaN layer is 1.5 μm; An undoped GaN layer with a thickness of 2.5 μm is deposited on the three-dimensional GaN layer. An N-type GaN layer is deposited on the undoped GaN layer. The N-type GaN layer has a growth thickness of 1.5 μm and includes a first GaN layer and a second GaN layer alternately stacked along the epitaxial direction. The first GaN layer is undoped, and the Si doping concentration of the second GaN layer is 1.5 × 10⁻⁶. 19 / cm 3 The number of cycles is 50; Specifically, NH3 and TMGa were used as raw materials, SiH4 was used as an N-type dopant, and the growth temperature was 1100℃. A GST layer is deposited on the N-type GaN layer, the GST layer being made of Ge2Sb2Te5; A nano-island array is formed on the GST layer by nanoimprinting or laser interference lithography, wherein the nano-island array comprises multiple nano-islands, to obtain an intermediate. The intermediate was placed in an MOCVD reaction chamber and heated to 850℃~950℃ to make the nano-island array of the GST layer in an amorphous state. A multi-quantum-well light-emitting layer is deposited on the GST layer. The multi-quantum-well light-emitting layer has pits and includes an InGaN layer and a GaN barrier layer that are periodically alternating along the epitaxial direction, with a period number of 14. The InGaN layer is undoped, has a growth thickness of 1.5 nm, and an In content of 0.35%. Specifically, NH3, TEGa and TMIn were used as raw materials, the growth temperature was 830℃ and the growth pressure was 200 torr; The Si doping concentration of the GaN barrier layer is 1.5 × 10⁻⁶. 18 / cm 3 The growth thickness is 11 nm; Specifically, NH3 and TEGa were used as raw materials, the growth temperature was 880°C, and the growth pressure was 200 torr; An electron blocking layer is deposited on the multi-quantum-well light-emitting layer, the electron blocking layer filling the pits, and the electron blocking layer is made of AlGaN with an Al content of 0.25. A p-type GaN layer was deposited on the electron blocking layer to obtain a preliminary product. The p-type GaN layer had a growth thickness of 17.5 nm and a Mg doping concentration of 2.5 × 10⁻⁶. 19 / cm 3 ; Specifically, NH3 and TEGa were used as raw materials, CP2Mg was used as a p-type dopant, and the material was deposited in an H2 atmosphere; the growth temperature was 1015°C. The initial product is tested at 80℃~120℃ to allow the nano-island array of the GST layer to complete the phase transition from amorphous to crystalline state, thus obtaining the finished product.

[0053] Example 2 The difference between this embodiment and Embodiment 1 is that: The thickness of the GST layer is 5 nm; The nanoislands have a conical structure, and their distribution density is 50 islands / μm. 2The spacing between the nanoislands is 100 nm, the height of the nanoislands is 5 nm, and the bottom diameter of the nanoislands is 30 nm.

[0054] Example 3 The difference between this embodiment and Embodiment 1 is that: The thickness of the GST layer is 10 nm; The nanoislands have a frustum structure, and their distribution density is 60 islands / μm. 2 The spacing between the nanoislands is 200 nm, the height is 12 nm, the bottom diameter is 80 nm, and the top diameter is 40 nm.

[0055] Example 4 The difference between this embodiment and Embodiment 1 is that: The thickness of the GST layer is 15 nm; The distribution density of the nanoislands is 80 per μm. 2 The spacing between the nanoislands is 70 nm, the height is 15 nm, and the diameter is 25 nm.

[0056] Comparative Example 1 The difference between this comparative example and Example 1 is as follows: No GST layer is placed between the N-type GaN layer and the multi-quantum-well light-emitting layer.

[0057] Comparative Example 2 The difference between this comparative example and Example 1 is as follows: The GST layer film does not have a nanoisland array and has a growth thickness of 7.5 nm.

[0058] Performance testing: The LED epitaxial wafers obtained in Examples 1-4 and Comparative Examples 1-2 were fabricated into 20μm×20μm chips and subjected to 20A / cm 2 Photoelectric performance tests were conducted at a current density, and the luminous efficacy improvement of Examples 1-4 and Comparative Example 2 compared to Comparative Example 1 was calculated.

[0059]

[0060] Referring to Examples 1-4 and Comparative Examples 1-2 above, a GST layer was introduced between the N-type GaN layer and the multi-quantum-well light-emitting layer, and the GST layer has a nano-island array. Since Ge2Sb2Te5 is a phase-change memory material, the pits exhibit two control stages. During the growth stage, the GST, being amorphous with a Ga-reduced surface, induces the formation of a regular pit array, effectively shielding penetrating dislocations and assisting hole injection. During the device operation stage, as the device temperature increases and carrier leakage intensifies, the pit closure degree increases, automatically enhancing the electron blocking ability, solving the efficiency decay problem under high current, and avoiding the morphological degradation of traditional V-shaped pits during high-temperature P-layer growth. This significantly improves the luminous efficiency and operational stability of the LED under high current density.

[0061] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. An LED epitaxial wafer with dynamic self-healing function, characterized in that, It includes a substrate, and an AlN layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type GaN layer, a GST layer, a multiple quantum well light-emitting layer, an electron blocking layer and a P-type GaN layer sequentially stacked on the substrate along the epitaxial direction; The GST layer is made of Ge2Sb2Te5 and has a nano-island array, which includes multiple nano-islands. The nano-island array of the GST layer can be in an amorphous state at a temperature of 850℃~950℃ and in a crystalline state at a temperature of 80℃~120℃. The multi-quantum-well light-emitting layer has a pit, the pit having an opening and a bottom surface, the bottom surface of the pit facing the GST layer, and the electron blocking layer filling the pit.

2. The LED epitaxial wafer with dynamic self-healing function as described in claim 1, characterized in that, The thickness of the GST layer is 5nm~10nm; The distribution density of the nanoislands is 50 per μm. 2 ~60 cells / μm 2 The spacing between the nanoislands is 100nm~200nm, the height is 5nm~10nm, and the diameter is 30nm~80nm; The nanoislands are one or more of the following shapes: cylindrical, frustum, conical, hemispherical, inverted frustum, or nanograting.

3. The LED epitaxial wafer with dynamic self-healing function as described in claim 2, characterized in that, The nanoisland has a frustum structure with a bottom diameter of 50nm~80nm, a top diameter of 20nm~40nm, a height of 8nm~12nm, and a sidewall inclination angle of 70°~85°.

4. The LED epitaxial wafer with dynamic self-healing function as described in claim 1, characterized in that, The opening width of the pit is 50nm~120nm, the bottom width of the pit is 5nm~20nm, and the depth of the pit is 80nm~150nm.

5. The LED epitaxial wafer with dynamic self-healing function as described in claim 1, characterized in that, The AlN layer has a growth thickness of 16 nm to 20 nm. The growth thickness of the three-dimensional GaN layer is 1μm~2μm; The undoped GaN layer has a growth thickness of 2μm~3μm; The N-type GaN layer has a growth thickness of 1.4 μm to 1.6 μm and comprises a first GaN layer and a second GaN layer alternately stacked along the epitaxial direction. The first GaN layer is undoped, and the Si doping concentration of the second GaN layer is 1 × 10⁻⁶. 19 / cm 3 ~2×10 19 / cm 3 The number of cycles is 40 to 60; The multi-quantum-well light-emitting layer includes an InGaN layer and a GaN barrier layer that are periodically alternating along the epitaxial direction, with a period number of 8 to 20. The InGaN layer is undoped, has a growth thickness of 2nm~3nm, and an In content of 0.3~0.4%. The Si doping concentration of the GaN barrier layer is 1×10⁻⁶. 18 / cm 3 ~2×10 18 / cm 3 The growth thickness is 10nm~12nm; The electron blocking layer is made of AlGaN, and its Al content is 0.2~0.3%. The p-type GaN layer has a growth thickness of 15 nm to 20 nm, and the Mg doping concentration is 2 × 10⁻⁶. 19 / cm 3 ~3×10 19 / cm 3 .

6. A method for preparing an LED epitaxial wafer with dynamic self-healing function as described in any one of claims 1 to 5, characterized in that, Includes the following steps: Provide substrate; An AlN layer is deposited on the substrate; A three-dimensional GaN layer is deposited on the AlN layer; An undoped GaN layer is deposited on the three-dimensional GaN layer; An N-type GaN layer is deposited on the undoped GaN layer; A GST layer is deposited on the N-type GaN layer, the GST layer being made of Ge2Sb2Te5; A nano-island array is formed on the GST layer by nanoimprinting or laser interference lithography, wherein the nano-island array comprises multiple nano-islands, to obtain an intermediate. The intermediate was placed in an MOCVD reaction chamber and heated to 850℃~950℃ to make the nano-island array of the GST layer in an amorphous state. A multi-quantum-well light-emitting layer is deposited on the GST layer, the multi-quantum-well light-emitting layer having pits; An electron blocking layer is deposited on the multi-quantum-well light-emitting layer, and the electron blocking layer fills the pit; A p-type GaN layer is deposited on the electron blocking layer to obtain the initial product; The initial product is tested at 80℃~120℃ to allow the nano-island array of the GST layer to complete the phase transition from amorphous to crystalline state, thus obtaining the finished product.

7. The method for preparing an LED epitaxial wafer with dynamic self-healing function as described in claim 6, characterized in that, The GST layer is made by the following method: After depositing the N-type GaN layer, the GST layer is formed by vapor deposition in a CVD equipment with a growth thickness of 5 nm to 10 nm. The distribution density of the nanoislands is 50 per μm. 2 ~60 cells / μm 2 , The spacing between the nanoislands is 100nm~200nm, the height is 5nm~10nm, and the diameter is 30nm~80nm; The nanoislands are one or more of the following shapes: cylindrical, frustum, conical, hemispherical, inverted frustum, or nanograting.

8. The method for preparing an LED epitaxial wafer with dynamic self-healing function as described in claim 7, characterized in that, The nanoisland has a frustum structure with a bottom diameter of 50nm~80nm, a top diameter of 20nm~40nm, a height of 8nm~12nm, and a sidewall inclination angle of 70°~85°. The opening width of the pit is 50nm~120nm, the bottom width of the pit is 5nm~20nm, and the depth of the pit is 80nm~150nm.

9. The method for preparing an LED epitaxial wafer with dynamic self-healing function as described in claim 6, characterized in that, In the deposition of the N-type semiconductor layer, NH3 and TMGa are used as raw materials, SiH4 is used as N-type dopant, and the growth temperature is 1000℃~1200℃. In the deposition of the multi-quantum-well light-emitting layer, the multi-quantum-well light-emitting layer is formed by periodically alternating InGaN layers and GaN barrier layers, with a stacking period of 8 to 20; When depositing the InGaN layer, NH3, TEGa and TMI are used as raw materials, the growth temperature is 760℃~800℃, and the growth pressure is 150 torr~250 torr. When depositing the GaN barrier layer, NH3 and TEGa are used as raw materials, the growth temperature is 860°C~900°C, and the growth pressure is 150 torr~250 torr. In the deposition of the P-type semiconductor layer, NH3 and TEGa are used as raw materials, CP2Mg is used as a P-type dopant, and deposition is carried out in an H2 atmosphere; wherein the growth temperature is 980°C~1050°C.

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