Method for processing a semiconductor substrate

Abstract

The method for processing semiconductor substrate comprises the following steps: forming an oxide layer on the surface of the semiconductor substrate; depositing a self-assembled layer on the oxide layer; forming a photoetching pattern on the self-assembled layer; etching the self-assembled layer; etching the oxide layer; and removing the residue of the self-assembled layer. The method combines the self-assembled layer and the plasma etching technology to realize high-precision control of the semiconductor substrate, and is suitable for various semiconductor component manufacturing and application.

Description

Technical Field

[0001] This invention relates to the field of electronic manufacturing technology, and more particularly to a method for processing a semiconductor substrate. Background Technology

[0002] Precise control of component height is crucial in semiconductor manufacturing. Traditional height control methods typically rely on photolithography, but these methods suffer from low precision and low yield, especially at the nanoscale where high-precision height control is difficult to achieve. Therefore, developing a method for high-precision, high-yield semiconductor substrate height control is a significant requirement in the semiconductor manufacturing field. Summary of the Invention

[0003] The purpose of this invention is to provide an improved method for processing semiconductor substrates. This method combines self-assembled layer (SAM) and plasma etching technology to achieve high-precision control of semiconductor substrates, making it suitable for the manufacturing and application of various semiconductor components.

[0004] To achieve the above objectives, the semiconductor substrate processing method of the present invention includes the following steps:

[0005] An oxide layer is formed on the surface of a semiconductor substrate;

[0006] A self-assembled layer is deposited on the oxide layer;

[0007] A photolithographic pattern is formed on the self-assembly layer;

[0008] The self-assembled layer is etched;

[0009] Etching the oxide layer; and

[0010] Remove any residue from the self-assembled layer.

[0011] Compared with existing technologies, the present invention first performs surface treatment on the semiconductor substrate to form an oxide layer, and then deposits a self-assembled layer on the oxide layer. Combined with photolithography and etching technology, the height of the semiconductor substrate can be precisely controlled, thereby improving the yield of component height control. Moreover, the method of the present invention is applicable to various types of semiconductor components, such as transistors, capacitors and resistors. Furthermore, the method is simple to operate and easy to implement, and can be applied on a large scale in the semiconductor manufacturing process.

[0012] Preferably, the oxide layer is formed by chemical oxidation or plasma oxidation.

[0013] Preferably, the thickness of the oxide layer is 5-10 nm.

[0014] Preferably, the thickness of the self-assembled layer is 1-3 nm.

[0015] Preferably, the photolithographic pattern is formed by extreme ultraviolet lithography, electron beam lithography, or nanoimprint lithography.

[0016] Preferably, the etching of the self-assembled layer includes: using argon, oxygen or chlorine as the etching gas, controlling the operating power to be 100-300W and the chamber pressure to be 25-40Pa.

[0017] Preferably, the etching depth of the self-assembled layer is 50%-80% of the thickness of the self-assembled layer.

[0018] Preferably, the etching of the oxide layer includes: controlling the operating power to be 50-100W, the chamber pressure to be 10-20Pa, and the etching time to be 5-15 minutes.

[0019] Preferably, the etching depth of the oxide layer is 3-7 nm.

[0020] Preferably, removing residues from the self-assembled layer includes cleaning with acetone or ethanol. Detailed Implementation

[0021] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific implementation methods of this application are described in detail below with reference to some embodiments. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0022] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0023] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0024] It should be noted that when an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. When an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementation.

[0025] The semiconductor substrate processing method of the present invention will be further described below with reference to embodiments, but this does not limit the present invention. The method of the present invention aims to provide an improved semiconductor substrate processing method, which achieves high-precision control of the semiconductor substrate by combining self-assembled layer (SAM) and plasma etching technology, and is suitable for the manufacturing and application of various semiconductor components.

[0026] In one embodiment of the semiconductor substrate processing method of the present invention, the following steps are included:

[0027] An oxide layer is formed on the surface of a semiconductor substrate;

[0028] A self-assembled layer is deposited on the oxide layer;

[0029] A photolithographic pattern is formed on the self-assembly layer;

[0030] The self-assembled layer is etched;

[0031] Etching the oxide layer; and

[0032] Remove any residue from the self-assembled layer.

[0033] This invention first performs surface treatment on a semiconductor substrate to form an oxide layer, and then deposits a self-assembled layer on the oxide layer. By combining photolithography and etching techniques, the height of the semiconductor substrate can be precisely controlled, thereby improving the yield of component height control. Moreover, the method of this invention is applicable to various types of semiconductor components, such as transistors, capacitors, and resistors. Furthermore, the method is simple to operate and easy to implement, and can be applied on a large scale in the semiconductor manufacturing process.

[0034] Specifically, in one embodiment, the semiconductor substrate is first subjected to surface treatment, such as forming an oxide layer on the surface of the semiconductor substrate using chemical oxidation or ionic oxidation. In one embodiment, the thickness of the oxide layer is 5-10 nm, preferably 6-9 nm.

[0035] In a preferred embodiment, before forming the oxide layer, the semiconductor substrate is subjected to a plasma cleaning or chemical cleaning step to remove impurities and organic residues on the substrate surface, ensuring the uniformity of the oxide layer.

[0036] Next, a self-assembled layer is deposited on the oxide layer. Preferably, the thickness of the self-assembled layer is 1-3 nm. The material of the self-assembled layer can be selected according to the required device height. In one embodiment, materials such as alkyl thiols and alkyl phosphates are used to achieve a wider range of thickness control.

[0037] Next, a photolithographic pattern is formed on the self-assembled layer. Optionally, the photolithographic pattern is formed using extreme ultraviolet (EUVL) lithography, electron beam lithography, or nanoimprint lithography. Specifically, this step includes forming a photolithographic layer on the self-assembled layer and a curing process. Specifically, the self-assembled layer is subjected to photolithography or other patterning processes to form the photolithographic layer of the area to be etched. During the photolithography process, extreme ultraviolet (EUVL) lithography or electron beam lithography can be combined to further improve patterning accuracy, making it suitable for manufacturing smaller components. The size and shape of the photolithographic pattern determine the height of the component. Nanoimprint lithography can also be used to reduce photolithography costs and improve patterning efficiency.

[0038] Next, etching is performed. Specifically, this includes etching the self-assembled layer and etching the oxide layer. In one embodiment, plasma etching is used. Argon, oxygen, or chlorine is used as the etching gas, and the chamber power is controlled at 100-300W, with a chamber pressure of 25-40Pa. Under these conditions, the self-assembled layer is etched. Preferably, the etching time for the self-assembled layer is 5-20 minutes, and the etching depth is 50%-80% of the thickness of the self-assembled layer, preferably 60%-70%. Next, the oxide layer is etched, with the operating power controlled at 50-100W, the chamber pressure at 10-20Pa, and the etching time at 5-15 minutes. The etching depth of the oxide layer is the height required for the device, preferably 3-7nm.

[0039] Finally, solvents or plasma are used to remove any residue of the self-assembled layer. As an example, acetone or ethanol is used for cleaning and removal.

[0040] In alternative embodiments, other chemical methods (such as ozone treatment) or physical methods (such as ultraviolet irradiation) are used to remove self-assembled layer residues to reduce damage to the substrate.

[0041] After the above process, the height of the semiconductor substrate can be controlled with nanometer-level precision, the surface is flat and there is no obvious damage, which meets the requirements of high-performance semiconductor manufacturing.

[0042] In summary, this invention first performs surface treatment on a semiconductor substrate to form an oxide layer, then deposits a self-assembled layer on the oxide layer, and combines photolithography and etching techniques to precisely control the height of the semiconductor substrate, thereby improving the yield of component height control. Moreover, the method of this invention is applicable to various types of semiconductor components, such as transistors, capacitors, and resistors. Furthermore, this method is simple to operate, easy to implement, and can be applied on a large scale in the semiconductor manufacturing process.

[0043] The above-disclosed embodiments are merely preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. Therefore, any equivalent variations made in accordance with the claims of the present invention are still within the scope of the present invention.

Claims

1. A method for processing a semiconductor substrate, characterized in that, Includes the following steps: An oxide layer is formed on the surface of a semiconductor substrate; A self-assembled layer is deposited on the oxide layer; A photolithographic pattern is formed on the self-assembly layer; The self-assembled layer is etched; The oxide layer is etched; as well as Remove any residue from the self-assembled layer.

2. The semiconductor substrate processing method as described in claim 1, characterized in that, The oxide layer is formed by chemical oxidation or plasma oxidation.

3. The semiconductor substrate processing method as described in claim 1, characterized in that, The thickness of the oxide layer is 5-10 nm.

4. The method for processing a semiconductor substrate as described in claim 1, characterized in that, The thickness of the self-assembled layer is 1-3 nm.

5. The method for processing a semiconductor substrate as described in claim 1, characterized in that, The photolithographic pattern is formed by extreme ultraviolet lithography, electron beam lithography, or nanoimprint lithography.

6. The method for processing a semiconductor substrate as described in claim 1, characterized in that, The etching of the self-assembled layer includes: using argon, oxygen or chlorine as etching gas, controlling the working power to be 100-300W, and the chamber pressure to be 25-40Pa.

7. The method for processing a semiconductor substrate as described in claim 6, characterized in that: The etching depth of the self-assembled layer is 50%-80% of the thickness of the self-assembled layer.

8. The method for processing a semiconductor substrate as described in claim 1, characterized in that: The etching of the oxide layer includes: controlling the working power to be 50-100W, the chamber pressure to be 10-20Pa, and the etching time to be 5-15 minutes.

9. The method for processing a semiconductor substrate as described in claim 8, characterized in that: The etching depth of the oxide layer is 3-7 nm.

10. The method for processing a semiconductor substrate as described in claim 1, characterized in that: Removing residues from the self-assembled layer includes cleaning with acetone or ethanol.