Method for eliminating bonding interface defects, module and processing equipment for semiconductor devices

Abstract

The application provides a method for eliminating bonding interface defects, a module for eliminating bonding interface defects and a processing equipment for semiconductor devices. The method for eliminating bonding interface defects comprises the following steps: positioning a bubble defect on a bonding interface of a die-die bonding piece; applying a first pulsed beam current to the bubble defect from the die side to form a blind hole on a corresponding die of the bubble defect, so that the corresponding die has a first thickness at a corresponding position of the bottom of the blind hole; and applying a second pulsed beam current to the bottom of the blind hole to form an exhaust micro-via communicating with the bubble defect on the corresponding die, wherein a first single-pulse energy of the first pulsed beam current is greater than a second single-pulse energy of the second pulsed beam current.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method for eliminating bonding interface defects, a module for eliminating bonding interface defects, and a semiconductor device processing equipment. Background Technology

[0002] Die-to-wafer bonding is a core process in semiconductor 3D integration and system packaging. The cleanliness and flatness of the bonding interface directly determine the quality of the packaged product. In actual production, nanoscale particulate contaminants, organic residues, or localized unevenness are prone to exist on the die surface and in the wafer bonding area, causing gas cavities to form inside the interface after bonding. During the subsequent wafer grinding and thinning process, dies with such interface defects will fracture due to stress concentration and insufficient bonding force. The splashing of fragments not only causes abnormal shutdowns of the grinding equipment but also leads to the scrapping of the entire wafer, significantly reducing production yield and equipment operating efficiency.

[0003] Chinese patent document CN 122180407 A discloses a module, method, and semiconductor device processing equipment for eliminating bonding interface defects. It discloses a method of using high-energy pulsed beam drilling to remove trapped gas within the bonding interface cavity, thereby improving the interface defect problem. However, existing drilling processes have significant limitations in controlling the parameters of the high-energy beam, making precise control of the drilling depth impossible. The beam can easily penetrate the die, damaging the underlying device wafer and resulting in substantial repair costs.

[0004] In order to overcome the above-mentioned defects in the existing technology, there is an urgent need in the field for a bonding interface defect elimination technology to precisely control the etching depth at the bubble defect, so as to avoid the problem of high-energy pulse beams damaging the wafers of underlying devices, thereby improving the safety and stability of bonding defect repair. Summary of the Invention

[0005] The following provides a brief overview of one or more aspects to offer a basic understanding of them. This overview is not an exhaustive summary of all conceived aspects, nor is it intended to identify key or decisive elements of all aspects, nor to define the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed descriptions that follow.

[0006] To overcome the aforementioned deficiencies in the existing technology, the present invention provides a method for eliminating bonding interface defects, a module for eliminating bonding interface defects, and a semiconductor device processing equipment for precisely controlling the etching depth at bubble defects to avoid damage to the underlying device wafer caused by high-energy pulsed beams, thereby improving the safety and stability of bonding defect repair.

[0007] Specifically, the method for eliminating bonding interface defects according to the first aspect of the present invention includes the following steps: locating bubble defects on the bonding interface of a grain-wafer bonding member; applying a first pulse beam to the bubble defect from one side of the grain to form a blind hole on the corresponding grain of the bubble defect, such that the corresponding grain has a first thickness at the corresponding position at the bottom of the blind hole; and applying a second pulse beam to the bottom of the blind hole to form an exhaust micro-channel communicating with the bubble defect on the corresponding grain, wherein the first single pulse energy of the first pulse beam is greater than the second single pulse energy of the second pulse beam.

[0008] Furthermore, in some embodiments of the present invention, the step of locating bubble defects on the bonding interface of the grain-wafer bond includes: scanning the grain-wafer bond to determine the coordinate position of the bubble defect on the bonding interface.

[0009] Furthermore, in some embodiments of the present invention, the step of applying a first pulsed beam from one side of the grain to the bubble defect to form a blind hole on the corresponding grain of the bubble defect includes: obtaining the grain thickness of the corresponding grain; and determining a first process parameter of the first pulsed beam based on the difference between the grain thickness and the first thickness, wherein the first process parameter includes a first single pulse energy, and at least one of a first peak power, a first pulse width, a first duty cycle, a first pulse frequency, a spot diameter of the first pulsed beam, or a first number of pulses.

[0010] Furthermore, in some embodiments of the present invention, the step of applying a second pulsed beam to the bottom of the blind hole to form an exhaust micro-channel communicating with the bubble defect on the corresponding grain includes: determining a second process parameter of the second pulsed beam based on the first thickness, wherein the second process parameter includes a second single pulse energy, and at least one of a second peak power, a second pulse width, a second duty cycle, a second pulse frequency, a spot diameter of the second pulsed beam, or a second number of pulses.

[0011] Furthermore, in some embodiments of the present invention, the first thickness of the corresponding grain at the corresponding position at the bottom of the blind hole is between 10 μm and 50 μm.

[0012] Furthermore, in some embodiments of the present invention, after applying a first pulse beam from one side of the grain to the bubble defect to form a blind hole on the corresponding grain of the bubble defect, and before applying a second pulse beam to the bottom of the blind hole to form an exhaust micro-channel communicating with the bubble defect on the corresponding grain, the elimination method further includes the step of applying a third pulse beam to the bottom of the blind hole to give the corresponding grain a second thickness at the corresponding position at the bottom of the blind hole, wherein the second thickness is less than the first thickness, and the third single pulse energy of the third pulse beam is greater than the second single pulse energy.

[0013] Furthermore, in some embodiments of the present invention, the first single pulse energy of the first pulse beam is between 0.1 mJ and 10 mJ, the second single pulse energy of the second pulse beam is not greater than 10 μJ, and / or the first peak power of the first pulse beam is between 10 kW and 50 GW, the second peak power of the second pulse beam is between 10 kW and 50 GW, and / or the first pulse width of the first pulse beam is between 200 fs and 200 ps, ​​and the second pulse width of the second pulse beam is between 200 fs and 200 ps.

[0014] Furthermore, in some embodiments of the present invention, the first pulse beam and / or the second pulse beam form a first pulse beam spot and / or a second pulse beam spot with a diameter between 5 μm and 15 μm on the corresponding grain of the bubble defect.

[0015] Furthermore, the bonding interface defect elimination module provided according to the second aspect of the present invention includes: a defect positioning mechanism for scanning the grain-wafer bonding component to determine the coordinate position of the bubble defect on the bonding interface; and a pulse beam emitter located on the grain side of the bonding interface and facing the bonding interface, for applying a first pulse beam to the bubble defect to form a blind hole on the corresponding grain of the bubble defect, such that the corresponding grain has a first thickness at a corresponding position at the bottom of the blind hole, and applying a second pulse beam to the bottom of the blind hole to form a connection between the two grains on the corresponding grain. The system includes an exhaust micro-channel for the bubble defect, wherein the first single-pulse energy of the first pulsed beam is greater than the second single-pulse energy of the second pulsed beam; an optical system located between the pulsed beam emitter and the grain, used to focus the first pulsed beam and / or the second pulsed beam output by the pulsed beam emitter onto the surface of the corresponding grain above the bubble defect, forming a first pulsed beam spot and / or a second pulsed beam spot with a diameter between 5 μm and 15 μm; and a processor used to determine the control parameters of the pulsed high-energy beam based on the ablation depth of the exhaust micro-channel.

[0016] Furthermore, the semiconductor device processing apparatus provided according to a third aspect of the present invention includes: a bonding module for bonding a die to a bonding interface of a wafer to form a die-wafer bond; a bonding interface defect elimination module as described in the second aspect of the present invention, located at the rear end of the bonding module, for eliminating bubble defects on the bonding interface of the die-wafer bond; and a polishing mechanism, located at the rear end of the elimination module, for polishing and thinning the wafer side of the die-wafer bond after the bubble defects have been eliminated. Attached Figure Description

[0017] The above-described features and advantages of the present invention will be better understood after reading the following detailed description of embodiments of the present disclosure in conjunction with the accompanying drawings. In the drawings, components are not necessarily drawn to scale, and components having similar related characteristics or features may have the same or similar reference numerals.

[0018] Figure 1 A schematic diagram of bonding interface defect localization provided according to some embodiments of the present invention is shown.

[0019] Figure 2 A schematic diagram of a bonding interface defect elimination module structure provided according to some embodiments of the present invention is shown.

[0020] Figure 3 A flowchart illustrating a method for eliminating bonding interface defects according to some embodiments of the present invention is shown.

[0021] Figure 4 A schematic diagram of applying a first pulsed beam to the bubble defect according to some embodiments of the present invention is shown.

[0022] Figure 5 A schematic diagram of applying a second pulsed beam to the bubble defect according to some embodiments of the present invention is shown.

[0023] Figure label: 10 grains 20 wafers 30 Defect Location Mechanism 31. Bubble Defects 40 Pulse Beam Emitter 41 First Pulse Beam 42 Second Pulse Beam Detailed Implementation

[0024] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Although the description of the present invention is presented in conjunction with preferred embodiments, this does not mean that the features of the invention are limited to these embodiments. On the contrary, the purpose of describing the invention in conjunction with embodiments is to cover other options or modifications that may be derived based on the claims of the present invention. To provide a thorough understanding of the invention, many specific details will be included in the following description. The invention may also be implemented without using these details. Furthermore, to avoid confusion or obscuring the focus of the invention, some specific details will be omitted in the description.

[0025] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0026] Furthermore, the terms "upper," "lower," "left," "right," "top," "bottom," "horizontal," and "vertical" used in the following description should be understood as the orientations shown in the relevant paragraphs and accompanying drawings. These relative terms are for illustrative purposes only and do not imply that the described apparatus must be manufactured or operated in a specific orientation, and therefore should not be construed as limiting the invention.

[0027] It is understood that although terms such as "first," "second," and "third" may be used herein to describe various components, regions, layers, and / or parts, these components, regions, layers, and / or parts should not be limited by these terms, and these terms are only used to distinguish different components, regions, layers, and / or parts. Therefore, the first components, regions, layers, and / or parts discussed below may be referred to as second components, regions, layers, and / or parts without departing from some embodiments of the present invention.

[0028] As mentioned above, die-to-wafer bonding is a core process in semiconductor 3D integration and system packaging. The cleanliness and flatness of the bonding interface directly determine the quality of the packaged product. In actual production, nanoscale particulate contaminants, organic residues, or localized unevenness are prone to exist on the die surface and in the wafer bonding area, causing gas cavities to form inside the interface after bonding. In the subsequent wafer grinding and thinning process, dies with such interface defects will fracture due to stress concentration and insufficient bonding force. The splashing of fragments will not only cause abnormal shutdown of the grinding equipment but also lead to the scrapping of the entire wafer, significantly reducing production yield and equipment operating efficiency.

[0029] Chinese patent document CN 122180407 A discloses a module, method, and semiconductor device processing equipment for eliminating bonding interface defects. It discloses a method of using high-energy pulsed beam drilling to remove trapped gas within the bonding interface cavity, thereby improving the interface defect problem. However, existing drilling processes have significant limitations in controlling the parameters of the high-energy beam, making precise control of the drilling depth impossible. The beam can easily penetrate the die, damaging the underlying device wafer and resulting in substantial repair costs.

[0030] To overcome the aforementioned deficiencies in the existing technology, the present invention provides a method for eliminating bonding interface defects, a module for eliminating bonding interface defects, and a semiconductor device processing equipment for precisely controlling the etching depth at bubble defects to avoid damage to the underlying device wafer caused by high-energy pulsed beams, thereby improving the safety and stability of bonding defect repair.

[0031] In some non-limiting embodiments, the method for eliminating bonding interface defects provided in the first aspect of the present invention can be implemented based on the bonding interface defect elimination module provided in the second aspect of the present invention. Specifically, the bonding interface defect elimination module is configured with a memory and a controller. The memory includes, but is not limited to, a computer-readable storage medium storing computer instructions thereon. The controller is connected to the memory and configured to execute the computer instructions stored in the memory to implement the bonding interface defect elimination method provided in the first aspect of the present invention.

[0032] Furthermore, the bonding interface defect elimination module provided in the second aspect of the present invention can be configured in the semiconductor device processing equipment provided in the third aspect of the present invention. Specifically, the semiconductor device processing equipment includes: a bonding module for bonding a die to the bonding interface of a wafer to form a die-wafer bond; a bonding interface defect elimination module as described in the second aspect of the present invention, located at the rear end of the bonding module, for eliminating bubble defects on the bonding interface of the die-wafer bond; and a polishing mechanism, located at the rear end of the elimination module, for polishing and thinning the wafer side of the die-wafer bond after the bubble defects have been eliminated.

[0033] Please refer to the details. Figures 1-2 , Figure 1 A schematic diagram of bonding interface defect localization provided according to some embodiments of the present invention is shown. Figure 2 A schematic diagram of a bonding interface defect elimination module structure provided according to some embodiments of the present invention is shown.

[0034] like Figures 1-2As shown, the bonding interface defect elimination module may include a defect location mechanism 30 and a pulse beam emitter 40.

[0035] The defect location mechanism 30 is used to scan the grain 10-wafer 20 bonding assembly to determine the coordinate position of the bubble defect 31 on the bonding interface.

[0036] The pulsed beam emitter 40 is located on the grain 10 side of the bonding interface and faces the bonding interface. It is used to apply a first pulsed beam 41 to the bubble defect 31, forming a blind hole on the corresponding grain 10 of the bubble defect 31, so that the corresponding grain 10 has a first thickness at the corresponding position at the bottom of the blind hole. The pulsed beam emitter 40 is also used to apply a second pulsed beam 42 to the bottom of the blind hole to form an exhaust micro-through hole communicating with the bubble defect 31 on the corresponding grain 10. Here, the first single pulse energy of the first pulsed beam 41 is greater than the second single pulse energy of the second pulsed beam 42.

[0037] In addition, the bonding interface defect elimination module may also include an optical system located between the pulse beam emitter 40 and the grain 10, for focusing the first pulse beam 41 and / or the second pulse beam 42 output by the pulse beam emitter 40 onto the surface of the corresponding grain 10 above the bubble defect 31, forming a first pulse beam 41 spot and / or a second pulse beam 42 spot with a diameter between 5 μm and 15 μm.

[0038] In addition, the bonding interface defect elimination module also includes a processor for determining the control parameters of the pulsed high-energy beam based on the ablation depth of the exhaust micro-via.

[0039] Thus, the defect location mechanism 30 first performs a full-area inspection of the bonded wafer 20, accurately identifying the target grain 10 with interface defects and acquiring the planar coordinates of the defect location. The pulse beam emitter 40, based on the grain 10 thickness data and pre-defined process rules, matches and adapts the single-pulse energy, pulse quantity, and other operating parameters to prepare for pulse beam output. The optical system simultaneously receives the defect location coordinate signal, completes optical path attitude adjustment and precise alignment, and transmits, shapes, and focuses the pulse beam emitted by the pulse beam emitter 40, ensuring the beam precisely targets the defect area of ​​the grain 10.

[0040] The working principle of the above-mentioned bonding interface defect elimination module will be described below with reference to embodiments of some bonding interface defect elimination methods. Those skilled in the art will understand that these embodiments of bonding interface defect elimination methods are merely non-limiting implementations provided by the present invention, intended to clearly demonstrate the main concept of the invention and provide specific solutions convenient for public implementation, rather than limiting all functions or all working methods of the bonding interface defect elimination module. Similarly, the bonding interface defect elimination module is also merely a non-limiting implementation provided by the present invention, and does not constitute a limitation on the executing entity or execution order of the steps in these bonding interface defect elimination methods.

[0041] Please refer to the reference. Figure 1 and Figure 3 , Figure 3 A flowchart illustrating a method for eliminating bonding interface defects according to some embodiments of the present invention is shown.

[0042] like Figure 1 and Figure 3 As shown, the bonding interface defect elimination module can first perform step S1: locate the bubble defect 31 on the bonding interface of the die 10-wafer 20 bonding component.

[0043] Specifically, the bonding interface defect elimination module can scan the die 10-wafer 20 bonded component via the defect positioning mechanism 30 to determine the coordinate position of the bubble defect 31 on the bonding interface. Here, the defect positioning mechanism 30 can employ an acoustic scanning microscope. This acoustic scanning microscope scans the entire die 10-wafer 20 bonded component, records all existing bubble defects 31, and generates a corresponding coordinate file.

[0044] Next, please refer to the reference. Figures 3-4 , Figure 4 A schematic diagram of applying a first pulsed beam to a bubble defect according to some embodiments of the present invention is shown.

[0045] like Figures 3-4 As shown, the bonding interface defect elimination module can continue to execute step S2: apply a first pulse beam 41 from one side of the grain 10 to the bubble defect 31 to form a blind hole on the corresponding grain 10 of the bubble defect 31, so that the corresponding grain 10 has a first thickness d at the corresponding position at the bottom of the blind hole.

[0046] In some embodiments of the present invention, the first thickness d can be a pre-set fixed value, which can be entered into the system in advance according to process standards and device protection requirements. During the processing, the preset value can be directly called as the target thickness of the corresponding position of the corresponding grain 10 at the bottom of the blind hole.

[0047] In some embodiments of the present invention, the first thickness d can also be dynamically calculated in combination with the overall thickness of the grain 10 obtained by real-time detection and adaptively determined to match the processing requirements of grains 10 of different specifications.

[0048] Specifically, those skilled in the art can set the first thickness to be 10% to 50% of the initial thickness of the die 10. Thus, the range of the first thickness can reserve a sufficiently thick die substrate as a buffer protective layer, thereby preventing the laser pulse from penetrating the die and damaging the underlying device wafer due to energy fluctuations and depth detection errors, while ensuring that the bottom of the blind hole is close enough to the bonding bubble defect.

[0049] In some embodiments of the present invention, the first thickness d of the corresponding position of the corresponding grain 10 at the bottom of the blind hole can be between 10 μm and 50 μm. Here, when the thickness at the bottom of the blind hole is not uniform, the first thickness d represents the minimum thickness of the corresponding grain 10 at the bottom of the blind hole.

[0050] In some embodiments of the present invention, the bonding interface defect elimination module can obtain the thickness of the corresponding grain 10 via an infrared ranging sensor.

[0051] For example, this infrared ranging sensor can employ single-ended near-infrared interferometry thickness measurement. Specifically, this infrared ranging sensor using single-ended near-infrared interferometry thickness measurement can first complete the optical path reference calibration. Then, a near-infrared detection beam is emitted perpendicularly towards the target die 10. Part of the beam is reflected on the upper surface of the die 10, and the other part penetrates the die 10 body and is reflected at the bonding interface between the die 10 and the wafer 20. In this way, the two reflected beams return to the sensor and couple with the reference beam to form an interference signal. The sensor calculates the thickness of the corresponding die 10 by analyzing parameters such as the interference phase and optical path difference.

[0052] Subsequently, the processor of the bonding interface defect elimination module can determine the first process parameters of the first pulse beam 41 based on the difference between the thickness of the die 10 and the first thickness d. Here, the first process parameters include the first single pulse energy, and at least one of the following: first peak power, first pulse width, first duty cycle, first pulse frequency, spot diameter of the first pulse beam 41, or first number of pulses.

[0053] Optionally, the first process parameter may also include a first focusing depth or a first scanning speed, etc.

[0054] For example, in some embodiments of the present invention, the method for determining the first process parameters of the first pulsed beam 41 based on the difference between the thickness of the grain 10 and the first thickness d can be based on the first single pulse energy and the first pulse number. Specifically, the difference between the thickness of the grain 10 and the first thickness d is equal to the product of the first single pulse energy and the first pulse number.

[0055] Specifically, the bonding interface defect elimination module can use an optical system to focus the first pulse beam 41 output by the pulse beam emitter 40 onto the corresponding grain 10 above the bubble defect 31, forming a first pulse beam 41 spot with a diameter between 5 μm and 15 μm.

[0056] Finally, please refer to the reference. Figures 3-5 , Figure 5 A schematic diagram of applying a second pulsed beam to a bubble defect according to some embodiments of the present invention is shown.

[0057] like Figures 3-5 As shown, the bonding interface defect elimination module can first perform step S3: applying a second pulse beam 42 to the bottom of the blind hole to form a venting micro-channel connecting the bubble defect 31 on the corresponding grain 10. The first single pulse energy of the first pulse beam 41 is greater than the second single pulse energy of the second pulse beam 42.

[0058] Specifically, the processor of the bonding interface defect elimination module can determine the second process parameters of the second pulse beam 42 based on the first thickness d. Here, the second process parameters include the second single pulse energy, and at least one of the following: second peak power, second pulse width, second duty cycle, second pulse frequency, spot diameter of the second pulse beam 42, or second number of pulses.

[0059] Therefore, this invention utilizes a segmented laser pulse etching process. First, a high-energy pulse beam is used to complete a deep and rapid hole drilling. When the remaining drilling depth reaches a preset first thickness d, the pulse energy is reduced to a low-energy pulse beam. This adapts to the drilling requirements of chips with different thicknesses and allows for precise control of the etching depth at the bubble defect 31. This avoids the problem of high-energy pulse beams damaging the underlying device wafer 20, thereby improving the safety and stability of bonding defect repair.

[0060] Optionally, the second process parameter may also include a second focusing depth or a second scanning speed, etc.

[0061] For example, in some embodiments of the present invention, similarly, the method for determining the second process parameters of the second pulsed beam 42 based on the first thickness d can be based on the second single-pulse energy and the second pulse number. Specifically, the first thickness d can be equal to the product of the second single-pulse energy and the second pulse number.

[0062] In some embodiments of the present invention, the bonding interface defect elimination module can focus the second pulse beam 42 output by the pulse beam emitter 40 onto the corresponding grain 10 above the bubble defect 31 via an optical system, forming a second pulse beam 42 spot with a diameter between 5 μm and 15 μm.

[0063] In some embodiments of the present invention, the first single pulse energy of the first pulse beam 41 can be between 0.1 mJ and 10 mJ, and the second single pulse energy of the second pulse beam 42 is not greater than 10 μJ.

[0064] In some embodiments of the present invention, the first peak power of the first pulse beam 41 is between 10kW and 50GW, and the second peak power of the second pulse beam 42 is between 10kW and 50GW.

[0065] In some embodiments of the present invention, the first pulse width of the first pulse beam 41 is between 200 fs and 200 ps, ​​and the second pulse width of the second pulse beam 42 is between 200 fs and 200 ps.

[0066] In some embodiments of the present invention, after a first pulsed beam 41 is applied to the bubble defect 31 from one side of the grain 10 to form a blind hole on the corresponding grain 10 of the bubble defect 31, and a second pulsed beam 42 is applied to the bottom of the blind hole to form a venting micro-via communicating with the bubble defect 31 on the corresponding grain 10, the processor of the bonding interface defect elimination module may apply a third pulsed beam to the bottom of the blind hole so that the corresponding grain 10 has a second thickness at the corresponding position at the bottom of the blind hole. Here, the second thickness is less than the first thickness d, and the third single pulse energy of the third pulsed beam is greater than the second single pulse energy.

[0067] In summary, this invention utilizes a segmented laser pulse etching process. First, a high-energy pulse beam is used to rapidly drill holes to a large depth. When the remaining drilling depth reaches a preset first thickness d, the pulse energy is reduced to a low-energy pulse beam. This adapts to the drilling requirements of chips with different thicknesses, allowing for precise control of the etching depth at the bubble defect 31. This avoids damage to the underlying device wafer 20 caused by the high-energy pulse beam, thereby improving the safety and stability of bonding defect repair.

[0068] Although the methods described above are illustrated and depicted as a series of actions for the sake of simplicity, it should be understood and appreciated that these methods are not limited by the order of the actions, as some actions may occur in a different order and / or concurrently with other actions from the illustrations and descriptions herein or not illustrated and described herein but which may be understood by those skilled in the art, according to one or more embodiments.

[0069] The prior description of this disclosure is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to this disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not intended to be limited to the examples and designs described herein, but should be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for eliminating bonding interface defects, characterized in that, Includes the following steps: Locate bubble defects at the bonding interface of the grain-wafer bond; A first pulsed beam is applied from one side of the grain to the bubble defect, forming a blind hole on the corresponding grain of the bubble defect, such that the corresponding grain has a first thickness at the corresponding position at the bottom of the blind hole; and A second pulsed beam is applied to the bottom of the blind hole to form an exhaust micro-channel on the corresponding grain that connects to the bubble defect, wherein the first single pulse energy of the first pulsed beam is greater than the second single pulse energy of the second pulsed beam.

2. The elimination method as described in claim 1, characterized in that, The step of locating bubble defects at the bonding interface of the grain-wafer bond includes: The grain-wafer bond is scanned to determine the coordinate position of the bubble defect on the bonding interface.

3. The elimination method as described in claim 1, characterized in that, The step of applying a first pulsed beam from one side of the grain to the bubble defect to form a blind hole on the corresponding grain of the bubble defect includes: Obtain the grain thickness of the corresponding grain; and Based on the difference between the grain thickness and the first thickness, the first process parameters of the first pulse beam are determined, wherein the first process parameters include the first single pulse energy, and at least one of the following: first peak power, first pulse width, first duty cycle, first pulse frequency, first pulse beam spot diameter, or first pulse number.

4. The elimination method as described in claim 1, characterized in that, The step of applying a second pulsed beam to the bottom of the blind hole to form an exhaust micro-channel communicating with the bubble defect on the corresponding grain includes: Based on the first thickness, the second process parameters of the second pulsed beam are determined, wherein the second process parameters include the second single pulse energy, and at least one of the following: second peak power, second pulse width, second duty cycle, second pulse frequency, spot diameter of the second pulsed beam, or number of second pulses.

5. The elimination method as described in claim 1, characterized in that, The thickness of the corresponding grain at the corresponding position at the bottom of the blind hole is between 10 μm and 50 μm.

6. The elimination method as described in claim 1, characterized in that, After applying a first pulsed beam to the bubble defect from one side of the grain to form a blind hole on the corresponding grain of the bubble defect, and before applying a second pulsed beam to the bottom of the blind hole to form an exhaust micro-channel communicating with the bubble defect on the corresponding grain, the elimination method further includes the following steps: A third pulse beam is applied to the bottom of the blind hole so that the corresponding grain has a second thickness at the corresponding position at the bottom of the blind hole, wherein the second thickness is less than the first thickness, and the third single pulse energy of the third pulse beam is greater than the second single pulse energy.

7. The elimination method as described in claim 1, characterized in that, The first single-pulse energy of the first pulsed beam is between 0.1 mJ and 10 mJ, and the second single-pulse energy of the second pulsed beam is not greater than 10 μJ, and / or The first peak power of the first pulsed beam is between 10kW and 50GW, and the second peak power of the second pulsed beam is between 10kW and 50GW, and / or The first pulse width of the first pulse beam is between 200 fs and 200 ps, ​​and the second pulse width of the second pulse beam is between 200 fs and 200 ps.

8. The elimination method as described in claim 1, characterized in that, The first pulse beam and / or the second pulse beam form a first pulse beam spot and / or a second pulse beam spot with a diameter between 5 μm and 15 μm on the corresponding grain of the bubble defect.

9. A module for eliminating bonding interface defects, characterized in that, include: A defect location mechanism is used to scan the grain-wafer bond to determine the coordinate position of bubble defects on the bonding interface; A pulsed beam emitter, located on the grain side of the bonding interface and facing the bonding interface, is used to apply a first pulsed beam to the bubble defect, forming a blind hole on the corresponding grain of the bubble defect, so that the corresponding grain has a first thickness at the corresponding position at the bottom of the blind hole, and applying a second pulsed beam to the bottom of the blind hole to form an exhaust micro-through hole communicating with the bubble defect on the corresponding grain, wherein the first single pulse energy of the first pulsed beam is greater than the second single pulse energy of the second pulsed beam; An optical system, located between the pulsed beam emitter and the grain, is used to focus the first pulsed beam and / or the second pulsed beam output by the pulsed beam emitter onto the surface of the grain corresponding to the bubble defect, forming a first pulsed beam spot and / or a second pulsed beam spot with a diameter between 5 μm and 15 μm; and The processor is used to determine the control parameters of the pulsed high-energy beam based on the ablation depth of the exhaust micro-via.

10. A semiconductor device processing apparatus, characterized in that, include: The bonding module is used to bond the die to the bonding interface of the wafer to form a die-wafer bond. The bonding interface defect elimination module as described in claim 9, located at the rear end of the bonding module, is used to eliminate bubble defects on the bonding interface of the grain-wafer bond; and The grinding mechanism, located at the rear end of the elimination module, is used to perform grinding and thinning treatment on the wafer side of the grain-wafer bond after the bubble defects have been eliminated.

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