A method and apparatus for fabricating a metal interconnect structure

CN122825809APending Publication Date: 2026-09-25GUANGZHOU ZENGXIN TECH CO LTD
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Patent Information

Application Number
CN202611007724.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-07
Publication Date
2026-09-25

AI Technical Summary

Technical Problem

传统的制备方式中,铜种子层生长后,铜种子层厚度较薄,极易受到环境污染或被氧化,会导致其在电镀过程中铜薄膜电镀不上去;若增加铜种子层厚度,则会影响后续电镀可能提前封口;以上两种情况,经化学机械研磨后会出现metal void(金属空洞)&Cu missing(铜缺陷)缺陷,该缺陷严重时影响芯片良率和寿命

Benefits of technology

[0015]本申请实施例提供的金属互连结构的制备方法及制备设备,采用电子率与铜相近的金属膜层保护铜种子层,极大程度地减低铜种子层在电镀前被氧化或被污染,改善电镀过程中铜互连层电镀不上去的现象,减小后续电镀难度,提升良率和使用寿命。

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Abstract

The application provides a preparation method and a preparation device of a metal interconnection structure, and relates to the technical field of semiconductors, which comprises the following steps: providing a substrate, and sequentially forming an oxidation film layer, a barrier layer and a copper seed layer on the substrate; forming a metal film layer on the copper seed layer; wherein the resistivity of the metal film layer is close to that of copper, and the chemical property of the metal film layer is stable; and forming a copper interconnection layer on the metal film layer. The metal film layer with the electronic rate close to that of copper is used to protect the copper seed layer, so that the copper seed layer is greatly reduced in oxidation or pollution before electroplating, the phenomenon that the copper interconnection layer is not plated in the electroplating process is improved, the subsequent electroplating difficulty is reduced, and the yield and service life are improved.
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Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to a method and apparatus for fabricating a metal interconnect structure. Background Technology

[0002] In semiconductor device manufacturing processes, multiple metal interconnect layers are grown on semiconductor substrates according to different needs. Copper seed layers and copper thin films are common interconnect layers. In traditional fabrication methods, the copper seed layer is relatively thin after growth, making it highly susceptible to environmental contamination or oxidation, which can prevent the copper thin film from being deposited during electroplating. Increasing the thickness of the copper seed layer can affect subsequent electroplating and may lead to premature sealing. Both of these situations, after chemical mechanical polishing, will result in metal voids and copper missing defects, which, when severe, affect chip yield and lifespan. Summary of the Invention

[0003] The purpose of this application is to provide a method and equipment for preparing a metal interconnect structure, which can prevent the copper seed layer from being contaminated, improve phenomena such as metal voids and copper defects, and improve the yield and lifespan of the product.

[0004] One aspect of this application provides a method for fabricating a metal interconnect structure, including: A substrate is provided, and an oxide film layer, a barrier layer and a copper seed layer are sequentially formed on the substrate; A metal film is formed on the copper seed layer; wherein the resistivity of the metal film is similar to that of copper, and the chemical properties of the metal film are stable.

[0005] A copper interconnect layer is formed on the metal film.

[0006] Optionally, the metal film layer is a gold layer.

[0007] Optionally, the thickness of the metal film layer along the stacking direction is 1 / 3 to 1 / 2 of the thickness of the copper seed layer.

[0008] Optionally, the thickness of the metal film layer along the stacking direction is 1 / 4 to 1 / 3 of the thickness of the copper interconnect layer.

[0009] Optionally, the thickness of the metal film layer along the stacking direction is 3nm to 10nm.

[0010] Optionally, forming a metal film layer on the copper seed layer includes: The metal film was deposited using a high-vacuum sputtering process with a vacuum level of 0.8E. -8 Torr ~ 1.0E -8Torr, with a deposition power of 400W to 600W, a particle bias power of 100W to 300W, and an electromagnetic field applied simultaneously.

[0011] Optionally, the machine tool is provided with at least a copper seed layer growth chamber and a metal film growth chamber, wherein forming a metal film on the copper seed layer includes: The copper seed layer is generated in the copper seed layer growth chamber; The material is rapidly transferred to the metal film growth chamber to grow the metal film on the copper seed layer.

[0012] Optionally, the barrier layer includes a tantalum nitride layer formed on the substrate and a tantalum layer formed on the tantalum nitride layer, with the copper seed layer located on top of the tantalum layer.

[0013] Another aspect of this application provides a fabrication apparatus for a metal interconnect structure, applied to the aforementioned method for fabricating the metal interconnect structure. The apparatus includes a machine base, on which at least a copper seed layer growth chamber and a metal film growth chamber are provided. The metal film growth chamber is a high-vacuum chamber with a high vacuum level of 0.8E. -8 Torr~1.0E - 8 Torr.

[0014] Optionally, the machine base is also provided with a barrier layer growth chamber and a pre-cleaning chamber.

[0015] The method and equipment for preparing the metal interconnect structure provided in this application use a metal film layer with an electron density similar to that of copper to protect the copper seed layer. This greatly reduces the risk of the copper seed layer being oxidized or contaminated before electroplating, improves the phenomenon that the copper interconnect layer cannot be electroplated during the electroplating process, reduces the difficulty of subsequent electroplating, and improves the yield and service life.

[0016] The equipment for fabricating metal interconnect structures integrates a copper seed layer growth chamber and a metal film growth chamber on the same machine. This allows the freshly deposited copper seed layer to be quickly transferred to the metal film growth chamber for metal film deposition under vacuum conditions. This avoids contamination of the freshly grown copper seed layer during the transfer process or oxidation of the copper seed layer while waiting for the subsequent copper electroplating process, thus ensuring the yield of the product. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the fabrication method of the metal interconnect structure provided in this embodiment; Figure 2 This is a schematic diagram of the structure obtained by the method for fabricating the metal interconnect structure provided in this embodiment; Figure 3 It is a defect diagram of existing technology; Figure 4 This is an improved diagram obtained by the method for fabricating the metal interconnect structure provided in this embodiment; Figure 5 This is a schematic diagram of the fabrication equipment for the metal interconnect structure provided in this embodiment.

[0019] Icons: 10-Substrate; 11-Oxide film layer; 12-Barrier layer; 13-Copper seed layer; 14-Metal film layer; 15-Copper interconnect layer; 20-Machinery; 21-Pre-cleaning chamber; 22-Barrier layer growth chamber; 23-Copper seed layer growth chamber; 24-Metal film layer growth chamber; F-Layering direction. Detailed Implementation

[0020] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0021] In the description of this application, it should be noted that the terms "inner" and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0022] It should also be noted that, unless otherwise explicitly specified and limited, the terms "setup" and "connection" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0023] Please refer to Figure 1 As shown in the figure, this application provides a method for fabricating a metal interconnect structure, the method comprising: like Figure 2 As shown, step 100: Provide a substrate 10, and sequentially form an oxide film layer 11, a barrier layer 12 and a copper seed layer 13 on the substrate 10.

[0024] The substrate 10, oxide film layer 11, barrier layer 12 and copper seed layer 13 are stacked in sequence; wherein, the substrate 10 provides mechanical support, heat conduction path and crystal growth template for all subsequent film layers, and can generally be single crystal silicon, silicon carbide or gallium arsenide as substrate 10.

[0025] The oxide film layer 11 is an insulating dielectric film deposited between the substrate 10 or metal layers for electrical isolation. It is usually made of silicon dioxide and has the functions of isolating different interconnect layers and preventing short circuits.

[0026] The barrier layer 12 is a nanoscale transition layer located between the oxide film layer 11 and the copper seed layer 13. It is used to suppress the diffusion of copper atoms into the insulating medium and avoid leakage and device failure.

[0027] For example, a bilayer structure formed of TaN (tantalum nitride) and Ta is used as the barrier layer 12. TaN has a stronger diffusion barrier effect and can significantly reduce leakage current; Ta has good adhesion to copper and serves as the carrier layer for the copper seed layer 13. That is, the barrier layer 12 includes a stacked tantalum nitride layer and a tantalum layer, with the tantalum nitride layer formed on the substrate 10 and the copper seed layer 13 located on the tantalum layer.

[0028] Specifically, during fabrication, the wafer is transferred into the barrier layer growth chamber 22, and TaN and Ta are deposited on the substrate 10 as a barrier layer 12 using a conventional Ta / TaN deposition process. Then, it is transferred into the copper seed layer growth chamber 23, and the copper seed layer 13 is deposited using an RFxT (radio frequency sputtering) process.

[0029] Step 101: Form a metal film 14 on the copper seed layer 13; wherein the resistivity of the metal film 14 is similar to that of copper, and the chemical properties of the metal film 14 are stable.

[0030] After the copper seed layer 13 is grown, a thin metal film layer 14 is grown to prevent the copper seed layer 13 from being oxidized or contaminated, and to improve the metal void or Cu missing defects generated during the electroplating process.

[0031] The metal film layer 14 is required to have an electron density similar to that of copper to avoid significant impact on the electrical performance of the semiconductor. It must also be chemically stable, resistant to oxidation, and effectively protect the copper seed layer from contamination or oxidation. For example, this application uses a gold layer as the metal film layer 14. After the copper seed layer 13 is grown, another gold layer is grown on the same machine 20. The gold layer itself is stable and resistant to oxidation, protecting the copper seed layer 13 and greatly reducing the risk of oxidation or contamination before electroplating. This improves the situation where the copper plating layer (copper interconnect layer 15) cannot be plated during electroplating, reduces the difficulty of subsequent electroplating, and improves yield and service life.

[0032] Specifically, after the copper seed layer 13 has grown, it is rapidly transferred to the metal film growth chamber 24 of the machine 20 under high vacuum conditions to prevent oxidation or contamination of the copper seed layer 13. The metal film 14 is deposited using a high-vacuum sputtering process with a vacuum level of 0.8E. -8 Torr~1.0E -8 Torr, with a deposition power of 400W to 600W, a particle bias power of 100W to 300W, and an electromagnetic field applied simultaneously.

[0033] Using 0.8E -8 Torr~1.0E -8 Torr's high vacuum effectively eliminates residual gases, preventing oxidation or contamination and ensuring the purity of the metal film 14. The low-pressure environment allows for higher sputtering particle energy and a faster deposition rate, while also reducing the defect rate of the metal film 14.

[0034] A deposition power of 400W to 600W can ensure stable sputtering and avoid unstable discharge. The deposition power can also be adjusted within this range as needed to optimize the deposition rate and quality.

[0035] During sputtering deposition in a high-vacuum environment, the particle bias power actually refers to the electrical power corresponding to the radio frequency or DC negative bias applied to the substrate. It is used to regulate the kinetic energy of the incident ions, thereby precisely controlling the microstructure and properties of the metal film 14. With a particle bias power ranging from 100W to 300W, by regulating the ion bombardment energy, the particle bias power affects the ion bombardment efficiency, thereby regulating the grain size, orientation, and compactness of the metal film 14, and optimizing its microstructure and properties.

[0036] Applying an electromagnetic field in a high vacuum environment, the magnetic field constrains electron movement, thereby achieving a comprehensive improvement in sputtering efficiency, film quality, and process stability, realizing quantum state manipulation, and significantly improving sputtering efficiency and film quality of metal film layer 14.

[0037] During the specific sputtering process, the parameters in the table below can be used as a reference. By setting the parameters, the collimation and distribution uniformity of charged particles can be improved, and the step coverage of the metal film 14 can also be increased. This ensures the continuity of the metal film 14 and reduces its thickness, avoiding any impact on the electrical parameters, ultimately resulting in a thin and uniform metal film 14.

[0038]

[0039] Step 102: Form a copper interconnect layer 15 on the metal film layer 14.

[0040] A copper interconnect layer 15 is grown on a metal film 14 by electrochemical deposition, such as electroplating. The copper interconnect layer 15 is the main material for the internal wires and vias of the chip.

[0041] The substrate 10, oxide film layer 11, barrier layer 12, copper seed layer 13, metal film layer 14 and copper interconnect layer 15 constitute the core functional film layer of the metal interconnect structure, which is commonly used in integrated circuits and photovoltaic cells.

[0042] Specifically, the metal film layer 14 of this application is relatively thin. Compared with the copper seed layer 13 and the copper interconnect layer 15, the thickness of the metal film layer 14 along the stacking direction F is 1 / 3 to 1 / 2 of the thickness of the copper seed layer 13 and 1 / 4 to 1 / 3 of the thickness of the copper interconnect layer 15.

[0043] For example, such as Figure 2 As shown, the metal film layer 14 is relatively thin, while the thicknesses of the copper seed layer 13 and the copper interconnect layer 15 are both greater than that of the metal film layer 14. When the thickness of the copper seed layer 13 is greater than that of the metal film layer 14, the overall resistance of the copper interconnect layer 15 can be significantly reduced, which is beneficial to the signal integrity of the device. When the thickness of the copper interconnect layer 15 is greater than that of the metal film layer 14, the resistance can be reduced, making the current distribution more uniform, thereby improving the filling effect of the metal in the via or trench and reducing voids or defects.

[0044] In some embodiments, the thickness of the metal film 14 along the stacking direction F is 3 nm to 10 nm. A thinner metal film 14 can reduce the impact on electrical parameters. In some embodiments, the thickness of the metal film 14 along the stacking direction F is 3 nm to 5 nm. The metal film 14 can protect the copper seed layer 13 while avoiding excessive thickness that could affect the interconnect performance of the structure.

[0045] The method for fabricating the metal interconnect structure provided in this application reduces the oxidation or contamination of the copper seed layer 13 before electroplating, greatly improves the phenomena of metal voids and copper defects, avoids the formation of high current density which can lead to wire breakage, and improves chip reliability; it can also improve the process window of the original process and broaden the linewidth process limitation.

[0046] Figure 3 The diagram illustrates the defects of existing metal cavities. Figure 4 The diagram illustrates the improvement achieved by using the fabrication method of the metal interconnect structure provided in the embodiments of this application. A comparison of the two clearly shows the difference. Figure 4 The absence of metal voids demonstrates that the preparation method of this application can effectively improve upon the defects of the prior art.

[0047] On the other hand, refer to Figure 5 As shown in the embodiments of this application, a fabrication apparatus for a metal interconnect structure is also disclosed, which is applied to the fabrication method of the metal interconnect structure as described above, including: a machine base 20, on which at least a copper seed layer growth chamber 23 and a metal film layer growth chamber 24 are provided.

[0048] The copper seed layer growth chamber 23 is used to prepare the copper seed layer 13, and the metal film growth chamber 24 is used to prepare the metal film layer 14. That is, the copper seed layer 13 and the metal film layer 14 are prepared on the same machine 20. After the copper seed layer 13 is generated, the product is quickly transferred from the copper seed layer growth chamber 23 to the metal film growth chamber 24 under high vacuum conditions so that the metal film layer 14 can grow on the copper seed layer 13, thus protecting the newly grown copper seed layer 13 from contamination or oxidation.

[0049] In some embodiments, the machine 20 is further provided with a barrier layer growth chamber 22 and a pre-cleaning chamber 21. The product flows sequentially between the pre-cleaning chamber 21, the barrier layer growth chamber 22, the copper seed layer growth chamber 23, and the metal film layer growth chamber 24.

[0050] The product with substrate 10 and oxide film layer 11 is first cleaned in pre-cleaning chamber 21, and then transferred to barrier layer growth chamber 22 to grow barrier layer 12 on oxide film layer 11. Then, copper seed layer 13 is grown on barrier layer 12 in copper seed layer growth chamber 23. After copper seed layer 13 is grown, the product is quickly transferred to metal film growth chamber 24 to complete the growth of metal film layer 14.

[0051] In specific preparation, the aforementioned process parameters can be followed. For example, a copper seed layer 13 can be deposited using radio frequency sputtering in the copper seed layer growth chamber 23; the metal film growth chamber 24 is maintained at a high vacuum of 0.8E. -8 Torr~1.0E -8 Under the conditions of applying a Torr, a deposition power of 400W to 600W, a particle bias power of 100W to 300W, and an electromagnetic field, a metal film layer 14 is deposited on a copper seed layer 13.

[0052] The metal interconnect structure fabrication equipment provided in this embodiment integrates the metal film growth chamber 24 with the traditional copper seed growth equipment, so that the copper seed growth chamber 23 and the metal film growth chamber 24 are integrated on the same machine 20. This allows the newly deposited copper seed layer 13 to be quickly transferred to the high vacuum physical sputtering chamber (metal film growth chamber 24) under vacuum conditions to deposit the metal film 14, avoiding contamination of the newly grown copper seed layer 13 during the transfer process, or oxidation of the copper seed layer 13 while waiting for the subsequent copper electroplating process, thereby ensuring the yield of the product.

[0053] The apparatus for fabricating this metal interconnect structure includes the same structure and beneficial effects as the method for fabricating the metal interconnect structure described in the foregoing embodiments. The structure and beneficial effects of the method for fabricating the metal interconnect structure have been described in detail in the foregoing embodiments and will not be repeated here.

[0054] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A method for fabricating a metal interconnect structure, characterized in that, include: A substrate is provided, and an oxide film layer, a barrier layer and a copper seed layer are sequentially formed on the substrate; A metal film is formed on the copper seed layer; wherein the resistivity of the metal film is similar to that of copper, and the chemical properties of the metal film are stable. A copper interconnect layer is formed on the metal film.

2. The method for fabricating the metal interconnect structure according to claim 1, characterized in that, The metal film layer is a gold layer.

3. The method for fabricating the metal interconnect structure according to claim 1, characterized in that, The thickness of the metal film layer along the stacking direction is 1 / 3 to 1 / 2 of the thickness of the copper seed layer.

4. The method for fabricating the metal interconnect structure according to claim 1, characterized in that, The thickness of the metal film layer along the stacking direction is 1 / 4 to 1 / 3 of the thickness of the copper interconnect layer.

5. The method for fabricating the metal interconnect structure according to claim 3, characterized in that, The thickness of the metal film layer along the stacking direction is 3nm to 10nm.

6. The method for fabricating a metal interconnect structure according to any one of claims 1 to 5, characterized in that, The formation of a metal film layer on the copper seed layer includes: The metal film was deposited using a high-vacuum sputtering process with a vacuum level of 0.8E. -8 Torr ~ 1.0E -8 Torr, with a deposition power of 400W to 600W, a particle bias power of 100W to 300W, and an electromagnetic field applied simultaneously.

7. The method for fabricating a metal interconnect structure according to claim 6, characterized in that, The machine tool is provided with at least a copper seed layer growth chamber and a metal film growth chamber, wherein forming a metal film layer on the copper seed layer includes: The copper seed layer is generated in the copper seed layer growth chamber; The material is rapidly transferred to the metal film growth chamber to grow the metal film on the copper seed layer.

8. The method for fabricating a metal interconnect structure according to any one of claims 1 to 5, characterized in that, The barrier layer includes a tantalum nitride layer formed on the substrate and a tantalum layer formed on the tantalum nitride layer, with the copper seed layer located on top of the tantalum layer.

9. An apparatus for fabricating a metal interconnect structure, applied to the method for fabricating the metal interconnect structure according to any one of claims 1 to 8, characterized in that, The system includes a machine base, which is equipped with at least a copper seed layer growth chamber and a metal film growth chamber. The metal film growth chamber is a high-vacuum chamber with a high vacuum level of 0.8E. -8 Torr ~ 1.0E -8 Torr.

10. The apparatus for fabricating a metal interconnect structure according to claim 9, characterized in that, The machine platform is also equipped with a barrier layer growth chamber and a pre-cleaning chamber.