Embedded microchannel and thermal via array structure on backside of RF SiP chip
Patent Information
- Application Number
- CN202610941011.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-27
- Publication Date
- 2026-09-25
AI Technical Summary
[0004]然而,上述各路径始终未能在射频芯片的发热核心区建立贴近热源的、主动与被动相协同的双向散热
[0040]1、嵌入式微通道直接设置于芯片减薄背面,使冷却流体贴近发热核心区主动换热,绕开多层封装界面热阻,与对准发热核心区的热通孔阵列从两侧协同泄热,明显改善核心结区结温。
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Figure CN122825820A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of heat dissipation in semiconductor packaging, and in particular to a back-side embedded microchannel and thermal via array structure for an RF SiP chip. Background Technology
[0002] This application relates to the fields of semiconductor system-in-package (SoC) and active heat dissipation for radio frequency (RF) chips. With the evolution of 5G and 6G mobile communications towards higher frequency bands, the output power and power consumption of RF devices such as power amplifiers continue to rise, leading to a sharp increase in the heat flux density of their core junction regions. Once the junction temperature of an RF chip rises, it deteriorates the device's linearity, reduces output power, and in severe cases, causes thermal breakdown and damages the device. Therefore, how to dissipate heat from the core junction region of an RF chip in a timely manner has become a key issue in the design of high-power RF system-in-package (SoC).
[0003] To address these heat dissipation requirements, existing technologies generally follow three paths. One type involves a passive conduction path from top to bottom, following the chip substrate, thermal adhesive, molding compound, and external heat sink, relying on solid thermal conductivity to dissipate heat layer by layer. Another type involves placing exposed pads or metal heat sinks on the bottom of the chip, combined with thermal vias in the system circuit board to channel heat downwards into a large area of copper foil. A third type involves attaching a metal cold plate with internal microchannels to the package shell or interlayer, actively removing heat through refrigerant circulation.
[0004] However, none of the above approaches have been able to establish a bidirectional heat dissipation system that is close to the heat source and combines active and passive heat dissipation in the core heat-generating area of the RF chip. This is because passive conduction from top to bottom requires passing through multiple interfaces such as the substrate, thermal adhesive, and molding compound, with each interface layer adding an interfacial thermal resistance. Heat is blocked by these layers before reaching the external heat sink, resulting in a high overall thermal resistance. The solution with exposed pads and thermal vias at the bottom relies solely on passive solid-state heat conduction without an active heat extraction process. When the instantaneous heat flux density in the core heat-generating area exceeds the diffusion capacity of the copper foil and thermal vias, heat accumulates at the hotspots and cannot be removed in time. Although the microfluidic cold plate attached to the package introduces active refrigerant circulation, there are still interfacial layers such as the outer shell and thermal adhesive between the cold plate and the heat-generating chip. Even the lowest temperature refrigerant must first overcome this interfacial thermal resistance wall to reach the heat source, and the heat dissipation interface remains at the package level rather than the chip level. Thus, existing heat dissipation solutions struggle to balance active forced convection heat transfer close to the heat source with vertical heat dissipation directly facing the hot spot when dealing with high heat flux density hot spots in high-power RF chips, limiting the improvement of junction temperature in the core junction region. Summary of the Invention
[0005] In order to establish a bidirectional heat dissipation system that is close to the heat source and combines active and passive heat dissipation in the heat-generating core area of a high-power RF chip, and to improve the junction temperature of the core junction area under high power consumption conditions, this application provides a back-side embedded microchannel and thermal via array structure for an RF SiP chip.
[0006] Firstly, this application provides a back-side embedded microchannel and thermal via array structure for an RF SiP chip, employing the following technical solution:
[0007] An embedded microchannel and thermal via array structure on the back side of an RF SiP chip includes: an RF chip having an active surface and a thinned back surface opposite to the active surface; a packaging substrate having the active surface of the RF chip connected to the packaging substrate via conductive bumps; an embedded microchannel disposed on the thinned back surface and through which cooling fluid flows to actively dissipate heat from the RF chip; and a thermal via array arranged vertically in the packaging substrate and aligned with the heat-generating core region of the active surface to conduct heat from the heat-generating core region to the packaging substrate; wherein the embedded microchannel and the thermal via array are respectively placed on opposite sides of the RF chip and both face the heat-generating core region to conduct heat from both sides of the heat-generating core region simultaneously.
[0008] By adopting the above technical solution, the embedded microchannel is directly set on the thinned back side of the RF chip, allowing the cooling fluid to directly exchange heat with the chip at the closest point to the heat-generating core area, bypassing the interface thermal resistance of the multi-layer packaging interface and establishing active forced convection close to the heat source. At the same time, the thermal via array is aligned with the heat-generating core area in the packaging substrate, forming a low-resistance vertical heat dissipation path facing the hot spot on the other side opposite to the microchannel. Both are placed on opposite sides of the RF chip and both face the heat-generating core area, so that the heat from the hot spot is simultaneously discharged from both sides under the combined action of active heat extraction and passive heat dissipation, improving the junction temperature of the core junction area under high power consumption conditions.
[0009] Optionally, the embedded microchannel includes a dense channel segment aligned with the heat-generating core region and a sparse channel segment located on the periphery of the dense channel segment, wherein the channel density of the dense channel segment is greater than that of the sparse channel segment; the thermal via array includes a dense via segment aligned with the heat-generating core region, wherein the dense via segment and the dense channel segment are aligned with each other along the thickness direction of the RF chip.
[0010] By adopting the above technical solutions, the heat exchange and heat dissipation capacity is concentrated and enhanced in the core heat-generating area according to the heat load distribution. The dense channel sections and dense through-hole sections are aligned vertically, forming a stronger bidirectional heat dissipation density in the area directly opposite the hot spot.
[0011] Optionally, it also includes a diversion manifold, which is located upstream of and connected to the embedded microchannel, wherein the flow cross-section of the diversion channel leading to the dense channel segment is larger than the flow cross-section of the diversion channel leading to the sparse channel segment.
[0012] By adopting the above technical solution, the cooling fluid is weighted according to the heat load of each zone, ensuring that dense channel sections receive a larger flow rate first, and avoiding insufficient cooling in hot spots due to natural diversion.
[0013] Optionally, it also includes an inner sealing ring and an outer sealing ring, both of which are set along the outer periphery of the embedded microchannel. The outer sealing ring is located between the inner sealing ring and the radio frequency circuit area of the radio frequency chip, and a leakage detection cavity is formed between the inner sealing ring and the outer sealing ring.
[0014] By adopting the above technical solution, redundant sealing is formed by inner and outer sealing rings. The cooling fluid leaking from the inner ring is intercepted by the outer ring and flows into the leakage detection chamber, thus preventing the cooling fluid from entering the radio frequency circuit area.
[0015] Optionally, the leakage detection chamber is connected to a detection component, which is configured to detect the presence of cooling fluid in the leakage detection chamber and output a detection signal; it also includes a control component and a phase change material layer, the control component is configured to reduce the operating power of the RF chip in response to the detection signal, and the phase change material layer is disposed on the thinned back side to buffer the heat of the heat-generating core area when the cooling fluid is interrupted.
[0016] By adopting the above technical solution, the detection signal generated by the leakage detection chamber is used to trigger the power reduction protection, and the phase change material absorbs heat at the moment the cooling fluid is interrupted, so that the core junction area still obtains transition protection when the active heat dissipation fails.
[0017] Optionally, the thinned back surface includes a locally thinned area aligned with the heat-generating core area and a thickened frame area located around the locally thinned area. The thickness of the locally thinned area is less than the thickness of the thickened frame area, and the embedded microchannel is at least partially located in the locally thinned area.
[0018] By adopting the above technical solution, the depth above the heat-generating core area is reduced to shorten the thermal resistance and make the cooling fluid closer to the junction area, while the surrounding frame area is thickened to maintain the mechanical strength of the chip.
[0019] Optionally, a cover plate is thinned and bonded to the back side. The cover plate covers the embedded microchannel and seals the embedded microchannel into a closed flow channel. The cover plate has vertical drainage holes that connect the closed flow channel to the cooling circulation loop outside the RF chip.
[0020] By adopting the above technical solution, the open microchannel is sealed with a cover plate to form a pressurized and flow-through closed channel, and the closed channel is connected to the external cooling circulation loop through a vertical drainage hole.
[0021] Optionally, the cross-section of the embedded microchannel can be rectangular or trapezoidal.
[0022] By adopting the above technical solutions, the cross-section of the microchannel can be flexibly selected between rectangular and trapezoidal shapes according to the processing technology and heat exchange requirements.
[0023] Optionally, the cooling fluid may be deionized water, liquid metal, or electrically insulating refrigerant.
[0024] By adopting the above technical solution, the cooling fluid can be selected from deionized water, liquid metal and electrically insulating refrigerant according to electrical and heat exchange requirements.
[0025] Optionally, the inner wall of the embedded microchannel is provided with a passivation layer or an inert coating to isolate the cooling fluid from the RF chip and the packaging substrate when the cooling fluid is liquid metal.
[0026] By adopting the above technical solution, the liquid metal cooling fluid is prevented from directly contacting silicon and copper, thus reducing corrosion and scaling in the channels during long-term operation.
[0027] Optionally, the thermal via array penetrates the package substrate and the system circuit board, and extends to the ground copper foil of the system circuit board.
[0028] By adopting the above technical solution, the vertical heat dissipation path is extended to the large-area grounded copper foil of the system circuit board, thereby expanding the heat dissipation area of passive heat dissipation.
[0029] Optionally, the embedded microchannels are a tree-like branching structure that autonomously branches out to the heating core area.
[0030] By adopting the above technical solution, the tree-like branches take into account both the low flow resistance trunk and the high heat exchange terminal, so that the cooling fluid is evenly distributed to the heat-generating core area.
[0031] Optionally, the embedded microchannels are needle bed structures, with cooling fluid flowing laterally across the needle bed structure.
[0032] By adopting the above technical solution, the effective heat exchange area is increased by turbulence on the needle bed, and the lateral scouring of the cooling fluid on the needle bed further enhances convective heat transfer.
[0033] Optionally, it also includes a fluid interface, which is disposed on the side or edge of the packaging substrate and communicates with the embedded microchannel via a fluid conduit within the packaging substrate.
[0034] By adopting the above technical solution, the cooling fluid is supplied and recycled through the microchannel via the fluid interface on the side of the package and the pipeline inside the substrate, and then connected to the external circulation.
[0035] Optionally, at least one of the inner sealing ring and the outer sealing ring may be formed by metal welding or adhesive bonding.
[0036] By adopting the above technical solutions, the inner and outer sealing rings can be formed by metal welding or adhesive bonding according to the packaging process conditions.
[0037] Optionally, the conductive bumps are copper pillar bumps.
[0038] By adopting the above technical solution, high thermal conductivity electrical interconnection between the active surface of the RF chip and the packaging substrate is achieved using copper pillar bumps.
[0039] In summary, this application includes at least one of the following beneficial technical effects:
[0040] 1. Embedded microchannels are directly set on the back of the chip after thinning, allowing the cooling fluid to actively exchange heat with the heat-generating core area, bypassing the thermal resistance of the multi-layer packaging interface, and working together with the heat-perforation array aligned with the heat-generating core area to dissipate heat from both sides, significantly improving the junction temperature of the core junction area.
[0041] 2. Dense channel sections and dense through-hole sections are arranged in the core heat-generating area and aligned vertically. Combined with heat load-weighted distribution manifolds, the active and passive heat dissipation capacity is concentrated and enhanced according to the hot spot distribution, avoiding insufficient cooling in the hot spot area.
[0042] 3. The double sealing rings inside and outside the leak detection chamber form a redundant seal and generate a detection signal, which triggers the power reduction protection and phase change material thermal buffer, so that the core junction area still receives transitional protection when the cooling fluid leaks or is interrupted, thus improving the operational reliability of the heat dissipation structure. Attached Figure Description
[0043] Figure 1 This is a cross-sectional schematic diagram of the embedded microchannel and thermal via array structure on the back of the RF SiP chip in one embodiment of this application.
[0044] Figure 2 This is a top view of the embedded microchannel and thermal via array structure on the back of the RF SiP chip in one embodiment of this application.
[0045] Figure 3 This is a schematic diagram showing the alignment of the dense channel segment, sparse channel segment, and dense via segment of the thermal via array along the thickness direction in one embodiment of this application.
[0046] Figure 4 This is a schematic diagram of an inner sealing ring, an outer sealing ring, a leakage detection cavity, a detection component, a control component, and a phase change material layer in one embodiment of this application.
[0047] Explanation of reference numerals in the attached figures:
[0048] 100. Packaging substrate; 200. RF chip; 210. Thinned back side; 220. Embedded microchannel; 221. Dense channel segment; 222. Sparse channel segment; 300. Cooling fluid; 310. Liquid inlet interface; 320. Liquid outlet interface; 410. Conductive bump; 420. Thermal via array; 421. Dense via segment; 500. System circuit board; 510. Grounding copper foil; 610. Inner sealing ring; 620. Outer sealing ring; 630. Leakage detection chamber; 640. Detection component; 650. Control component; 660. Phase change material layer. Detailed Implementation
[0049] The present application will be further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative of the application and are not intended to limit the scope of the application.
[0050] This application discloses a back-side embedded microchannel and thermal via array structure for an RF SiP chip. This application embeds microchannels for cooling fluid flow on the thinned back side of the RF chip and arranges a vertical thermal via array aligned with the heat-generating core region in the packaging substrate. This places active microfluidic cooling and passive vertical heat conduction on opposite sides of the RF chip, achieving bidirectional heat dissipation close to the heat source for the high-power RF chip. First, the active side of the RF chip is connected to the packaging substrate via conductive bumps. Then, embedded microchannels are fabricated on the thinned back side opposite to the active side, and cooling fluid is introduced for active heat dissipation. Finally, the thermal via array aligned with the heat-generating core region in the packaging substrate dissipates residual heat to the packaging substrate and system circuit board. This allows heat to be dissipated simultaneously from both sides of the heat-generating core region, improving the junction temperature of the high-power RF chip's core junction region under high-power conditions. The following provides a detailed description of several technical terms involved in this application, the overall composition of the heat dissipation structure, the RF chip and the thinned back side, the embedded microchannels, and the enhanced heat transfer in the heat-generating core region.
[0051] The following section will first explain some of the technical terms involved in the embodiments of this application.
[0052] System-in-Package (SiP) is a packaging method that integrates multiple functional units, such as radio frequency chips and passive devices, onto the same packaging substrate to shorten interconnection distances and improve integration. In this method, the heat generated by high-power radio frequency chips during operation is concentrated in a localized area of the active surface of the chip.
[0053] The heat-generating core region is a localized area on the active surface of an RF chip where the heat flux density is significantly higher than that of the surrounding area. For example, it is the area where the output power of a power amplifier (PA) is concentrated during operation. If the heat in this region cannot be dissipated in time, it will cause the junction temperature of the core junction region to rise.
[0054] Embedded microchannels are tiny channels directly fabricated on the thinned back side of RF chips, through which cooling fluid flows to remove heat. The cooling fluid exchanges heat directly with the chip at the point closest to the heat-generating core area, thereby bypassing the interfacial thermal resistance of multiple layers such as the substrate, thermally conductive adhesive, and molding compound.
[0055] A thermal via array is a collection of high-density thermally conductive vias arranged along the thickness direction in a package substrate to conduct heat vertically from the active side of the chip to the package substrate and system circuit board.
[0056] The overall composition of the heat dissipation structure is described below. The heat dissipation structure provided in this embodiment includes an RF chip 200, a packaging substrate 100, an embedded microchannel 220, and a thermal via array 420. The RF chip has an active surface and a thinned back surface 210 opposite to the active surface. The active surface of the RF chip is connected to the packaging substrate via conductive bumps 410. The embedded microchannel is disposed on the thinned back surface and allows cooling fluid 300 to flow through it for active heat dissipation of the RF chip. The thermal via array is arranged vertically in the packaging substrate and aligned with the heat-generating core area of the active surface to conduct heat from the heat-generating core area to the packaging substrate. The embedded microchannel and the thermal via array are located on opposite sides of the RF chip and both face the heat-generating core area, simultaneously dissipating heat from both sides of the heat-generating core area.
[0057] In practical implementation, the back side of the RF chip undergoes mechanical or chemical thinning to reduce its thermal resistance. Several microchannels are fabricated on the thinned back side using MEMS etching technology, allowing cooling fluid to directly exchange heat with the chip at the point closest to the heat source core, establishing active forced convection close to the heat source. High-density conductive bumps are arranged at the bottom of the active surface of the RF chip, and a high-density array of thermal vias is vertically aligned inside the packaging substrate and in the system circuit board 500. This array of thermal vias forms an extremely short, extremely low thermal resistance vertical heat dissipation channel directly below the heat source core, conducting residual heat to the ground copper foil 510 of the system circuit board. Thus, the bottom thermal via array and the back microchannels form a pincer movement on both sides of the heat source core, dispersing and flattening the high heat flux density on the RF chip surface, improving the junction temperature of the core junction region under high power consumption conditions. (See above for reference.) Figure 1 As shown.
[0058] In the heat dissipation structure, the embedded microchannels on the active heat dissipation side and the thermal via arrays on the passive heat dissipation side can both be implemented in various specific ways, which will be described below.
[0059] The following describes the RF chip and its thinned back side. The thinned back side may include a locally thinned region aligned with the heat-generating core area and a thickened frame region located around the locally thinned region. The thickness of the locally thinned region is less than the thickness of the thickened frame region, and the embedded microchannel is at least partially located within the locally thinned region. In a specific implementation, the back side of the chip is thinned deeply above the heat-generating core area to shorten the thermal resistance of that area and bring the cooling fluid closer to the core junction region, while the surrounding thickened frame region maintains a larger thickness to maintain the mechanical strength of the chip. For example, the thickness of the locally thinned region can be reduced to the order of tens of micrometers, while the thickened frame region remains at the order of the original chip thickness, so that the strength loss caused by the deep thinning is compensated by the surrounding thickened frame region.
[0060] The following describes embedded microchannels. The cross-section of an embedded microchannel can be rectangular or trapezoidal to increase the heat exchange area between the cooling fluid and the chip.
[0061] On the thinned back side of the RF chip, several microchannels can be connected to form a single serpentine flow channel. Cooling fluid is introduced through the inlet port 310 at one end, flows sequentially through the entire heat exchange zone along the serpentine flow channel, and is then discharged through the outlet port 320 at the other end, forming a single-loop cooling flow channel. This single serpentine flow channel allows a single stream of cooling fluid to flow sequentially through the entire heat exchange zone above the heat-generating core area. (See above for reference.) Figure 2 As shown.
[0062] As an alternative implementation, several microchannels can also be connected in parallel to form multiple parallel flow channels, with the cooling fluid flowing through each channel to reduce the temperature rise of the cooling fluid along the flow path.
[0063] Embedded microchannels can also be constructed as a bed of needles, where several raised needles are distributed on the thinned back surface, and the cooling fluid flows laterally through the gaps between the needles. The needles create turbulence for the cooling fluid to increase the effective heat transfer area, and the lateral flow causes the cooling fluid to repeatedly separate and merge around the needles, enhancing convective heat transfer.
[0064] In other embodiments, the embedded microchannel is constructed as a tree-like branching structure with a main trunk branching progressively towards the heat-generating core area. The main trunk handles low-resistance transport, while the terminal branches handle heat exchange close to the hot spots. The cooling fluid enters through the main trunk and branches progressively, ensuring that the flow rate is evenly distributed to the terminal branches above the heat-generating core area.
[0065] In some embodiments, the embedded microchannel includes a dense channel segment 221 aligned with the heat-generating core region and a sparse channel segment 222 located around the dense channel segment. The channel density of the dense channel segment is greater than that of the sparse channel segment. Correspondingly, the thermal via array includes a dense via segment 421 aligned with the heat-generating core region. The dense via segment and the dense channel segment are aligned with each other along the thickness direction of the RF chip. In a specific implementation, the heat flux density of the heat-generating core region is higher than that of the peripheral region. Therefore, dense channel segments are concentrated in the heat-generating core region to enhance heat transfer in this region. The dense via segment and the dense channel segment are aligned vertically along the thickness direction, forming a stronger bidirectional heat dissipation density in the area directly opposite the hot spot. For example, the channel density of the dense channel segment can be more than twice that of the sparse channel segment, thereby correspondingly increasing the heat transfer capacity per unit area above the heat-generating core region. The density transition between the dense channel segment and the sparse channel segment is, in one implementation, an abrupt change from dense to sparse, and in another implementation, a gradual change from dense to sparse. (Refer to the above.) Figure 3 As shown.
[0066] To match the density distribution of the aforementioned dense and sparse channel segments, the heat dissipation structure may further include a distribution manifold. The distribution manifold is located upstream of and connected to the embedded microchannels. The flow cross-section of the distribution channel leading to the dense channel segment is larger than that of the distribution channel leading to the sparse channel segment. In a specific implementation, the distribution manifold weights the cooling fluid according to the heat load of each downstream channel segment, ensuring that the flow rate to the dense channel segment is greater than the flow rate to the sparse channel segment, thus preventing localized overheating in the high-heat-flux-density core area due to insufficient cooling. For example, the flow cross-section of the distribution channel leading to the dense channel segment can be more than twice that of the distribution channel leading to the sparse channel segment, matching the channel density ratio of the dense channel segment to the sparse channel segment.
[0067] The cooling fluid flowing through the embedded microchannel can be deionized water, liquid metal, or electrically insulating refrigerant to meet the requirements of heat exchange capacity and electrical insulation.
[0068] In embodiments where the cooling fluid is liquid metal, the inner wall of the embedded microchannel may be provided with a passivation layer or an inert coating to isolate the liquid metal from the radio frequency chip and the packaging substrate, thereby preventing the liquid metal from causing corrosion and scaling on materials such as silicon and copper.
[0069] To enclose the open microchannel into a pressure-resistant, hermetic flow path, a cover plate can be bonded to the thinned back side. The cover plate covers the embedded microchannel and seals it into a hermetic flow path. The cover plate has vertical drainage holes that connect the hermetic flow path to a cooling circulation loop outside the RF chip. In a specific implementation, the cover plate and the thinned back side can form a sealed connection via silicon-silicon bonding or metal bonding, allowing the cooling fluid to flow under pressure within the hermetic flow path without leakage. The vertical drainage holes then lead the hermetic flow path to the outside of the chip to connect with external circulation.
[0070] The heat dissipation structure may also include a fluid interface. The fluid interface is located on the side or edge of the packaging substrate and communicates with the embedded microchannels via fluid channels within the packaging substrate. In a specific implementation, the fluid interface includes an inlet and an outlet. The inlet introduces cooling fluid from an external cooling circulation pump into a closed flow channel via fluid channels within the packaging substrate. After heat exchange through the microchannels above the heat-generating core area, the cooling fluid is then discharged to the external cooling circulation pump via the outlet through fluid channels within the packaging substrate, forming a cooling fluid circulation loop.
[0071] To prevent cooling fluid from intruding into the radio frequency (RF) circuit area, the heat dissipation structure may further include an inner sealing ring 610 and an outer sealing ring 620. Both the inner and outer sealing rings are positioned along the outer periphery of the embedded microchannel. The outer sealing ring is located between the inner sealing ring and the RF circuit area of the RF chip, forming a leakage detection cavity 630 between the inner and outer sealing rings. In a specific implementation, the inner sealing ring acts as the first seal, confining the cooling fluid within the microchannel area. The outer sealing ring acts as the second line of defense between the inner sealing ring and the RF circuit area. When micro-leakage occurs in the inner sealing ring, the leaked cooling fluid is intercepted by the outer sealing ring and flows into the leakage detection cavity between the inner and outer sealing rings, thus preventing intrusion into the RF circuit area. For example, when the seal is intact, the cooling fluid is confined to the microchannel area by the inner sealing ring, and there is no cooling fluid in the leakage detection cavity. When micro-leakage occurs in the inner sealing ring, a small amount of cooling fluid crosses the inner sealing ring and enters the leakage detection cavity but is blocked by the outer sealing ring. When cooling fluid accumulates in the leakage detection cavity, this accumulation can serve as a sampling basis for subsequent failure protection. As a simpler implementation, the sealing structure can also use only a single sealing ring to confine the cooling fluid to the microchannel region; while in embodiments with both inner and outer sealing rings, the outer sealing ring and the leak detection chamber provide a second line of defense and sampling location for cooling fluid leakage. (Refer to the above...) Figure 4 As shown.
[0072] At least one of the inner sealing ring and the outer sealing ring can be formed by metal welding or adhesive bonding.
[0073] Based on the aforementioned leakage detection cavity, the heat dissipation structure may further include a detection component 640, a control component 650, and a phase change material layer 660 to provide protection in the event of active heat dissipation failure. The leakage detection cavity is connected to the detection component, which detects the presence of cooling fluid within the cavity and outputs a detection signal. The control component responds to the detection signal by reducing the operating power of the RF chip. The phase change material layer is disposed on the thinned back side to buffer the heat in the core heat-generating area when the cooling fluid is interrupted. In a specific implementation, the detection component uses the presence of cooling fluid within the leakage detection cavity as a criterion. When cooling fluid accumulates in the cavity, indicating leakage in the inner sealing ring or an abnormality in the active heat dissipation circuit, it outputs a detection signal. The control component accordingly reduces the operating power of the RF chip to decrease heat generation. The phase change material layer, by absorbing heat through phase change, buffers the temperature rise in the core junction area when the cooling fluid is interrupted and the active heat dissipation capacity decreases, buying time for power reduction and maintenance. For example, the detection component can be a capacitive or conductive liquid sensing component. When the cooling fluid enters the leak detection chamber, the capacitance or conductivity of the detection chamber changes, thereby determining the presence of cooling fluid and triggering a power reduction. The phase change material layer absorbs latent heat and maintains its temperature when it reaches the phase change temperature, and then solidifies and resets after the cooling fluid is restored.
[0074] The following explains the vertical passive heat conduction in the packaging substrate. The conductive bumps between the active surface of the RF chip and the packaging substrate can be copper pillar bumps. While realizing the electrical interconnection between the active surface and the packaging substrate, the copper pillar bumps provide a low thermal resistance vertical heat conduction path with their high-density arrangement below the heat-generating core area.
[0075] Thermal via arrays can penetrate the package substrate and the system circuit board, extending to the ground copper foil of the system circuit board. In a practical implementation, heat from the heat-generating core area is transferred to the package substrate via copper pillar bumps, and then conducted downwards along the thermal via array penetrating the package substrate and the system circuit board, ultimately extending to the ground copper foil of the system circuit board. The large area of the ground copper foil helps to distribute the heat. For example, the thermal via array can be vertically aligned with corresponding vias in the package substrate and system circuit board directly below the heat-generating core area, forming a continuous, low thermal resistance vertical heat dissipation channel from the active surface of the chip to the ground copper foil.
[0076] The same or similar parts in the various embodiments of this application can be referenced to each other, and the technical features of each embodiment can be combined with each other to form new embodiments without conflict.
[0077] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A back-side embedded microchannel and thermal via array structure for an RF SiP chip, characterized in that, include: A radio frequency (RF) chip having an active surface and a thinned back surface opposite to the active surface; The packaging substrate, wherein the active surface of the radio frequency chip is connected to the packaging substrate via conductive bumps; An embedded microchannel is disposed on the thinned back surface and through which cooling fluid flows to actively dissipate heat from the radio frequency chip; A thermal via array, wherein the thermal via array is arranged vertically in the packaging substrate and aligned with the heat-generating core region of the active surface, so as to conduct heat from the heat-generating core region to the packaging substrate. The embedded microchannel and the thermal via array are placed on opposite sides of the radio frequency chip, both facing the heat-generating core area, so as to simultaneously conduct heat out from both sides of the heat-generating core area.
2. The RF SiP chip back-side embedded microchannel and thermal via array structure according to claim 1, characterized in that, The embedded microchannel includes a dense channel segment aligned with the heat-generating core region and a sparse channel segment located on the outer periphery of the dense channel segment, wherein the channel density of the dense channel segment is greater than that of the sparse channel segment; the thermal via array includes a dense via segment aligned with the heat-generating core region, wherein the dense via segment and the dense channel segment are aligned with each other along the thickness direction of the RF chip.
3. The RF SiP chip back-side embedded microchannel and thermal via array structure according to claim 2, characterized in that, It also includes a diversion manifold, which is located upstream of and connected to the embedded microchannel, wherein the flow cross-section of the diversion channel leading to the dense channel segment is larger than the flow cross-section of the diversion channel leading to the sparse channel segment.
4. The RF SiP chip back-side embedded microchannel and thermal via array structure according to claim 1, characterized in that, It also includes an inner sealing ring and an outer sealing ring, both of which are arranged along the outer periphery of the embedded microchannel. The outer sealing ring is located between the inner sealing ring and the radio frequency circuit area of the radio frequency chip, and a leakage detection cavity is formed between the inner sealing ring and the outer sealing ring.
5. The RF SiP chip back-side embedded microchannel and thermal via array structure according to claim 4, characterized in that, The leakage detection cavity is connected to a detection component, which is configured to detect the presence of the cooling fluid in the leakage detection cavity and output a detection signal; it also includes a control component and a phase change material layer, the control component being configured to reduce the operating power of the radio frequency chip in response to the detection signal, and the phase change material layer being disposed on the thinned back side to buffer the heat of the heat-generating core area when the cooling fluid is interrupted.
6. The RF SiP chip back-side embedded microchannel and thermal via array structure according to claim 1, characterized in that, The thinned back surface includes a locally thinned area aligned with the heating core area and a thickened frame area located around the periphery of the locally thinned area. The thickness of the locally thinned area is less than the thickness of the thickened frame area, and the embedded microchannel is at least partially located in the locally thinned area.
7. The RF SiP chip back-side embedded microchannel and thermal via array structure according to claim 1, characterized in that, The thinned back side is bonded with a cover plate, which covers the embedded microchannel and seals the embedded microchannel into a closed flow channel. The cover plate is provided with a vertical drainage hole, which connects the closed flow channel to the cooling circulation loop outside the RF chip.
8. The RF SiP chip back-side embedded microchannel and thermal via array structure according to claim 1, characterized in that, The cross-section of the embedded microchannel is rectangular or trapezoidal.
9. The RF SiP chip back-side embedded microchannel and thermal via array structure according to claim 1, characterized in that, The cooling fluid is deionized water, liquid metal, or electrically insulating refrigerant.