Substrate packaging method

Abstract

The application relates to the technical field of semiconductors, and discloses a substrate packaging method, which comprises the following steps: providing a substrate, wherein the substrate has at least one electronic component; forming a glue film structure on the substrate and / or the at least one electronic component by means of 3D printing; performing plastic packaging on the substrate and / or the at least one electronic component and the glue film structure by means of packaging, so as to form a packaging structure; removing a part of the packaging structure by means of processing, so as to expose the glue film structure; and removing the glue film structure by means of liquid, so as to expose the substrate or the at least one electronic component. In the above way, the glue film structure can be used to occupy a target area during the plastic packaging process, and a corresponding exposed area can be formed after the glue film structure is removed subsequently, so that the packaging requirement of exposing the surface of the electronic component and / or selectively performing plastic packaging can be met.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more particularly to a substrate packaging method. Background Technology

[0002] With the rapid development of technology, semiconductor packaging technology has become increasingly mature. For packaging requirements that require exposing the surface of the integrated circuit (IC) and selective molding, current packaging processes mostly use specific molding dies and film-assisted molding to achieve this.

[0003] However, the molding process takes at least 2 to 3 months, which is not conducive to the time requirements of the product development stage.

[0004] Therefore, how to propose a packaging method that can expose the IC surface and selectively encapsulate it is a technical problem that needs to be solved in this field. Summary of the Invention

[0005] To address the aforementioned technical problems, the purpose of this application is to provide a substrate packaging method, which covers the surface of an integrated circuit (IC) and the unencapsulated area with hydrolyzed adhesive, and removes the hydrolyzed adhesive with water after encapsulation, thereby meeting the requirements of the packaging structure exposing the IC surface or selective encapsulation, and avoiding damage to the IC during the packaging process and reducing the cost and time of selective encapsulation mold development.

[0006] To achieve the above objectives, this application provides a substrate packaging method, comprising the following steps: providing a substrate having at least one electronic component; forming a film structure on the substrate and / or the at least one electronic component by 3D printing; encapsulating the substrate and / or the at least one electronic component and the film structure with a molding compound to form a package structure; removing a portion of the package structure by a processing method to expose the film structure; and removing the film structure by a liquid to expose the substrate or the at least one electronic component.

[0007] In some embodiments, the substrate has an upper surface and a lower surface, and the at least one electronic component is disposed on the upper surface; wherein the step of forming the adhesive film structure further includes the following step: forming the adhesive film structure on the upper surface and / or on one side of the at least one electronic component.

[0008] In some embodiments, the upper surface further includes a plurality of encapsulated regions and a plurality of unencapsulated regions, the at least one electronic component is disposed in one of the plurality of unencapsulated regions, the at least one electronic component has a first surface and a second surface, the second surface being connected to one of the plurality of unencapsulated regions via a plurality of solder bumps; wherein the step of forming the adhesive film structure further includes the following steps: forming the adhesive film structure on another of the plurality of unencapsulated regions and on the first surface respectively; wherein the step of forming the encapsulation structure further includes the following steps: forming the encapsulation structure on the plurality of encapsulated regions and the adhesive film structure; wherein the step of removing the adhesive film structure further includes the following steps: removing the adhesive film structure by means of liquid to expose another of the plurality of unencapsulated regions and the first surface.

[0009] In some embodiments, a plurality of capacitors are further disposed on the plurality of encapsulated regions, wherein the step of forming the encapsulation structure further includes the following step: forming the encapsulation structure on the plurality of capacitors and the film structure.

[0010] In some embodiments, the upper surface includes a plurality of encapsulated regions and at least one unencapsulated region, the at least one electronic component is disposed in the at least one unencapsulated region, the at least one electronic component has a first surface and a second surface, the second surface is connected to the at least one unencapsulated region by a plurality of solder bumps, and the adhesive film structure is formed on the first surface; wherein, the step of forming the encapsulation structure further includes the following step: forming the encapsulation structure on the plurality of encapsulated regions and the adhesive film structure.

[0011] In some embodiments, the upper surface includes a plurality of encapsulated regions and at least one unencapsulated region, the at least one electronic component is disposed in one of the encapsulated regions, the at least one electronic component has a first surface and a second surface, the second surface being connected to one of the encapsulated regions by a plurality of solder bumps, and the adhesive film structure is formed in the at least one unencapsulated region; wherein the step of forming the encapsulation structure further includes the following steps: forming the encapsulation structure on the plurality of encapsulated regions, on the first surface and on the adhesive film structure.

[0012] In some embodiments, the film structure is a hydrolyzed adhesive.

[0013] In some embodiments, the step of forming the adhesive film structure further includes the following step: curing the adhesive film structure by ultraviolet light.

[0014] In some embodiments, the step of removing the packaging structure further includes the following step: smoothing the packaging structure by a strip-shaped packaging grinding process.

[0015] In some embodiments, the liquid is water, and the temperature of the liquid is between 60°C and 80°C.

[0016] Compared with the prior art, this application has at least the following beneficial effects: This application utilizes 3D printing to form a film structure on a substrate and / or electronic components, and uses this film structure to reserve space for the areas requiring exposure during subsequent molding. After molding to form the package structure, a portion of the package structure is removed through processing, exposing the film structure. The film structure is then removed using liquid, thereby exposing the substrate or electronic components. Therefore, this application can meet the packaging requirements of IC surface exposure and selective molding, and reduces reliance on specific selective molding molds. This helps shorten mold development cycles, reduce mold development costs, and lower the risk of IC surface damage during the packaging process. Attached Figure Description

[0017] The preferred embodiments will now be described in a clear and easy-to-understand manner, in conjunction with the accompanying drawings, to further explain the above-mentioned characteristics, technical features, advantages, and implementation methods of this application.

[0018] Figure 1 This is a flowchart of the substrate packaging method of the present invention; Figure 2 This is a schematic diagram of the packaging structure used in a substrate packaging method. Figure 3 This is a schematic diagram of the packaging structure used in a substrate packaging method. Figure 4 This is a schematic diagram of the packaging structure used in a substrate packaging method. Figure 5 This is a schematic diagram of the packaging structure used in a substrate packaging method. Figure 6 This is a schematic diagram of the packaging structure used in a substrate packaging method. Figure 7 This is a schematic diagram of a packaging structure for another embodiment of a substrate packaging method; Figure 8 This is a schematic diagram of a packaging structure for another embodiment of a substrate packaging method.

[0019] Explanation of reference numerals: 100: Substrate packaging method; 200, 300, 400: Packaging structure; 210: Substrate; 211: Upper surface; 212: Lower surface; 220: Electronic component; 221: First surface; 222: Second surface; m1, m2, m3: Molded area; na: Unmolded area; hb: Adhesive film structure; mc: Molding compound; bp: Solder bump; c1, c2: Capacitor; CL: Connector; S110, S120, S130, S140, S150: Steps. Detailed Implementation

[0020] The substrate packaging method of this application will be described below with reference to the accompanying drawings and specific embodiments. It should be understood that the following embodiments are only used to illustrate the technical solutions of this application and are not intended to limit the scope of protection of this application. Where there is no conflict, the technical features of the various embodiments can be combined with each other.

[0021] It should be noted that the accompanying drawings are primarily for illustrating the relative positions of the various structures and are not necessarily drawn to scale. Unless otherwise stated, the technical terms used in this specification should be interpreted in the manner commonly understood by those skilled in the art. The terms "and / or" as used herein refer to any one, any multiple, or all combinations of the relevant objects.

[0022] Current packaging processes struggle to meet the requirements for surface exposure and selective molding of integrated circuits (ICs). Therefore, this invention proposes a novel substrate packaging method 100. This method involves covering the IC surface and unmolded areas with hydrolysable glue, and removing the glue with water after molding. This achieves the desired IC surface exposure or selective molding requirements, while also preventing damage to the IC during the packaging process and reducing the cost and time required for selective molding die development.

[0023] Please see Figure 1-6 , Figure 1 This is a flowchart of the substrate packaging method 100 of the present invention. Figure 2-6 This is a schematic diagram illustrating the manufacturing of a packaging structure 200 used in the substrate packaging method 100. The substrate packaging method 100 of the present invention is a specific embodiment of the above-described inventive concept. Figure 1 , Figure 2-6 As shown, the substrate packaging method 100 is used to manufacture the packaging structure 200, and includes steps S110, S120, S130, S140, and S150. Figure 2-6 These correspond to steps S110-S150 respectively.

[0024] like Figure 1 and Figure 2As shown, first, step S110 is performed, providing a substrate 210, which has at least one electronic component 220.

[0025] In one embodiment of step S110, the substrate 210 may be a printed circuit board (PCB), but the present invention is not limited thereto.

[0026] In one embodiment of step S110, the electronic component 220 may be an integrated circuit chip (IC chip) or a die, but the present invention is not limited thereto. It should be noted that, for ease of understanding, the accompanying drawings of the present invention illustrate one electronic component 220. However, the number of electronic components 220 should not be limited to one, and may be set to one or more according to actual packaging requirements.

[0027] In one embodiment of step S110, as Figure 1 and Figure 2 As shown, the substrate 210 has an upper surface 211 and a lower surface 212, and the electronic component 220 is disposed on the upper surface 211.

[0028] In one embodiment of step S110, as Figure 1 and Figure 2 As shown, the upper surface 211 includes molded areas m1 and m2 and an unmolded area na, with electronic component 220 disposed in the unmolded area na.

[0029] It should be noted that, for ease of understanding, this invention is illustrated using two encapsulated regions m1 and m2 and two unencapsulated regions na. However, the number of encapsulated regions m1 and m2 and the number of unencapsulated regions na should not be limited to two; they can be set to one or more according to actual packaging requirements.

[0030] In one embodiment of step S110, as Figure 1 and Figure 2 As shown, electronic component 220 includes a first surface 221 and a second surface 222, the second surface 222 being connected to the unencapsulated region na via a plurality of solder bumps bp. In one embodiment, the solder bumps bp may be solder ball bumps or copper pillar bumps, but the invention is not limited thereto.

[0031] In one embodiment of step S110, as Figure 1 and Figure 2As shown, capacitors c1 and c2 are also disposed in the encapsulated areas m1 and m2. In one embodiment, capacitors c1 and c2 may be multi-layer ceramic capacitors (MLCCs), bypass capacitors, or decoupling capacitors, but the present invention is not limited thereto. In one embodiment, capacitors c1 and c2 may be used for voltage regulation and noise filtering, but the present invention is not limited thereto.

[0032] In another embodiment of step S110, electronic component 220 is disposed in one of the encapsulated regions m1 and m2, and second surface 222 is connected to one of the encapsulated regions m1 and m2 by a plurality of welding bumps bp.

[0033] like Figure 1 and Figure 3 As shown, after step S110, step S120 is performed to form a film structure hb on the substrate 210 and at least one electronic component 220 using 3D printing. Specifically, in step S120, film structures hb are formed on another unsealed area na and the first surface 221 respectively using 3D printing, wherein the electronic component 220 is disposed in one of the unsealed areas na. In one embodiment, the film structure hb can be a hydrolyzable adhesive, but the present invention is not limited thereto. For example, when the upper surface 211 of the substrate 210 has two unsealed areas na, and the electronic component 220 is disposed in one of the unsealed areas na, the hydrolyzable adhesive can be 3D printed to cover the other unsealed area na and the first surface 221.

[0034] In another embodiment of step S120, when the electronic component 220 is disposed in one of the unsealed areas na, a film structure hb is formed on the substrate 210 or at least one electronic component 220 by 3D printing. Specifically, in another embodiment of step S120, the film structure hb is formed on the upper surface 211 of the unsealed area na or on one side of the electronic component 220 by 3D printing. In one embodiment, the film structure hb is formed on the first surface 221. For example, when the upper surface 211 of the substrate 210 has two unsealed areas na, and the electronic component 220 is disposed in one of the unsealed areas na, the hydrolyzable adhesive can be 3D printed onto the first surface 221.

[0035] In another embodiment of step S120, when the electronic component 220 is disposed in one of the encapsulated regions m1, m2, m3, a film structure hb is formed on the substrate 210 by 3D printing. Specifically, in another embodiment of step S120, the film structure hb is formed on the upper surface 211 of the unencapsulated region na by 3D printing. For example, when the upper surface 211 of the substrate 210 has three encapsulated regions m1, m2, m3 and a single unencapsulated region na, and the electronic component 220 is disposed in the encapsulated region m3, hydrolyzable adhesive can be 3D printed to cover the upper surface 211 where the single unencapsulated region na is located.

[0036] In one embodiment of step S120, the adhesive film structure hb can be cured by ultraviolet (UV) light. In one embodiment, the wavelength of the UV light is between 315 and 400 nanometers (nm) (e.g., 365 nm or 395 nm), but the invention is not limited thereto.

[0037] like Figure 1 and Figure 4 As shown, after step S120, step S130 is performed, in which molding compound mc is molded onto substrate 210 and / or at least one electronic component 220 and film structure hb to form encapsulation structure 200. That is, the molding compound mc cures and encapsulates substrate 210, electronic component 220, and film structure hb to form encapsulation structure 200. In one embodiment, the encapsulation method can be molding, but the present invention is not limited thereto. In one embodiment, the molding compound mc can be epoxy molding compound (EMC), which can be composed of resin, hardener, and fillers, but the present invention is not limited thereto.

[0038] In one embodiment of step S130, as Figure 4 As shown, an encapsulation structure 200 is formed on the encapsulation areas m1, m2 and the film structure hb.

[0039] In one embodiment of step S130, as Figure 4 As shown, an encapsulation structure 200 is formed on capacitors c1 and c2 and film structure hb.

[0040] like Figure 1 and Figure 5 As shown, after step S130, step S140 is performed, in which a portion of the encapsulation structure 200 is removed by a processing method to expose the adhesive film structure hb. In one embodiment, the processing method may be a grinding process, but the present invention is not limited thereto.

[0041] In one embodiment of step S140, the encapsulation structure 200 can be smoothed using a strip grinding process. That is, the molding compound mc can be smoothed using a strip grinding process.

[0042] In one embodiment of step S140, the smoothed encapsulation structure 200 exposes part or all of the adhesive film structure hb, but the present invention is not limited thereto.

[0043] like Figure 1 and Figure 6 As shown, after step S140, step S150 is performed to remove the adhesive film structure hb by means of a liquid, thereby exposing the substrate 210 or at least one electronic component 220. In one embodiment, the liquid may be water or any solution with hydrolytic properties, and the temperature of the liquid may be between 60°C and 80°C, but the invention is not limited thereto.

[0044] In one embodiment of step S150, the adhesive film structure hb can be removed by liquid to expose another unsealed area na and the first surface 221. In one embodiment, the encapsulation structure 200 after removing the adhesive film structure hb may expose part or all of the other unsealed area na and the first surface 221, but the present invention is not limited thereto. For example, when the upper surface 211 of the substrate 210 has two unsealed areas na, the electronic component 220 is disposed in one of the unsealed areas na, and hydrolytic adhesive is formed on the other unsealed area na and the first surface 221 respectively, then the adhesive film structure hb of the encapsulation structure 200 can be melted and removed by hot water to expose the other unsealed area na and the first surface 221.

[0045] In one embodiment of step S150, a connector CL may be disposed on another exposed, unencapsulated area na, configured to electrically connect to external electronic components (e.g., an external PCB). In one embodiment, the connector may be metal leads, pads, solder balls, bumps, or through-hole connectors (TMV / interposers), but the invention is not limited thereto.

[0046] Please see Figure 7 This is a schematic diagram of a packaging structure 300 for another embodiment of the substrate packaging method 100. Compared to Figure 4 The packaging structure 200, such as Figure 5As shown, the film structure hb is formed only on the first surface 221 to form an encapsulation structure 300 on the encapsulation regions m1, m2 and the film structure hb. In one embodiment of the encapsulation structure 300, the encapsulation structure 300 is formed on the capacitors c1, c2 and the film structure hb.

[0047] Please see Figure 8 This is a schematic diagram illustrating the manufacturing of a packaging structure 400 according to another embodiment of the substrate packaging method 100. Compared to Figure 7 The packaging structure 300, such as Figure 8 As shown, electronic component 220 is disposed in one of the encapsulated regions m1, m2, and m3. Second surface 222 is connected to one of the encapsulated regions m1, m2, and m3 via multiple solder bumps bp. Adhesive film structure hb is formed in at least one unencapsulated region na, thereby forming an encapsulation structure 400 on the encapsulated regions m1 and m2, the first surface 221, and the adhesive film structure hb. In one embodiment of the encapsulation structure 400, the encapsulation structure 400 is formed on capacitors c1 and c2, the first surface 221, and the adhesive film structure hb.

[0048] Therefore, by combining steps S110-S150, package structures 200, 300 and 400 with exposed IC surfaces or selectively encapsulated portions can be manufactured.

[0049] [Beneficial Effects of the Examples] The substrate packaging method 100 provided by this invention forms a film structure hb on a substrate 210 and / or an electronic component 220 using 3D printing. During the molding process, the film structure hb occupies the area to be exposed. After molding, a portion of the packaging structure is removed by processing to expose the film structure hb. The film structure hb is then removed by liquid removal, thereby exposing the substrate 210 or the electronic component 220. Therefore, this substrate packaging method 100 can meet the packaging requirements of IC surface exposure and selective molding, reducing reliance on specific selective molding molds, shortening mold development cycles, reducing mold development costs, and lowering the risk of IC surface damage during packaging.

[0050] The above embodiments are only used to illustrate the technical solutions of this application and should not be construed as limiting the scope of protection of this application. Those skilled in the art can make various equivalent substitutions or modifications to the above embodiments based on the description and drawings of this application, and such substitutions or modifications should still fall within the scope of protection of this application.

Claims

1. A substrate packaging method, characterized in that, Includes the following steps: A substrate is provided, the substrate having at least one electronic component; A film structure is formed on the substrate and / or the at least one electronic component by 3D printing. A molding compound is applied to the substrate and / or at least one electronic component, as well as the adhesive film structure, to form an encapsulation structure. A portion of the encapsulation structure is removed by a processing method to expose the adhesive film structure; as well as The adhesive film structure is removed by liquid to expose the substrate or the at least one electronic component.

2. The substrate packaging method according to claim 1, characterized in that, The substrate has an upper surface and a lower surface, and the at least one electronic component is disposed on the upper surface; wherein, the step of forming the adhesive film structure further includes the following steps: The adhesive film structure is formed on the upper surface and / or on one side of the at least one electronic component.

3. The substrate packaging method according to claim 2, characterized in that, The upper surface further includes multiple encapsulated areas and multiple unencapsulated areas. At least one electronic component is disposed in one of the multiple unencapsulated areas. The at least one electronic component has a first surface and a second surface, the second surface being connected to one of the multiple unencapsulated areas via multiple solder bumps. The step of forming the adhesive film structure further includes the following steps: The adhesive film structure is formed on one of the plurality of unsealed areas and on the first surface, respectively; The step of forming the packaging structure further includes the following steps: The encapsulation structure is formed on the plurality of encapsulation areas and the film structure; The step of removing the adhesive film structure further includes the following steps: The adhesive film structure is removed by the liquid to expose another of the plurality of unsealed areas and the first surface.

4. The substrate packaging method according to claim 3, characterized in that, Multiple capacitors are also disposed on the plurality of encapsulated areas, wherein the step of forming the encapsulation structure further includes the following steps: The encapsulation structure is formed on the plurality of capacitors and the film structure.

5. The substrate packaging method according to claim 2, characterized in that, The upper surface includes multiple encapsulated areas and at least one unencapsulated area. At least one electronic component is disposed in the at least one unencapsulated area. The at least one electronic component has a first surface and a second surface. The second surface is connected to the at least one unencapsulated area via multiple solder bumps, and the adhesive film structure is formed on the first surface. The step of forming the encapsulation structure further includes the following steps: The encapsulation structure is formed on the plurality of encapsulation areas and the film structure.

6. The substrate packaging method according to claim 2, characterized in that, The upper surface includes multiple encapsulated areas and at least one unencapsulated area. At least one electronic component is disposed in one of the encapsulated areas. The at least one electronic component has a first surface and a second surface. The second surface is connected to one of the encapsulated areas via multiple solder bumps. The adhesive film structure is formed in the at least one unencapsulated area. The step of forming the encapsulation structure further includes the following steps: The encapsulation structure is formed on the plurality of encapsulation areas, on the first surface, and on the film structure.

7. The substrate packaging method according to claim 1, characterized in that, The adhesive film structure is a hydrolyzed adhesive.

8. The substrate packaging method according to claim 1, characterized in that, The step of forming the adhesive film structure further includes the following steps: The adhesive film structure is cured by ultraviolet light.

9. The substrate packaging method according to claim 1, characterized in that, The step of removing the packaging structure also includes the following steps: The encapsulation structure is smoothed by a strip-shaped encapsulation grinding process.

10. The substrate packaging method according to claim 1, characterized in that, The liquid is water, and the temperature of the liquid is between 60°C and 80°C.

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