Metal hermetic packaging structure of SiP chip

CN122825869APending Publication Date: 2026-09-2558TH RES INST OF CETC
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Patent Information

Application Number
CN202610961536.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-06-30
Publication Date
2026-09-25

AI Technical Summary

Benefits of technology

[0015]本发明提供的一种SiP芯片的金属气密封装结构,基于可伐合金的焊接特性,通过合理的结构设计,利用平行封焊、激光封焊等工艺方法实现金属气密封装结构设计,以满足产品在恶劣环境正常使用的要求。

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Abstract

The application discloses a metal airtight packaging structure of SiP chip, which comprises an upper cover plate, a shell and a lower cover plate; the lower cover plate and the shell are combined into a whole through laser sealing welding; and the upper cover plate and the shell are combined into a whole through parallel sealing welding. Threaded holes are designed at the bottom of the shell as mechanical interfaces of the packaging structure. Through reasonable structural design, parallel sealing welding and laser sealing welding are used to realize the design of the metal airtight packaging structure, so that the product can be normally used in a harsh environment.
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Description

Technical Field

[0001] This invention relates to the field of SiP technology, and in particular to a metal hermetically sealed packaging structure for a SiP chip. Background Technology

[0002] SiP (System-in-Package) technology assembles multiple active electronic components (usually bare IC chips) with different functions, along with optional passive components and other devices such as MEMS or optical devices, into a single package to achieve a certain function. This forms a single standard packaged device, a system or subsystem, which is usually called a micro-system.

[0003] System-on-Package (SiP) is the key to overcoming system bottlenecks. By packaging multiple semiconductor chips and passive components into a single chip package to form a system-level chip, it eliminates the need for a PCB board as the carrier for chip connections, thus solving the system performance bottleneck problem caused by the inherent limitations of PCBs.

[0004] SiP is not simply about integrating chips together; it requires appropriate tailoring and design based on the system, employing different structures and processes. SiP is characterized by its small size and multiple functions. Depending on the application environment, hermetic structural design is sometimes necessary. Summary of the Invention

[0005] The purpose of this invention is to provide a metal hermetically sealed packaging structure for SiP chips to solve the problems in the prior art.

[0006] To solve the above technical problems, the present invention provides a metal hermetically sealed packaging structure for a SiP chip, comprising: an upper cover plate, a housing, and a lower cover plate; The lower cover plate and the housing are laser-sealed together to form a whole. The upper cover plate and the housing are formed into a whole by parallel sealing welding; The bottom of the housing is designed with threaded holes as an external mechanical interface for the encapsulation structure.

[0007] In one embodiment, connectors are fixed to the left and right sides of the housing by gold-tin soldering.

[0008] In one embodiment, the mounting surface inside the housing is designed to be located in the middle of the housing, and transition posts for electrical connection are designed on both sides.

[0009] In one embodiment, an upper substrate and a lower substrate are fixed to the upper and lower sides of the mounting surface inside the housing by welding, respectively.

[0010] In one embodiment, the upper substrate and the lower substrate are electrically connected by wire bonding via a transition post inside the housing.

[0011] In one embodiment, the upper substrate and the connectors on both sides are electrically connected by wire bonding.

[0012] In one embodiment, the substrate of the lower cover plate is Kovar alloy, and the surface is nickel-plated.

[0013] In one embodiment, the substrate of the upper cover plate is Kovar alloy, and the surface is treated with nickel plating and gold plating.

[0014] In one embodiment, the substrate of the housing is Kovar alloy, and all surfaces are nickel-plated. Except for the mounting bottom surface, the remaining surfaces are nickel-plated and then gold-plated.

[0015] This invention provides a metal hermetically sealed packaging structure for SiP chips. Based on the welding characteristics of Kovar alloy, the metal hermetically sealed packaging structure is achieved through reasonable structural design and processes such as parallel sealing and laser sealing to meet the requirements for normal use of products in harsh environments. Attached Figure Description

[0016] Figure 1 This is an overall appearance diagram of the metal hermetically sealed structure.

[0017] Figure 2 This is a diagram of the structure of a metal hermetically sealed device.

[0018] Figure 3 It is the design drawing of the casing.

[0019] Figure 4 This is the design drawing of the top cover.

[0020] Figure 5 This is the design drawing of the lower cover plate. Detailed Implementation

[0021] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the metal hermetically sealed packaging structure for a SiP chip proposed in this invention. The advantages and features of this invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this invention.

[0022] This invention provides a metal hermetically sealed packaging structure for a SiP chip, the overall structure of which is as follows: Figure 1 As shown, it includes an upper cover plate, a housing, and a lower cover plate; the lower cover plate and the housing are laser-sealed together to form a whole; the upper cover plate and the housing are parallel-sealed together to form a whole; the bottom of the housing is designed with threaded holes as an external mechanical interface for the encapsulation structure.

[0023] like Figure 3 As shown, connectors are fixed to the left and right sides of the housing by gold-soldering. The internal mounting surface is located in the middle of the housing, with transition posts for electrical connections on both sides. The housing base material is Kovar alloy, and all surfaces are nickel-plated, except for the mounting bottom surface, which is then gold-plated.

[0024] like Figure 2 As shown, the upper and lower base plates are fixed to the upper and lower sides of the mounting surface inside the housing by welding, respectively. The upper and lower base plates are electrically connected by wire bonding through transition posts inside the housing. The upper base plate is also electrically connected to the connectors on both sides by wire bonding.

[0025] like Figure 4 As shown, the base material of the top cover is Kovar alloy, and the surface is treated with nickel and gold plating.

[0026] like Figure 5 As shown, the substrate of the lower cover plate is Kovar alloy, and the surface is nickel-plated.

[0027] First, the upper cover, lower cover, and housing are machined according to the design drawings. Then, the product is packaged and assembled, which mainly includes the following steps: The first step is to weld the transition post for electrical connection to the middle mounting surface of the housing; The second step is to solder the airtight connector to the left and right sides of the housing using a gold-tin soldering method; The third step is to weld the upper and lower substrates to the upper and lower sides of the housing mounting surface; The fourth step is to achieve electrical connection between the upper and lower substrates by means of wire bonding through transition posts; The fifth step is to achieve electrical connection between the upper substrate and the two connectors by wire bonding; Step 6: The lower cover plate is sealed to the housing by laser welding; Step 7: The top cover plate is sealed to the shell by parallel welding.

[0028] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A metal hermetically sealed packaging structure for a SiP chip, characterized in that, include: Top cover, housing and bottom cover; The lower cover plate and the housing are laser-sealed together to form a whole. The upper cover plate and the housing are formed into a whole by parallel sealing welding; The bottom of the housing is designed with threaded holes as an external mechanical interface for the encapsulation structure.

2. The metal hermetically sealed packaging structure of the SiP chip as described in claim 1, characterized in that, Connectors are fixed to the left and right sides of the housing by gold-tin welding.

3. The metal hermetically sealed packaging structure of the SiP chip as described in claim 2, characterized in that, The mounting surface inside the housing is designed in the middle of the housing, and transition posts for electrical connection are designed on both sides.

4. The metal hermetically sealed packaging structure of the SiP chip as described in claim 3, characterized in that, The upper and lower base plates are fixed to the upper and lower sides of the mounting surface inside the housing by welding, respectively.

5. The metal hermetically sealed packaging structure of the SiP chip as described in claim 4, characterized in that, The upper substrate and the lower substrate are electrically connected by wire bonding through transition posts inside the housing.

6. The metal hermetically sealed packaging structure of the SiP chip as described in claim 5, characterized in that, The upper substrate and the connectors on both sides are electrically connected by wire bonding.

7. The metal hermetically sealed packaging structure of the SiP chip as described in claim 1, characterized in that, The substrate of the lower cover plate is Kovar alloy, and the surface is nickel-plated.

8. The metal hermetically sealed packaging structure of the SiP chip as described in claim 1, characterized in that, The substrate of the upper cover plate is Kovar alloy, and the surface is treated with nickel and gold plating.

9. The metal hermetically sealed packaging structure of the SiP chip as described in claim 1, characterized in that, The base material of the housing is Kovar alloy, and all surfaces are nickel-plated. Except for the mounting bottom surface, the other surfaces are nickel-plated and then gold-plated.