Terahertz sensor and related systems and methods

Abstract

In some embodiments, an apparatus can include a substrate having each of signal generation circuitry, a transmitter, a receiver, and interface circuitry mounted thereon. The transmitter can include a transmit semiconductor die having integrated thereon: transmit circuitry configured to generate a first RF signal having an RF center frequency between 300-320 GHz based on a reference RF signal generated by the signal generation circuitry; and a transmit antenna array including a plurality of RF antennas configured to transmit the first RF signal. The receiver can include a receive semiconductor die having integrated thereon: a receive antenna array including a plurality of RF antennas configured to receive a second RF signal having the RF center frequency; and receive circuitry configured to generate a third RF signal based on the reference RF signal and to mix the second RF signal with the third RF signal to obtain a fourth RF signal. The interface circuitry can include ADC circuitry.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of priority to U.S. Provisional Patent Application Serial No. 63 / 618,784, filed January 8, 2024, under 35 USC § 119(e), Agent's File No. F0869.70004US01 entitled "TERAHERTZ SENSORS AND RELATED SYSTEMS AND METHODS", which is incorporated herein by reference in its entirety.

[0003] This application claims the benefit of priority to U.S. Provisional Patent Application Serial No. 63 / 616,483, filed December 29, 2023, under 35 USC § 119(e), Agent's File No. F0869.70004US00, entitled "TERAHERTZ SENSORS AND RELATED SYSTEMS AND METHODS", which is incorporated herein by reference in its entirety. Background Technology

[0004] Most vehicles available today are equipped with sensors capable of sensing their surroundings, helping drivers operate these vehicles more safely in challenging driving conditions and significantly contributing to a reduction in vehicle-related accidents such as collisions. The adoption of advanced sensing technologies is expected to accelerate across all segments of the vehicle market, further contributing to a significant reduction in vehicle-related accidents, resulting in fewer injuries and fatalities. The use of advanced sensing technologies at all levels of automation within the vehicle market is also expected to make the large-scale implementation of autonomous vehicles safer. The development and deployment of advanced vehicle-based sensing requires significant technological advancements. Summary of the Invention

[0005] Some embodiments provide an apparatus comprising: a substrate defined in a plane extending in a first direction and a second direction substantially orthogonal to each other; a signal generation circuit system mounted on the substrate and configured to generate a reference RF signal; a transmitter mounted on the substrate, the transmitter comprising: a first transmitting semiconductor die coupled to the signal generation circuit system and having integrated thereon: a first transmitting circuit system configured to generate a first RF signal having an RF center frequency between 300-320 GHz based on the reference RF signal; and a first transmitting antenna array including a first plurality of RF antennas configured to transmit the first RF signal; and a receiver mounted on the substrate, the receiver... The system includes: a first receiving semiconductor die coupled to the signal generation circuit system, and having integrated thereon: a first receiving antenna array including a second plurality of RF antennas configured to receive a second RF signal having the RF center frequency; a first receiving circuit system configured to: generate a third RF signal based on the reference RF signal; and mix the second RF signal with the third RF signal to obtain a fourth RF signal and provide the fourth RF signal to the interface circuit system; and an interface circuit system mounted on the substrate and coupled to the first receiving circuit system, the interface circuit system including an analog-to-digital converter (ADC) circuit system configured to digitize the fourth RF signal.

[0006] Some embodiments provide an apparatus comprising: a substrate defined in a plane extending in a first direction and a second direction substantially orthogonal to each other; a signal generation circuit system mounted on the substrate and configured to generate a reference RF signal; a transmitter mounted on the substrate, the transmitter comprising: a first transmitting semiconductor die coupled to the signal generation circuit system and having integrated thereon: a first transmitting circuit system configured to generate a first RF signal having an RF center frequency in a specific frequency range from 150 GHz to 1.5 THz based on the reference RF signal; and a first transmitting antenna array including a first plurality of RF antennas configured to transmit the first RF signal; and a receiver mounted on the substrate. The receiver comprises: a first receiving semiconductor die coupled to the signal generation circuit system, and having integrated thereon: a first receiving antenna array including a second plurality of RF antennas configured to receive a second RF signal having the RF center frequency; a first receiving circuit system configured to: generate a third RF signal based on the reference RF signal; and mix the second RF signal with the third RF signal to obtain a fourth RF signal and provide the fourth RF signal to the interface circuit system; and an interface circuit system mounted on the substrate and coupled to the first receiving circuit system, the interface circuit system including an analog-to-digital converter (ADC) circuit system configured to digitize the fourth RF signal.

[0007] Some embodiments provide an apparatus including: a substrate; and a receiver mounted on the substrate, the receiver including a first receiving semiconductor die, on which are integrated: a first receiving antenna array configured to receive RF signals, the first receiving antenna array including a first RF antenna; and a first receiving circuitry system including: a plurality of mixers coupled to respective RF antennas in the first receiving antenna array, the plurality of mixers including a first mixer coupled to the first RF antenna and configured to mix an RF signal obtained using the first RF antenna with a reference RF signal to output a first mixed signal; a first amplifier coupled to the first mixer and configured to amplify the first mixed signal output by the first mixer; and a first reflector coupled between the first mixer and the first amplifier and configured to reflect at least some of the RF energy generated by the first mixer back into the first mixer.

[0008] Some embodiments provide an apparatus including: a substrate; and a receiver mounted on the substrate, the receiver including a first receiving semiconductor die, on which are integrated: a first RF antenna configured to receive an RF signal; and a first receiving circuitry including: a first mixer coupled to the first RF antenna and configured to mix an RF signal obtained using the first RF antenna with a reference RF signal to output a first mixed signal; a first amplifier coupled to the first mixer and configured to amplify the first mixed signal output by the first mixer; and a first reflector coupled between the first mixer and the first amplifier.

[0009] Some embodiments provide an apparatus including: a substrate; and a receiver mounted on the substrate, the receiver including a first receiving semiconductor die, on which are integrated: a first receiving antenna array including a plurality of RF antennas, each of the plurality of RF antennas including two or more patches coupled in series with each other; and a first receiving circuit system coupled to the plurality of RF antennas, wherein, for each particular RF antenna among the plurality of RF antennas, the first receiving circuit system is coupled to one of the two or more patches of the particular RF antenna.

[0010] Some embodiments provide an apparatus comprising: a substrate defining a plane extending in a first direction and a second direction that are substantially orthogonal to each other; a transmitter mounted on the substrate, the transmitter including a first transmitting semiconductor die, on which integrated: a first transmitting circuitry system configured to generate a first RF signal based on a reference RF signal; a first transmitting antenna array including a plurality of RF antennas configured to transmit the first RF signal and having a first aperture having a first length extending in the first direction and a first width extending in the second direction, the first length being greater than the first width, wherein the plurality of RF antennas are arranged in a two-dimensional grid and have mirror symmetry across the line extending in the first direction; a receiver mounted on the substrate, the receiver including a first receiving semiconductor die, on which integrated: a first receiving antenna array including a plurality of RF antennas configured to receive a second RF signal and having a second aperture having a second length extending in the first direction and a second width extending in the second direction, the second length being less than the second width; and a first receiving circuitry system configured to obtain the second RF signal via the plurality of RF antennas of the first receiving antenna array.

[0011] Some embodiments provide an apparatus including: a substrate; a receiver mounted on the substrate, the receiver including: a first semiconductor die having a first plurality of RF antennas integrated thereon, configured to receive a first RF signal having a first RF center frequency, the first plurality of RF antennas including a first RF antenna; and a second semiconductor die having a second plurality of RF antennas integrated thereon, configured to receive a second RF signal having the first RF center frequency, the second plurality of RF antennas including a second RF antenna, wherein the first semiconductor die and the second semiconductor die are arranged in the receiver such that the center-to-center distance between the first RF antenna and the second RF antenna is less than or equal to half the free space wavelength at the first RF center frequency (e.g., within 10% of half the free space wavelength at the first RF center frequency).

[0012] Some embodiments provide a semiconductor die on which a first plurality of RF antennas are integrated, configured to receive an RF signal having a first RF center frequency, the first plurality of RF antennas including a first RF antenna, wherein the first RF antenna is integrated on the semiconductor die such that the center of the first RF antenna is located at a distance relative to the outer edge of the semiconductor die, the distance being less than one-quarter of the free space wavelength at the first RF center frequency.

[0013] Some embodiments provide a method for manufacturing semiconductor dies for use in transmitters and / or receivers, on which RF antenna arrays are integrated, the method comprising: obtaining a semiconductor wafer including a plurality of RF antenna arrays; and dicing the semiconductor wafer into a plurality of semiconductor dies, on which a corresponding RF antenna array of the plurality of RF antenna arrays is integrated, such that on each of the plurality of semiconductor dies, the distance between the outer edge of the semiconductor die and the outer edge of at least one RF antenna of the RF antenna array integrated on the semiconductor die is between 10 micrometers and 50 micrometers.

[0014] Some embodiments provide an apparatus including: a substrate; a transmitter mounted on the substrate, the transmitter including: a transmitting semiconductor die, on which a transmitting antenna array is integrated, the transmitting antenna array including a first plurality of transmitting RF antennas configured to transmit a first RF signal; and a transmitting circuitry system configured to feed the plurality of RF antennas in the transmitting antenna array; a receiver mounted on the substrate, the receiver including: a receiving semiconductor die, on which a receiving antenna array is integrated, including a second plurality of RF antennas configured to receive a second RF signal; a receiving circuitry system configured to process the RF signals received by the plurality of RF antennas to obtain a processed RF signal; and an analog-to-digital converter (ADC) circuitry system mounted on the substrate. The ADC circuitry is coupled to the receiving circuitry and configured to digitize the processed RF signal to obtain a digitized RF signal; and a processing circuitry is configured to operate at least one of the transmitting circuitry, the receiving circuitry, and the ADC circuitry in a first operating state during a plurality of time intervals and in a second operating state outside the plurality of time intervals, each of the plurality of time intervals including the time during which the first plurality of RF antennas are operated to transmit the first RF signal and / or the time during which the second plurality of RF antennas are operated to receive the second RF signal, wherein at least one of the transmitting circuitry, the receiving circuitry, and the ADC circuitry operates in the second operating state using less power than it operates in the first operating state.

[0015] Some embodiments provide an apparatus comprising: a substrate; a transmitter mounted on the substrate, the transmitter including a transmitting semiconductor die, on which a transmitting circuitry system is integrated, configured to generate a first RF signal having an RF center frequency between 300 GHz and 3 THz based on a reference RF signal; and a transmitting antenna array including a first plurality of RF antennas configured to transmit the first RF signal; and a receiver mounted on the substrate, the receiver including a receiving semiconductor die, on which a receiving antenna array is integrated, including a second plurality of RF antennas configured to receive a second RF signal having the RF center frequency, the second RF signal... The system comprises: at least partially generated by the reflection of a first RF signal by a target object; a receiving circuit system configured to generate a third RF signal based on the reference RF signal, and to mix the second RF signal with the third RF signal to obtain a fourth RF signal; an interface circuit system mounted on the substrate and including an analog-to-digital converter (ADC) circuit system coupled to the receiving circuit system and configured to digitize the fourth RF signal to obtain a digitized RF signal; and a processing circuit system configured to use one or more of the digitized RF signals to identify the material of the target object, wherein the material is any material with a dielectric constant greater than 1.

[0016] Some embodiments provide an apparatus comprising: a substrate; a transmitter mounted on the substrate, the transmitter including: a transmitting circuitry configured to generate a first RF signal having an RF center frequency between 300 GHz and 3 THz; and a transmitting antenna array including a plurality of RF antennas configured to transmit the first RF signal; a receiver mounted on the substrate, the receiver including: a receiving antenna array configured to receive a second RF signal having the RF center frequency, the second RF signal being generated at least partially by reflection of the first RF signal from a target object; and a receiving circuitry configured to process the received second RF signal to obtain a processed RF signal; an ADC circuitry coupled to the receiving circuitry and configured to digitize the processed RF signal to obtain a digitized RF signal; and a processing circuitry configured to use one or more of the digitized RF signals to identify the material of the target object, wherein the material is any material with a dielectric constant greater than 1.

[0017] Some embodiments provide a method for use with an apparatus including a substrate on which a transmitter, a receiver, and an analog-to-digital converter (ADC) circuitry are mounted. The transmitter includes a transmitting antenna array, and the receiver includes a receiving antenna array and a receiving circuitry. The method includes: transmitting a first RF signal having an RF center frequency between 300 GHz and 3 THz using the transmitting antenna array; receiving a second RF signal having the RF center frequency using the receiving antenna array, the second RF signal being generated at least partially by reflection of the first RF signal from a target object; processing the second RF signal using the receiving circuitry to obtain a processed RF signal; digitizing the processed RF signal output from the receiving circuitry using the ADC circuitry to obtain a digitized RF signal; and using the processing circuitry to identify the material of the target object using one or more of the digitized RF signals, wherein the material is any material with a dielectric constant greater than 1.

[0018] Some embodiments provide an apparatus comprising: a substrate; a transmitter mounted on the substrate, the transmitter including a transmitting semiconductor die, on which a transmitting circuitry system is integrated, configured to generate a first RF signal having an RF center frequency between 300 GHz and 3 THz based on a reference RF signal; and a transmitting antenna array including a first plurality of RF antennas configured to transmit the first RF signal; and a receiver mounted on the substrate, the receiver including a receiving semiconductor die, on which a receiving antenna array is integrated, including a second plurality of RF antennas configured to receive a second RF signal having the RF center frequency. The second RF signal is generated at least partially by the reflection of the first RF signal by the target object; and a receiving circuit system configured to generate a third RF signal based on the reference RF signal, and to mix the second RF signal with the third RF signal to obtain a fourth RF signal; and an interface circuit system mounted on the substrate and including an analog-to-digital converter (ADC) circuit system coupled to the receiving circuit system and configured to digitize the fourth RF signal to obtain a digitized RF signal; and a processing circuit system configured to use one or more of the digitized RF signals to detect material disposed on the target object.

[0019] Some embodiments provide an apparatus comprising: a substrate; a transmitter mounted on the substrate, the transmitter including: a transmitting circuitry configured to generate a first RF signal having an RF center frequency between 300 GHz and 3 THz; and a transmitting antenna array including a first plurality of RF antennas configured to transmit the first RF signal; a receiver mounted on the substrate, the receiver including: a receiving antenna array including a second plurality of RF antennas configured to receive a second RF signal having the RF center frequency, the second RF signal being generated at least partially by reflection of the first RF signal from a target object; and a receiving circuitry configured to process the received second RF signal to obtain a processed RF signal; an ADC circuitry coupled to the receiving circuitry and configured to digitize the processed RF signal to obtain a digitized RF signal; and a processing circuitry configured to use one or more of the digitized RF signals to detect material disposed on the target object.

[0020] Some embodiments provide a method for use with an apparatus including a substrate on which a transmitter, a receiver, and an analog-to-digital converter (ADC) circuitry are mounted. The transmitter includes a transmitting antenna array, and the receiver includes a receiving antenna array and a receiving circuitry. The method includes: transmitting a first RF signal having an RF center frequency between 300 GHz and 3 THz using the transmitting antenna array; receiving a second RF signal having the RF center frequency using the receiving antenna array, the second RF signal being generated at least partially by reflection of the first RF signal from a target object; processing the second RF signal using the receiving circuitry to obtain a processed RF signal; digitizing the processed RF signal output from the receiving circuitry using the ADC circuitry to obtain a digitized RF signal; and using the processing circuitry to detect material disposed on the target object using one or more of the digitized RF signals.

[0021] Some embodiments provide an apparatus including: a transmitter mounted on a substrate, the transmitter including: a transmitting semiconductor die on which a transmitting circuitry system is integrated, configured to generate a first RF signal having an RF center frequency between 300 GHz and 3 THz based on a reference RF signal; and a transmitting antenna array including a first plurality of RF antennas configured to transmit the first RF signal; and a receiver mounted on the substrate, the receiver including a receiving semiconductor die on which a receiving antenna array includes a second plurality of RF antennas configured to receive a signal reflected by a target object as the first RF signal. The resulting second RF signal; and a receiving circuit system configured to generate a third RF signal based on the reference RF signal, and to mix the second RF signal with the third RF signal to obtain a fourth RF signal; an interface circuit system mounted on the substrate and including an analog-to-digital converter (ADC) circuit system coupled to the receiving circuit system and configured to digitize the fourth RF signal to obtain a digitized RF signal; and a processing circuit system configured to use one or more of the digitized RF signals to determine a first velocity of at least a portion of the target object; and to predict the movement of the target object using the first velocity.

[0022] Some embodiments provide an apparatus comprising: a substrate; a transmitter mounted on the substrate, the transmitter including: a transmitting circuitry configured to generate a first RF signal having an RF center frequency between 300 GHz and 3 THz; and a transmitting antenna array including a first plurality of RF antennas configured to transmit the first RF signal; a receiver mounted on the substrate, the receiver including: a receiving antenna array including a second plurality of RF antennas configured to receive a second RF signal generated as a result of the first RF signal being reflected by a target object; and a receiving circuitry configured to process the received second RF signal to obtain a processed RF signal; an ADC circuitry coupled to the receiving circuitry and configured to digitize the processed RF signal to obtain a digitized RF signal; and a processing circuitry configured to: determine a first velocity of at least a portion of the target object using one or more of the digitized RF signals; and use the first velocity to predict the movement of the target object.

[0023] Some embodiments provide a method for use with an apparatus including a substrate on which a transmitter, a receiver, and an analog-to-digital converter (ADC) circuitry are mounted. The transmitter includes a transmitting antenna array, and the receiver includes a receiving antenna array and a receiving circuitry. The method includes: transmitting a first RF signal having an RF center frequency between 300 GHz and 3 THz using the transmitting antenna array; receiving a second RF signal having the RF center frequency using the receiving antenna array, the second RF signal being generated at least partially by reflection of the first RF signal from a target object; processing the second RF signal using the receiving circuitry to obtain a processed RF signal; digitizing the processed RF signal output from the receiving circuitry using the ADC circuitry to obtain a digitized RF signal; and using the processing circuitry to determine a first velocity of at least a portion of the target object using one or more of the digitized RF signals; and using the processing circuitry to predict movement of the target object using the first velocity.

[0024] Some embodiments provide an apparatus comprising: a substrate; a transmitter mounted on the substrate, the transmitter including a transmitting semiconductor die, on which a transmitting circuitry system is integrated, configured to generate a first RF signal having an RF center frequency between 300 GHz and 3 THz based on a reference RF signal; and a transmitting antenna array including a plurality of RF antennas configured to transmit the first RF signal; and a receiver mounted on the substrate, the receiver including a receiving semiconductor die, on which a receiving antenna array is integrated, configured to receive a second RF signal generated as a result of the first RF signal being reflected by one or more target objects in a scene; The device includes a receiving circuit system configured to generate a third RF signal based on the reference RF signal, and to mix the second RF signal with the third RF signal to obtain a fourth RF signal; an interface circuit system mounted on the substrate and including an analog-to-digital converter (ADC) circuit system coupled to the receiving circuit system and configured to digitize the fourth RF signal to obtain a digitized RF signal; and a processing circuit system configured to: acquire sensor data related to the scene from a sensor separate from the device; and associate the sensor data acquired from the sensor with data derived from one or more of the digitized RF signals.

[0025] Some embodiments provide an apparatus comprising: a substrate; a transmitter mounted on the substrate, the transmitter including: a transmitting circuitry configured to generate a first RF signal having an RF center frequency between 300 GHz and 3 THz; and a transmitting antenna array including a plurality of RF antennas configured to transmit the first RF signal; a receiver mounted on the substrate, the receiver including: a receiving antenna array configured to receive a second RF signal generated as a result of the first RF signal being reflected by one or more target objects in a scene; and a receiving circuitry configured to process the received second RF signal to obtain a processed RF signal; an ADC circuitry coupled to the receiving circuitry and configured to digitize the processed RF signal to obtain a digitized RF signal; and a processing circuitry configured to: acquire scene-related sensor data from sensors separate from the apparatus; and associate the sensor data acquired from the sensors with data derived from one or more of the digitized RF signals.

[0026] Some embodiments provide a method for use with an apparatus including a substrate on which a transmitter, a receiver, and an analog-to-digital converter (ADC) circuitry are mounted. The transmitter includes a transmitting antenna array, and the receiver includes a receiving antenna array and a receiving circuitry. The method includes: transmitting a first RF signal having an RF center frequency between 300 GHz and 3 THz using the transmitting antenna array; receiving a second RF signal having the RF center frequency using the receiving antenna array, the second RF signal being generated at least partially by reflection of the first RF signal from a target object; processing the second RF signal using the receiving circuitry to obtain a processed RF signal; digitizing the processed RF signal output from the receiving circuitry using the ADC circuitry; obtaining scene-related sensor data from a sensor separate from the apparatus using the processing circuitry; and correlating the sensor data obtained from the sensor with data derived from one or more of the digitized RF signals using the processing circuitry.

[0027] Some embodiments provide an apparatus including: a substrate; a signal generation circuit system mounted on the substrate and configured to generate a reference RF signal, the reference RF signal being a linear frequency modulation (LFM) chirped signal; a transmitter mounted on the substrate, the transmitter including a first transmitting semiconductor die coupled to the signal generation circuit system and having integrated on the first transmitting semiconductor die: a first transmitting circuit system configured to generate a first RF signal having an RF center frequency between 300-320 GHz based on the reference RF signal, and a first transmitting antenna array including a first plurality of RF antennas configured to transmit the first RF signal; and a receiver mounted on the substrate, the receiver including a first receiving semiconductor. The first receiving semiconductor die is coupled to the signal generation circuit system and integrates on the first receiving semiconductor die: a first receiving antenna array including a second plurality of RF antennas configured to receive a second RF signal having the center frequency of the RF signal, the second RF signal being generated at least partially by reflection of the first RF signal from a target object; a first receiving circuit system configured to process the second RF signal using the reference RF signal to output a processed RF signal; an analog-to-digital converter (ADC) circuit system configured to digitize the processed RF signal to obtain a digitized RF signal; and a processing circuit system coupled to the ADC circuit system and configured to use the digitized RF signal to generate a distance-lateral distance image of the target object.

[0028] Some embodiments provide a method for imaging a target object using an apparatus including a substrate on which a transmitter, a receiver, and an analog-to-digital converter (ADC) circuitry are mounted. The transmitter includes a transmitting antenna array, and the receiver includes a receiving antenna array and a receiving circuitry. The method includes: A) transmitting a first RF signal having an RF center frequency between 300 GHz and 320 GHz using the transmitting antenna array, wherein each of the first RF signals is a linear frequency modulation (LFM) chirped signal; B) receiving a second RF signal having the RF center frequency using the receiving antenna array, the second RF signal being generated at least partially by reflection of the first RF signal from the target object; C) processing the second RF signal using the receiving circuitry to obtain a processed RF signal; D) digitizing the processed RF signal output from the receiving circuitry using the ADC circuitry to obtain a digitized RF signal; and E) generating a distance-lateral distance image of the target object using the processing circuitry coupled to the ADC circuitry and the digitized RF signal.

[0029] Some embodiments provide an apparatus including: a substrate; and a receiver mounted on the substrate, the receiver including a first receiving semiconductor die, on which is integrated: a first receiving antenna array including a plurality of RF antennas, each of the plurality of RF antennas including: a first patch; and a second patch coupled in series to the first patch and having a different geometry from the first patch; and a first receiving circuit system coupled to the plurality of RF antennas.

[0030] Some embodiments provide an apparatus comprising: a substrate defining a plane extending in a substantially orthogonal first direction and a second direction; a signal generation circuit system mounted on the substrate and configured to generate a reference RF signal; a transmitter mounted on the substrate, the transmitter including: a first transmitting semiconductor die coupled to the signal generation circuit system and having integrated thereon: a first transmitting circuit system configured to generate a first RF signal having an RF center frequency in a specific frequency range in the range of 150 GHz to 1.5 THz based on the reference RF signal; and a first transmitting antenna array including a first plurality of RF antennas configured to transmit the first RF signal; and a receiver mounted on the substrate, the receiver including: a first receiving semiconductor die; It is coupled to the signal generation circuit system and integrates thereon: a first receiving antenna array, which includes a second plurality of RF antennas configured to receive a second RF signal having the center frequency of the RF signal, each of the second plurality of RF antennas including: a first patch and a second patch, which are coupled in series to the first patch and have a different geometry from the first patch; a first receiving circuit system configured to: generate a third RF signal based on the reference RF signal and mix the second RF signal with the third RF signal to obtain a fourth RF signal; and an interface circuit system mounted on the substrate and coupled to the first receiving circuit system, the interface circuit system including an analog-to-digital converter circuit system, i.e., an ADC circuit system, configured to digitize the fourth RF signal.

[0031] Some embodiments provide an apparatus including: a substrate; a receiver mounted on the substrate, the receiver including: a receiving antenna array including a first plurality of receiving RF antennas, the first plurality of receiving RF antennas including a first receiving RF antenna configured to receive a first receiving RF signal and a second receiving RF antenna configured to receive a second receiving RF signal; and a receiving circuit system including a first plurality of receiving channels, the first plurality of receiving channels including: a first receiving channel coupled to the first receiving RF antenna and configured to process the first receiving RF signal to obtain a first processed RF signal; and a second receiving channel coupled to the second receiving RF antenna and configured to process the second receiving RF signal. The receiver receives an RF signal to obtain a second processed RF signal; an interface circuit system mounted on the substrate includes: a time-division multiplexing circuit system coupled to the receiver circuit system, the time-division multiplexing circuit system including a first time-division multiplexer coupled to the first receiver channel and the second receiver channel and configured to combine the first processed RF signal and the second processed RF signal into a first single-channel time-division multiplexed signal; and an analog-to-digital converter (ADC) circuit system including a first ADC circuit coupled to the first time-division multiplexer and configured to digitize the first single-channel time-division multiplexed signal into a first single-channel digitized time-division multiplexed signal.

[0032] Some embodiments provide a method for use with an apparatus including a substrate on which a receiver and an interface circuit system are mounted. The receiver includes a receiving antenna array comprising a first plurality of receiving antennas, each comprising a first receiving RF antenna and a second receiving RF antenna. The receiver further includes a receiving circuit system comprising a first plurality of receiving channels, each comprising a first receiving channel coupled to the first receiving RF antenna and a second receiving channel coupled to the second receiving RF antenna. The interface circuit system includes a time-division multiplexing circuit system coupled to the receiving circuit system and including a first time-division multiplexer coupled to the first and second receiving channels. The interface circuit system further includes an analog-to-digital converter (ADC) circuit system, the ADC circuit system including a first ADC circuit coupled to the first time-division multiplexer, the method comprising: receiving a first received RF signal using the first received RF antenna; receiving a second received RF signal using the second received RF antenna; processing the first received RF signal using the first received channel to obtain a first processed RF signal; processing the second received RF signal using the second received channel to obtain a second processed RF signal; combining the first processed RF signal and the second processed RF signal into a first single-channel time-division multiplexed signal using the first time-division multiplexer; and digitizing the first single-channel time-division multiplexed signal into a first single-channel digitized time-division multiplexed signal using the first ADC circuit.

[0033] Some embodiments provide an apparatus including: a substrate; a receiver mounted on the substrate, the receiver including: a first receiving semiconductor die, on which are integrated: a first receiving antenna array including a first plurality of receiving RF antennas configured to receive a first received RF signal; and a first receiving circuit system including a first plurality of receiving channels coupled to the first plurality of receiving RF antennas and configured to process the first received RF signal to obtain a first processed RF signal; and an interface circuit system mounted on the substrate, the interface circuit system including: a first time-division multiplexing circuit system coupled to the first receiving circuit system, the first time-division multiplexing circuit system including a first plurality of time-division multiplexers configured to combine the first processed RF signal into a first time-division multiplexed signal; and a first analog-to-digital converter (ADC) circuit system coupled to the first time-division multiplexing circuit system and including a first plurality of ADC circuits configured to digitize the first time-division multiplexed signal into a first digitized time-division multiplexed signal.

[0034] Some embodiments provide an apparatus including: a substrate; a receiver mounted on the substrate, the receiver including: a receiving antenna array including: a first plurality of receiving RF antennas configured to receive a first received RF signal; and a second plurality of receiving RF antennas configured to receive a second received RF signal; and a receiving circuit system including: a first plurality of receiving channels coupled to the first plurality of receiving RF antennas and configured to process the first received RF signal to obtain a first processed RF signal; and a second plurality of receiving channels coupled to the second plurality of receiving RF antennas and configured to process the second received RF signal to obtain a second processed RF signal. The interface circuit system mounted on the substrate includes: a first serial communication circuit system configured to serialize the first processed RF signal to obtain and transmit a first serialized processed RF signal; a second serial communication circuit system configured to serialize the second processed RF signal to obtain and transmit a second serialized processed RF signal; and a processing circuit system mounted on the substrate, communicatively coupled to the interface circuit system, and configured to synchronize the serialization of the first processed RF signal by the first serial communication circuit system with the serialization of the second processed RF signal by the second serial communication circuit system.

[0035] Some embodiments provide a method for use with an apparatus including a substrate on which a receiver, an interface circuit system, and a processing circuit system are mounted. The receiver includes a receiving antenna array comprising a first plurality of receiving RF antennas and a second plurality of receiving RF antennas. The receiver also includes a receiving circuit system comprising a first plurality of receiving channels coupled to the first plurality of receiving RF antennas and a second plurality of receiving channels coupled to the second plurality of receiving RF antennas. The interface circuit system includes a first serial communication circuit system and a second serial communication circuit system, and the processing circuit system is communicatively coupled to the interface circuit system. The method includes: receiving a first receiving RF signal using the first plurality of receiving RF antennas; and making... The second plurality of receiving RF antennas are used to receive a second received RF signal; the first plurality of receiving channels are used to process the first received RF signal to obtain a first processed RF signal; the second plurality of receiving channels are used to process the second received RF signal to obtain a second processed RF signal; the first serial communication circuit system is used to serialize the first processed RF signal to obtain and transmit a first serialized processed RF signal; the second serial communication circuit system is used to serialize the second processed RF signal to obtain and transmit a second serialized processed RF signal; the processing circuit system is used to synchronize the serialization of the first processed RF signal by the first serial communication circuit system with the serialization of the second processed RF signal by the second serial communication circuit system.

[0036] Some embodiments provide an apparatus including: a substrate; a receiver mounted on the substrate, the receiver including: a receiving antenna array including: a first plurality of receiving RF antennas configured to receive a first received RF signal; and a second plurality of receiving RF antennas configured to receive a second received RF signal; and a receiving circuit system including: a first plurality of receiving channels coupled to the first plurality of receiving RF antennas and configured to process the first received RF signal to obtain a first processed RF signal; and a second plurality of receiving channels coupled to the second plurality of receiving RF antennas and configured to process the second received RF signal. An RF signal is used to obtain a second processed RF signal; an interface circuit system mounted on the substrate includes: a first serial communication circuit system configured to serialize the first processed RF signal to obtain and transmit a first serialized processed RF signal; a second serial communication circuit system configured to serialize the second processed RF signal to obtain and transmit a second serialized processed RF signal; and a processing circuit system mounted on the substrate, communicatively coupled to the interface circuit system, and configured to send a trigger signal and a clock signal to the first serial communication circuit system and the second serial communication circuit system.

[0037] Some embodiments provide a method for manufacturing an apparatus including a substrate defining a plane extending in a substantially orthogonal first direction and a second direction, the apparatus further including a first plurality of semiconductor dies and a second plurality of semiconductor dies, the method comprising: mounting the first plurality of semiconductor dies on the substrate; mechanically coupling the first plurality of semiconductor dies to the substrate after mounting the first plurality of semiconductor dies on the substrate; and mounting the second plurality of semiconductor dies on the substrate after the mechanical coupling of the fasteners to the substrate.

[0038] Some embodiments provide a method for manufacturing an apparatus, the apparatus comprising: a substrate defined in a plane extending in a first direction and a second direction substantially orthogonal to each other; a transmitter including a plurality of transmitting semiconductor dies, each of the plurality of transmitting semiconductor dies including a transmitting circuit system and a transmitting antenna array coupled to the transmitting circuit system; a receiver including a plurality of receiving semiconductor dies, each of the plurality of receiving semiconductor dies including a receiving circuit system and a receiving antenna array coupled to the receiving circuit system; and a fixing member, the method comprising: mounting the plurality of receiving semiconductor dies at least partially by laying a first row of receiving semiconductor dies on the substrate in the second direction. On the substrate; after mounting the plurality of receiving semiconductor dies on the substrate, the fastener is mechanically coupled to the substrate at least in part by fastening the first edge to the fastener at a first point within a threshold distance of a first edge of the substrate; and fastening the second edge to the fastener at a second point within the threshold distance of a second edge of the substrate, wherein the second edge is opposite to the first edge in the second direction; and after mechanically coupling the fastener to the substrate, the plurality of transmitting semiconductor dies are mounted on the substrate at least in part by laying a first column of transmitting semiconductor dies on the substrate in the first direction.

[0039] Some embodiments provide an apparatus comprising: a substrate defining a plane extending in a substantially orthogonal first direction and a second direction, the substrate including a first point and a second point configured for mechanical coupling to a fixture during manufacturing of the apparatus; a plurality of semiconductor dies mounted on the substrate, and each of the plurality of semiconductor dies integrating a first antenna array including a first plurality of antennas and a first circuit system coupled to the first plurality of antennas; and a heat sink mechanically coupled to the substrate at the first point and the second point. Attached Figure Description

[0040] Various aspects and embodiments will be described with reference to the following accompanying drawings. It should be understood that the drawings are not necessarily drawn to scale.

[0041] Figure 1A Vehicles equipped with example systems for terahertz-based active sensing are illustrated according to some embodiments of the techniques described herein.

[0042] Figure 1B Some embodiments of the technology described herein may include Figure 1A A three-dimensional diagram of an example device in the system.

[0043] Figure 2 Some embodiments of the technology described herein may include Figure 1A An exploded view of an example device in the system.

[0044] Figure 3 Some embodiments of the technology described herein may include Figure 1A An exploded view of an example device in the system.

[0045] Figure 4A Some embodiments of the technology described herein may include Figure 1A A schematic diagram of an example substrate in an example system.

[0046] Figure 4B These are some embodiments of the technology described herein. Figure 4A A schematic diagram of the transmitter of the device.

[0047] Figure 5 Some embodiments of the technology described herein may include Figure 1A A schematic diagram of an alternative example substrate in a device within a system.

[0048] Figure 6A This is a plot illustrating RF atmospheric attenuation as a function of carrier frequency.

[0049] Figure 6B This is a plot of a terahertz subband suitable for ranging, illustrating some embodiments of the techniques described herein.

[0050] Figure 6C This is a plot of the frequency of an example linear frequency modulation (LFM) signal with a first linear ramp, which is a function of time and exemplifies some embodiments of the techniques described herein.

[0051] Figure 6D This is a plot of the frequency of an example LFM signal having a first linear ramp and a second linear ramp as a function of time, illustrating some embodiments of the techniques described herein.

[0052] Figure 7A Some embodiments of the technology described herein may include Figure 1A A side view of an example intermediary layer in a device within a system, where a receiver is installed.

[0053] Figure 7B These are some embodiments of the technology described herein. Figure 7A The top view of the intermediary layer.

[0054] Figure 8A Some embodiments of the technology described herein include those with... Figure 7AA side view of an example device with a substrate for a receiver and an interposer layer.

[0055] Figure 8B These are some embodiments of the technology described herein. Figure 8A A top view of the device.

[0056] Figure 9A Some embodiments of the technology described herein may include Figure 1A A top view of an alternative example device in a system, showing a substrate with a receiver and an interposer layer mounted.

[0057] Figure 9B The processing circuit system is a further example of an apparatus according to some embodiments of the technology described herein. Figure 9A A top view of the device.

[0058] Figure 10A Some embodiments of the technology described herein may include Figure 1A A side view of a cross-section of an example device in the system, the device having a base plate on which a receiver is mounted and a fastener for assembling the device.

[0059] Figure 10B These are some embodiments of the technology described herein. Figure 10A The device is mechanically coupled to the fixture in a top view, which further illustrates the transmitter.

[0060] Figure 10C These are some embodiments of the technology described herein. Figure 10A A top view of the device, in which the fasteners have been removed and replaced by a radiator.

[0061] Figure 10D These are further illustrative examples of interface circuit systems based on some embodiments of the technology described herein. Figure 10A Bottom view of the device.

[0062] Figure 11A Some embodiments of the technology described herein may include Figure 1A A top view of an example substrate with a transmitter in a device within a system.

[0063] Figure 11B These are some embodiments of the technology described herein. Figure 11A The circuit diagram of the transmitter's transmitting circuit system.

[0064] Figure 12A Some embodiments of the technology described herein may include Figure 11A A schematic diagram of an example of transmitting a bare semiconductor die in a transmitter.

[0065] Figure 12B These are some embodiments of the technology described herein. Figure 12A An enlarged view of the transmitting circuit system of a pair of transmitting elements of a transmitting semiconductor bare die.

[0066] Figure 13 Some embodiments of the technology described herein may include Figure 1A A top view of an example transmitter in a device within a system.

[0067] Figure 14A Some embodiments of the technology described herein may include Figure 1A A schematic diagram of an example substrate in a device within a system, the substrate having a receiver, an interface circuit system, and a processing circuit system.

[0068] Figure 14B These are some embodiments of the technology described herein. Figure 14A The circuit diagram of the receiving element of the receiver.

[0069] Figure 15A This is a circuit diagram of an example common-mode receiving element with a reflector according to some embodiments of the technology described herein.

[0070] Figure 15B This is a circuit diagram of an example differential-mode receiving element with a reflector, according to some embodiments of the technology described herein.

[0071] Figure 15C This is a circuit diagram of an example common-mode receiving element with a differential mixer and a reflector, according to some embodiments of the techniques described herein.

[0072] Figure 15D This is a circuit diagram of an example differential-mode receiving element having a differential mixer and a reflector, according to some embodiments of the technology described herein.

[0073] Figure 16 This is a circuit diagram of an example differential mode receiving element having a differential mixer and a current reflector, according to some embodiments of the technology described herein.

[0074] Figure 17 Some embodiments of the technology described herein may include Figure 14A The example in the receiver is a top view of the semiconductor bare die being received.

[0075] Figure 18A These are some embodiments of the technology described herein. Figure 17 A top view of the receiving element of the receiving semiconductor bare die.

[0076] Figure 18B These are some embodiments of the technology described herein. Figure 18A A magnified top view of a portion of the receiving element.

[0077] Figure 19 Some embodiments of the technology described herein may include Figure 17 A top view of an alternative example antenna array in a receiving semiconductor die.

[0078] Figure 20 Some embodiments of the technology described herein may include Figure 17 A top view of another alternative example of an antenna array in a receiving semiconductor die.

[0079] Figure 21 Some embodiments of the technology described herein may include Figure 17 A top view of another alternative example of an antenna array in a receiving semiconductor die.

[0080] Figure 22 Some embodiments of the technology described herein may include Figure 1A A schematic diagram of an example receiver mounted on an intermediary layer in a device within a system.

[0081] Figure 23 Some embodiments of the technology described herein may include Figure 14A The example in the receiver is a top view of the semiconductor bare die being received.

[0082] Figure 24 Some embodiments of the technology described herein may include Figure 1A A top view of another example receiver mounted on an intermediary layer in a device within a system.

[0083] Figure 25 Some embodiments of the technology described herein may include Figure 22 The example receiver in the image is a top view of a portion of a semiconductor die.

[0084] Figure 26A This is a schematic diagram of an example semiconductor wafer with multiple antenna arrays integrated according to some embodiments of the technology described herein.

[0085] Figure 26B These are some embodiments of the technology described herein. Figure 26A An enlarged schematic diagram of a portion of a semiconductor wafer, illustrating the location of a saw blade cut for dicing semiconductor wafers into bare semiconductor dies.

[0086] Figure 26C These are some embodiments of the technology described herein. Figure 26AAn enlarged schematic diagram of a portion of a semiconductor wafer, illustrating another location of a saw cut from a semiconductor wafer to a bare semiconductor die.

[0087] Figure 27 This is based on some embodiments of the technology described herein. Figure 26A A schematic diagram of semiconductor bare dies obtained by cutting semiconductor wafers.

[0088] Figure 28 These are examples of embodiments of the technology described herein that may include, Figure 4A A diagram of an example spatial undersampled antenna array in a receiver.

[0089] Figure 29A This refers to the use of some embodiments of the technology described herein. Figure 4A Example scenario of a device performing distance-lateral distance measurement.

[0090] Figure 29B This is performed using a spatial Nyquist sampling antenna array according to some embodiments of the technology described herein. Figure 29A Example distance measurement for a scenario - lateral distance.

[0091] Figure 29C This is performed using a spatially undersampled antenna array according to some embodiments of the technology described herein. Figure 29A Example distance measurement for a scenario - lateral distance.

[0092] Figure 29D This is based on some embodiments of the technology described herein, using spatial undersampling antenna arrays and spatial anti-aliasing techniques. Figure 29A Example distance measurement for a scenario - lateral distance.

[0093] Figure 30 This is a timing diagram illustrating example states of components of the apparatus of FIG4 that can operate according to some embodiments of the technology described herein.

[0094] Figure 31 These are examples of some embodiments based on the techniques described herein. Figure 4A A timing diagram of alternative example states of the device components that can operate on multiple frames.

[0095] Figure 32A These are examples of some embodiments based on the techniques described herein. Figure 4A The components of the device can be Figure 31 A timing diagram of example states for intra-frame operations.

[0096] Figure 32B Some embodiments of the technology described herein can be used Figure 1AExample distance-lateral distance images obtained by devices in the system.

[0097] Figure 32C This is a diagram illustrating example operation of a transmitter according to a first transmit beamforming mode, representing some embodiments of the technology described herein.

[0098] Figure 32D Examples of some embodiments of the technology described herein Figure 32C The diagram illustrates an example operation of the transmitter according to the second transmit beamforming mode.

[0099] Figure 32E Examples of some embodiments of the technology described herein Figure 32C The diagram illustrates an example operation of the transmitter based on the third transmit beamforming mode.

[0100] Figure 32F These are examples of embodiments of the technology described herein. Figures 32C to 32E The transmission beamforming mode is concentrated in the angular direction at the elevation angle.

[0101] Figure 33 Some embodiments of the technology described herein may include Figure 4A A block diagram of an example transmitting element in the device.

[0102] Figure 34 Some embodiments of the technology described herein may include Figure 4A A block diagram of an example receiving element in the device.

[0103] Figure 35 Some embodiments of the technology described herein may include Figure 1A A schematic diagram of an example substrate in a system device that includes a receiver and interface circuitry system.

[0104] Figure 36 Some embodiments of the technology described herein may include Figure 1A A schematic diagram of another example substrate in the system, showing the installation of a receiver and interface circuitry system in the device.

[0105] Figure 37 Some embodiments of the technology described herein may include Figure 1A A schematic diagram of an example substrate in a device within a system, on which a receiver, an interface circuit system including a multiplexing circuit system, and a processing circuit system are mounted.

[0106] Figure 38A Some embodiments of the technology described herein may include Figure 4AA block diagram of an example interface circuit system containing a multiplexer on a substrate.

[0107] Figure 38B Some embodiments of the technology described herein may include Figure 4A A block diagram of an example interface circuit system on a substrate, the interface circuit system including a multiplexer integrated on a receiving semiconductor die.

[0108] Figure 38C Some embodiments of the technology described herein may include Figure 4A A block diagram of an example interface circuit system on a substrate, the interface circuit system including a multiplexer integrated on one of a pair of interconnected receiving semiconductor dies.

[0109] Figure 38D Some embodiments of the technology described herein may include Figure 4A A block diagram of an example interface circuit system on a substrate, the interface circuit system including an analog-to-digital converter (ADC) circuit system directly coupled to a receiving semiconductor bare die.

[0110] Figure 38E Some embodiments of the technology described herein may include Figure 4A A block diagram of an example interface circuit system on a substrate, the interface circuit system including an ADC circuit system integrated on a receiving semiconductor die.

[0111] Figure 39A Some embodiments of the technology described herein may include Figure 4A The block diagram shows an example interface circuit system on a substrate, which includes multiple ADC units integrated on a receiving semiconductor die.

[0112] Figure 39B Some embodiments of the technology described herein may include Figure 4A A block diagram of an example interface circuit system on a substrate, the interface circuit system including a single ADC unit integrated on a receiving semiconductor die.

[0113] Figure 40 Some embodiments of the technology described herein may include Figure 1A A schematic diagram of an example substrate in a device within a system, on which a receiver, an interface circuit system including a serial communication circuit system, and a processing circuit system are mounted.

[0114] Figure 41 Some embodiments of the technology described herein may include Figure 1AA schematic diagram of an example substrate in a device within a system, on which a receiver, an interface circuit system including a digital serial communication circuit system, and a processing circuit system are mounted.

[0115] Figure 42 Some embodiments of the technology described herein may include Figure 1A A schematic diagram of an example interface integrated circuit in a device within a system.

[0116] Figure 43 Some embodiments of the technology described herein may include Figure 1A A schematic diagram of an alternative example interface integrated circuit in a device within a system.

[0117] Figure 44 Some embodiments of the technology described herein may include Figure 1A A schematic diagram of a portion of an example interface integrated circuit in a device within a system.

[0118] Figure 45 Some embodiments of the technology described herein may include Figure 1A A schematic diagram of an example digital serializer in a system device.

[0119] Figure 46 This is another example scenario of detecting and / or identifying a target object according to some embodiments of the techniques described herein, the scenario including the target object and layers arranged on the target object.

[0120] Figure 47A This is yet another example scenario of detecting and / or identifying target objects according to some embodiments of the techniques described herein, including vehicles and bicycles.

[0121] Figure 47B These are some embodiments of the technology described herein. Figure 47A Example distance measurement for a scenario - lateral distance.

[0122] Figure 48 This is a diagram illustrating an example of THz band segmentation into multiple subbands according to some embodiments of the techniques described herein.

[0123] Figure 49A This is an example scenario of detecting and / or identifying target objects according to some embodiments of the techniques described herein, including vehicles, bicycles, and dummies.

[0124] Figure 49B This is an example of some embodiments of the technology described herein being carried out in the first sub-band. Figure 49A Example distance-lateral distance measurement plot for a scene.

[0125] Figure 49C This illustrates some embodiments of the technology described herein, performed in a second subband. Figure 49A Example distance-lateral distance measurement plot for a scene.

[0126] Figure 49D These are examples of implementations of the techniques described herein, performed in a third subband. Figure 49A Example distance-lateral distance measurement plot for a scene.

[0127] Figure 49E These are examples of some embodiments of the technology described herein, combined with other methods. Figures 49B to 49D The measurements obtained Figure 49A Example distance-lateral distance measurement plot for a scene.

[0128] Figure 50 This is a block diagram of an example system including a device and a camera for active THz sensing, based on some embodiments of the technology described herein.

[0129] Figure 51 Some embodiments of the technology described herein can be configured to in Figure 1A or Figure 50 A block diagram of an example computer system that performs at least some processing operations within the system. Detailed Implementation

[0130] Terahertz-based active sensing

[0131] The inventors have developed an active radio frequency (RF) sensing technology that operates in the terahertz band for determining the relative and / or absolute state (e.g., position, velocity, and / or acceleration) of a target object (e.g., a static target object such as a lamppost, utility pole, building, etc., or a dynamic target object such as a person, vehicle, car, truck, etc., etc.). The terms "radio frequency" and "RF" are used herein to refer to electromagnetic signals having frequency components in the 0-3 THz band. The term "terahertz" is used herein to refer to radio frequency signals having frequency components in the 300 GHz-3 THz band (inclusive).

[0132] The RF technologies developed by the inventors include novel RF sensors, signal processing architectures, algorithms, and software. The RF technologies developed by the inventors and described herein can be used in a wide variety of applications. For example, the RF technologies can be used in the context of autonomous vehicles (such as autonomous cars) to determine the relative and / or absolute state of one or more target objects in the environment surrounding the autonomous vehicle (e.g., the relative and / or absolute state of one or more cars, people, or other objects within a threshold distance of the autonomous vehicle). However, the technologies described herein can be used in conjunction with any type of vehicle, including, for example, land-based vehicles (e.g., cars, trucks, bicycles, motorcycles, and other wheeled vehicles, as well as trains and other track-based vehicles), air-based vehicles (e.g., airplanes, helicopters, drones, etc.), space-based vehicles (e.g., satellites, spacecraft, etc.), water-based vehicles (ships, vessels, barges, etc.), and any other type of watercraft configured to carry payloads (e.g., people, animals, plants, equipment, materials, etc.).

[0133] For decades, building reliable sensing capabilities for vehicles has been a major challenge. Unfortunately, engineers have yet to identify a single type of sensor capable of effectively monitoring the surrounding environment in all conditions, such as rain, snow, fog, nighttime, and dense environments. As a result, the conventional approach is to equip vehicles with multiple types of sensors rather than relying on a single type. For example, vehicles may be equipped with optical sensors (e.g., cameras, infrared cameras), radio frequency sensors (e.g., radar sensors), and LiDAR sensors. This approach is based on the idea that having a diverse set of sensors provides better coverage than any single sensor can provide alone, because each sensor has its own advantages and disadvantages.

[0134] For example, optical sensors allow vehicles to maintain a 360° view of their external environment. Significant advancements in camera-related technologies in recent years have enabled increasingly higher resolutions at lower costs than previously possible. With the aid of sophisticated post-processing techniques, often involving machine learning, optical sensors can detect and identify objects near the vehicle. The ability of optical sensors to distinguish colors enhances a camera's ability to differentiate between hazardous and less risky situations. For example, a camera can easily identify other vehicles, pedestrians, cyclists, traffic signs and signals, guardrails, etc. Unfortunately, optical sensors are still far from perfect. First, adverse weather conditions (e.g., darkness, rain, snow, fog) significantly degrade image quality, which in turn significantly reduces the ability of optical sensors to detect objects in roadways. Image quality also degrades when there is low contrast between objects or when objects blend into the background (e.g., on a particularly sunny day). Second, cameras generate inherently two-dimensional data where depth or distance information is not directly measured. Instead, depth or distance information can only be obtained after further signal processing of the collected image and / or video data, which can be computationally demanding.

[0135] Radar (Radio Detection and Ranging) sensors are active detection sensors that use radio frequency (RF) signals to determine the relative and / or absolute state (e.g., position, velocity, and / or acceleration) of a target object. A radar sensor has at least one transmitter that emits RF signals toward one or more objects and at least one receiver that detects any RF signals reflected by (one or more) objects. The detected RF signals are processed to determine the absolute and / or relative (e.g., relative to the radar sensor) position, velocity, and acceleration of (one or more) objects. Unlike optical sensors, radar sensors are less susceptible to adverse weather conditions and directly detect depth or distance information.

[0136] Conventional radar sensors used in autonomous vehicles operate in the millimeter-wave band (i.e., 30 GHz to 300 GHz) or even lower frequencies. For example, a conventional radar sensor operates in the 76 GHz to 81 GHz band. Due to the (relatively long) wavelengths implied by operating within this frequency range, conventional radar sensors have limited spatial (e.g., distance and angular) resolution. In practice, conventional radar sensors used in automotive environments have a distance resolution of approximately a few centimeters and a horizontal angular resolution of approximately 10° to 20°. As a result, while conventional radar sensors can detect the presence of some objects, they cannot reliably identify the nature or shape of those objects. For example, such a conventional radar sensor may not be able to distinguish a pedestrian from a vehicle or road signal. An angular resolution of approximately 1° or less may be needed to differentiate the types of objects typically encountered on the road.

[0137] Light detection and ranking (LiDAR) sensors operate similarly to radar sensors, but at optical frequencies (e.g., in the infrared or visible portion of the electromagnetic spectrum) instead of radio frequency. They determine the location of an object by sending a laser beam and measuring the time it takes for the reflected beam to hit a receiver. Because light has a much shorter wavelength than that of conventional automotive radar sensors, LiDAR sensors offer much finer spatial resolution.

[0138] However, LiDAR sensors also have several drawbacks. First, they are significantly more susceptible to rain than Radar sensors. This is because raindrops are roughly the same size as the wavelengths at which LiDAR sensors operate. In heavy rain, the light emitted from the transmitter is scattered by the raindrops, resulting in unwanted echoes. Second, LiDAR sensors are vulnerable to sunlight, which can cause detector saturation and consequently reduce the sensor's ability to detect objects. Therefore, LiDAR sensors perform better at night.

[0139] Therefore, the inventors have developed a novel sensing technology for automotive and other autonomous vehicle applications that addresses the aforementioned drawbacks of conventional sensors and sensor fusion techniques. In particular, the inventors have developed a novel Radar sensor operating in the terahertz band, which allows for the combination of some advantages of Radar and LiDAR sensors (since THz radiation behaves partly like millimeter-wave RF signals and partly like infrared light) while avoiding the need for computationally expensive fusion algorithms, which would be necessary in cases where millimeter-wave Radar and LiDAR sensors are used together instead of THz Radar. The sensing technology developed by the inventors can be deployed on vehicles (e.g., cars, whether autonomous or not) to aid safety and operation, and in some embodiments, can completely replace conventional Radar and LiDAR sensors. However, it should be noted that in some embodiments, the sensing technology developed by the inventors can be used in conjunction with one or more conventional sensors (e.g., cameras, Radar, LiDAR, etc.), as the aspects of the technology described herein are not limited in this respect.

[0140] Furthermore, the sensing technology developed by the inventors improves upon conventional Radar and LiDAR sensors. For example, because the sensing technology developed by the inventors operates in the terahertz band, it achieves significantly better spatial resolution than conventional Radar sensors can typically achieve. For instance, the sensing technology developed by the inventors achieves a distance resolution of approximately 5 mm to 15 mm and an angular resolution of approximately 0.1° to 5° (e.g., an elevation resolution of approximately 0.2° to 0.9°). As described herein, conventional Radar sensors can only achieve a distance resolution of approximately a few centimeters and an angular resolution of approximately 10° to 20°, which is insufficient for automotive and other applications.

[0141] As yet another example, terahertz-based active sensing systems are less susceptible to sunlight than LiDAR sensors. The vast majority of solar energy is concentrated in the visible and infrared regions, from approximately 300 nm to approximately 2000 nm. This is why LiDAR sensors operating in this region are particularly vulnerable to sunlight. In contrast, terahertz signals with wavelengths between 100 μm and 1 mm are virtually unaffected by sunlight.

[0142] The terahertz-based active sensing system described in this paper can be used in human-operated vehicles (e.g., cars, trucks), autonomous vehicles, and other contexts.

[0143] Despite the advantages described herein, as stated below, the inventors have recognized that developing terahertz-based active sensing systems presents its own challenges.

[0144] Terahertz Active Sensing Radar System

[0145] As discussed in this paper, operating Radar at terahertz frequencies (300 GHz to 3 THz) is advantageous because the wide bandwidth available for the signal in these frequency ranges provides high range resolution, which is important for some automotive applications. At higher frequencies, more bandwidth is available for transmission, which in turn increases the range resolution of the resulting Radar system.

[0146] On the other hand, atmospheric attenuation exists at higher frequencies in the THz spectrum (e.g., at 850 GHz), which limits the ability of Radar systems to detect targets at longer distances (e.g., at a distance of 300 meters) with a given link budget (e.g., less than 20 watts), which may be relevant in some applications (such as some automotive applications).

[0147] In fact, terahertz signals are more susceptible to atmospheric attenuation than millimeter-wave or infrared light. Terahertz signals are absorbed by water vapor and oxygen molecules in the atmosphere. For this reason, atmospheric attenuation worsens with increasing humidity. Figure 6A These are plots illustrating how atmospheric attenuation varies with frequency at humidity levels of 60%, 80%, and 100%. At 100 GHz, atmospheric attenuation is well below 3 dB / km regardless of humidity. At 300 GHz, atmospheric attenuation is between 10 dB / km and 40 dB / km. At 700 GHz, atmospheric attenuation is above 100 dB / km.

[0148] Atmospheric attenuation poses a major challenge. The power level of the RF signal is attenuated to near or below the receiver's noise floor before it travels from the transmitter to the target, or during its journey from the transmitter to the target, and after reflection from the target to the receiver. Consequently, the receiver's ability to distinguish RF signals from noise is significantly impaired.

[0149] The inventors have identified several solutions to mitigate the effects of atmospheric decay. The solutions described herein can be used individually or in combination. One solution stems from the inventors' understanding that atmospheric decay exhibits localized minimum values. Figure 6B This is another plot illustrating atmospheric attenuation as a function of frequency. Again, the attenuation can be quite severe, reaching up to 1000 dB / km in some bands. Nevertheless, some frequency bands exhibit local minima. For example, atmospheric attenuation drops significantly in the bands around 310 GHz, 425 GHz, 475 GHz, 670 GHz, and 850 GHz. Recognizing this behavior, active sensing systems according to some embodiments are designed to operate in one or more of these frequency bands where atmospheric attenuation exhibits local minima.

[0150] Therefore, the inventors have recognized that there exist frequency ranges within the THz band that offer a practical trade-off between making large bandwidth available (for increased range resolution) while keeping atmospheric attenuation to a manageable level, allowing radar systems to range objects at distances required for various applications (e.g., up to 300 meters in some automotive applications) with a fixed link budget (e.g., less than 10 or 20 watts). These ranges include, for example, 300 to 320 GHz, 390 to 450 GHz, 440 to 480 GHz, 455 to 495 GHz, and 820 to 880 GHz. Additionally, the millimeter-wave band can be considered, for example, in the 190 to 300 GHz range, because these bands still involve operating at higher frequencies than conventional millimeter-wave radar systems (which still operate at lower center frequencies (e.g., below 100 GHz), limiting their available bandwidth), and thus provide improved range resolution while even further mitigating the effects of atmospheric attenuation.

[0151] Therefore, some embodiments provide a Radar device configured to operate at an RF center frequency between 300 and 320 GHz. However, it should be understood that in other embodiments, a Radar device configured to operate in one or more other frequency ranges (e.g., 190 to 300 GHz, 390 to 450 GHz, 440 to 480 GHz, 455 to 495 GHz, and 820 to 880 GHz) can be manufactured with a similar architecture.

[0152] In some embodiments, the Radar device (e.g., respectively, as included in this document, references...) Figures 4A to 5 The described devices 400 and 500) include: (A) a substrate (e.g., 404), which may be, for example, a PCB, defined in a first direction and a second direction that are substantially orthogonal to each other (e.g., Figure 4A(a) a plane extending on the x and y sides of the substrate; (b) a signal generation circuit system (e.g., 410) mounted on the substrate and configured to generate a reference RF signal (e.g., a linear frequency modulation chirp, for example, having a duration of 1 millisecond (ms) and a center frequency between 16 GHz and 20 GHz); (c) a transmitter mounted on the substrate (e.g., 420) comprising: a first transmitting semiconductor die (e.g., 422a) coupled to the signal generation circuit system and having integrated thereon: a first transmitting circuit system (e.g., 1160) configured to generate a first RF signal based on the reference RF signal having an RF center frequency between 300-320 GHz (e.g., at 310 GHz), and a first transmitting antenna array (e.g., 1132) (e.g., including a first plurality of RF antennas (e.g., 1170)) configured to transmit the first RF signal; (d) a receiver mounted on the substrate (e.g., 430) comprising: Includes: a first receiving semiconductor die (e.g., 432a) coupled to a signal generation circuit system and having integrated thereon: a first receiving antenna array including a second plurality of RF antennas (e.g., 1486) configured to receive a second RF signal having a second RF center frequency; and a first receiving circuit system (e.g., 1480) configured to: generate a third RF signal based on a reference RF signal (e.g., having a center frequency between 150 GHz and 160 GHz, e.g., 155 GHz), and (e.g., using a subharmonic mixer) mix the second RF signal with the third RF signal to obtain a fourth RF signal and provide the fourth RF signal to an interface circuit system (e.g., 450); and (E) an interface circuit system (e.g., 450) mounted on a substrate and coupled to the first receiving circuit system, the interface circuit system including an analog-to-digital converter (ADC) circuit system (e.g., 452a to 452e) configured to digitize the fourth RF signal.

[0153] In some embodiments, the transmitter (e.g., 420 or 520) may include a column of transmitting semiconductor dies (e.g., 421a) (e.g., 422a and 422b, and optionally, another column of dies (e.g., 421b) including dies 422c and 422d) to increase the elevation resolution of the radar device. Thus, in some embodiments, the transmitter includes a first column of transmitting semiconductor dies (e.g., 2, 4, 8, or 16 dies) tiled in a first direction, the column including a first transmitting semiconductor die (e.g., 422a) and a second transmitting semiconductor die (e.g., 422b) spaced apart from the first transmitting semiconductor die in the first direction, and wherein the second transmitting semiconductor die is coupled to a signal generation circuitry system and integrates on the second transmitting semiconductor die: a second transmitting antenna array; and a second transmitting circuitry system (e.g., 1160) configured to generate an RF signal based on a reference RF signal and feed the generated RF signal to an RF antenna in the second transmitting antenna array.

[0154] In some embodiments, each transmitting semiconductor die may include 8, 16, 32, 64, or 128 RF antenna elements (e.g., 1170) integrated thereon. For example, in one embodiment, the transmitter may include a column of eight transmitting semiconductor dies, each transmitting semiconductor die having a two-dimensional grid of 16×2 RF antennas. In this example embodiment, the transmitter column may be used to achieve an elevation resolution of approximately 0.780 degrees.

[0155] In some embodiments, the transmitting semiconductor dies within a column (e.g., 421a) are spaced apart adjacent to each other to maintain a half-wavelength spacing between antennas located on different transmitting semiconductor dies in that column (e.g., Figure 22 This facilitates the elimination of aliasing effects such as lobes. For example, in some embodiments, a first transmitting semiconductor die (e.g., 2210) has a first transmitting RF antenna (e.g., 2212) integrated thereon (e.g., in the last row of antennas on the first die), a second transmitting semiconductor die (e.g., 2220) has a second transmitting RF antenna (e.g., 2222) integrated thereon (e.g., in the first row of RF antennas on the second die), and the first and second transmitting semiconductor dies are arranged in a transmitter such that the center-to-center distance between the first and second transmitting RF antennas (e.g., ...) Figure 22 The D in the equation is less than or equal to (for example, equal to) half of the free space wavelength at the center frequency of the first RF.

[0156] In some embodiments, the transmitter (e.g., 420) has multiple rows of bare semiconductor dies (e.g., 421a, 421b), which can be used to improve the azimuth resolution of the radar device. For example, the transmitter may include two transmit antenna arrays (e.g., one of 422a and 422b, and another of 422c and 422d), each transmit antenna array consisting of transmit semiconductor dies (e.g., 421a, 421b) on which RF antennas are integrated. The rows (e.g., 421a and 421b) may be located on opposite sides of the substrate. In this way, the spacing between the transmit antenna arrays can be increased (or maximized) without increasing the size of the substrate. When data obtained using the first transmit array (in the first row) is combined with data obtained using the second transmit array, increasing the spacing between the transmit antenna arrays results in an increase in the spatial (particularly azimuth) resolution of the system compared to a single-row implementation.

[0157] Therefore, in some embodiments, the transmitter includes a second column (e.g., 421b) of transmitting semiconductor dies (e.g., 422c and 422d) laid out in a first direction, wherein the second column of transmitting semiconductor dies is spaced apart from the first column (e.g., 421a) of transmitting semiconductor dies (e.g., 422a and 422b) in a second direction, wherein the second column of transmitting semiconductor dies includes a third transmitting semiconductor die and a fourth transmitting semiconductor die, on which a corresponding transmitting circuit system (e.g., 1160) and a transmitting antenna array (e.g., 1132) are integrated, and the third transmitting semiconductor die and the fourth transmitting semiconductor die are each coupled to a signal generation circuit system.

[0158] Any suitable type of RF antenna can be used as part of the transmitter. For example, multiple RF antennas in the transmitter may each include a patch (e.g., 1270). As another example, multiple RF antennas in the transmitter may each include a dipole (e.g., 1802).

[0159] In some embodiments, the RF antennas integrated on a single transmitting semiconductor die (e.g., 422a, 522a, 1122, 1222) may not be arranged in a single column, but instead can be arranged in a two-dimensional grid with two columns of RF antennas. In this layout (see, for example...), Figure 4B , Figures 11A to 11B and Figure 12A In this configuration, the RF antenna (e.g., 1170) and the on-chip transmit circuitry system feeding the RF antenna (e.g., 1160) cross a line of symmetry (e.g., 1102, 1202) (in the first direction, e.g., Figure 5The y) in the image is mirrored, and the transmitting semiconductor die column (e.g., 521a) extends along this line of symmetry. Although arranging the RF antennas on each transmitting semiconductor die in a two-dimensional array (rather than a one-dimensional array) results in a loss of elevation resolution, it brings several important benefits. First, it simplifies chip layout because it makes it easier to distribute the reference RF signal from the signal generation circuitry to the transmitting chip. For example, as a result of arranging 32 RF antennas in two columns and 16 rows on a single transmitting semiconductor die, instead of splitting the reference RF signal into 32 parts from one edge of the chip, the reference RF signal can enter the two opposite edges of the die and only needs to be split into 16 parts on each side of the die, which is much easier than splitting a single signal into 32 parts. Second, mirroring helps with link budget. A 16×2 array transmits the same amount of power as a 32×1 array, but the slots in the 16×2 array increase the total transmitter gain and achieve a greater distance relative to the transmitter for the same link budget.

[0160] Therefore, in some embodiments, the first plurality of RF antennas (e.g., 423a) integrated on the first transmitting semiconductor die (e.g., 422a) can be arranged in a two-dimensional grid with two columns and multiple rows, and wherein the first plurality of RF antennas have mirror symmetry across a line (e.g., 402) extending in the first direction. For example, the first plurality of RF antennas consists of 32 RF antennas arranged in a grid with 2 columns and 16 rows.

[0161] The receiver portion of the radar device is directed towards a second direction (e.g., 430, 530). Figure 4A A row of receiving semiconductor dies (e.g., 432, 532) (e.g., 26 dies) is laid flat in the x-direction of the signal. The row of receiving semiconductor dies includes a first receiving semiconductor die and a plurality of other receiving semiconductor dies. Each other receiving semiconductor die is coupled to a signal generation circuit system and has a corresponding receiving antenna array (e.g., a row of 16 RF antennas integrated on each other receiving semiconductor die) and a corresponding receiving circuit system (e.g., 1480) integrated thereon. The receiving circuit system is configured to process the RF signal received by the corresponding receiving antenna array using a reference RF signal.

[0162] As referenced above, the spacing between semiconductor bare dies (e.g., in) Figure 22 As described in the text, the spacing between receiving semiconductor dies can be controlled to eliminate aliasing effects, such as gate lobes. Therefore, in some embodiments, the receiving semiconductor dies can be arranged to maintain a half-wavelength spacing between antennas located on adjacent receiving semiconductor dies in a row of receiving semiconductor dies.

[0163] For example, in some embodiments, a plurality of other receiving semiconductor dies include a second receiving semiconductor die, a first receiving semiconductor die (e.g., 2210) having a first receiving RF antenna (e.g., 2212) integrated thereon (e.g., the last RF antenna in a row of RF antennas integrated on the first receiving semiconductor die), a second receiving semiconductor die (e.g., 2220) having a second receiving RF antenna (e.g., 2222) integrated thereon (e.g., the first RF antenna in a row of RF antennas integrated on the second receiving semiconductor die), and the first and second receiving semiconductor dies are arranged adjacent to each other in the receiver such that the center-to-center distance between the first and second receiving RF antennas (e.g., ...) Figure 22 D) is less than or equal to half of the free space wavelength at the center frequency of the first RF (e.g., within 10% of that free space wavelength).

[0164] Any suitable type of RF antenna can be used as part of the receiver. For example, multiple RF antennas in the receiver may each include a patch (e.g., 1902). As another example, multiple RF antennas in the receiver may each include a dipole (e.g., 1802).

[0165] In some embodiments, to facilitate the manufacture of the receiver and to enable the positioning of adjacent receiving semiconductor dies at desired intervals, the receiving semiconductor dies may be mounted on an interposer (e.g., 706), which in turn is mounted on a substrate (e.g., 804).

[0166] In some embodiments, the receiver (e.g., 700) may further include a focusing element (e.g., lens 704) mounted on the interposer and at least partially covering the receiving semiconductor die (e.g., 702) in the receiving semiconductor die row. The focusing element can increase the amount of RF energy collected by the receiver, which increases the efficiency of the radar device. The focusing lens can be made of a material transparent in the THz band (such as silicon or polymers). In some embodiments, the focusing element can be implemented as a cylindrical or partially cylindrical lens. The principal axis of the cylindrical lens can span a second direction (e.g., Figure 4A The lens extends in the x-direction. In this way, the lens concentrates waves that are offset from each other along the first direction without concentrating waves that are offset from each other along the second direction.

[0167] Other types of focusing elements (including spherical or elliptical lenses) are also possible. In some embodiments, spherical or elliptical lenses can be used to achieve viewpoint diversification. In these embodiments, waves incident on the spherical or elliptical lens from different angles can be focused onto different regions of the receiving antenna array. Viewpoint diversification can be achieved by interpreting different regions of the receiving antenna array as being associated with different angles.

[0168] As described herein, the mixer (e.g., 1484) of the receiver (e.g., 1430) may be a subharmonic mixer. Therefore, in some embodiments, the third RF signal (e.g., having a center frequency between 150-160 GHz, such as 155 GHz) has a second harmonic at its RF center frequency (e.g., between 300 and 320 GHz, such as 310 GHz), and the first receiving circuitry is configured to mix the second RF signal with the second harmonic of the third RF signal to obtain a fourth RF signal.

[0169] In some embodiments, the first RF signal (transmitted by the transmitter) is an LFM signal having a bandwidth of at least 3 GHz or at least 6 GHz (e.g., a center frequency of 310 GHz). A signal generation circuitry system can generate a reference RF signal that can be provided to a transmitting circuitry system (part of the transmitter), and the transmitting circuitry system can process the reference RF signal (e.g., up-converting and power-dividing the reference RF signal using one or more frequency multipliers and power dividers) to obtain the first RF signals and feed them to the transmitting RF antenna. For example, the first transmitting circuitry system may include a frequency multiplier circuitry system (e.g., 1152a) configured to multiply the center frequency of the reference RF signal to the RF center frequency. The first transmitting circuitry system may also include a power divider circuitry system (e.g., 1154a) configured to divide the reference RF signal into reference RF signal portions, and the first RF signal is based on each of the reference RF signal portions.

[0170] Similar to a transmitter, a receiver can receive a reference RF signal generated by a signal generation circuitry system and process it (through up-conversion and power distribution) to generate a third RF signal (which is then mixed with a received RF signal received by the receiver's RF antenna section using a subharmonic mixer). For example, the first receiver circuitry system may include a frequency multiplier circuitry system (e.g., 1462) configured to multiply the center frequency of the reference RF signal to generate the third RF signal (e.g., multiple frequency multipliers). The first receiver circuitry system may also include a power divider circuitry system (e.g., 1464) configured to divide the reference RF signal into reference RF signal portions, with the third RF signal based on each of the reference RF signal portions.

[0171] In some embodiments, the ADC circuitry (e.g., 752) may include multiple ADCs mounted on a substrate (e.g., 804). In some embodiments, the ADC circuitry may include an ADC for receiving respective sets of one or more receiving semiconductor dies (e.g., 702) in a row of semiconductor dies, the ADC being configured to digitize a signal output from one or more respective sets of receiving semiconductor dies. In some embodiments, the ADC circuitry may include a single ADC (e.g., 2532) for receiving pairs (e.g., adjacent) receiving semiconductor dies (e.g., 2332) in a row of semiconductor dies, the ADC being configured to digitize a signal output from that pair of receiving semiconductor dies.

[0172] In some embodiments, the ADC may be mounted on a substrate. In other embodiments, the ADC may be mounted on a receiving semiconductor die (e.g., Figure 38E , Figures 39A to 39B In some embodiments, one or more ADCs may be mounted on a substrate, and one or more ADCs may be mounted on one or more receiving semiconductor dies.

[0173] In some embodiments, the interface circuitry (e.g., 3550) includes a time-division multiplexing circuitry (e.g., 3556) comprising a plurality of time-division multiplexers (e.g., 3656a to 3656b) configured to combine a fourth RF signal into a time-division multiplexed signal. For example, a first receiving circuitry (e.g., 3630) may include a first plurality of receiving channels (e.g., 3638a to 3638d) coupled to a second plurality of RF antennas (e.g., 3686a to 3686d) and configured to mix a second RF signal with a third RF signal to obtain a fourth RF signal. In some embodiments, an ADC circuitry (e.g., 3552) is configured to digitize the fourth RF signal at least in part by digitizing the time-division multiplexed signal into a digitized time-division multiplexed signal.

[0174] In some embodiments, the interface circuitry (e.g., 4050) includes a first serial communication circuitry (e.g., 4060a) configured to serialize a first subset of the fourth RF signal to obtain and transmit the first serialized processed RF signal, and the interface circuitry further includes a second serial communication circuitry (e.g., 4060b) configured to serialize a second subset of the fourth RF signal to obtain and transmit the second serialized processed RF signal. For example, the first subset of the fourth RF signal may be obtained from a first plurality of receive channels (e.g., 4038a) coupled to a first subset of a second plurality of RF antennas (e.g., 4086a), and the second subset of the fourth RF signal may be obtained from a second plurality of receive channels (e.g., 4038b) coupled to a second plurality of RF antennas (e.g., 4086b). In some embodiments, the apparatus further includes a processing circuitry (e.g., 4040) configured to synchronize the serialization of a first subset of the fourth RF signals by the first serial communication circuitry with the serialization of a second subset of the fourth RF signals by the second serial communication circuitry.

[0175] In some embodiments, the apparatus further includes a processing circuitry (e.g., 440) (e.g., one or more FPGAs, one or more processors, etc.) configured to process digitized signals output from a portion of the ADC (interface circuitry (e.g., 450)). The digitized signals from the ADC may be provided to the processing circuitry via a serial interface (e.g., 2342), such as via a JESD interface protocol (e.g., an interface according to the JESD204 and JESD204B version data converter serial interface standards).

[0176] In some embodiments, the processing circuitry is mounted on a substrate (e.g., 404). In some embodiments, the processing circuitry is not mounted to the substrate but is communicatively coupled to an interface circuitry mounted on the substrate. In some embodiments, a portion of the processing circuitry is mounted on the substrate, and another portion of the processing circuitry is not mounted on the substrate.

[0177] In some embodiments, the Radar device described herein can be configured to generate a range-lateral distance image of a target object using few or even a single transmitted pulse signal. In some embodiments, the device (e.g., 400) includes: a substrate (e.g., 404); and a signal generation circuitry (e.g., 410) mounted on the substrate and configured to generate a reference RF signal, which is a linear frequency modulation (LFM) chirped signal (e.g., Figures 6C to 6D); a transmitter (e.g., 420) mounted on a substrate, the transmitter comprising: a first transmitting semiconductor bare die (e.g., Figure 11A 922), which is coupled to the signal generation circuit system and has a first transmitting circuit system integrated thereon (e.g., Figure 11B (1160 in the original text), the first transmitting circuit system is configured to generate a first RF signal having an RF center frequency between 300-320 GHz based on a reference RF signal, and a first transmitting antenna array (e.g., ...). Figure 11A 1132), which includes a first plurality of RF antennas (e.g., configured to transmit a first RF signal) Figure 11B 1170); and a receiver (e.g., 430) mounted on a substrate, the receiver comprising: a first receiving semiconductor bare die (e.g., Figure 14A 1432), which is coupled to a signal generation circuit system and has a first receiving antenna array (e.g., 1439) integrated thereon, the first receiving antenna array including a second plurality of RF antennas (e.g., RF antennas) configured to receive a second RF signal having a second RF center frequency. Figure 14B (1486 in the original text), these second RF signals are generated at least in part by the reflection of the first RF signal by the target object; and the first receiving circuit system (e.g., Figure 14B The second RF signal is configured to be processed using a reference RF signal to output a processed RF signal; an analog-to-digital converter (ADC) circuit system (e.g., 452) is configured to digitize the processed RF signal to obtain a digitized RF signal; and a processing circuit system (e.g., 440) is coupled to the ADC circuit system and configured to generate a distance-lateral distance image of the target object using the digitized RF signal.

[0178] In some embodiments, the duration of the reference RF signal (e.g., Figure 6C The duration of t2-t1 is between 500ms and 1.5 seconds. In some embodiments, the duration of the reference RF signal is between 750ms and 1.25 seconds. In some embodiments, the duration of the reference RF signal is 1ms.

[0179] In some embodiments, the processing circuitry is configured to generate distance-lateral distance images solely from digitized RF signals.

[0180] Figure 1A A vehicle 102a is illustrated with an example system 10 for terahertz-based active sensing, including a terahertz-based active sensing device 100, according to some embodiments of the technology described herein.

[0181] In some embodiments, system 10 may include one or more of devices 100. Although the THz active sensing system 10 is shown as a device 100 attached to the front bumper of vehicle 102a, embodiments of this technology are not limited to any particular location. Furthermore, a vehicle may be equipped with more than one THz active sensing system 10. For example, device 100 may be attached to the front of the vehicle, and another device 100 may be attached to the rear. In some embodiments, system 10 may include other sensing devices using other sensing technologies, including, for example, optical sensors (e.g., cameras and infrared cameras), millimeter-wave radar sensors, and / or LiDAR sensors. In other embodiments, only one or more devices 100 may be included in system 10.

[0182] Figure 1B This is a perspective view of an apparatus 100 according to some embodiments of the technology described herein.

[0183] In some embodiments, the device 100 may be configured to determine the relative and / or absolute state (e.g., position, velocity, and / or acceleration) of a target object using a signal having frequency components in a frequency band of 300 GHz to 3 THz. The device 100 includes a transmitter (Tx) 120, a receiver (Rx) 130, and a processing circuitry (140) (e.g., analog and / or digital circuitry, such as field-programmable gate arrays (FPGAs) and / or application-specific integrated circuits (ASICs)).

[0184] In some embodiments, substrate 104 may include a printed circuit board (PCB). Figure 1B In this context, substrate 404 has an upper surface configured to hold and interconnect electronic components (e.g., parallel to...). Figure 1A (in the xy plane). In some embodiments, the device 400 may have a sufficiently small shape factor to fit any suitable part of the vehicle. Figure 1B In the middle, substrate 404 has (for example, along) Figure 1A The width (extended along the x-axis) and (e.g., along) Figure 1A The width is the length extending along the y-axis. In some embodiments, the width can be between 5cm and 15cm, between 9cm and 13cm, or between 7cm and 11cm. In some embodiments, the length can be between 1cm and 18cm, between 3cm and 7cm, or between 4cm and 6cm. Other ranges are also possible. In some embodiments, the area of ​​the substrate is 10cm². 2 and 60cm 2 between.

[0185] In some embodiments, transmitter 120 may be configured to transmit a signal in a direction in which the target object is likely to be present. For example, a signal may be transmitted along a road in front of a vehicle. In some embodiments, transmitter 120 may have a transmitting RF antenna array configured to transmit at an elevation angle (e.g., along a road in front of the vehicle). Figure 1A The y-axis in the diagram provides a large aperture slot, such that RF energy is concentrated in front of the vehicle (e.g., along the y-axis) compared to above and / or below the vehicle. Figure 1A (z-axis in the equation). In some embodiments, the transmitter 120 may be configured to be more elevating (e.g., along the y-axis) than it is azimuth (e.g., along the z-axis). Figure 1A Larger apertures on the x-axis (in the image) allow RF energy to be distributed more uniformly in the azimuth angle than in the elevation angle. For example, small transmission apertures on the elevation angle can be configured to cover a wide range of directions in front of the vehicle (e.g., in the image). Figure 1A (in the xz plane).

[0186] Transmitter 120 in Figure 1B The image is shown to include a plurality of transmit semiconductor dies (Tx dies) 122, each of which may include a transmit RF antenna array and a transmit circuitry configured to feed the transmit RF antenna array. In some embodiments, at least some of the transmit semiconductor dies 122 (e.g., Figure 1B The transmit RF antenna array (of bare dies stacked in columns) can be configured to operate together as a larger RF antenna array (e.g., to provide a large aperture at the elevation angle together), such as by spacing the RF antenna on the transmit semiconductor bare die 122 with the RF antenna on another (e.g., the next one in the column) transmit semiconductor bare die 122 by half a wavelength or less.

[0187] It should be understood that in some embodiments, it may be advantageous to concentrate at least some of the transmitted RF energy onto the ground below the vehicle at an elevation angle. For example, concentrating RF energy onto the ground can be useful for detecting and / or identifying snow, ice and / or water on a road, and / or road and / or lane boundaries using techniques further described below.

[0188] In some embodiments, receiver 130 may be configured to receive a signal generated by the reflection of a transmitted signal from a target object. For example, a signal may be received from a road running along the front of a vehicle. Figure 1A As shown, the transmitted signal is reflected from the rear side of another vehicle 102b. In some embodiments, the receiver 130 may have a receiving RF antenna array configured to be positioned in the azimuth angle (e.g., along...). Figure 1AThe x-axis in the image provides a large aperture slit, allowing for high-resolution differentiation from RF energy received from the front of the vehicle (e.g., in the image) compared to RF energy received from above and / or below the vehicle. Figure 1A The receiver 130 can receive RF energy in different directions (e.g., along the x-axis) than in the xz-plane. For example, the receiver 130 can be configured to receive RF energy in different directions (e.g., along the x-axis) than in the xz-plane. Figure 1A It has a larger slit on the y-axis.

[0189] Receiver 130 in Figure 1B The image is shown as including a plurality of receiving semiconductor dies (Rx dies) 132, each of which may include a receiving RF antenna array and a receiving circuitry configured to feed the receiving RF antenna array (e.g., to obtain an RF signal via the receiving RF antenna array). In some embodiments, at least some of the receiving semiconductor dies 132 (e.g., Figure 1B The receiving RF antenna array (a stack of bare dies in rows) can be configured to operate together as a larger RF antenna array (e.g., to provide a large aperture in the azimuth angle together), such as by making the RF antenna on the receiving semiconductor die 132 spaced apart from the RF antenna on another (e.g., the next one in the row) receiving semiconductor die 132 by half a wavelength or less.

[0190] like Figure 1B As further shown, the signal generation circuit system 110 can be disposed on the substrate 104 having a transmitter 120 and a receiver 130 to provide a reference RF signal. For example, the transmitter 120 can be configured to transmit an RF signal based on the reference RF signal, and / or the receiver 130 can be configured to generate an RF signal based on the reference RF signal for mixing with the received RF signal.

[0191] In some embodiments, the processing circuitry system 140 may be configured to determine the relative and / or absolute state of a target object using signals obtained from received RF signals (e.g., mixed and digitized). In some embodiments, the position of the target object may be determined based on measurements of distance relative to a known location of device 100. In some embodiments, the velocity of the target object may be determined based on multiple distance measurements (whether obtained from a single device 100 of system 10 or from multiple devices 100). Alternatively or additionally, the velocity may be determined based on a single measurement using Doppler processing. Similarly, the acceleration of the target object may be determined based on multiple velocity data points. A computer may use the information obtained using device 100 to provide information to the driver of vehicle 102a (e.g., warnings or indications of location and / or proximity to a target object), and / or to automatically control vehicle 102a in some respects (e.g., to automate the vehicle without human intervention or with some degree of human intervention) or to perform other automated operations.

[0192] Figure 2 This is an exploded view of a device 200 that may be included in system 10 according to some embodiments of the technology described herein.

[0193] In some embodiments, device 200 may be configured as described herein with respect to device 100, including a transmitter 220 and a receiver 230 on substrate 204a. Furthermore, as... Figure 2 As shown, the device 200 also includes an interface (Int.) circuit system 250 on a substrate 204a, and a processing circuit system 240 is disposed on another substrate 204b.

[0194] In some embodiments, one or more focusing elements can be used for viewpoint diversification. For example, in Figure 2 In the diagram, receiver 230 is shown as including lens 234. In other embodiments, lens 234 may be omitted.

[0195] In some embodiments, the interface circuitry 250 may be configured to offload a signal from the receiver 230 and provide the offloaded signal to the processing circuitry 240. For example, the interface circuitry 250 may include an analog-to-digital converter (ADC) circuitry, such as... Figure 2 The unit 252, etc., shown on the substrate 204a, may include an analog front-end (AFE) circuit system and an ADC circuit system (e.g., the AFE circuit system is coupled between the receiver 230 and the ADC circuit system). Figure 2Each AFE / ADC unit 252 shown may be a mixed-signal ASIC having both AFE and ADC circuitry. Alternatively or additionally, in some embodiments, the AFE and / or ADC circuitry may be included on the receiving semiconductor die (e.g., and a separate ADC unit 252 may be omitted). Alternatively or additionally, the ADC circuitry may reside in the same integrated circuit package as the processing circuitry 240 (e.g., on the same (one or more) dies). For example, the processing circuitry 240 may include an FPGA and / or an ASIC having the ADC circuitry within it.

[0196] In some embodiments, the device 200 may be packaged for use in a vehicle (e.g., to withstand harsh weather conditions). For example, in Figure 2 The device 200 also includes a housing 202 having a housing body 202a and a cover 202b. In some embodiments, the housing body 202a may be configured to hold the substrates 204a and 204b in place, such as... Figure 2 Screws 203' are used, etc. In some embodiments, the cover 202b can be configured to protect the electronics of the device 200 from external components while allowing the transmitter 220 and receiver 230 to exchange signals with the outside of the housing 202. For example, in Figure 2 In the diagram, cover 202b is shown as including (e.g., along) the transmitter 220 and receiver 230. Figure 1A The antenna radome 203 is located in front of the z-axis. In some embodiments, the device 200 may be configured to communicate with another part of the system (such as another vehicle sensor or vehicle computer system) via connector 206.

[0197] Figure 3 This is an exploded view of an example device 300 that may be included in system 10 according to some embodiments of the technology described herein.

[0198] In some embodiments, device 300 may be as described herein with respect to device 200 (including combination) Figure 2 The configuration described above includes a housing 302 having a housing body 302a and a housing cover 302b, an radome 303, substrates 304a and 304b, a transmitter 320, a receiver 330, a processing circuitry system 340, and an interface circuitry system 350. In the illustrated embodiment, the receiver 330 is covered by a heat sink 311, which can be configured to transfer heat from the receiver 330 toward the radome 303 (e.g., the radome 303 may be substantially transparent at infrared wavelengths for efficient heat dissipation). Furthermore, as... Figure 3As shown, the device 300 includes a heat sink 307, which can be thermally coupled to a substrate 304a. In some embodiments, the heat sink 307 can be mechanically coupled to the substrate 304a, such as... Figure 3 The diagram shows the use of screw 303' for fastening to substrate 304a, etc. However, other types of fasteners can be used instead of screw 303' or in addition to screw 303'. Similarly, as shown... Figure 3 As shown, device 300 can be configured to communicate with another part of the system via connector 306.

[0199] In the illustrated examples, such as those in this article (including those in conjunction with...) Figure 10D Furthermore, the interface circuitry 350 is indicated on a side (e.g., the back side) of the substrate 304a that is hidden from view.

[0200] Figure 4A This is a schematic diagram of a substrate 404 of an example device 400 that may be included in system 10, according to some embodiments of the technology described herein. Figure 4A In this diagram, the x-axis will be referred to as the horizontal axis or azimuth axis, the y-axis will be referred to as the vertical axis or elevation axis, and the z-axis will be referred to as the longitudinal axis or distance axis.

[0201] In some embodiments, device 400 may be configured as described herein with respect to devices 100 and 200. For example, as Figure 4A As shown, the device 400 includes a substrate 404, a transmitter 420, and a receiver 430.

[0202] Transmitter 420 has multiple transmitting semiconductor dies 422a, 422b, 422c, and 422d. Each transmitting semiconductor die may have a transmitting antenna array, which is sized to transmit signals having frequency components in the 300 GHz and 3 THz band or any band within the 300 GHz-3 THz band (e.g., 190-300 GHz, 300-320 GHz, 307-313 GHz, 390-450 GHz, 440-480 GHz, 455-495 GHz, or 820-880 GHz). For example, transmitter 420 may have a transmitting antenna array that is sized to transmit signals having frequency components in the 300-320 GHz or 307-313 GHz band. In some embodiments, the transmitting antenna array described herein may have a frequency bandwidth (e.g., a 3 dB bandwidth) of 1 GHz–4 GHz, 1.5 GHz, 3 GHz, 4 GHz–134 GHz, 4 GHz–100 GHz, 4 GHz–60 GHz, 10 GHz–100 GHz, 10 GHz–60 GHz, 10 GHz–30 GHz, 15 GHz–60 GHz, 10 GHz–30 GHz, or 15 GHz–25 GHz. Similarly, the receiver 430 has a receiving antenna array that can be sized to receive signals having frequency components in a frequency band of 300 GHz–3 THz or any subband of that band. For example, in some embodiments, the receiving antenna array may be sized to receive signals having frequency components in a frequency band of 300–320 GHz or 307–313 GHz. In some embodiments, the receiver 430 has a frequency bandwidth of 10 GHz–60 GHz, 10 GHz–30 GHz, 15 GHz–60 GHz, 10 GHz–30 GHz, or 15 GHz–25 GHz.

[0203] In some embodiments, the transmitter 420 and receiver 430 may be disposed on the substrate 404. For example, the transmitter 420 and receiver 430 may be directly mounted on the substrate 404. In some embodiments, the transmitter 420 and receiver 430 may have components on one or more semiconductor dies mounted on the substrate 404. For example, in Figure 4A In this embodiment, transmitter 420 has a plurality of transmitting semiconductor dies 422a, 422b, 422c, and 422d mounted on substrate 404, and receiver 430 has a plurality of receiving semiconductor dies 432a-432e mounted on substrate 404. In some embodiments, the semiconductor dies of transmitter 420 and / or receiver 430 may be directly mounted on substrate 404, and / or one or more interposers may be mounted thereon, wherein one or more interposers are directly mounted on substrate 404.

[0204] In some embodiments, transmitter 420 may transmit signals outside the plane defined by the upper surface of substrate 404 (e.g., parallel to the z-axis or at any angle other than 90 degrees relative to the z-axis). For example, transmitter 420 may be shaped to have a main lobe extending away from the plane defined by the upper surface of substrate 404. Similarly, receiver 430 may receive the transmitted signal upon reflection from a target object. For example, receiver 430 may be shaped to have a main lobe extending away from the plane defined by the upper surface of substrate 404.

[0205] In some embodiments, the transmitter 420 may have a transmit slot (e.g., provided by its (one or more) transmit antenna array) having a transmit slot width extending along the x-axis and a transmit slot length extending along the y-axis. In some embodiments, the transmit slot length is greater than the transmit slot width. For example, the transmit slot length may be more than four times, more than ten times, more than twenty times, or more than thirty times greater than the transmit slot width. According to various embodiments, the transmit slot length may be between 10 mm and 3 cm, between 10 mm and 5 cm, between 10 mm and 7 cm, between 50 mm and 3 cm, between 50 mm and 5 cm, or between 50 mm and 7 cm. According to various embodiments, the transmit slot width may be between 0.1 mm and 3 mm, between 0.1 mm and 5 mm, or between 0.1 mm and 10 mm.

[0206] In some embodiments, the transmitting aperture can extend along the y-axis to produce a large horizontal field of view and a small vertical field of view. The transmitter 420 can be designed with such an elongated aperture because, from a viewpoint at the front of the vehicle, a target object is more likely to cross horizontally than vertically. Therefore, computer-aided driving algorithms tend to benefit more from data points at different azimuth angles than from data points at different elevation angles. In one example, the horizontal angular field of view can be between 20° and 90° (e.g., in the 650 GHz–690 GHz band), and the vertical angular field of view can be between 5° and 15° (e.g., in the 650 GHz–690 GHz band).

[0207] In some embodiments, the transmitter 420 may have a plurality of rows of transmitting semiconductor bare dies extending in one direction and spaced apart from each other in orthogonal directions. For example, such as Figure 4A As shown, semiconductor bare dies 422a and 422b are arranged in a first column 421a extending along the y direction, and semiconductor bare dies 422c and 422d are arranged in a second column 421b extending along the y direction and spaced apart from the first column 421a along the x direction.

[0208] In some embodiments, receiver 430 may have a receiving aperture (e.g., provided by its (one or more) receiving antenna array) having a receiving aperture width extending along the x-axis and a receiving aperture length extending along the y-axis. In some embodiments, the receiving aperture width is greater than the receiving aperture length. For example, the receiving aperture width may be more than five times, more than ten times, more than twenty times, or more than thirty times greater than the receiving aperture length. For example, the receiving aperture width may be between 5 mm and 10 cm, between 3 cm and 10 cm, or between 5 cm and 10 cm. According to various embodiments, the receiving aperture length may be between 0.1 mm and 3 mm, between 0.1 mm and 5 mm, or between 0.1 mm and 1 cm. In some embodiments, the receiving aperture may extend along the y-axis to increase the content sensed by receiver 430 in the horizontal direction. As described above, from a viewpoint at the front of the vehicle, target objects tend to cross the horizontal axis rather than the vertical axis.

[0209] In some embodiments, one or more focusing elements can be used for viewpoint diversification. For example, in Figure 4A In this embodiment, receiver 430 is shown as including lens 434. In other embodiments, lens 434 may be omitted.

[0210] In some embodiments, the interface circuitry 450 may be configured to offload signals from the receiver 430 and provide the offloaded signals to the processing circuitry 440. For example, in Figure 4AIn this embodiment, the interface circuit system 450 includes AFE and ADC circuit system units 452a, 452b, 452c, 452d, and 452e, respectively coupled to receiving semiconductor dies 432a-432e. In some embodiments, the AFE and ADC circuit system units 452a-452e may be implemented using a mixed-signal ASIC (e.g., having an AFE component coupled to receiver 430 and an ADC component coupled to processing circuit system 440). In some embodiments, the AFE and ADC circuit system units 452a-452e may be mounted directly or via an interposer on substrate 404. For example, the receiving semiconductor dies 432a-432e and the AFE and ADC circuit system units 452a-452e may be mounted on an interposer, and the interposer may be mounted on substrate 404. In some embodiments, at least some of the AFE circuit systems and / or ADC circuit systems may be included on the receiving semiconductor dies 432a-432e. Alternatively or additionally, at least some of the AFE and / or ADC circuitry may reside in the same integrated circuit package as the processing circuitry 440 (e.g., on the same (one or more) bare die). For example, the processing circuitry 440 may include an FPGA and / or an ASIC, in which the ADC circuitry is located. Although in Figure 4A The diagram illustrates AFE / ADC units for each receiving semiconductor die, but it should be understood that fewer units can be provided than for a receiving semiconductor die (e.g., as shown in the diagram). Figure 38A , Figure 38C and Figure 38D (As shown).

[0211] In some embodiments, the processing circuitry system 440 may include digital and / or analog circuitry configured to determine the relative and / or absolute state of a target object based on reflected signals received from the receiver 430. The processing circuitry system 440 may be mounted on a substrate 404, such as... Figure 4A As shown (e.g., mounted on another die such as an FPGA, ASIC, and / or processor), and / or the processing circuitry system 440 may be integrated on the receiver semiconductor die (e.g., 432a), or at least partially integrated on another substrate (e.g., as shown). Figure 4A (As shown). In some embodiments, the processing circuitry 440 can be configured to control the operation of the device 400. For example, as Figure 4AAs shown, the processing circuitry 440 can be configured to provide a control signal 442 to the signal generation circuitry 410, which controls the signal generation circuitry 410 to generate a reference RF signal for transmission and / or reception using the transmitter 420 and / or receiver 430. In some embodiments, the processing circuitry 440 can also be configured to operate various components of the device 400 (e.g., transmitter 420, receiver 430, interface circuitry 450) in multiple operating states, such as those described herein (including those in conjunction with...). Figures 30 to 34 Further details, etc.

[0212] Figure 4B This is a schematic diagram of a transmitter 420 according to some embodiments of the technology described herein.

[0213] In some embodiments, transmitter 420 may have a transmitting semiconductor die on which a transmitting circuitry system configured to generate an RF signal based on a reference RF signal is integrated, and a transmitting antenna array having an RF antenna configured to transmit the RF signal. For example, such as Figure 4B As shown, the transmitting semiconductor die 422a has a transmitting circuit system 425a and a transmitting antenna array 423a. For example, a portion of the transmitting circuit system (Tx circuit system) 425a can be configured to feed a corresponding transmitting antenna of the transmitting antenna array 423a.

[0214] In some embodiments, the transmitting semiconductor die 422a may have an RF transmitting antenna array arranged in a two-dimensional grid. For example, as Figure 4B As shown, the transmit antenna array 423a is arranged with a first column 406a and a second column 406b extending in a first direction (e.g., the y-direction), wherein each column has a plurality of rows 408 extending in a second direction (e.g., the x-direction). In some embodiments, the RF transmit circuitry system mounted on the transmit semiconductor die 422a may be further arranged in a two-dimensional grid. For example, as Figure 4B As shown, the transmitting circuit system 425a is illustrated as arranged in columns 406a and 406b and row 408. For example, the transmitting circuit system 425a may be arranged in a first transmitting circuit system portion in the first column 406a configured to feed the antenna in the first column 406a, and in a second transmitting circuit system portion in the second column 406b configured to feed the antenna in the second column 406b.

[0215] In some embodiments, the semiconductor die 422a may have a component with mirror symmetry across a line extending in a first direction. For example, in Figure 4BIn this configuration, the first column 406a and the second column 406b of the transmitting antenna array 423a are mirror images of each other across the line of symmetry 402 separating the first column 406a and the second column 406b. For example, the antennas of the transmitting antenna array 423a in the first column 406a may have mirror symmetry with the corresponding antennas of the transmitting antenna array 423a in the second column 406b. In some embodiments, the transmitting circuit system 425a may be further mirrored across the line of symmetry 402 separating the first column 406a and the second column 406b. For example, a first transmitting circuit system portion (including the transmitting circuit systems in the first column 406a configured to feed the antennas of the first column 406a) may have mirror symmetry with a second transmitting circuit system portion across the line of symmetry 402, the second transmitting circuit system portion including the transmitting circuit systems in the second column 406b configured to feed the antennas of the second column 406b.

[0216] In some embodiments, the device 400 may have a plurality of transmitting semiconductor dies having mirror symmetry across the same line. For example, as Figure 4B As shown, the transmitting semiconductor die 422b has an antenna array 423b and a transmitting circuit system 425b arranged in a two-dimensional array, the two-dimensional array having columns separated by lines 402. For example, the antenna array 423b and / or the transmitting circuit system 425b may have mirror symmetry across the symmetry line 402.

[0217] In some embodiments, the device 400 may have a plurality of transmitting semiconductor dies having mirror symmetry across corresponding lines. For example, as Figure 4B As shown, the transmitting semiconductor die 422c has an antenna array 423c and a transmitting circuit system 425c arranged in a two-dimensional array, wherein columns are separated by another line 402' extending in the same direction (y-direction) as line 402. In some embodiments, the antenna array 423c and / or the transmitting circuit system 425c may have mirror symmetry across line 402'. Similarly, as... Figure 4B As shown, the transmitting semiconductor die 422d has an antenna array 423d and a transmitting circuit system 425d, which can have mirror symmetry across line 402'.

[0218] Figure 5 This is a schematic diagram of an alternative substrate 504 of an example device 500 that may be included in system 10, according to some embodiments of the technology described herein. Figure 5 As shown, a signal generation circuit system 510, a transmitter 520, a receiver 530, a processing circuit system 540, and an interface circuit system 550 are mounted on the substrate 504.

[0219] In some embodiments, the signal generation circuit system 510 may include components configured to generate a reference RF signal for supplying to the transmitter 520 and / or receiver 530. Figure 5 In this embodiment, the signal generation circuit system 510 includes a local oscillator (LO) 512 and a frequency multiplier circuit system 514. In some embodiments, the LO 512 may be configured to generate an LFM signal (e.g., a chirp) such as using a phase-locked loop (PLL). In some embodiments, the frequency multiplier circuit system may be configured to up-convert the LFM signal to generate a reference RF signal based on the LFM signal. For example, the reference RF signal may have content derived from the LFM signal and may have a higher center frequency than the LFM signal. In some embodiments, the reference RF signal may have a center frequency between 1 GHz and 20 GHz. In some embodiments, the reference RF signal may have a center frequency of 17.22 GHz (e.g., 310 GHz divided by 18).

[0220] In some embodiments, transmitter 520 may be as described herein with respect to transmitter 420 (including in combination with...) Figure 4A Configure as described above. Figure 5 As shown, transmitter 520 has two columns (521a and 521b) for transmitting bare semiconductor dies, and columns 521a and 521b are spaced apart from each other along the x-axis. Figure 5 As shown, the first column 521a has two transmitting semiconductor dies 522a and 522b, and the second column 521b has two transmitting semiconductor dies 522c and 522d. Figure 5 In this configuration, each transmitting semiconductor die 522a, 522b, 522c, and 522d has 32 transmitting elements (Tx elements) 524. For example, each transmitting semiconductor die may include a transmitting RF antenna array and a transmitting circuitry configured to feed the transmitting RF antenna array, and each transmitting element 524 may include an array of transmitting RF antennas and a transmitting circuitry configured to feed the transmitting RF antennas. Figure 5 As shown, the transmitting elements 524 of each semiconductor die 522, 522b, 522c, 522d are arranged in a two-dimensional (16×2) grid, wherein each transmitting element 524 is center-to-center spaced from the other transmitting elements 524 by half a free-space wavelength at the center frequency (e.g., 310 GHz) of the RF signal transmitted by the transmitting element 524. For example, each transmitting element 524 may have a transmitting RF antenna, which is center-to-center spaced from the other transmitting RF antennas of the transmitting elements 524 by half a free-space wavelength at the center frequency of the RF signal transmitted by the transmitting RF antenna. Alternatively or additionally, the center-to-center spacing may be within 10% and / or 7% of the half free-space wavelength at the center frequency.

[0221] In some embodiments, receiver 530 may be as described herein with respect to receiver 430 (including combination) Figure 4A Configure as described above. Figure 5 As shown, receiver 530 has 26 receiving semiconductor dies 532a-532z in a single row. For example, each receiving semiconductor die may include a receiving RF antenna array and a receiving circuitry configured to feed the receiving RF antenna array (e.g., to obtain a received RF signal via the receiving RF antenna array). Figure 5 As shown, each receiving semiconductor die has 16 receiving elements (Rx elements) 538 arranged in a one-dimensional (1×16) linear array, wherein each receiving element 538 is center-to-center spaced from the other receiving elements 538 by half a free-space wavelength at the center frequency (e.g., 310 GHz). For example, each receiving element 538 may have a receiving RF antenna, which is center-to-center spaced from the other receiving RF antennas of the receiving elements 538 by half a free-space wavelength at the center frequency of the RF signal received by the receiving RF antenna. Alternatively or additionally, the center-to-center spacing may be within 10%, 9%, 8% and / or 7%, 6%, 5%, 4%, 3%, 2% and / or 1% of the half free-space wavelength at the center frequency.

[0222] In some embodiments, interface circuitry 550 may be as described herein with respect to interface circuitry 450 (including those combined with...) Figure 4A Configure as described above. Figure 5 As shown, the interface circuitry 550 has 26 combined AFE / ADC units 552a, 552b to 552z, each coupled to a corresponding receiver semiconductor die in receiver semiconductor dies 532a-532z. In some embodiments, each AFE / ADC unit 552a-552z may include an analog conditioning circuitry (e.g., an amplifier) ​​and a 32-channel ADC. For example, for 16 receiver elements 538 to which the ADC is coupled, the ADC may have two channels for each receiver element 538. For example, each pair of channels may be configured to carry differential pair output signals from receiver elements 538. In some embodiments, each AFE / ADC unit 552a-552z may be a mixed-signal ASIC.

[0223] In some embodiments, the processing circuitry 540 may be as described herein with respect to the processing circuitry 440 (including combinations thereof). Figure 4A Configure as described above. Figure 5As shown, the processing circuitry 540 is mounted on substrate 404, but the processing circuitry 540 may be located at least partially elsewhere, or entirely elsewhere (e.g., mounted on another substrate). In some embodiments, the processing circuitry 540 may be configured to communicate with interface circuitry 550 using a serial interface such as JESD. According to various embodiments, the processing circuitry 540 may be an ASIC, FPGA, and / or processor. In some embodiments, the processing circuitry 540 may be configured to control the operation of device 500, as described herein with respect to processing circuitry 440, etc. For example, as... Figure 5 As shown, the processing circuitry 540 can be configured to provide a control signal 542 to the LO 512, which controls the LO 512 to generate a reference RF signal for transmission and / or reception using the transmitter 520 and / or receiver 530.

[0224] Figure 6C This is a plot illustrating how example RF signals and corresponding reflected frequencies can change over time according to some embodiments. Figure 6C In the illustrated example, the transmitted and received RF signals have frequencies that vary according to a linear ramp. For example, the transmitted RF signal can be generated based on a reference RF signal (such as a chirp signal) from signal generation circuitry systems 410 and / or 510. Figure 6C In the diagram, the solid line represents the transmitted RF signal, and the dashed line represents the reflected RF signal at the receiver. The frequency of the transmitted RF signal varies from frequency f1 at time t1 to frequency f2 at time t2. Therefore, the bandwidth of the transmitted RF signal is f2-f1. In some embodiments, f1 can be, for example, 190GHz, 300GHz, 307GHz, 390GHz, 440GHz, 455GHz, 650GHz, 655GHz, 660GHz, 665GHz, or 820GHz. In some embodiments, f2 can be, for example, 300GHz, 313GHz, 320GHz, 450GHz, 480GHz, 495GHz, 690GHz, 685GHz, 680GHz, 675GHz, or 880GHz. Similarly, as... Figure 6C As shown, the transmitted RF signal has a duration of t2-t1. According to various embodiments, t2-t1 can be between 500ms and 1.5 seconds, between 750ms and 1.25 seconds, or 1ms.

[0225] like Figure 6CAs shown, the frequency of the reflected RF signal is a mirror image of the frequency of the transmitted RF signal (with a delay Δt). The delay is equal to the time it takes for the transmitted RF signal to travel round trip when it hits the target object. Therefore, the delay Δt quantifies the distance to the target object. The delay Δt can be obtained by determining the difference (Δf) between the frequencies of the transmitted and received RF signals at a specific time t0. Because the chirped signal illustrated is linear, the delay Δt is given by dividing the frequency difference Δf by the slope of the linear ramp. In some embodiments, Δf can be, for example, 1.5 GHz, 3 GHz, 6 GHz, 10 GHz, 20 GHz, 30 GHz, 40 GHz, 50 GHz, 60 GHz, 80 GHz, 100 GHz, 120 GHz, or 134 GHz.

[0226] Figure 6D This is a plot of an alternative example RF signal comprising two linear ramps, illustrating some embodiments. In this example, the first linear ramp slopes in a direction of increasing frequency (thus forming an upper ramp), and the second linear ramp slopes in a direction of decreasing frequency (thus forming a lower ramp). The illustrated chirped signal allows the Radar device to perform two distinct measurements, each ramped by a frequency difference (Δf1, Δf2). The first measurement (Δt1) uses the first frequency difference (Δf1) to quantize the initial distance to the target object, and the second measurement (Δt2) uses the second frequency difference (Δf2) to quantize the final distance to the target object. In some embodiments, the two measurements can be used to quantize the velocity of the target object. In some embodiments, one side of the single-ramp or double-ramp signal can be used to quantize the velocity of the target object using Doppler phase-shift processing. Although in Figure 6D The duration is not marked, but in some embodiments, the duration of the double-ramp signal can be twice the duration of a single linear ramp, while in other embodiments, the duration can be the same as the duration of a single linear ramp (e.g., having a pair of ramps, each of which is half the time of a single ramp signal).

[0227] Figure 7A This is a side view of an intermediary layer 706 in a device that may include a receiver 700 in system 10, according to some embodiments of the technology described herein. Figure 7B This is a top view of an intermediary layer 706 according to some embodiments of the technology described herein.

[0228] In some embodiments, receiver 700 may be as described herein with respect to receiver 430 or 530 (including combinations thereof). Figures 4A to 5 Configure as described above. Figures 7A to 7BAs shown, the receiver 700 includes a single row of receiving semiconductor dies 702 and lenses 704 disposed on at least a portion of each receiving semiconductor die 702. For example, the lenses 704 may be disposed on the receiving RF antenna of the receiving semiconductor die 702, but other portions of the receiving semiconductor die 702 may not be covered.

[0229] The inventors have recognized that, in some embodiments, the intermediary layer may be advantageous for achieving precise positioning of the receiving element within the receiving array. For example, in Figure 5 In the example, receiver 530 has an array of 26 receiving semiconductor dies, but an interposer can be useful in embodiments with fewer or more dies. Figures 7A to 7B As shown, a receiving semiconductor die 702 is mounted on an interposer 706. In some embodiments, the receiving semiconductor die 702 may be encapsulated with leads exposed for soldering to conductive pads on the interposer 706. In some embodiments, it may be easier to precisely position the receiving semiconductor die 702 in an array on the interposer 706 (e.g., maintaining half-wavelength spacing between receiving RF antennas in individual dies) compared to when the receiving semiconductor die 702 is mounted directly on the substrate. For example, while some available PCB mounting techniques are useful for producing large substrates on which many components are mounted at low cost and with high robustness, such techniques offer low precision in mounting components. In some embodiments, using an interposer allows for more precise mounting techniques (e.g., compared to a substrate mounted with an interposer) over a relatively small area, enabling precise positioning of the RF antennas on the interposer while keeping the overall cost of the device low. Alternatively or additionally, in some embodiments, the interposer 706 may provide mechanical support for long receiving arrays to limit bending or warping due to the weight and size (e.g., row length) of the receiving array. It should be understood that in some embodiments, at least some semiconductor dies may be alternatively or additionally mounted directly on the substrate.

[0230] Figure 8A This is a side view of an example device 800 including a substrate 804 with a receiver 700 and an interposer 706 mounted, according to some embodiments of the technology described herein. Figure 8B This is a top view of an apparatus 800 according to some embodiments of the technology described herein.

[0231] In some embodiments, device 800 may be as described herein with respect to device 400 and / or 500 (including combinations thereof). Figures 4A to 5 Configure as described above. For example, as... Figures 8A to 8B As shown, the device 800 includes a substrate 804, wherein Figures 8A to 8BThe interposer layer 706 is mounted on the substrate 804 using solder balls 710. In some embodiments, the device 800 may include an interface circuit system (not shown) mounted on the substrate 804 and / or mounted on the receiving semiconductor die 702, such as an AFE and ADC circuit system configured to digitize offload data from the receiver 700 and provide the digitized data to the processing circuit system.

[0232] Figure 9A This is a top view of an example device 900 having a receiver 700 and an alternative intermediary layer 906 mounted thereon, which may be included in system 10 according to some embodiments of the technology described herein.

[0233] In some embodiments, device 900 may be configured as described herein with respect to device 800. For example, as Figure 9A As shown, device 900 includes an interposer 906 on which receiver 901 is mounted, which can be configured as described herein with respect to receiver 700 (such as including receiving semiconductor die 902 and lens 904, etc.). Additionally, in Figure 9A In this context, the intermediate layer 906 also includes an interface circuitry system 950 mounted thereon. For example, in... Figure 9A In the interface circuit system 950, an AFE / ADC unit 952 is mounted on an interposer layer 906. In some embodiments, the AFE / ADC unit 952 may be as described herein with respect to AFE / ADC units 552a-552z (including those combined with...). Figure 5 Configure as described above.

[0234] Figure 9B This is a top view of an apparatus 900 comprising a substrate 910 and a processing circuit system 940, which is a further illustration of some embodiments of the technology described herein.

[0235] like Figure 9B As shown, the processing circuitry system 940 can be mounted on the substrate 910. For example, the AFE / ADC unit 952 can be configured to offload digitized data from the receiver 901 to the processing circuitry system 940 via solder balls (e.g., 710), and then offload it back to the substrate 910 via traces on the substrate 910. For example, as Figure 9B As further shown, trace 908 on substrate 910 can be configured to provide a reference RF signal to receiver 901 via solder balls (e.g., 710) (e.g., from a signal generation circuit system), as described herein with respect to devices 400 and 500.

[0236] Substrate fixing technology

[0237] As stated above, the inventors have recognized the challenges of developing terahertz-based active sensing systems. One such challenge is the potentially difficult reliably assembling of the components of terahertz-based active sensing systems.

[0238] The inventors have recognized that assembling a terahertz-based active sensing system can include mounting a semiconductor die (e.g., on which an antenna array is integrated) to a substrate, which typically involves heating the substrate to very high temperatures (e.g., 220°C to 300°C). Thermal expansion of the substrate under high heat (and / or subsequent compression) can misalign the semiconductor die or even damage it. For example, thermal expansion of the substrate can cause the antenna array integrated on the semiconductor die to bend (e.g., away from the plane defined by the substrate), thereby degrading the transmission or reception of the antenna array, or, in extreme cases, rendering the antenna array inoperable. This includes lenses (e.g., Figure 10B Some embodiments of (1008) may be susceptible to undesirable electromagnetic dissipation due to non-uniform spacing of the array relative to the lens (e.g., dissipation in the adhesive below the lens), but lensless embodiments may similarly exhibit degraded performance.

[0239] Therefore, in some embodiments, a retainer can be used during the fabrication of the Radar device to limit the thermal expansion of the substrate of the Radar device, at least during the mounting of some semiconductor dies to the substrate. For example, a retainer (e.g., 1005) can be used to fabricate a Radar device (e.g., 1000) comprising a substrate (e.g., 1004) defining a plane extending in a substantially orthogonal first and second direction, a first plurality of semiconductor dies (e.g., 1032), and a second plurality of semiconductor dies (e.g., 1022a). For example, fabricating the Radar device may include mechanically coupling the retainer to the substrate after mounting the first plurality of semiconductor dies on the substrate, and then mounting the second plurality of semiconductor dies on the substrate after mechanically coupling the retainer to the substrate. For example, the retainer can limit the thermal expansion of the substrate when mechanically coupled to the substrate, thereby mitigating (e.g., reducing or eliminating) the effects of thermal expansion (and / or subsequent thermal compression) on the first plurality of semiconductor dies mounted on the substrate, such that the first plurality of semiconductor dies are not damaged or substantially not bent during fabrication. According to various embodiments, the warpage of the substrate during manufacturing can be reduced from about 900 micrometers without the use of fasteners to less than 100 micrometers with the use of fasteners, such as less than 50 micrometers, less than 25 micrometers, less than 15 micrometers, between 5 micrometers and 50 micrometers, between 5 micrometers and 25 micrometers, and / or between 5 micrometers and 15 micrometers, etc.

[0240] Therefore, some embodiments provide a method for manufacturing an apparatus (e.g., 1000) comprising a substrate (e.g., 1004) defined in a first direction substantially orthogonal to each other (e.g., Figure 10B (y-direction) and second direction (e.g., Figure 10B The device further includes a first plurality of semiconductor dies (e.g., 1032) and a second plurality of semiconductor dies (e.g., 1022a), the method comprising:

[0241] (A) Mounting a first plurality of semiconductor bare dies onto a substrate;

[0242] (B) After mounting the first plurality of semiconductor bare dies onto the substrate, mechanically coupling the fasteners to the substrate; and

[0243] (C) After mechanically coupling the fastener to the substrate, a second plurality of semiconductor bare dies are mounted on the substrate.

[0244] In some embodiments, the substrate comprises a first material (e.g., glass fiber) having a first coefficient of thermal expansion (e.g., 16 parts per million (ppm / °C)), and the fastener comprises a second material (e.g., nickel-iron alloy) having a second coefficient of thermal expansion lower than the first coefficient of thermal expansion (e.g., 1.2 ppm / °C). In some embodiments, the second coefficient of thermal expansion is less than 5 ppm / °C, and / or less than 2 ppm / °C.

[0245] In some embodiments, the first plurality of semiconductor bare dies include a third material (e.g., a semiconductor material) having a third coefficient of thermal expansion (e.g., 3 ppm / °C) lower than the first coefficient of thermal expansion.

[0246] In some embodiments, the substrate includes a first edge (e.g., 1007a) and a second edge (e.g., 1007b) opposite the first edge in a second direction; and mechanically coupling the fastener to the substrate includes fastening the fastener to the substrate at a first point within a threshold distance of the first edge and at a second point within a threshold distance of the second edge. In some embodiments, fastening the fastener to the substrate at the first point includes using a first fastener (e.g., 1006a), and fastening the fastener to the substrate at the second point includes using a second fastener (e.g., 1006b).

[0247] In some embodiments, mounting a first plurality of semiconductor dies on a substrate includes laying a first row of semiconductor dies (e.g., 1032) on the substrate in a second direction; and mounting a second plurality of semiconductor dies on a substrate includes laying a first column (e.g., 1021) of semiconductor dies (e.g., 1022a) on the substrate in a first direction.

[0248] In some embodiments, the method further includes: after mechanically coupling the fastener to the substrate, underfilling the first plurality of semiconductor bare dies.

[0249] In some embodiments, mounting a first plurality of semiconductor dies on a substrate includes using a ball grid array (BGA); and mounting a second plurality of semiconductor dies on a substrate includes wire bonding the second plurality of semiconductor dies to the substrate.

[0250] In some embodiments, each of the first plurality of semiconductor dies includes a first antenna array (e.g., Figure 14A 1489 in the first antenna array and a first circuit system coupled to the first antenna array (e.g., Figure 14B 1480 in the middle); and the second plurality of semiconductor bare dies each include a second antenna array (e.g., Figure 11A 1132) and a second circuit system coupled to the second linear array (e.g., Figure 11B (1160 in the middle).

[0251] In some embodiments, the first antenna array includes a first receiving antenna array (e.g., Figure 14A (1489 in the text); the first circuit system includes a first receiving circuit system (e.g., Figure 14B (1480 in the middle); the second linear array includes a second transmitting antenna array (e.g., Figure 11A 1132 in the middle); and the second circuit system includes a second transmitting circuit system (e.g., Figure 11B (1160 in the middle).

[0252] In some embodiments, the method further includes: a signal generation circuit system (e.g., Figure 11A 1110 in Figure 14A 1410 is mounted on a substrate and the signal generation circuit system is coupled to a first plurality of semiconductor dies and a second plurality of semiconductor dies.

[0253] In some embodiments, after the fastener is used to limit the thermal expansion and / or compression of the substrate during manufacturing (e.g., mounting a semiconductor die to the substrate), the fastener can be mechanically decoupled from the substrate, and the heat sink can be mechanically coupled to the substrate at the point where the fastener was mechanically coupled to the substrate during manufacturing.

[0254] Some embodiments provide an apparatus (e.g., 1000) comprising:

[0255] (A) A substrate (e.g., 1004) defined in a plane extending in a first direction (e.g., x-direction) and a second direction (e.g., y-direction) that are substantially orthogonal to each other, the substrate including a first point (e.g., 1001a) and a second point (e.g., 1001b) configured to be mechanically coupled to a fastener (e.g., 1005) during the manufacture of the device.

[0256] (B) A plurality of semiconductor dies (e.g., 1032) mounted on a substrate and each having a first antenna array (e.g., Figure 14A (1439 in the text), which includes a first plurality of antennas (e.g., Figure 14B 1486 in the middle); and the first circuit system (e.g., Figure 14B 1480 in the middle), which is coupled to the first plurality of antennas; and

[0257] (C) A heat sink (e.g., 1009) is mechanically coupled to the substrate at a first point and a second point.

[0258] In some embodiments, the first point is configured to receive the first fastener (e.g., Figure 10B 1006a) of the above) mechanically couples the substrate to the fastener during manufacturing; the second point is configured to receive a second fastener (e.g., Figure 10B 1006a) of the above) mechanically couples the substrate to the fastener during manufacturing; and the device includes a first fastener that mechanically couples the heat sink to the substrate at a first point and a second fastener that mechanically couples the heat sink to the substrate at a second point (e.g., Figure 10C ).

[0259] In some embodiments, a plurality of semiconductor dies are arranged in a second direction between a first point and a second point.

[0260] In some embodiments, the substrate includes a first edge (e.g., 1007a) and a second edge (e.g., 1007b) opposite to the first edge in a second direction; a first point is within a threshold distance of the first edge; and a second point is within a threshold distance of the second edge.

[0261] In some embodiments, the plurality of semiconductor dies include a first row of semiconductor dies mounted on a substrate and laid flat in a second direction, the first row of semiconductor dies having a first length (e.g., L1) in the first direction and a second length (e.g., L2) in the second direction, the second length being at least ten times the first length.

[0262] Figure 10AThis is a side view of a cross-section of an example device 1000 that may be included in system 10 according to some embodiments of the technology described herein. The example device 1000 has a substrate 1004 on which a semiconductor bare die 1032 is mounted and a fastener 1005 for assembling the device 1000. Figure 10B This is a top view of a device 1000 mechanically coupled to a fixture 1005 according to some embodiments of the technology described herein, further illustrating a transmitter 1020 of the device 1000.

[0263] In some embodiments, device 1000 may be as described herein with respect to device 400 (including combination) Figures 4A to 4B Configure as described above. For example, as... Figure 10B As shown, substrate 1004 can be defined in a first direction that is substantially orthogonal to each other (e.g., Figure 10B (y-direction) and second direction (e.g., Figure 10B A plane extending in the x-direction of the plane.

[0264] In some embodiments, a first semiconductor die may be mounted on a substrate 1004, on which a first antenna array is integrated. The first antenna array includes a first plurality of antennas and a first circuit system coupled to the first plurality of antennas. For example, in Figures 10A to 10B In this diagram, a receiving semiconductor die 1032 is shown mounted on a substrate 1004. In some embodiments, the receiving semiconductor die 1032 may be as described herein with respect to a receiving semiconductor die 1432 (including those combined with...). Figures 14A to 14B The configuration may include, for example, a receiving antenna array (e.g., 1439) comprising a plurality of receiving antennas (e.g., 1486) and a receiving circuitry system (e.g., 1480) coupled to the plurality of antennas.

[0265] In some embodiments, the device 1000 may include a first row of semiconductor dies mounted on a substrate, the first row of semiconductor dies being laid flat in a second direction and including semiconductor dies spaced apart from each other in the second direction. For example, as Figure 10BAs shown, device 1000 includes a first row of receiving semiconductor dies 1032 laid out in the x-direction, wherein some of the receiving semiconductor dies 1032 are spaced apart from each other in the x-direction. In some embodiments, each receiving semiconductor die 1032 in the first row may include a plurality of receiving antennas (e.g., 1486) and a receiving circuitry system (e.g., 1480) coupled to a second plurality of antennas. In some embodiments, each receiving semiconductor die 1032 may include a wafer-level chip-scale package (WLCSP), such as a thin dielectric (e.g., polyimide) layer supporting the die (e.g., around a bottom redistribution layer). For example, the WLCSP can limit displacement and / or deformation of the receiving semiconductor dies 1032 due to thermal expansion and / or compression (e.g., of substrate 1004) within the operating temperature range of device 1000 (e.g., -40°C to 85°C).

[0266] In some embodiments, the first row of semiconductor bare dies may have a first length in a first direction and a second length in a second direction. For example, Figure 10B The row of receiving semiconductor dies 1032 shown has a first length L1 in the y-direction and a second length L2 in the x-direction. In some embodiments, the second length L2 may be at least five times, at least seven times, at least ten times, and / or at least twenty times the first length L1. The inventors have recognized that long arrays, such as those having a second length of at least 10 times and / or at least 20 times the first length, may be particularly susceptible to thermal expansion of the substrate during assembly, but other array configurations may be used. In some embodiments, the first row of semiconductor dies may include at least 10 receiving semiconductor dies 1032, wherein the center-to-center spacing of the semiconductor dies in the x-direction is at least as long as the individual semiconductor dies in the y-direction of the row. In the illustrated embodiment, the first row of semiconductor dies has 26 receiving semiconductor dies, but other numbers of receiving semiconductor dies may be included. Although in Figure 10B The diagram shows a single row for receiving semiconductor bare dies, but it should be understood that multiple rows may be included in other embodiments.

[0267] like Figure 10B As shown, the apparatus 1000 also includes transmitting semiconductor dies 1022a and 1022b, which can be transmitted as described herein with respect to transmitting semiconductor dies 422a and 422b (including those combined with...). Figures 4A to 4B The configuration is as described herein. In some embodiments, the first semiconductor die may alternatively or additionally be configured to transmit the semiconductor die, such as herein with respect to transmitting semiconductor die 1122 (including in conjunction with...). Figures 11A to 11B As described above. For example, the first column 421 may have a first length in the x-direction and a second length in the y-direction, the second length being at least ten times the first length (e.g., in...). Figure 10B(As shown in the configuration for receiving the semiconductor bare die 1032).

[0268] Although Figure 10B Although not explicitly labeled, in some embodiments, apparatus 1000 may further include a signal generation circuitry system mounted on a substrate and coupled to each of the semiconductor dies in the first row of semiconductor dies. Example signal generation circuitry systems that may be included in apparatus 1000 have been described above (including in conjunction with...) Figure 4A It is described below (including in conjunction with) Figure 14A Further description.

[0269] In some embodiments, during the manufacture of the device 1000, the fastener 1005 may be mechanically coupled to the substrate 1004 to limit the thermal expansion of the substrate 1004. For example, as Figure 10B As shown, the device 1000 includes a first fastener 1006a and a second fastener 1006b that mechanically couple a fastener 1005 to a substrate 1004. In the illustrated example, the first fastener 1006a and the second fastener 1006b are shown as screws, but other fasteners, such as nails, nuts and bolts, clamps, clips, pins and / or straps, may be used instead of screws or in addition to screws.

[0270] In some embodiments, during the manufacture of the device 1000, the first fastener 1006a and the second fastener 1006b may be positioned within a threshold distance of the respective edges of the substrate 1004. For example, as Figure 10B As shown, substrate 1004 includes a first edge 1007a and a second edge 1007b opposite to the first edge 1007a in the x-direction, wherein a first fastener 1006a is positioned close to the first edge 1007a, and a second fastener 1006b is positioned close to the second edge 1007b. For example, the threshold distance can be small enough that the fastener 1007 can limit bending of substrate 1004 due to thermal expansion. In the illustrated embodiment, no circuitry (e.g., semiconductor die) is located between the first fastener 1006a and the first edge 1007a or between the second fastener 1006b and the second edge 1007b. Figure 10B As further shown, alternative or additional fasteners (not labeled) can mechanically couple the fastener 1005 to the substrate 1004, the fasteners being spaced apart from each other in the x-direction along the outer periphery of the substrate 1004 to further limit the thermal expansion of the substrate 1004, etc.

[0271] In some embodiments, the retainer 1005 may be mechanically coupled to the substrate 1004 after at least some semiconductor dies (e.g., 1032) have been mounted to the substrate 1004 and before the substrate 1004 has been heated as part of a soldering process. For example, the retainer 1005 may be mechanically coupled to the substrate 1004 after at least some receiving semiconductor dies 1032 have been mounted and before at least some sending semiconductor dies 1022a have been mounted.

[0272] In some embodiments, substrate 1004 may include a first material having a first coefficient of thermal expansion, and fastener 1005 may include a second material having a second coefficient of thermal expansion lower than the first coefficient of thermal expansion. For example, substrate 1004 may include glass fiber, such as when substrate 1004 includes a printed circuit board, and / or fastener 1005 may include a nickel-iron alloy. For example, the first coefficient of thermal expansion of substrate 1004 is between 10 ppm / ℃ and 20 ppm / ℃, such as 16 ppm / ℃, while the second coefficient of thermal expansion of fastener 1005 may be less than 5 ppm / ℃, less than 2 ppm / ℃, between 1.2 ppm / ℃ and 5 ppm / ℃, and / or between 1.2 ppm / ℃ and 2 ppm / ℃.

[0273] In some embodiments, the receiving semiconductor die 1032 may include a third material having a third coefficient of thermal expansion that is lower than the first coefficient of thermal expansion of the substrate 1004, such as a semiconductor material having a coefficient of thermal expansion between 1.2 ppm / °C and 5 ppm / °C (e.g., 3 ppm / °C).

[0274] In some embodiments, the device 1000 may be manufactured at least in part by: mounting a first plurality of semiconductor dies on a substrate 1004; mechanically coupling a retainer 1005 to the substrate 1004 after mounting the first plurality of semiconductor dies on the substrate 1004; and mounting a second plurality of semiconductor dies on the substrate after mechanically coupling the retainer 1005 to the substrate 1004. For example, the first plurality of semiconductor dies may include receiving semiconductor dies 1032, each receiving semiconductor die 1032 including a receiving antenna array and a receiving circuit system, as described above. Alternatively or additionally, the second plurality of semiconductor dies may include transmitting semiconductor dies 1022a, such as including a transmitting antenna array (e.g., ...). Figure 11A 1132 in the middle) and the transmitting circuit system coupled to the transmitting antenna array (e.g., Figure 11B (e.g., 1160 in the middle).

[0275] In some embodiments, mounting the first plurality of semiconductor dies on the substrate 1004 may include laying a first row of semiconductor dies on the substrate 1004 in a second direction. For example, receiving the semiconductor dies 1032 may be... Figure 10B The semiconductor dies are laid flat on the substrate 1004 in the x-direction. In some embodiments, mounting a second plurality of semiconductor dies on the substrate may include laying a first column of semiconductor dies flat on the substrate 1004 in the first direction. For example, sending semiconductor dies 1022a may be done in... Figure 10B The substrate 1004 in the first column 1021 is laid flat in the y direction.

[0276] In some embodiments, mechanically coupling the fastener 1005 to the substrate 1004 may include fastening the fastener 1005 to the substrate 1004 at a first point within a threshold distance of the first edge 1007a and a second point within a threshold distance of the second edge 1007b, such as using a first fastener 1006a and a second fastener 1006b.

[0277] In some embodiments, the manufacturing apparatus 1000 may further include: underfilling a first plurality of semiconductor dies after mechanically coupling the fastener 1005 to the substrate 1004. For example, mounting the first plurality of semiconductor dies on the substrate 1004 may include using a ball grid array (BGA) to mount a receiving semiconductor die 1032, etc. In some embodiments, mounting a second plurality of semiconductor dies on the substrate 1004 may include wire bonding the second plurality of semiconductor dies to the substrate 1004, such as for sending semiconductor dies 1022a, etc. It should be understood that in some embodiments, the receiving semiconductor die may be wire-bonded and / or the sending semiconductor die may alternatively or additionally be mounted by a BGA.

[0278] In some embodiments, the manufacture of the device 1000 may further include: assembling a signal generation circuit system (e.g., Figure 11A 1110 in Figure 14A 1410) is mounted on substrate 1004 and the signal generation circuit system is coupled to a first plurality of semiconductor dies and a second plurality of semiconductor dies to receive semiconductor die 1032 and / or transmit semiconductor die 1022a, etc.

[0279] In some embodiments, at least some surface mount components may be mounted to the substrate 1004 before the receiving semiconductor die 1032 is mounted to the substrate 1004. In some embodiments, a lens 1008 may be mounted on the receiving semiconductor die 1032 and / or the transmitting semiconductor die 1022a after the receiving semiconductor die 1032 is attached to the substrate 1004 and / or after the transmitting semiconductor die 1022a is attached to the substrate 1004. In some embodiments, the lens 1008 may be omitted.

[0280] It should be understood that the semiconductor die 1022b can be configured as described herein with respect to the semiconductor die 1022a, such as... Figure 10B The image is shown tiled in the transmitter column (Tx column) 1021, etc.

[0281] Figure 10C This is a top view of an apparatus 1000 according to some embodiments of the technology described herein, wherein the fastener 1005 is removed and replaced by a heat sink 1009.

[0282] In some embodiments, the substrate 1004 may include a first point and a second point configured to be mechanically coupled to a fastener during the manufacture of the device 1000. For example, as described above... Figure 10B The first point 1001a and the second point 1001b can be configured to be mechanically coupled to the fixture 1005 during manufacturing (e.g., after at least some receiving semiconductor dies 1032 are installed and before at least some sending semiconductor dies 1022a are installed). For example, as... Figure 10B As shown, the first point 1001a can be configured to receive the first fastener 1006a to mechanically couple the substrate 1004 to the fastener 1005 during manufacturing, and the second point 1001b can be configured to receive the second fastener 1006a to mechanically couple the substrate 1004 to the fastener 1005 during manufacturing.

[0283] In some embodiments, the heat sink 1009 of the device 1000 can be mechanically coupled to the substrate 1004 at a first point 1004a and a second point 1004b. For example, as Figure 10CAs shown, a first fastener 1006a can mechanically couple the heat sink 1009 to the substrate 1004 at a first point 1001a, and a second fastener 1006b can mechanically couple the heat sink 1009 to the substrate 1004 at a second point 1001b. For example, a retainer 1005 can be mechanically decoupled from the substrate 1004 and replaced with the heat sink 1009 (e.g., by removing fasteners 1006a and 1006b). In some embodiments, the heat sink 1009 can be fastened to the substrate 1004 at the same points 1001a and 1001b using the same type of fasteners 1006a and 1006b, respectively, wherein the retainer 1005 is... Figure 10B The image shows it being fastened to substrate 1004. For example, Figure 10B The screws shown as fasteners 1006a and 1006b can be with Figure 10C The screws shown as fasteners 1006a and 1006b are of the same size. For example, the exact same fasteners used for mechanical coupling to fastener 1005 can be used for mechanical coupling to radiator 1009, and / or the fasteners can be replaced with the same type of fasteners (e.g., screws can be replaced with screws of the same size).

[0284] In some embodiments, the heat sink 1009 may be as described herein with respect to the heat sink 307 (including the combination of Figure 3 Configure as described above.

[0285] Figure 10D This is a bottom view of an apparatus 1000 that further illustrates some embodiments of the technology described herein, including an interface circuit system 1050. In some embodiments, the interface circuit system 1050 may be as described herein with respect to an interface circuit system 450 (including those combined with...). Figure 4A Configure as described above. For example, as... Figure 10D As shown, the interface circuitry 1050 includes an AFE / ADC unit 1052 mounted on a substrate 1004. In the illustrated embodiment, the interface circuitry 1050 may be communicatively coupled to the receiver 1030 via traces within the substrate 1004. Although the illustrated embodiment shows the interface circuitry 1050 on the side of the substrate 1004 opposite to the receiver 1030, it should be understood that the interface circuitry 1050 and the receiver 1030 may be on the same side of the substrate and / or on separate substrates, as the embodiments described herein are not limited thereto.

[0286] Although Figures 10A to 10D The processing circuitry is not shown, but it should be understood that the processing circuitry (e.g., 440) may be mounted on substrate 1004 or on another substrate, as the embodiments described herein are not limited thereto.

[0287] transmitter architecture

[0288] As stated above, the inventors have developed techniques to mitigate the effects of atmospheric attenuation in order to enable radar ranging at terahertz frequencies for detecting targets at large distances relative to the radar device. The inventors have recognized that atmospheric attenuation can be mitigated, at least in part, by increasing the aperture size of the transmitter without having to add more transmitting elements to the transmitter.

[0289] In some embodiments, RF antennas can be arranged in a two-dimensional array on the transmitting semiconductor die. While a two-dimensional array results in a loss of elevation resolution compared to a one-dimensional array with the same number of elements, it offers several important benefits. Chip layout can be simplified because, in some embodiments, distributing a reference RF signal to two mirrored rows of elements (e.g., from opposite edges of the die) is easier than distributing it to a single row with the same total number of elements. For example, as a result of arranging 32 RF antennas in two columns and 16 rows on a single transmitting semiconductor die, instead of splitting the reference RF signal into 32 parts from one edge of the chip, the reference RF signal can enter the two opposite edges of the die and only needs to be split into 16 parts on each side of the die, which is easier than splitting a single signal into 32 parts. Furthermore, a two-dimensional array can have a larger aperture size than a one-dimensional array with the same number of elements, resulting in greater transmitter gain. For example, a 16×2 array can transmit the same amount of power as a 32×1 array, but the larger aperture size of the 16×2 array increases the overall transmitter gain and achieves a greater distance relative to the transmitter for the same link budget.

[0290] In some embodiments, the device (e.g., Figure 11A 1100 in the diagram includes a substrate (e.g., 1104) defining planes extending in a first and second direction (e.g., y and x) that are substantially orthogonal to each other. In some embodiments, the device further includes a transmitter (e.g., 1120) mounted on the substrate, the transmitter including a first transmitting semiconductor die (e.g., 1122) and a first transmitting antenna array (e.g., 1132), on which a first transmitting circuitry (e.g., ...) is integrated. Figure 11B 1160 in the first transmitting antenna array is configured to generate a first RF signal based on a reference RF signal. This first transmitting antenna array includes a plurality of RF antennas (e.g., 1170) configured to transmit the first RF signal and having a first aperture having a first length extending in a first direction (e.g., y) and a first width extending in a second direction (e.g., x), the first length being greater than the first width. In some embodiments, the plurality of RF antennas are arranged in a two-dimensional grid and have mirror symmetry across a line extending in the first direction (e.g., y) (e.g., 1102).

[0291] In some embodiments, the device further includes: a receiver mounted on a substrate (e.g., Figure 4A (430 in the middle), the receiver includes a first receiving semiconductor bare die (e.g., Figure 14A 1432), wherein the first receiving semiconductor die integrates: a first receiving antenna array (e.g., 1439), which includes a plurality of RF antennas (e.g., RF antennas) configured to receive a second RF signal. Figure 14B 1486) and having a second slit having a second length extending in a first direction (e.g., y) and a second width extending in a second direction (e.g., x), the second length being less than the second width; and a first receiving circuit system (e.g., Figure 14B (1480 in the first receiving antenna array), which is configured to obtain a second RF signal via a plurality of RF antennas of the first receiving antenna array.

[0292] Figure 11A This is a schematic diagram of a substrate 1104 of an example device 1100 having a transmitter 1120 that may be included in system 10 according to some embodiments of the technology described herein.

[0293] In some embodiments, device 1100 may be as described herein with respect to device 400 and / or 500 (including combinations thereof). Figures 4A to 5 Configure as described above. For example, as... Figure 11A As shown, the device 1100 includes a substrate 1104 on which a signal generation circuit system 1110 and a transmitter 1120 are mounted.

[0294] In some embodiments, transmitter 1120 may have a transmitting semiconductor die on which a transmitting circuitry system (1160) configured to generate an RF signal based on a reference RF signal is integrated. Figure 11B ), and a transmitting antenna array having an RF antenna configured to transmit RF signals. For example, such as Figure 11A As shown, transmitter 1120 has a transmitting semiconductor die 1122, which has a plurality of transmitting elements 1124 and a transmitting antenna array 1132. For example, each transmitting element 1124 may be part of a transmitting circuitry system configured to feed a corresponding transmitting antenna of the transmitting antenna array 1132.

[0295] In some embodiments, the RF transmitting antenna array may have a transmitting slot having a transmitting slot length extending in a first direction and a transmitting slot width extending in a second direction, wherein the transmitting slot length is greater than the transmitting slot width. For example, such as Figure 11AAs shown, antenna array 1132 has more antennas in the y-direction than in the x-direction, which can provide a larger transmission aperture length in the y-direction than the transmission aperture width in the x-direction.

[0296] In some embodiments, the transmitting semiconductor die 1122 may have an RF transmitting antenna array arranged in a two-dimensional grid. For example, as Figure 11A As shown, the transmit antenna array 1132 is arranged in a first column 1106a and a second column 1106 extending in a first direction (e.g., the y-direction), wherein each column has a plurality of rows extending in a second direction (e.g., the x-direction). In some embodiments, the RF transmit circuitry mounted on the transmit semiconductor die 1122 may be further arranged in a two-dimensional grid. For example, the transmit circuitry of the transmit element 1124 may be arranged in a first transmit circuitry portion in the first column 1106a configured to feed the antennas in the first column 1106a, and in a second transmit circuitry portion in the second column 1106b configured to feed the antennas in the second column 1106b. For example, the first transmit circuitry portion may include... Figure 11A The transmitting circuit system of the transmitting element 1124 shown in the first column 1106a, and the second transmitting circuit system portion may include Figure 11A The transmitting circuit system of transmitting element 1124 shown in the second column 1106b. Figure 11A In the first column 1106a and the second column 1106b, there are 8 rows, but it should be understood that any number of rows may be included, such as two or more rows (e.g., more rows than columns).

[0297] In some embodiments, the semiconductor die 1122 may have components with mirror symmetry extending across a line in a first direction. For example, in Figure 11A In the transmission antenna array 1132, the first column 1106a and the second column 1106b are mirror images of each other across the line of symmetry 1102 separating the first column 1106a and the second column 1106b. For example, the antennas of the transmission antenna array 1132 in the first column 1106a may have mirror symmetry with the corresponding antennas of the transmission antenna array 1132 in the second column 1106b. In some embodiments, the first transmission circuit system portion and the second transmission circuit system portion may further be mirror images of each other across the line of symmetry 1102 separating the first column 1106a and the second column 1106b. For example, the first transmission circuit system portion (including the transmission circuit system in the first column 1106a configured to feed the antennas of the first column 1106a) may have mirror symmetry with the second transmission circuit system portion across the line of symmetry 1102, and the second transmission circuit system portion includes the transmission circuit system in the second column 1106b configured to feed the antennas of the second column 1106b.

[0298] In some embodiments, the transmitting semiconductor die 1122 may further include multiple interfaces configured to receive a reference RF signal from the signal generation circuit system 1110 and provide the reference RF signal to the transmitting element 1124. For example, in Figure 11A In the process, the transmitting semiconductor bare die 1122 has a first interface 1150a and a second interface 1150b, wherein the first interface 1150a is coupled between the signal generation circuit system 1110 and the transmitting element 1124 of the first column 1106a, and the second interface 1150b is coupled between the signal generation circuit system 1110 and the transmitting element 1124 of the second column 1106b.

[0299] In some embodiments, the first interface 1150a may be located within a threshold distance of the first outer edge of the transmitting semiconductor die 1122, and the second interface 1150b may be located within a threshold distance of the second outer edge of the transmitting semiconductor die 1122 opposite to the first outer edge. For example, as Figure 11A As shown, the transmitting semiconductor die 1122 has a first outer edge 1126a and a second outer edge 1126b opposite to the first outer edge 1126a (e.g., along the x-axis), and a first interface 1150a includes a first power divider 1154a arranged near the first outer edge 1126a, and a second interface 1150b includes a second power divider 1154b arranged near the second outer edge 1126b. In some embodiments, the first power divider 1154a may be located within a threshold distance of the first outer edge 1126a, and the second power divider 1154b may be located within a threshold distance of the second outer edge 1126b. For example, the threshold distance may be a distance relative to the outer edge of the die, wherein bonding pads are arranged for (e.g., via wire bonding) connection to the substrate 1104. It should be understood that the first power divider 1154a and the second power divider 1154b can be within the same threshold distance of their respective outer edges 1126a and 1126b, without necessarily being equally spaced from their respective outer edges 1126a and 1126b (for example, one power divider can be more closely spaced from its respective outer edge).

[0300] In some embodiments, the power divider of the transmitting semiconductor die 1122 can be configured to divide a reference RF signal from the signal generation circuit system 1110 into a plurality of reference RF signals, and provide these plurality of reference RF signals to the transmitting circuit system of the transmitting semiconductor die 1122 for feeding the antenna array 1132. For example, power divider 1154a can be configured (e.g., via bonding pads at the first outer edge 1126a) to receive the reference RF signal from the signal generation circuit system 1110, divide the reference RF signal into reference RF signals for each corresponding antenna of the first column 1106a, and provide the reference RF signals to the corresponding antennas of the first column 1106a. Similarly, power divider 1154b can be configured (e.g., via bonding pads at the second outer edge 1126b) to receive the reference RF signal from the signal generation circuit system 1110, divide the reference RF signal into reference RF signals for each corresponding antenna of the second column 1106b, and provide the reference RF signals to the corresponding antennas of the second column 1106b. For example, as Figure 11A As shown, the first column 1106a and the second column 1106b have 8 rows of transmitting elements 1124, and the power dividers 1154a and 1154b are each configured as 1 to 8 (1:8) power dividers.

[0301] In some embodiments, the transmitting circuitry system of the transmitting semiconductor die 1122 can be configured to propagate reference RF signals from the first interface 1150a and the second interface 1150b to corresponding first columns 1106a and second columns 1106b of the antenna array 1132 in opposite propagation directions. For example, in Figure 11A In the first column 1106a, the transmitting circuitry of the transmitting element 1124 can be configured to propagate a reference RF signal from the power divider 1154a in a first propagation direction (e.g., parallel to the x-direction) from the first outer edge 1126a to the antenna array 1132, and the transmitting circuitry of the transmitting element 1124 in the second column 1106b can be configured to propagate a reference RF signal from the power divider 1154b in a second propagation direction (e.g., parallel to the x-direction) from the second outer edge 1126b to the antenna array 1132. For example, in Figure 11A In the middle, the first outer edge 1126a and the second outer edge 1126b are opposite to each other along the x-axis, and the first propagation direction and the second propagation direction are opposite to each other along the x-axis.

[0302] Although Figure 11A The image shows a single transmitting semiconductor die 1122, but the device can have, for example, a single transmitting semiconductor die 1122. Figure 11A The plurality of transmitting semiconductor bare dies 1122 shown in the configuration are, for example, organized into, such as Figures 4A to 5One or more columns, etc., as shown. For example, the transmitting semiconductor die 1122 may be a first die (e.g., 422a), and the device 1100 may also include a second transmitting semiconductor die (e.g., 422b) configured as described herein with respect to die 1122, the transmitting semiconductor die 1122 and the second transmitting semiconductor die having mirror symmetry across symmetry line 1102. Alternatively or additionally, the device 1100 may also include a transmitting semiconductor die (e.g., 422c) configured as described herein with respect to die 1122, the die 1122 and the transmitting semiconductor die having mirror symmetry across another symmetry line (e.g., extending parallel to the y-axis).

[0303] Although Figure 11A The signal generation circuit system 1110 is shown on the same substrate 1104 as the transmitting semiconductor die 1124, but in some embodiments, the signal generation circuit system 1110 may be on a separate substrate.

[0304] In some embodiments, the device 1100 may further include a receiver (e.g., 430 and / or 530) having a receiving antenna array having a receiving aperture having a receiving aperture length extending in a first direction (e.g., the y direction) and a receiving aperture width extending in a second direction (e.g., the x direction), the receiving aperture length being less than the receiving aperture width, as described above and further herein.

[0305] Figure 11B This is a circuit diagram of the transmitting circuit system 1160 of a transmitter 1120 according to some embodiments of the technology described herein.

[0306] In some embodiments, interface 1150a may further include a frequency multiplier circuit system configured to upconvert a reference RF signal from signal generation circuit system 1110 to a transmission center frequency or closer to the transmission center frequency. For example, when signal generation circuit system 1110 and transmission semiconductor die 1122 are mounted on substrate 1104, the reference RF signal can propagate from signal generation circuit system 1110 to transmission semiconductor die 1122 using traces on substrate 1104 that may not have characteristics suitable for propagating signals at THz frequencies. Conversely, in some embodiments, the reference RF signal may propagate from signal generation circuit system 1110 to transmission semiconductor die 1122 at a relatively low center frequency (e.g., 17.22 GHz), and interface 1150a may have a frequency multiplier 1152a configured to upconvert the reference RF signal to a center frequency (e.g., 155 GHz) closer to the transmission center frequency (e.g., 310 GHz). In the illustrated embodiment, frequency multiplier 1164a is configured to provide an up-converted reference RF signal to power divider 1154a for distribution among transmitting elements 1124. For example, frequency multiplication of a signal with a high power level (e.g., before power distribution) may result in less noise.

[0307] In some embodiments, the transmitting semiconductor die 1122 may have a transmitting circuitry system 1160 configured to generate an RF signal based on a reference RF signal obtained from a signal generation circuitry system 1110, and to feed the RF signal to a transmitting antenna array 1132. For example, as Figure 11B As shown, the transmitting element 1124 includes an antenna 1170 of the transmitting antenna array 1132a, which is coupled to the phase shifter 1162, amplifier 1164, frequency multiplier 1166, and balanced power amplifier 1168 of the transmitting circuit system 1160.

[0308] In some embodiments, phase shifter 1162 may be configured to introduce beamforming phase shift into the RF signal transmitted by antenna 1170, such as phase shifters 1162 of some or all of the transmitting elements 1124 providing different phase shifts to guide the transmitted RF signal at specific angles (e.g., at elevation and / or azimuth). In some embodiments, amplifier 1164 may be configured to increase the power of the phase-shifted signal before frequency multiplier 1166 performs frequency multiplication, which may mitigate at least some noise from the frequency multiplication.

[0309] In some embodiments, the frequency multiplier 1166 can be configured to output an RF signal having the center frequency required for transmission via the antenna 1170. For example, in Figure 11BIn this configuration, the frequency can be multiplied by the frequency multiplier 1152a of interface 1150a to achieve the center frequency required for transmission, and can be multiplied by the frequency multiplier 1166. For example, the frequency can be multiplied by 9 (e.g., from 17.22 GHz to 155 GHz) by the frequency multiplier 1152a, and can be multiplied by 2 (e.g., frequency doubling) by the frequency multiplier 1166. For example, a larger multiplication factor can be performed with less noise impact on signals with higher power levels, such as multiplying the received reference RF signal by 9 at full power, and then multiplying it by 2 from several reference RF signals divided into smaller power levels.

[0310] In some embodiments, the balanced power amplifier 1168 can be configured to amplify the RF signal to a power level suitable for transmission via the antenna 1170. For example, the power level can be set based on a desired transmission range (e.g., object detection range) and a known attenuation at the center frequency of the transmitted RF signal. In some embodiments, a balanced power amplifier can be used when the antenna 1170 is fed with a balanced feed (e.g., for a balanced-fed dipole or patch), while an unbalanced power amplifier can be used when the antenna 1170 is fed with an unbalanced feed (e.g., for an unbalanced-fed dipole, patch, or monopole).

[0311] Although Figure 11B Not shown, but it should be understood that power divider 1154a can be coupled to the transmitting element 1124 of the first column 1106a, and power divider 1154b can be coupled to the transmitting element 1124 of the second column 1106b, and as described herein. Figure 11B The device 1100 shown is configured in part as described above (e.g., mirror image of that part).

[0312] Figure 12A This is a top view of an example transmitting semiconductor bare die 1222 that may be included in transmitter 1120, according to some embodiments of the technology described herein. Figure 12B This is an enlarged view of the transmitting circuit system 1260 of transmitting elements 1224a and 1224b according to some embodiments of the technology described herein.

[0313] In some embodiments, the semiconductor die 1222 can be configured as described herein with respect to the semiconductor die 1122. For example, as Figure 12A As shown, the transmitting semiconductor die 1222 includes transmitting elements 1224 and an antenna array 1232 arranged in a first column 1206a and a second column 1206b, the first column 1206a and the second column 1206b having mirror symmetry across the symmetry line 1202. Similarly, as... Figure 12AAs shown, the transmitting semiconductor die 1222 has a first interface 1250a at a first outer edge 1226a, the first interface 1250a including a frequency multiplier 1252a and a power divider 1254a and also including a bonding pad 1256a, and a second interface 1250b at a second outer edge 1226b, the second interface 1250b including a frequency multiplier 1252b and a power divider 1254b and also including a bonding pad 1256b. For example, in some embodiments, the bonding pads 1256a and 1256b can be wire-bonded to a substrate (e.g., 1104) such that the antenna array 1232 faces away from the substrate.

[0314] In some embodiments, transmitting element 1224 may be configured as described herein with respect to transmitting element 1124. For example, as Figures 12A to 12B As shown, each transmitting element 1224 includes an antenna 1270 of the antenna array 1232 and a transmitting circuit system 1260. The transmitting circuit system 1260 includes a phase shifter 1262, an amplifier 1264, a frequency multiplier 1266, and a balanced power amplifier (PA) 1268. Figures 12A to 12B In this configuration, antenna 1270 is set as a patch antenna with balanced feed, which may be advantageous for transmitting and receiving circularly polarized RF signals to mitigate the effects of raindrops on reception, but other antenna configurations (e.g., dipoles) can be used.

[0315] In some embodiments, the transmitting elements 1224 may be arranged as a pair of transmitting elements that are further mirror images of each other across a line extending orthogonally to the line of symmetry 1202. For example, in Figures 12A to 12B In the second column 1206b, a pair of transmitting elements 1224 are labeled as 1224a and 1224b, and in Figure 12B The diagram shows a mirror image of the symmetry line 1202' that separates transmitting elements 1224a and 1224b from each other. For example, the symmetry line 1202' may extend between rows of transmitting elements 1224. In some embodiments, such a pair of transmitting elements 1224a and 1224b may be configured to operate as a pair of transmitting channels. For example, arranging the transmitting channel pairs in a mirror configuration can further optimize the use of space on the transmitting semiconductor die.

[0316] Receiver architecture

[0317] As described above, the inventors have developed techniques for mitigating the effects of atmospheric attenuation to facilitate radar ranging at terahertz frequencies for detecting targets at large distances relative to the radar device. The inventors have recognized that atmospheric attenuation can be mitigated, at least in part, by using techniques that increase the sensitivity of the radar receiver. In some embodiments, the receiver can be made more sensitive by using a reflector coupled between the mixer and the amplifier and configured to reflect at least some of the RF energy generated by the mixer back into the mixer. For example, by reflecting RF energy back into the mixer (e.g., at a frequency different from the frequency of the mixed signal output by the mixer), RF energy that might otherwise be wasted can be converted into useful signal energy (e.g., within the mixed signal used for downstream processing), thereby improving the efficiency and gain of the mixer and resulting in increased sensitivity.

[0318] In some embodiments, the Radar device (e.g., Figure 14A 1400 in the document includes a substrate (e.g., 1404) and a receiver (e.g., 1430) mounted on the substrate. For example, the device, substrate, and receiver can be as described herein (including in combination with...). Figures 4A to 5 Configure as described above.

[0319] In some embodiments, the receiver may include a first receiving semiconductor die (e.g., 1432) on which a first RF antenna (e.g., RF antenna) configured to receive RF signals is integrated. Figure 14B The first receiving circuitry (e.g., 1486) and the first receiving circuitry (e.g., 1480) are described in some embodiments. In some embodiments, the first receiving circuitry may include a first mixer (e.g., 1484) coupled to a first RF antenna and configured to mix an RF signal obtained using the first RF antenna with a reference RF signal (e.g., from signal generation circuitry 1410) to output a first mixed signal. For example, the first RF antenna may be used to receive the RF signal, and a filter (e.g., 1504) coupled between the first RF antenna and the first mixer may be used to obtain the RF signal. Mixing the RF signal with the reference signal may result in the resulting first mixed signal having frequency components indicating the distance between the receiver and the target object.

[0320] In some embodiments, the first receiving circuitry may further include a first amplifier (e.g., 1488) coupled to the first mixer and configured to amplify a first mixed signal output from the first mixer. For example, the first mixed signal may be provided to a downstream processing circuitry (e.g., 1440) to determine the distance between the receiver and the target object.

[0321] In some embodiments, the first receiving circuitry may further include a first reflector coupled between the first mixer and the first amplifier. For example, the first reflector may be configured to reflect at least some of the RF energy generated by the first mixer back into the first mixer. For example, the first reflector may be configured to reflect at least some of the RF energy at the center frequency of the RF signal back into the mixer to recycle the energy within the first mixed signal, thereby improving the mixer's efficiency and gain, which results in higher sensitivity.

[0322] Figure 13 This is a top view of several example transmitters 1320 that may be included in device 400, according to some embodiments of the technology described herein.

[0323] In some embodiments, transmitter 1320 may be configured as described herein with respect to transmitter 1120. For example, as Figure 13 As shown, transmitter 1320 includes transmitting semiconductor dies 1322a, 1322b, and 1322c. Each transmitting semiconductor die includes a transmitting element 1324 and an antenna array 1332 arranged in a first column 1306a and a second column 1306b. The first column 1306a and the second column 1306b have mirror symmetry across a line of symmetry 1302. Figure 13 As shown, the transmitting semiconductor die 1322b has a first interface 1350a at a first outer edge 1326a, the first interface 1350a including a bonding pad 1356a, and a second interface 1350b at a second outer edge 1326b, the second interface 1350b including a bonding pad 1356b. In some embodiments, the transmitting element 1324 may be configured as described herein with respect to the transmitting element 1224, such as being arranged as a pair of transmitting elements that are further mirror-image of each other across lines extending orthogonally to the line of symmetry 1302. For example, in Figure 13 In the second column 1306b, a pair of transmitting elements 1324 of the transmitting semiconductor bare die 1322b are labeled 1324a and 1324b, and may be mirrored across a line of symmetry (e.g., 1202') separating the transmitting elements 1324a and 1324b from each other. In some embodiments, the transmitting circuitry of each transmitting element 1324a and 1324b may be as described herein with respect to transmitting circuitry 1260 (including the combination of...) Figure 12B Configure as described above.

[0324] Figure 14A This is a schematic diagram of a substrate 1404 of an example device 1400 having a receiver 1430, an interface circuit system 1450, and a processing circuit system 1440 that may be included in system 10 according to some embodiments of the technology described herein. Figure 14BThis is a circuit diagram of the receiving element 1438 of receiver 1430 according to some embodiments of the technology described herein.

[0325] In some embodiments, device 1400 may be as described herein with respect to devices 400 and / or 500 (including combinations thereof). Figures 4A to 5 Configure as described above. For example, as... Figure 14A As shown, the device 1400 includes a substrate 1404 on which a signal generation circuit system 1410, a receiver 1430, an interface circuit system 1450 and a processing circuit system 1440 are mounted.

[0326] In some embodiments, receiver 1430 may include a receiving semiconductor die having a receiving antenna array and a receiving circuitry system. For example, in Figure 14A In this embodiment, receiver 1430 includes a receiving semiconductor die 1432, which includes receiving elements 1438 and a receiving antenna array 1439. For example, each receiving element 1438 may include an antenna of the antenna array 1439 and a receiving circuitry system 1480 configured to feed the antenna (e.g., to receive RF signals via the antenna).

[0327] In some embodiments, the RF receiving antenna array may have a receiving aperture slot having a receiving aperture slot length extending in a first direction and a receiving aperture slot width extending in a second direction, wherein the receiving aperture slot length is smaller than the receiving aperture slot width. For example, such as Figure 14A As shown, the antenna array 1439 has more antennas in the x-direction than in the y-direction, which can provide a larger receiver slot length in the x-direction than the receiver slot width in the y-direction.

[0328] In some embodiments, receiver 1430 may be configured to obtain a reference RF signal from signal generation circuitry 1410. For example, such as Figure 14A As shown, the receiving semiconductor die 1432 also includes an input interface 1460 configured to receive a reference RF signal from the signal generation circuit system 1410. For example, the reference RF signal can propagate from the signal generation circuit system 1410 through traces on the substrate 1404 to the receiving semiconductor die 1432 and be provided to the bonding pads of the input interface 1460. Furthermore, as... Figure 14BAs further shown, interface 1460 includes a frequency multiplier 1462 and a power divider 1464, which in some embodiments can be configured as described herein for frequency multiplier 1252a and power divider 1254a, respectively, for transmitting semiconductor die 1222. For example, frequency multiplier 1454a can be configured to upconvert a reference RF signal to a higher center frequency (e.g., from 17.22 GHz to 155 GHz) for mixing with the received RF signal, and power divider 1452b can be configured to distribute the reference RF signal among a plurality of receiving elements 1438 to provide it to amplifier 1482. In some embodiments, frequency multiplier 1454a can be configured to upconvert the reference RF signal to a center frequency lower than the center frequency of the received RF signal, such as for mixing using a subharmonic mixer as described above. Although in Figure 14B Not shown in the text, but it should be understood that, as this article refers to... Figure 14B As described in part of the device 1400 shown, the power divider 1452a can be coupled to the receiving element 1438 that receives the bare semiconductor die 1432.

[0329] In some embodiments, the receiving circuitry 1480 may be configured to mix an RF signal received via the antenna array 1439 with a reference RF signal. For example, as... Figure 14B As shown, the receiving element 1438 includes an antenna 1486 of the antenna array 1439 and a portion of the receiving circuitry system 1480, which includes a first amplifier 1482, a mixer 1484 coupled to the antenna 1486, and a second amplifier 1488 coupled to the mixer 1484. In some embodiments, the first amplifier 1482 may be configured to receive a reference RF signal and provide it to the mixer 1484, as described further below. In some embodiments, the mixer 1484 may be configured to mix the RF signal received via the antenna 1486 with the reference RF signal received via the first amplifier 1482 to output a mixed signal. In some embodiments, the second amplifier 1488 may be configured to amplify the mixed signal and provide it to the output interface 1470 of the receiving semiconductor die 1432 (e.g., for offloading via the interface circuitry system 1450).

[0330] In some embodiments, mixer 1484 may be configured to output a mixed signal having a center frequency indicating the distance between device 1400 and a target object, wherein antenna 1486 receives a received RF signal from the target object. For example, the received RF signal and the reference RF signal may be LFM signals, which, during mixing, produce a mixed signal having a center frequency indicating the time delay between the transmission of the RF signal (e.g., based on the reference RF signal) and the reception of the received RF signal, such as that described herein (including in conjunction with...). Figures 6C to 6DAs described above. In some embodiments, mixer 1484 may be configured as a subharmonic mixer. For example, the reference RF signal obtained via amplifier 1482 may have a harmonic having a center frequency of the RF signal obtained via antenna 1486, and mixer 1484 may be configured to mix the RF signal obtained via antenna 1486 with the harmonic of the reference RF signal. For example, mixer 1484 may be configured as a second harmonic mixer, which is configured to mix the second harmonic of the reference RF signal (e.g., with a center frequency of 155 GHz) with the RF signal obtained via antenna 1486 (e.g., with a center frequency of 310 GHz), but other subharmonics, such as even integer harmonics, may be used.

[0331] In some embodiments, the receiving circuitry 1480 may further include a reflector coupled between the mixer and the amplifier and configured to reflect at least some of the RF energy generated by the mixer back into the mixer. For example, as Figure 14B As shown, the receiving element 1438 also includes a reflector 1490 coupled between the mixer 1484 and the amplifier 1488. In some embodiments, the reflector 1490 may be included for each antenna 1486 of the antenna array 1439, such as between the mixer 1484 and the amplifier 1488 of each receiving element 1438 receiving the semiconductor die 1432.

[0332] In some embodiments, including a reflector 1490 in the receiving element 1438 can improve the gain and / or efficiency of the receiver 1430. For example, a mixer 1484 can be configured to receive an RF signal having a first center frequency (e.g., 310 GHz) via an antenna 1486 and output a mixed signal having a second center frequency (e.g., 3 GHz) to an amplifier 1488, which can cause at least some RF energy at the first center frequency to leave the mixer 1484 towards the amplifier 1488. For example, the RF energy may include voltage and / or current waves having the first center frequency. In some embodiments, the reflector 1490 can be configured to reflect at least the RF energy (of the RF signal received via the antenna 1486) at the first center frequency back into the mixer 1484. For example, reflecting the RF energy at the first center frequency back into mixer 1484 can recycle at least some of the RF energy at the first center frequency into the RF energy in the mixed signal output by mixer 1484, thereby increasing the gain and / or efficiency (e.g., output power versus input power) of mixer 1484. In some embodiments, the increase in the gain and / or efficiency of the mixer can thereby increase the receiver's sensitivity to low-power RF signals (e.g., attenuation due to reception from a more distant source).

[0333] In some embodiments, the interface circuit system 1450 may include an AFE and / or ADC circuit system mounted on a substrate 1404 and configured to receive a mixed signal via a receiver 1430 (e.g., an amplifier 1488). For example, the interface circuit system 1450 may include an AFE and / or ADC circuit system integrated on a receiving semiconductor die 1432, such as an AFE circuit system coupled to an amplifier 1488 on the die. Alternatively or additionally, the AFE and / or ADC circuit system may be on one or more individual dies (such as a mixed-signal ASIC) and / or within an integrated circuit package having at least a portion of the processing circuit system 1440.

[0334] Although Figure 14A The image shows a single receiving semiconductor die 1432, but the device can have, for example, a single receiving semiconductor die 1432. Figure 14A The plurality of receiving semiconductor dies 1432 shown in the configuration are, for example, organized into, such as Figures 4A to 5 One or more rows of the like are shown. For example, the receiving semiconductor die 1432 may be a first die (e.g., 432a), and the device 1400 may also include a second receiving semiconductor die (e.g., 432b) configured as described herein with respect to die 1432 and arranged in a row along the x-direction with the first die.

[0335] Although Figure 14A The signal generation circuit system 1410 is shown on the same substrate 1404 as the receiving semiconductor die 1432, but in some embodiments, the signal generation circuit system 1410 may be on a separate substrate.

[0336] In some embodiments, the device 1400 may further include a transmitter (e.g., 420 and / or 520) mounted on the substrate 1404 and configured to receive a reference RF signal from the signal generation circuitry system 1410, generate an RF signal using the reference RF signal (e.g., by up-converting and distributing the reference RF signal), and feed the RF signal to a plurality of RF transmitting antennas. In some embodiments, the transmitter may have a transmitting antenna array having a transmitting aperture having a transmitting aperture length extending in a first direction (e.g., the y-direction) and a transmitting aperture width extending in a second direction (e.g., the x-direction), wherein the transmitting aperture length is greater than the transmitting aperture width, as described above.

[0337] Figure 15A This is a circuit diagram of an example common-mode receiving element 1500a having a reflector 1510a, according to some embodiments of the technology described herein.

[0338] In some embodiments, receiving element 1500a may be as described herein with respect to receiving element 1438 (including combination) Figures 14A to 14B Configure as described above. For example, as... Figure 15A As shown, the receiving element 1500a includes (e.g., a receiving antenna array) an antenna 1502 and a receiving circuit system including a mixer 1506, a reflector 1510, and an amplifier 1508. For example, as... Figure 15A As shown, mixer 1506 can be configured to receive LO signal 1520 for mixing with RF signal obtained via antenna 1502, LO signal 1520 being based on reference RF signal.

[0339] In some embodiments, mixer 1506 may be configured to receive RF signals via antenna 1502, the RF signals being based on RF signals received by antenna 1502. For example, as Figure 15A As shown, the receiving circuit system of receiving element 1500a also includes a filter 1504 coupled between antenna 1502 and mixer 1506. For example, antenna 1502 may be configured to provide a received RF signal as an input to filter 1504, and mixer 1506 may be configured to obtain an RF signal via antenna 1502 as an output from filter 1504. In some embodiments, filter 1504 may be configured as a high-pass and / or band-pass filter having a passband that includes a center frequency (e.g., 310 GHz) and a band (e.g., 307-313 GHz) for the received RF signal.

[0340] In some embodiments, the receiving element 1500a can be configured as a common-mode receiving element. For example, in Figure 15A In this configuration, antenna 1502 can be configured to provide filter 1504 with a common-mode signal defined by the received RF signal relative to the ground. For example, antenna 1502 can be fed by a signal feed terminal and a ground feed terminal, wherein the ground feed terminal is coupled to the ground plane of the receiving semiconductor die.

[0341] Figure 15B This is a circuit diagram of an example differential mode receiving element 1500b having reflectors 1510a and 1510b according to some embodiments of the technology described herein.

[0342] In some embodiments, receiving element 1500b may be configured as described herein with respect to receiving element 1500a. For example, as Figure 15B As shown, the receiving element 1500b includes an antenna 1502, and also includes filters 1504a and 1504b, mixers 1506a and 1506b, reflectors 1510a and 1510b, and amplifiers 1508a and 1508b. Figure 15BAs shown, mixer 1506a is coupled between filter 1504a and amplifier 1508a, mixer 1506b is coupled between filter 1504b and amplifier 1508b, reflector 1510a is coupled between mixer 1506a and amplifier 1508a, and reflector 15010b is coupled between mixer 1506b and amplifier 1508b. In some embodiments, reflector 1510a may be configured to reflect at least some of the RF energy generated by mixer 1506a back into mixer 1506a, and reflector 1510b may be configured to reflect at least some of the RF energy generated by mixer 1506b back into mixer 1506b.

[0343] In some embodiments, the receiving element 1500b can be configured as a differential-mode receiving element. For example, in Figure 15B In this configuration, antenna 1502 can be configured to provide differential-mode signals to filters 1504a and 1504b, the differential-mode signals being defined by a first differential component provided to filter 1504a and a second differential component provided to filter 1504b. For example, in Figure 15B In this configuration, antenna 1502 may be fed by a pair of differential signal feed terminals, wherein each differential signal feed terminal is separate from and defined relative to the ground plane of the receiving semiconductor die. In some embodiments, mixer 1506a may be configured to mix a first differential component from filter 1504a with LO signal 1520 to output a first mixed signal, and mixer 1506b may be configured to mix a second differential component from filter 1504b with LO signal 1520 to output a second mixed signal. For example, the first mixed signal and the second mixed signal may define a differential mixed signal. In some embodiments, amplifier 1508a may be configured to amplify the first mixed signal output by mixer 1506a, and amplifier 1508b may be configured to amplify the second mixed signal output by mixer 1506b.

[0344] Figure 15C This is a circuit diagram of an example common-mode receiver 1500c having a differential mixer 1506' and a reflector 1510, according to some embodiments of the technology described herein.

[0345] In some embodiments, receiving element 1500c may be configured as described herein with respect to receiving element 1500a. For example, as Figure 15C As shown, the receiving element 1500c includes an antenna 1502, a filter 1504, a mixer 1506', an amplifier 1508, and a reflector 1510.

[0346] In some embodiments, mixer 1506' can be configured as a differential mixer. For example, as... Figure 15C As shown, mixer 1506' can be configured to receive an LO signal defined by differential components 1520a and 1520b. In some embodiments, mixer 1506' can be configured to mix differential component 1520a with an RF signal received via antenna 1502 to generate a first mixed signal component, mix differential component 1520b with an RF signal to generate a second mixed signal component, and combine the first and second mixed signal components to generate a mixed signal for amplification via amplifier 1508.

[0347] Figure 15D This is a circuit diagram of an example differential mode receiving element 1500d having differential mixers 1506a' and 1506b' and reflectors 1510a and 1510b, according to some embodiments of the technology described herein.

[0348] In some embodiments, receiving element 1500d may be configured as described herein with respect to receiving elements 1500b and 1500c. For example, as Figure 15D As shown, the receiving element 1500d includes an antenna 1502, filters 1502a and 1502b, mixers 1506a' and 1506b', amplifiers 1508a and 1508b, and reflectors 1510a and 1510b. In some embodiments, the receiving element 1500d may be configured as a differential-mode receiving element, such as those described herein with respect to receiving element 1500b.

[0349] In some embodiments, mixers 1506a' and 1506b' may be configured as differential mixers, such as those described herein with respect to mixer 1506'. For example, as Figure 15D As shown, mixers 1506a' and 1506b' can each be configured to receive an LO signal defined by a first component 1520a and a second differential component 1520b. For example, mixer 1506a' can be configured to mix the first differential component of the RF signal received via antenna 1502 with the differential components 1520a and 1520b of the LO signal to generate a first mixed signal and a second mixed signal, respectively, and combine the first and second mixed signals to generate a third mixed signal. Similarly, mixer 1506b' can be configured to mix the second differential component of the RF signal with the differential components 1520a and 1520b of the LO signal to generate a fourth mixed signal and a fifth mixed signal, respectively, and combine the fourth and fifth mixed signals to generate a sixth mixed signal. For example, the third and sixth mixed signals can define a differential mixed signal.

[0350] Figure 16This is a circuit diagram of an example differential receiver element 1600 having differential mixers 1606a and 1606b, current reflectors 1610a and 1610b, and transimpedance amplifiers (TIA) 1608a and 1608b, according to some embodiments of the technology described herein.

[0351] In some embodiments, receiving element 1600 may be configured as described herein with respect to receiving element 1500d. For example, as Figure 16 As shown, the receiving element 1600 includes an antenna 1602, filters 1604a and 1604b, mixers 1606a and 1606b, amplifiers 1608a and 1608b, and reflectors 1610a and 1610b. For example, mixers 1606a and 1606b can be configured as differential mixers, each configured to receive an LO signal defined by a first differential component 1620a and a second differential component 1620b. In the illustrated embodiment, filters 1604a and 1604b include transmit line inductors with an inductance L, providing a high-pass filter with a cutoff frequency lower than the center frequency and band of the received RF signal (e.g., below 307 GHz).

[0352] In some embodiments, the receiving element 1600 can be configured as a current-mode receiving element. For example, mixers 1606a and 1606b can be configured to output a mixed signal as a current signal, and amplifiers 1608a and 1608b can be configured as TIAs. For example, in Figure 16 In this configuration, amplifiers 1608a and 1608b each include a common-gate amplifier and a bias resistor, which can be configured to convert current signals output from mixers 1606a and 1606b into voltage signals for output to an output interface (e.g., 1470).

[0353] In some embodiments, reflectors 1610a and 1610b can be configured as current reflectors. For example, as... Figure 16 As shown, mixers 1606a and 1606b can be configured to generate a current wave having a center frequency (e.g., 310 GHz) of the RF signal received via antenna 1602, and current reflectors can be configured to reflect the current wave back to the respective mixers 1606a and 1606b. In some embodiments, reflectors 1610a and 1610b may include a transmission line stub. For example, as... Figure 16As shown, each reflector 1610a and 1610b includes a transmit line stub having a length that is one-quarter the wavelength of the RF signal received by the RF antenna 1602 at the center frequency. In some embodiments, the transmit line stub may be formed using open-circuit or short-circuit microstrips (e.g., fabricated on a receiving semiconductor die), but other types of transmit line stubs may be used.

[0354] It should be understood that although the receiving element 1600 is in Figure 16 The image is shown as a differential current-mode receiver element with a differential mixer, but the current-mode receiver element may alternatively or additionally be implemented as a common-mode receiver element (e.g., 1500a and / or 1500c) and / or implemented with one or more single-ended mixers (e.g., 1500a and / or 1500b).

[0355] Figure 17 This is a top view of an example receiving semiconductor die 1700 that may be included in receiver 1430, according to some embodiments of the technology described herein. Figure 18A This is a top view of a receiving element 1800 of a receiving semiconductor die 1700 according to some embodiments of the technology described herein. Figure 18B This is an enlarged top view of a portion of a receiving element 1800 according to some embodiments of the technology described herein.

[0356] In some embodiments, the receiving semiconductor die 1700 may be configured as described herein with respect to the receiving semiconductor die 1432. For example, as Figure 17 As shown, the receiving semiconductor die 1700 includes: an input interface 1760, which includes a frequency multiplier 1762 and a power divider 1764; an antenna array 1739; and a receiving element 1800, which includes a receiving circuit system configured to feed a respective antenna of the antenna array 1739. For example, as Figure 18A As shown, each antenna 1802 of the antenna array 1739 is configured as a dipole antenna with dipole arms 1803a and 1803b.

[0357] In some embodiments, each receiving element 1800 may be configured as described herein with respect to receiving element 1600. For example, as Figures 18A to 18B As shown, each receiving element 1800 includes a corresponding antenna 1802 of the antenna array 1739 and a receiving circuit system, which includes an amplifier 1882, filters 1804a and 1804b, a mixer (1806a only), an amplifier (1808a only), and reflectors 1810a and 1810b. Figure 18AAs shown, each receiving element 1800 can be configured to receive the LO signal defined by differential components 1820a and 1820b, and each amplifier (e.g., 1808a) is configured to output a mixing signal along a corresponding output line in output line 1872, which can be coupled to the output line 1772 of output interface 1770.

[0358] In some embodiments, the output interface 1770 may be configured to offload the output mixed signal to an interface circuit system (not shown), such as via traces on the receiving semiconductor die 1700 when components of the interface circuit system are integrated on the die 1700, and / or via bonding pads when components of the interface circuit system are located outside the die 1700.

[0359] Although antenna 1802 is Figures 18A to 18B The antenna shown is a dipole antenna, but it should be understood that other types of antennas, such as patch antennas, can be used.

[0360] Figure 19 This is a top view of an alternative example antenna array 1900 that may be included in a receiving semiconductor die 1700, according to some embodiments of the technology described herein. For example, in some embodiments, the receiving semiconductor die 1700 may include an antenna comprising one or more patches, such as those that can be configured to receive circularly polarized RF signals.

[0361] In some embodiments, the antenna array 1900 may have RF antennas comprising two or more patches coupled in series with each other. For example, such as Figure 19 As shown, antenna array 1900 includes antennas 1902, each antenna including a first patch 1904a and a second patch 1904b coupled to the first patch 1904a. In some embodiments, the coupling between the first patch 1904a and the second patch 1904b can provide a larger antenna aperture for higher radiation efficiency compared to the case where only the first patch 1904a or the second patch 1904b is included in antenna 1902. For example, the first patch 1904a and the second patch 1904b can each be sized to resonate at the center frequency of the RF signal received by the RF antenna, and the first patch 1904a and the second patch 1904b can be configured to be electrically coupled to each other to collectively contribute to the aperture of antenna 1902. In some embodiments, patches 1904a and 1904b can be configured as microstrip patches above a ground plane, these microstrip patches being coupled to each other via microstrip transmit lines.

[0362] In some embodiments, for each specific RF antenna in the receiving antenna array, the receiving circuitry (e.g., 1480) may be coupled to one of two or more patches of the specific RF antenna. For example, as Figure 19 As shown, the first patch 1904a is coupled to the feed line 1910, which may have a port coupled to a receiver circuitry system integrated on the receiver semiconductor die. In some embodiments, the receiver circuitry system may be coupled to only one patch of the antenna 1902. For example, as Figure 19 As shown, patch 1904b is coupled to feed line 1910 only via first patch 1904a. For example, RF signals can reach patch 1904b from the receiving circuitry system only via patch 1904a. In some embodiments, the receiving circuitry system is coupled to fewer patches than the antenna (e.g., Figure 19 Only one of patches 1904a and 1904b can use less received power compared to having the receiving circuitry coupled to each patch, while still benefiting from the improved radiation efficiency of including multiple patches coupled to each other in the antenna. In some embodiments, feed line 1910 can be configured as a microstrip transmit line.

[0363] In some embodiments, the patches of antenna 1902 may be spaced apart from each other in the same direction and spaced apart from the receiving circuitry system. For example, as Figure 19 As shown, patch 1904a is spaced apart from feed line 1910 in the y direction, and patch 1904b is spaced apart from patch 1904b in the y direction.

[0364] In some embodiments, the antenna 1902 may further include a through-hole disposed around the patch of the antenna 1902. For example, as Figure 19 As shown, a first via 1906a is disposed around a first patch 1904a, and a second via 1906b is disposed around a second patch 1904b. In some embodiments, the vias around the patches of the antenna 1902 can be configured to limit surface wave interaction with the receiving semiconductor die from the received RF signal. For example, the first via 1906a and the second via 1906b can be positioned relative to each other to block unwanted surface wave modes in the semiconductor die. In some embodiments, an antenna including patches and vias disposed around the patches can be implemented without a lens while mitigating the effects of surface waves in the semiconductor die; however, it should be understood that a lens may be optional in any of the embodiments described herein.

[0365] Although antenna 1902 is Figure 19The diagram shows two patches for each antenna 1902, but it should be understood that more than two patches may be included for each antenna, such as two, three, or four patches for each antenna (e.g., fewer than all patches (e.g., only one patch) are coupled to the receiving circuitry system). In some embodiments that include more than two patches, some or all of the patches of the antenna may be spaced apart from each other in the same direction.

[0366] Figure 20 This is a top view of an example antenna array 2000 that may be included in a receiving semiconductor die 1700, according to some embodiments of the technology described herein.

[0367] In some embodiments, antenna array 2000 may be configured as described herein with respect to antenna array 1900. For example, as Figure 20 As shown, antenna array 2000 includes RF antenna 2002, which includes two or more patches coupled in series with each other. In the illustrated embodiment, RF antenna 2002 includes a first patch 2004a and a second patch 2004b coupled in series with the first patch 2004a. As described herein with respect to antenna array 1900, RF antenna 2002 may be coupled to a receiving circuitry system (e.g., 1480), not shown. For example, as described herein (including in conjunction with antenna array 1900), for each particular RF antenna in RF antenna 2002, the receiving circuitry system may be coupled to one of the patches 2004a and 2004b of that particular RF antenna in RF antenna 2002.

[0368] In some embodiments, the RF antenna 2002 may include patches coupled in series with different geometries. For example, such as Figure 20 As shown, the second patch 2004b has a different geometry than the first patch 2004a. In the illustrated embodiment, the first patch 2004a has a differential feed line 2010a, and the second patch 2004b has a single-ended feed line 2010b. In some embodiments, the differential feed line 2010a of the first patch 2004a can be configured to receive an RF signal from a receiving circuitry (e.g., 1480), and the single-ended feed line 2010b of the second patch 2004b can be configured to receive an RF signal via the first patch 2004a.

[0369] Figure 21 This is a top view of yet another alternative example antenna array 2100 that may be included in a receiving semiconductor die 1700, according to some embodiments of the technology described herein.

[0370] In some embodiments, antenna array 2100 may be configured as described herein with respect to antenna array 2000, such as including antennas 2102, each antenna 2102 including a first patch 2104a and a second patch 2104b having a different geometry than the first patch 2104a. For example, in Figure 21 In the first patch 2104a, there is a differential feed line 2110a, and the second patch 2104b has a single-ended feed line 2110b.

[0371] like Figure 21 As further illustrated, each antenna 2102 also includes a third patch 2104c series-coupled to the second patch 2104b. In the illustrated embodiment, the third patch 2104c has the same geometry as the second patch 2104b, such as having a single-ended feed line 2110c. In the illustrated embodiment, each antenna 2102 also includes a fourth patch 2104d series-coupled to the third patch 2104c and having a single-ended feed line 2110d. It should be understood that antennas 2002 and / or 2102 may include any number of series-coupled patches.

[0372] Antenna array configuration and manufacturing

[0373] As described above, in some embodiments, multiple semiconductor dies having RF antenna arrays thereon can be spaced apart adjacent to each other to maintain a half-wavelength spacing between antennas located on different semiconductor dies. The inventors have recognized that the half-wavelength spacing can be used to achieve Nyquist spatial sampling, which facilitates the elimination of aliasing effects, such as grating lobes.

[0374] In some embodiments, the device (e.g., Figure 22 2200 in the middle) includes a substrate (e.g., Figures 14A to 14B 1400 in the middle) and receivers mounted on the substrate (e.g., Figure 22 (e.g., 2204). For example, the receiver may be mounted on an interposer (e.g., 2202), wherein the interposer is mounted on a substrate.

[0375] In some embodiments, the receiver includes a first semiconductor die (e.g., Figure 22 (2210 in the text), the first semiconductor die has integrated a first plurality of RF antennas (e.g., ) configured to receive a first RF signal having a first RF center frequency. Figure 22 (2211 in the text), the first plurality of RF antennas includes a first RF antenna (e.g., Figure 22 (2212 in the original text). In some embodiments, the receiver further includes a second semiconductor die (e.g., 2212 in the original text). Figure 22 (2220 in the text), the second semiconductor die integrates a second plurality of RF antennas (e.g., ) configured to receive a second RF signal having a first RF center frequency. Figure 22 (e.g., 2221) The second plurality of RF antennas includes a second RF antenna (e.g., 2222). For example, the first plurality of RF antennas and the second plurality of RF antennas may be configured as RF antenna arrays on respective first and second semiconductor dies operating at the same frequency.

[0376] In some embodiments, a first semiconductor die and a second semiconductor die are disposed in the receiver such that the center-to-center distance between the first RF antenna and the second RF antenna is (e.g., ...). Figure 22 The distance D in the first RF center frequency is less than or equal to half the free space wavelength at the first RF center frequency (e.g., within 10% of half the free space wavelength at the first RF center frequency). For example, the first and second antennas may be located close to the outer edges of the first and second semiconductor dies (e.g., 2216, 2226), respectively, wherein the first and second antennas are spaced apart from their respective outer edges, and the outer edges are spaced apart from each other, so as to allow for a center-to-center spacing of half the wavelength or less of the antennas. It should be understood that the center-to-center distance (e.g., Figure 22 The D in the figure can be slightly above half the wavelength, such as within 10% of half the wavelength, within 7% of half the wavelength, and / or within 5% of half the wavelength, etc.

[0377] Figure 22 This is a schematic diagram of an example receiver 2204 mounted on an intermediary layer 2202 of a device 2200 that may be included in system 10, according to some embodiments of the technology described herein.

[0378] In some embodiments, device 2200 may be configured as described herein with respect to devices 400 and / or 500. For example, device 2200 may include a substrate (e.g., 404 and / or 504) in which receiver 2204 is mounted. For example, as Figure 22 As shown, receiver 2204 is mounted on interposer 2202, which in turn can be mounted on substrate.

[0379] In some embodiments, receiver 2204 may include a plurality of semiconductor dies having respective plurality of RF antennas. For example, in Figure 22In this receiver 2204, the receiver 2204 includes a first semiconductor die 2210 with a first plurality of antennas 2211 integrated therein, wherein antenna 2212 is marked, and the receiver 2204 also includes a second semiconductor die 2220 with a second plurality of antennas 2221 integrated therein, wherein antenna 2222 is marked. For example, the first antenna 2211 of the first semiconductor die 2210 may be configured to form a first antenna array configured to receive RF signals, and the second antenna 2221 of the second semiconductor die 2220 may be configured to form a second antenna array. In some embodiments, the antennas 2221 of the first semiconductor die 2210 and the antennas 2222 of the second semiconductor die 2220 may be configured to transmit and / or receive RF signals having the same RF center frequency.

[0380] In some embodiments, the first semiconductor die 2210 and the second semiconductor die 2220 may be arranged in the receiver 2204 such that the center-to-center distance between the antennas 2212 and 2222 is less than or equal to half (e.g., within 10%) of the free-space wavelength at the RF center frequency of the RF signals transmitted and / or received by the antennas 2212 and 2222. For example, as... Figure 22 As shown, antennas 2212 and 2222 are arranged at a center-to-center distance D. In some embodiments, the center-to-center distance D may be equal to half the free-space wavelength at the RF center frequency of the RF signals transmitted and / or received by antennas 2212 and 2222. For example, a first antenna 2221 may be spaced from other first antennas 2221 by a center-to-center distance equal to half the free-space wavelength, and a second antenna 2222 may be spaced from other second antennas 2222 by a center-to-center distance equal to half the free-space wavelength, such that the antenna array formed by bare dies 2210 and 2220 can be at least partially configured for Nyquist space sampling.

[0381] Alternatively or additionally, in some embodiments, the center-to-center distance D between antennas 2212 and 2222 may be less than half the free-space wavelength at the RF center frequency of the RF signals transmitted and / or received by antennas 2212 and 2222. For example, the antennas of the first semiconductor die 2210 and the second semiconductor die 2220 may be spaced from other antennas of dies 2210 and 2220 by a center-to-center distance less than half the free-space wavelength, such that the antenna array formed by dies 2210 and 2220 can be at least partially configured for spatial oversampling. In some embodiments, the center of antennas 2212 and / or 2222 may be their respective phase centers.

[0382] In some embodiments, each antenna in the first antenna 2211 may be center-to-center spaced from its adjacent first antenna in the first antenna 2211 by a center-to-center distance D, and / or each antenna in the second antenna 2221 may be center-to-center spaced from its adjacent second antenna in the second antenna 2221 by a center-to-center distance D. In other embodiments, at least some of the antennas in antennas 2211 and / or 2222 may have different center-to-center distances.

[0383] In some embodiments, the antennas in the first antenna 2211 and the second antenna 2221, having a center-to-center distance less than half the free-space wavelength, can be arranged close to the outer edges of the respective bare crystals 2210 and 2220. For example, as Figure 22 As shown, antenna 2212 is located near the first outer edge 2214 of the first semiconductor die 2210, and antenna 2222 is located near the second outer edge 2224 of the second semiconductor die 2220. For example, no antenna and / or other components may be arranged between antenna 2212 and the first outer edge 2214, and no antenna and / or other components may be arranged between antenna 2222 and the second outer edge 2224.

[0384] In some embodiments, semiconductor dies 2210 and 2220 may have sealing rings located close to each other. For example, in some embodiments, the distance between the sealing rings of dies 2210 and 2220 may be between 50 and 70 micrometers. For example, outer edges 2214 and 2224 may be sealing rings of the respective dies 2210 and 2220. Alternatively or additionally, at least some semiconductor material (e.g., a kerf buffer region) may be present between the sealing rings and the outer edges 2214 and 2224. In some embodiments, the sealing rings may surround antennas 2211 and 2221 integrated on the respective dies 2210 and 2220.

[0385] In some embodiments, the outer edges of the bare dies 2210 and 2220 may be arranged close to each other in the receiver 2204. For example, as Figure 22 As shown, the first outer edge 2214 and the second outer edge 2224 are spaced apart by a distance B. According to various embodiments, the distance B can be between 25 and 100 micrometers, between 25 and 75 micrometers, between 25 and 50 micrometers, between 20 and 50 micrometers, and / or between 20 and 30 micrometers. In some embodiments, no components (e.g., those mounted on the interposer 2202) may be arranged between the first outer edge 2214 and the second outer edge 2224.

[0386] In some embodiments, the antennas of the first semiconductor die 2210 and the second semiconductor die 2220 may have outer edges arranged close to the respective edges of the dies 2210 and 2220. For example, as Figure 22 As shown, antenna 2212 has an outer edge 2216 spaced from the outer edge 2214 of bare crystal 2210 by a distance d, and antenna 2222 has an outer edge 2226 spaced from the outer edge 2224 of bare crystal 2220 by the same distance d. In other embodiments, outer edge 2226 may be spaced from outer edge 2224 by a distance different from d. According to various embodiments, distance d (and / or different distances between one of antennas 2212 and 2222 and the corresponding outer edges 2214, 2224) may be less than 50 micrometers, less than 30 micrometers, between 10 and 50 micrometers, between 10 and 30 micrometers, between 10 and 20 micrometers, and / or between 10 and 15 micrometers.

[0387] Although semiconductor dies 2210 and 2220 are described herein as part of receiver 2204, it should be understood that semiconductor dies 2210 and 2220 may alternatively or additionally be part of transmitter, as the techniques described herein are not limited thereto.

[0388] Figure 23 This is a top view of an example receiving semiconductor die 2300 that may be included in receiver 2204, according to some embodiments of the technology described herein.

[0389] In some embodiments, semiconductor die 2300 may be as described herein with respect to semiconductor dies 2210 and 2220 (including combinations thereof). Figure 22 Configure as described above. For example, as... Figure 23 As shown, the semiconductor die 2300 has an antenna array, which includes an antenna 2302 arranged near the outer edge 2304 of the die 2300.

[0390] In some embodiments, the semiconductor die 2300 may have a region disposed between the antenna of the antenna array and the outer edge of the die 2300 where no components are disposed. For example, in Figure 23 In this embodiment, the semiconductor die 2300 has bonding pads that can be configured as copper pillar bonding pads, and a region 2310 of the semiconductor die 2300 is disposed between the antenna 2302 and an outer edge 2304 where no bonding pads are disposed. Alternatively or additionally, in some embodiments, the antenna and / or electronics may not be disposed in region 2310. In some embodiments, forming a region 2310 without components (e.g., bonding pads) may permit the antenna 2302 to be disposed closer to the outer edge 2304 compared to a case where bonding pads are included in region 2310. Figure 23In the diagram, another region is shown at the outer edge of the die 2300 opposite to the outer edge 2304, but in some embodiments, only one outer edge of the die may have region 2310.

[0391] Figure 24 This is a top view of another example receiver 2400 mounted on an intermediary layer 2402, which may be included in the device 400 according to some embodiments of the technology described herein.

[0392] In some embodiments, receiver 2400 may be configured as described herein with respect to receiver 2204. For example, as Figure 24 As shown, the receiver 2400 includes a first semiconductor die 2410 and a second semiconductor die 2420. For example, in Figure 24 In the first semiconductor die 2410, an antenna 2412 is spaced d from the outer edge e of the semiconductor die 2410 and d from the outer edge 2414 of the semiconductor die 2410. Similarly, a second semiconductor die 2420 has an antenna 2422 spaced d from the outer edge e of the semiconductor die 2420 and d from the outer edge 2424 of the semiconductor die 2420. Figure 24 As shown, the center c of antenna 2412 and the center c of antenna 2422 are separated by a center-to-center distance D, just as the antennas of each semiconductor die 2410 and 2420 are spaced apart from the adjacent antennas of the corresponding semiconductor die 2410 and 2420. Figure 24 A sealing ring 2416 for a first semiconductor die 2410 spaced from its outer edge 2414 by a slit buffer of width k, and a sealing ring 2426 for a second semiconductor die 2420 spaced from its outer edge 2424 by a slit buffer of width k, are also shown. Although for ease of illustration, the slit buffer k is... Figure 24 The slit buffer k appears to be almost as large as the distance d, but the slit buffer k is typically much smaller than the distance d. For example, the distance between the outer edge e of antennas 2412 and 2422 and the corresponding sealing rings 2416 and 2426 can be between 5 and 25 micrometers.

[0393] In some embodiments, antennas 2412 and / or 2422 may be integrated on the respective semiconductor dies 2410 and / or 2420 such that their center c is located at a distance relative to the respective outer edges 2414 and / or 2424, less than one-quarter of the free-space wavelength at the RF center frequency at which antennas 2412 and / or 2422 are configured to transmit and / or receive. For example, as Figure 24As shown, the centers c of antennas 2412 and 2422 are spaced apart by a center-to-center distance D, which can be less than or equal to half the free-space wavelength (e.g., within 10% of it). When the outer edges of bare crystals 2410 and 2420 are in contact with each other, the distance from each antenna 2412, 2422 to the respective outer edge is thus less than one-quarter of the free-space wavelength or within 5% of one-quarter of the free-space wavelength (e.g., equal to one-quarter of the free-space wavelength), while there is at least some space between the outer edges of bare crystals 2410 and 2420 (e.g., ...). Figure 22 In the case of distance B), the distance from each antenna 2412, 2422 to the corresponding outer edge is less than one-quarter of the free space wavelength.

[0394] For example, such as Figure 24 As shown, antennas 2412 and 2422 are implemented as dipoles, such as quarter-wave dipoles. For example, each antenna 2412 and 2422 may have a pair of dipole arms shorter than or equal to one-eighth of the free-space wavelength (e.g., by utilizing the high dielectric constant of a semiconductor material near the dipole arms to enhance the electrical length). Each antenna 2412 and 2422 has a dipole arm shorter than or equal to one-eighth of the free-space wavelength terminating at the outer edge e of antennas 2412 and 2422.

[0395] Although antennas 2412 and 2422 are in Figure 24 The antenna shown is implemented as a dipole antenna, but it should be understood that other types of antennas, such as patch antennas, can be used.

[0396] Figure 25 This is a top view of a portion of an example receiving semiconductor die 2500, including a power divider 2501, which may be included in a receiver 2204 according to some embodiments of the technology described herein. In some embodiments, the power divider 2501 may be configured as a Gysel power divider employing a physical layout that efficiently utilizes the space on the receiving semiconductor die 2500.

[0397] Figure 26A This is a schematic diagram of an example semiconductor wafer 2600 according to some embodiments of the technology described herein, on which a plurality of antenna arrays 2610 are integrated, the plurality of antenna arrays 2610 being surrounded by respective sealing rings 2616 and separated from each other by slit regions 2618.

[0398] In some embodiments, semiconductor wafer 2600 can be diced into semiconductor dies (e.g., 2210). For example, semiconductor wafer 2600 can be obtained and diced into multiple semiconductor dies. For example, as... Figure 26AAs shown, the antenna array in antenna array 2610 can be integrated on each of the multiple semiconductor dies.

[0399] Figure 26B This is an enlarged schematic diagram of a portion of a semiconductor wafer 2600 according to some embodiments of the technology described herein, illustrating the location of a saw cut 2620a for dicing the semiconductor wafer 2600 into semiconductor bare dies. Figure 26C These are some embodiments of the technology described herein. Figure 26B The enlarged schematic diagram shown is of a portion of the semiconductor wafer 2600, illustrating another location of another saw cut 2620b from which the semiconductor wafer 2600 is cut into semiconductor dies.

[0400] In some embodiments, dicing semiconductor wafer 2600 into semiconductor dies may include sawing semiconductor material through a kerf region 2618 of the wafer 2600. For example, as Figure 26B As shown, a first sawing step can be applied using a saw blade 2620a within the width W of the sealing ring 2616 in the first column of the semiconductor wafer 2600. Furthermore, as... Figure 26C As shown, a second sawing step can be applied using a saw blade 2620b within the width W of the sealing ring 2616 in the second column of the semiconductor wafer 2600. According to various embodiments, the first and / or second sawing steps can remove at least 40 micrometers, 50 micrometers, and / or 60 micrometers from the kerf region 2618 around the sealing ring 2616 of some or all of the resulting semiconductor bare dies.

[0401] It should be understood that in some embodiments, the second sawing step may be omitted, such as when the saw blade 2620a is wide enough to leave a width W of semiconductor material outside the sealing rings 2616 of both the first and second columns of the semiconductor wafer 2600. It should also be understood that different widths of semiconductor material may be left outside the sealing rings 2616 of the respective columns of the semiconductor wafer 2600.

[0402] In some embodiments, the antennas of the antenna array 2610 may be arranged close to the sealing ring 2616 such that the first and / or second sawing steps are performed within close proximity to at least one antenna. For example, according to various embodiments, the first and / or second sawing steps may include sawing within 75 micrometers, 50 micrometers, and / or 30 micrometers of at least one antenna in some or all of the antenna arrays 2610 (e.g., in a column and / or a pair of adjacent columns of the semiconductor wafer 2600).

[0403] In some embodiments, there may be regions without bonding pads at the outer edge of the resulting semiconductor die (e.g., 2310).

[0404] Figure 27This is a schematic diagram of an example receiving a semiconductor die 2700 cut from a semiconductor wafer 2600 according to some embodiments of the technology described herein.

[0405] In some embodiments, the receiving semiconductor die 2700 can be diced from the semiconductor wafer 2600 to form an antenna array on which the semiconductor wafer 2600 is integrated. For example, as Figure 27 As shown, the receiving semiconductor die 2700 has one of an antenna array 2610 surrounded by a sealing ring 2616 spaced apart from the outer edge 2704 of the semiconductor die 2700. For example, during the dicing of the semiconductor wafer 2600 into semiconductor dies 2700, a sawing step (e.g., Figure 26B Semiconductor material can be removed from the slit region 2618, resulting in a remaining slit width k between the sealing ring 2616 and the outer edge 2704.

[0406] In some embodiments, in one or more semiconductor dies cut from semiconductor wafer 2600, the antennas of antenna array 2610 may be arranged close to the outer edge of the dies. For example, as Figure 27 As shown, antenna 2702 of antenna array 2610 has an outer edge 2706 at a distance d from the outer edge 2704 of semiconductor bare die 2700. For example, distance d may include the distance s from the outer edge 2706 of antenna 2702 to sealing ring 2616 plus slit width k. According to various embodiments, distance d may be between 10 and 50 micrometers, between 10 and 30 micrometers, between 10 and 20 micrometers, and / or between 10 and 15 micrometers.

[0407] The inventors have recognized that, in some applications, achieving a fully spatially sampled antenna array (e.g., Nyquist rate or higher) using an RF antenna array implemented on multiple semiconductor dies can be challenging. For example, the spacing between semiconductor dies and between at least some RF antennas (e.g., near the die edge) and the edge of the semiconductor die can be large, such that at least some antenna elements in the array are spaced apart from each other by more than half the free-space wavelength. Alternatively or additionally, in some embodiments, achieving a spatially undersampled antenna array can be advantageous due to cost and / or power savings from using fewer antenna elements and / or feeding fewer antenna elements. However, using a spatially undersampled antenna array can also lead to undesirable aliasing effects in distance measurements obtained using the antenna array, which may affect the accuracy and / or usability of the resulting measurements.

[0408] As a solution to mitigate aliasing effects in spatially undersampled antenna arrays, the inventors have developed spatial anti-aliasing techniques. In some embodiments, the spatial anti-aliasing techniques described herein can mitigate aliasing effects caused by spatial undersampling of an antenna array, wherein at least some antennas of the array are center-to-center spaced from adjacent antennas of the array by half a free-space wavelength or less, while at least some other antenna elements are center-to-center spaced from adjacent antenna elements by more than half a free-space wavelength. For example, such a technique may be useful in antenna arrays where multiple antennas are center-to-center spaced from adjacent antennas by half a free-space wavelength or less, while at least one antenna in the array is center-to-center spaced from at least one other antenna of the array by one free-space wavelength (e.g., the spacing between semiconductor dies due to half-wavelength spacing of the antenna).

[0409] In some embodiments, spatial anti-aliasing techniques may include generating a mixed signal content by a processing circuitry system (e.g., 440) and associating it with a spatial location between antenna pairs that are center-to-center spaced more than half a wavelength of free space. For example, the mixed signal content may be generated as an average of mixed signal content received from the antenna pair. For example, using such techniques can facilitate the processing of RF signals from spatially undersampled antenna arrays as if the antennas were present between the antenna pairs, thereby mitigating at least some of the aliasing caused by spatial undersampling.

[0410] Figure 28 This is a diagram illustrating an example of a spatial undersampling antenna array 2800 that may be included in a receiver 430, according to some embodiments of the technology described herein. Figure 28 The vertical axis shown represents the digital sampling of the time of the mixed signal output from the receiving circuitry system (e.g., 1480) coupled to the respective antenna of array 2800.

[0411] In some embodiments, the antenna array 2800 may be spatially undersampled. For example, the antenna array 2800 may have at least some antennas that are center-to-center spaced apart from each other by more than half a wavelength in free space. For example, as Figure 28 As shown, antenna pairs 2802 are arranged adjacent to each other (e.g., no antennas are arranged between antennas 2802), and are spaced apart from center to center by a distance D'. According to various embodiments, the distance D' can be between half and two free space wavelengths, such as between half and three-half of a free space wavelength, between half and one free space wavelength, and / or between half and one free space wavelength. For example, antennas 2802 can be arranged on individual semiconductor dies (e.g., close to the respective outer edges of dies that are close to each other), without any antennas arranged between dies.

[0412] In some embodiments, the antenna array 2800 may have at least some antennas spaced center-to-center from each other by half or less of a free-space wavelength. For example, such as Figure 28 As shown, the antenna array also has antenna pairs 2804 spaced center-to-center by a distance D (e.g., as described elsewhere herein). For example, antennas 2804 may be arranged on the same semiconductor die and / or on the same semiconductor die as one of antennas 2802. It should be understood that each antenna 2802 and / or 2804 may be arranged on its own semiconductor die and / or on the same semiconductor die, as the techniques described herein are not limited thereto.

[0413] In some embodiments, the spatial anti-aliasing technique of the processing circuitry (e.g., 440) can be configured to generate mixed signal content and associate it with the spatial location between antennas 2802. For example, as Figure 28 As shown, spatial location 2806 is located between antennas 2802, such as being equidistant from the center of antenna 2802. In some embodiments, the processing circuitry can be configured to generate a mixed signal content as an average of the mixed signal content received from antenna 2802. For example, the processing circuitry can be configured to receive (e.g., in a digital version) the mixed signal from a receiving circuitry (e.g., 1480) coupled to antenna 2802, and generate an average of the mixed signal, thereby processing (e.g., phase-shifting) the generated mixed signal as if it were received from an antenna located at spatial location 2806.

[0414] Figure 29A This is an example scenario 2900 of using device 400 to perform distance-lateral distance measurement according to some embodiments of the technology described herein. For example... Figure 29A As shown, the scene includes a vehicle 2912 and metal objects 2914 and 2916. In the illustrated example, metal objects 2914 and 2916 are tetrahedral in shape.

[0415] Figure 29B This is performed using a spatial Nyquist sampling antenna array according to some embodiments of the technology described herein. Figure 29A Example distance measurement for a scenario - lateral distance.

[0416] for Figure 29B The measurements were performed using an antenna array with Nyquist sampling, where each antenna in the array was center-to-center spaced from the other antennas by half a free-space wavelength. For example... Figure 29B As shown, metal objects 2914 and 2916 appear brighter than vehicle 2912 because metal has a higher reflectivity compared to the paint on the vehicle.

[0417] Figure 29C This is performed using a spatially undersampled antenna array according to some embodiments of the technology described herein. Figure 29A Example distance measurement for a scenario - lateral distance.

[0418] for Figure 29C The measurement uses an antenna array with spatial undersampling, where, except for the antenna pairs in the array being spaced apart from each other by a full free-space wavelength, each antenna in the array is spaced apart from the other antennas by half a free-space wavelength from center to center. For example... Figure 29C As shown, aliasing effects 2920 and 2922 are visible near metallic objects 2914 and 2916, respectively. For example, aliasing caused by spatial undersampling in the array results in the signal power reflected from metallic objects 2914 and 2916 repeating at an angle relative to the same distance from the objects. Aliasing is almost invisible near vehicle 2912 because the signal power repeating at an angle around the vehicle may be too low to generate influential noise in the measurement.

[0419] Figure 29D This is based on some embodiments of the technology described herein, using spatial undersampling antenna arrays and spatial anti-aliasing techniques. Figure 29A Example distance measurement for a scenario - lateral distance.

[0420] for Figure 29D In addition to using anti-aliasing techniques to generate measurements, the measurements also utilize... Figure 29C The same antenna array is used for the measurement. For an antenna pair spaced center-to-center with wavelengths in full free space, an additional mixed signal is generated having the average value of the mixed signal obtained from that antenna pair, and this additional mixed signal is phase-shifted and included in the measurement (e.g., in beamforming summation) as if it were received from antennas spaced between that antenna pair, such as in the case of implementing Nyquist sampling in an array. Figure 29D As shown, the aliasing effect 2924 is still visible near the metallic object 2914, but the power of the aliasing effect 2924 is lower than that of the metallic object 2914. Figure 29C Furthermore, the aliasing effect is barely visible near the metal object 2916 2926.

[0421] Power efficiency technology

[0422] The inventors recognize that a Radar device with multiple active components can consume significant power. For example, in the Radar device described herein, there are multiple power-consuming components, including a signal generation circuitry (e.g., for generating a reference RF signal), a transmitter (e.g., a transmission circuitry integrated on the transmit semiconductor die portion of the transmitter), a receiver (e.g., a receive circuitry integrated on the receive semiconductor die portion of the receiver), an ADC circuitry, a serial link coupling the ADC circuitry to a processing circuitry (e.g., an FPGA), and a processing circuitry (e.g., which performs Radar signal processing functions, examples of which include, but are not limited to, Fast Fourier Transform, formation of a distance-lateral distance image, and interpretation of Radar data for the various application examples described herein).

[0423] Among these components, the receiving circuitry, transmitting circuitry, and ADC circuitry can consume a significant amount of available power. The inventors recognized that it would be beneficial to conserve as much power as possible from these components to leave more power for the link budget (and ideally, to use it to extend the range of the device).

[0424] Therefore, in some embodiments, one or more components of the Radar device can operate in a lower power state (e.g., a power-off state) to conserve power resources. For example, such as Figure 30 As shown, during the RF signal transmission period t1-t2, various components can operate in a first operating state (e.g., drawing an appropriate amount of power to perform their designed functions), but can operate in a second operating state outside the t1-t2 period (e.g., in a low-power or power-off state). For example, as Figure 30 As shown, the signal generation circuitry (e.g., 410), the transmitting circuitry (e.g., 1160), the receiving circuitry (e.g., 1480), and the serial link (e.g., 3842) can operate in a first operating state (drawing an appropriate amount of power to perform their functions) during the time periods t1-t2 and t4-t5 (during which the RF signal is transmitted, received, digitized, and offloaded), and in a second operating state (e.g., a power-off state) between the time periods t1-t2 and t4-t5. In some embodiments, the ADC circuitry (e.g., (one or more) units 452a-452e) can also transition between the first and second operating states, although with suitable warm-up and cooling periods. The processing circuitry can operate for longer periods (e.g., during the time intervals t1-t3 and t4-t6) to provide sufficient time for various Radar signal processing (and subsequent) operations on the digitized data. However, as Figure 30As shown, even the processing circuitry (e.g., 440) within the time interval between pulse repetitions (in Figure 30 In the example, it also operates at a lower power (e.g., power outage) state during the t3-t4 period. Figure 30 A similar example is shown in the figure.

[0425] Therefore, some embodiments provide an apparatus comprising:

[0426] (A) Substrate (e.g., 404);

[0427] (B) A transmitter (e.g., 420) mounted on a substrate, the transmitter including a transmitting semiconductor die (e.g., 422a) on which are integrated: a transmitting antenna array (e.g., 1132) including a first plurality of transmitting RF antennas (e.g., 1170, 1270) configured to transmit a first RF signal; and a transmitting circuitry (e.g., 1160) configured to feed the plurality of RF antennas in the transmitting antenna array;

[0428] (C) A receiver (e.g., 430) mounted on a substrate, the receiver including a receiving semiconductor die (e.g., 432a) on which are integrated: a receiving antenna array (e.g., antenna 1486) including a second plurality of RF antennas configured to receive a second RF signal; and a receiving circuitry system (e.g., 1480) configured to process the RF signals received by the plurality of RF antennas to obtain a processed RF signal;

[0429] (D) An analog-to-digital converter (ADC) circuitry (e.g., 454) mounted on a substrate, the ADC circuitry being coupled to a receiving circuitry and configured to digitize the processed RF signal to obtain a digitized RF signal; and

[0430] (E) A processing circuit system (e.g., 440) configured to operate at least one of the transmitting circuit system, the receiving circuit system, and the ADC circuit system in the following operating states: (1) multiple time intervals (e.g., Figure 30 The first operating state in the t1-t2 and t4-t5 intervals shown, each of the multiple time intervals includes the time when a first plurality of RF antennas are operated to transmit a first RF signal and / or the time when a second plurality of RF antennas are operated to receive a second RF signal; and (2) the time outside the multiple time intervals (e.g., in Figure 30 The second operating state (during the time periods t2-t4 and / or t3-t4) is shown, wherein at least one of the transmitting circuit system, receiving circuit system and ADC circuit system operates in the second operating state using less power compared to operating in the first operating state.

[0431] In some embodiments, the processing circuitry is configured to operate the transmitting circuitry in a first operating state during multiple time intervals (e.g., t1-t2 and t4-t5) and in a second operating state outside of multiple time intervals (e.g., between t3-t4).

[0432] In some embodiments, the processing circuitry is configured to operate the receiving circuitry in a first operating state during multiple time intervals (e.g., t1-t2 and t4-t5) and in a second operating state outside of multiple time intervals (e.g., between t2-t4).

[0433] In some embodiments, the processing circuitry is configured to operate the ADC circuitry in a first operating state during multiple time intervals (e.g., t1-t3) and in a second operating state outside of multiple time intervals (e.g., between t3-t4).

[0434] In some embodiments, the processing circuitry operates at least one of the transmitting circuitry, receiving circuitry, and ADC circuitry in a second operating state by de-energizing at least one of the transmitting circuitry, receiving circuitry, and ADC circuitry.

[0435] In some embodiments, the ADC circuitry is integrated on the receiving semiconductor die (e.g., Figure 38E , Figures 39A to 39B In some embodiments, the ADC circuitry is mounted on a substrate. In some embodiments, the ADC circuitry is configured to communicate digitized RF signals to a processing circuitry using a standardized serial interface (e.g., JESD). In some embodiments, the processing circuitry is mounted on a substrate (e.g., 404).

[0436] In some embodiments, the processing circuitry is configured to operate at least one of the transmitting circuitry, the receiving circuitry, and the ADC circuitry in a second operating state between a first time interval (e.g., t1-t2) and a second time interval (e.g., t4-t5) in a plurality of time intervals.

[0437] In some embodiments, the ADC circuitry includes a plurality of ADC channels, the plurality of ADC channels including a first number (e.g., 13) of ADC channels; the receiver includes a plurality of receive channels, the plurality of receive channels including a second number (e.g., 32) of receive channels, which is larger than the first number of ADC channels; and the interface circuitry also includes a time-division multiplexer configured to interface between the second number of receive channels and the first number of ADC channels.

[0438] Figure 30 This is a timing diagram illustrating example states of components operable in device 400 according to some embodiments of the technology described herein. For example, as... Figure 30 As shown, the timing diagram illustrates the operation of the ADC circuitry (e.g., one or more AFE / ADC units 452a-452e), the transmitting circuitry (e.g., 1160), the receiving circuitry (e.g., 1480), the processing circuitry (e.g., 440), the signal generation circuitry (e.g., 410), and the serial link.

[0439] In some embodiments, Figure 30 The illustrated serial link can be configured to communicate digitized signals from receiver 430 to processing circuitry system 440. For example, the serial link can use a standardized serial interface, such as a JESD interface. In some embodiments, the serial link can be implemented using a communication circuitry system coupled to the ADC circuitry system and configured to transmit serial messages to processing circuitry system 440 via the link. For example, in some embodiments where the ADC circuitry system is integrated on a receiving semiconductor die (e.g., die 432), the communication circuitry system integrated on the receiving semiconductor die can be used to implement the serial link. Alternatively or additionally, in some embodiments where the ADC circuitry system is integrated on a separate semiconductor die (e.g., a mixed-signal ASIC), the communication circuitry system integrated on the separate semiconductor can be used to implement the serial link. It should also be understood that in some embodiments, the serial link can be omitted, such as when the ADC circuitry system and processing circuitry system 440 are integrated on the same semiconductor die (and / or within the same package).

[0440] In some embodiments, the processing circuitry system 440 of the device 400 may be configured to operate at least some components of the device 400 in multiple operating states. For example, such as Figure 30 As shown, the processing circuitry 440 can be configured to operate each of the transmitter 420, receiver 430, signal generation circuitry 410, and serial link in a first operating state during time intervals t1 to t2 and t4 to t5, and in a second operating state outside these time intervals. For example, in Figure 30 In the diagram, transmitter 420, receiver 430, signal generation circuit system 410, and serial link are shown operating in a second operating state between time intervals t1 to t2 and t4 to t5. Similarly, as... Figure 30 As shown, the processing circuitry 440 can be configured to operate the AFE / ADC units 452-452e in a first operating state during time intervals t1' to t2' and t4' to t5', and in a second operating state outside these intervals. For example, in Figure 30In this embodiment, AFE / ADC units 452a-452e are shown operating in a second operating state between time intervals t1' to t2' and t4' to t5'. In some embodiments, AFE / ADC units 452a-452e may operate in a first operating state between times t1' and t1 and / or between times t4' and t4 as part of a warm-up process before the arrival of the signal from receiver 430 for digitization. In some embodiments, AFE / ADC units 452a-452e may operate in a first operating state between times t2 and t2' and / or between times t5 and t5' as part of a cooling process after the signal from receiver 430 has been digitized.

[0441] Although Figure 30 The illustration shows that each of the transmitter 420, receiver 430, AFE / ADC units 452a-452e, signal generation circuitry 410, and serial link operates in a first operating state and a second operating state during the illustrated time interval. However, it should be understood that, according to embodiments, only some of the circuitry may be configured in this way. According to various embodiments, less than all of the transmitter 420, receiver 430, AFE / ADC units 452a-452e, signal generation circuitry 410, and serial link may operate in the first operating state and the second operating state. For example, in some embodiments, at least one, at least two, and / or all three of the transmitter 420, receiver 430, and AFE / ADC units 452a-452e may operate in the first operating state and the second operating state. For example, although the transmitter 420 and receiver 430 operate in... Figure 30 The two are shown to operate in the first and second operating states at the same time interval, but in some embodiments, they may operate in the first and second operating states at different time intervals.

[0442] In some embodiments, the time interval between the operation of transmitter 420, receiver 430, and / or AFE / ADC units 452a-452e in a first operating state may include the time during which the RF antenna of transmitter 420 is operated to transmit RF signals and / or the time during which the RF antenna of receiver 430 is operated to receive RF signals. For example, in Figure 30 In this context, time intervals t1 to t2, t4 to t5, t1' to t2', and / or t4' to t5' may each include the time when transmitter 420 is transmitting an RF signal and / or receiver 430 is receiving an RF signal in response to the reflection of the transmitted RF signal from the target object.

[0443] In some embodiments, the transmitting circuitry of transmitter 420 (e.g., frequency multipliers and / or amplifiers), the receiving circuitry of receiver 430 (e.g., frequency multipliers, mixers, and / or amplifiers), and / or the ADC circuitry of AFE / ADC units 452a-452e can operate differently depending on the operating state (e.g., using different amounts of power). For example, in some embodiments, the transmitting circuitry, receiving circuitry, and / or ADC circuitry can operate in a second operating state using less power compared to operating in a first operating state. For example, the transmitting circuitry, receiving circuitry, and / or ADC circuitry can be powered down in the second operating state.

[0444] Figure 31 This is a timing diagram illustrating alternative example states in which components of apparatus 400, according to some embodiments of the technology described herein, can operate on multiple frames.

[0445] In some embodiments, Figure 31 The example states shown can be as described in this article (including combinations thereof). Figure 30 The operation described above. For example, as... Figure 30 As shown, this timing diagram illustrates the operation of the ADC circuit system, the transmitting circuit system, and the processing circuit system. Figure 30 As further illustrated, the timing diagram illustrates (e.g., sent from the processing circuitry system to the transmitter) transmission trigger signals and (e.g., sent from the processing circuitry system to the receiver and / or ADC circuitry system) status control signals.

[0446] In some embodiments, the device 400 can operate in different operating states across multiple frames. For example, Figure 31 Showing frame 1 at time t trig_1 Starting at and at time t trig_2 The frame ends at (where frame 2 begins). For example, each frame can begin with a pulse that triggers the transmission signal, such as by the transmitting circuitry sending an RF signal. In the illustrated embodiment, each frame may include a period up to the end of transmission time t. tx_end1 The transmission. For example, within frame 1, the transmitting circuitry can transmit from time t... trig_1 Until the end time t of sending tx_end1 It operates in the first operating state and in the second operating state outside of that interval. Similarly, within frame 2, the transmitting circuitry can operate from time t... trig_2 Until the end time t of sending tx_end2 It operates in a first operating state (e.g., to transmit one or more RF signals) and operates in a second operating state outside of that interval (e.g., to save power).

[0447] In some embodiments, the ADC circuitry (e.g., and the receiver) may be in a first operating state that begins with the transmission of the RF signal and ends shortly after the transmission end time (e.g., the time allowed for the arrival of reflected signals from the maximum distance). For example, the processing circuitry may be configured to provide a state control signal to the ADC circuitry (e.g., and the receiver) to operate in the first operating state based on the state control signal. In some embodiments, the processing circuitry may enter the first operating state shortly after the receiver and / or the ADC circuitry enters the first operating state, for example, to receive digital samples of the received RF signal generated by the ADC circuitry.

[0448] Figure 32A These are examples of some embodiments based on the techniques described herein. Figure 4A The components of the device can be Figure 31 Timing diagram of example states of operations within frame 1.

[0449] In some embodiments, a radar device (e.g., 400) may be configured to transmit RF signals in multiple directions (e.g., in elevation) and / or receive RF signals in multiple directions (e.g., in azimuth) within a frame. For example, Figure 32A The timing diagram further illustrates the transmission direction status signals with different states within frame 1, each state controlling the transmitter to focus the transmission of RF signals in a corresponding direction (e.g., along the elevation axis). For example, as... Figure 32A As shown, the transmitted direction status signal has a time t trig_1 Until the end time t of the first transmission tx_end1a The first state, from the end time t of the first transmission tx_end1a Until the end time t of the second transmission tx_end1b The second state, and from the second transmission end time t tx_end1b By the end time t of the third transmission tx_end1c The third state. In some embodiments, during each exemplary state of the transmission direction state signal, the transmitter can be configured (e.g., in response to a pulse of the transmission trigger signal) to focus the transmission of the RF signal in different directions (e.g., at the elevation angle), such as by applying different phase shift modes to (one or more) the transmission antenna array. In some embodiments, the ADC circuitry can be in a first operating state at least shortly after each transmission trigger signal pulse.

[0450] Although Figure 32AAlthough not shown, it should be understood that multiple RF signals can be transmitted in each transmitting direction state, such as by operating the receiver in different receiving direction states (e.g., at the azimuth angle) by transmitting for each RF signal. For example, by scanning one axis (e.g., elevation angle) with transmitted RF signals and scanning another axis (e.g., azimuth angle) with received RF signals, each received RF signal can be determined (e.g., by a processing circuitry system) to have been reflected in a specific direction in two-dimensional space (e.g., from a target object) (e.g., the third-dimensional constraint on the position of the target object is obtained by a determined distance from the device to the object).

[0451] The inventors have further developed systems and methods for imaging target objects in multiple dimensions (which can be used in conjunction with any hardware implementation described herein). Some embodiments, for example, relate to systems and methods for imaging target objects in two dimensions (e.g., along the longitudinal axis and elevation axis or along the longitudinal axis and azimuth axis) or in three dimensions (along the longitudinal axis, elevation axis, and azimuth axis). Multidimensional images provide a more complete picture of the surrounding area compared to one-dimensional images.

[0452] The type of image described herein includes datasets that correlate the characteristics of reflected waves (e.g., amplitude, power, or phase) with space. A one-dimensional image, for example, may include a dataset that correlates the power of reflected waves with a longitudinal axis. Positions along the longitudinal axis correspond to values ​​representing the characteristics of the reflected wave. As another example, a two-dimensional image may include a dataset that correlates the power of reflected waves with both the longitudinal and azimuth axes (a distance-lateral distance image), or a dataset that correlates the power of reflected waves with both the longitudinal and elevation axes. Figure 32B An example of a range-lateral range image is depicted. Here, the y-axis represents the longitudinal direction, and the x-axis represents the azimuth direction. Both axes are discretized, thus forming a two-dimensional grid. Each element of the grid corresponds to a value representing the power of the reflected signal. Figure 32B The image includes two features, 3201 and 3202. Each feature indicates the presence of a target object at a specific location in space relative to the transmitter / receiver. As another example, the three-dimensional image may include a dataset relating the power of the reflected signal to the longitudinal axis, azimuth axis, and elevation axis. In some embodiments, imaging the object involves generating a dataset relating the characteristics of the reflected wave (e.g., the amplitude, power, or phase of the reflected wave) to one-dimensional, two-dimensional, or three-dimensional space.

[0453] Information about the elevation axis can be obtained using a sequence of pulses transmitted over time in different directions along the elevation axis. For example, within an imaging frame, several scans can be performed, each corresponding to a different slice relative to the elevation axis. Beamforming (e.g., using a phased array transmitter) can be used to obtain the transmission of pulses in the desired elevation direction. Each transmitted pulse can result in a return signal (e.g., received at each receiving element) indicating the distance traveled by the transmitted pulse. The return signal can be correlated with the elevation direction of the transmitted pulse relative to the elevation axis. The return signal can be further correlated with the longitudinal distance based on the center frequency of the return signal (e.g., using linear frequency modulation of the transmitted pulse). Two-dimensional range-lateral range images (e.g., along the longitudinal and elevation axes) or three-dimensional range-lateral range images (e.g., along the longitudinal, elevation, and azimuth axes) can be obtained. In some embodiments, a three-dimensional image can be obtained by performing a two-dimensional fast Fourier transform (FFT) on the returned signals received at multiple receiving elements into the spatial frequency domain, wherein a first dimension of the transform includes the center frequency of the returned signal (e.g., indicating longitudinal distance), and a second dimension of the transform includes the receiving element that received the returned signal.

[0454] Figures 32C to 32F Example operation of transmitter 3220 configured to transmit pulses in different elevation directions along the elevation axis using the corresponding beamforming mode is shown.

[0455] Figure 32C This is a diagram illustrating example operation of a transmitter 3220 according to a first transmit beamforming mode 3200a, based on some embodiments of the technology described herein.

[0456] like Figure 32C As shown, the transmit antenna elements 3222a, 3222b, and 3222c of transmitter 3220 transmit RF transmit signals to generate a transmit beam. In the illustrated embodiment, each transmit antenna element 3222a, 3222b, and 3222c transmits with different phase-shifted versions of the RF transmit signal, thereby obtaining a phase wavefront oriented in a non-zero elevation direction. For example, the phase shifter of transmitter 3220 can be configured to apply different phase shifts in response to a phase shift control signal (e.g., from a processing circuitry system). In the illustrated embodiment, when the phase wavefront is oriented in the angular direction of the elevation angle, transmission can be concentrated in that direction.

[0457] Figure 32D A diagram illustrating example operation of transmitter 3220 according to a second transmit beamforming mode 3200b, based on some embodiments of the technology described herein.

[0458] like Figure 32DAs shown, each of the transmitting antenna elements 3222a, 3222b, and 3222c transmits an RF transmission signal to generate a transmit beam with the same phase version of the RF transmission signal, thereby obtaining a phase wavefront oriented at a 0-degree elevation angle. For example, the phase shifter of transmitter 3220 can be configured to apply the same (and / or zero) phase shift in response to a phase shift control signal.

[0459] Figure 32E This is a diagram illustrating example operation of a transmitter 3220 according to a third transmit beamforming mode 3200c, based on some embodiments of the technology described herein.

[0460] like Figure 32E As shown, each transmitting antenna element 3222a, 3222b, and 3222c transmits an RF transmission signal to generate a transmission beam with different phase-shifted versions of the RF transmission signal, thereby obtaining a beam oriented in relation to... Figure 32C The phase wavefronts are shown in different non-zero elevation directions. For example, the phase shifters of transmitter 3220 can be configured to apply phase shifts to each other and to be different relative to phase shift mode 3200a in response to a phase shift control signal.

[0461] In some embodiments, the transmitter 3320 can be configured to be at a first time (e.g., in Figure 32A t in trig_1 and t txend_1a Between (the two time intervals), a first RF transmission signal is transmitted according to a first beamforming mode (e.g., 3200a), and at a second time interval after the first time interval (e.g., at...). Figure 32A t in ttxend_1a and t ttxend_1b The second RF transmission signal is transmitted according to a second beamforming mode (e.g., 3200b) between frames. For example, the first RF transmission signal and the second RF transmission signal can be transmitted in a frame (e.g., Figure 32A It was sent during frame 1).

[0462] In some embodiments, the processing circuitry of the apparatus may be configured to generate a range-lateral distance image using one or more RF received signals generated at least partially by reflections from a target object via a first RF transmitted signal and / or a second RF transmitted signal (e.g., where the first and second RF transmitted signals are transmitted during one frame). For example, a first two-dimensional range-lateral distance image (e.g., along the longitudinal and azimuth axes) may be obtained using a return signal generated at least partially by reflections of the first RF transmitted signal, and a second two-dimensional range-lateral distance image may be obtained using a return signal generated at least partially by reflections of the second RF transmitted signal. A three-dimensional range-lateral distance image (e.g., along the longitudinal, azimuth, and elevation axes) may be obtained by combining (e.g., superimposing) the first and second two-dimensional range-lateral distance images at their respective positions along the elevation axis into a three-dimensional image.

[0463] In some embodiments, a two-dimensional distance-lateral distance image can be obtained by inputting the return signal, which is at least partially generated by the reflection of a transmitted RF signal (e.g., beamforming), into a two-dimensional FFT. For example, a processing circuitry (e.g., 440) can be configured to obtain a digital representation of the return signal from a receiver (e.g., 430) (e.g., via interface circuitry 450) and input the digital representation into the two-dimensional FFT. In some embodiments, a first dimension of the two-dimensional FFT may include the center frequency of the return signal. For example, the return signal may be mixed to an intermediate frequency (IF) band (e.g., with a 5 MHz bandwidth), where the center frequency indicates the longitudinal distance traveled by the return signal. In some embodiments, a second dimension of the two-dimensional FFT may include the azimuth position of the receiving element that received the received signal. For example, the difference in longitudinal distance traveled by the azimuth position of the receiving element may indicate the azimuth direction of the received return signal.

[0464] In some embodiments, a Radar thresholding technique can be applied to the FFT output to identify peaks that indicate the azimuth direction and longitudinal distance of the received return signal. For example, a signal-to-noise ratio (SNR) threshold (e.g., 13.4 dB) can be used, and optionally, the SNR threshold can be adjusted based on the range of longitudinal distances indicating the highest return signal power to account for atmospheric attenuation (e.g., the threshold can be lowered if the return signal power is concentrated over long distances and / or raised if the return signal power is concentrated over short distances). In the same or another example, a first-order suppression technique can be applied (e.g., to suppress ground reflections where the transmitted pulse is not concentrated towards the ground). In some embodiments, synthetic received data can be generated and input into the FFT along with the data of the received return signal to simulate the presence of additional receiving elements used to augment the FFT. In some embodiments, calibration data (e.g., indicating the measured phase shift of each receiving element) can be used to adjust the return signal data before inputting it into the FFT (e.g., to account for the measured phase shift).

[0465] Figure 32F These are angular diagrams illustrating the transmission focus at the elevation angle for transmission beamforming modes 3200a, 3200b, and 3200c, respectively, according to some embodiments of the technology described herein.

[0466] In some embodiments, such as Figures 32C to 32E The beamforming modes shown can be used for angular transmission scanning over an angular field of view. For example, according to beamforming mode 3200a, transmitter 3220 can be configured to focus the transmission of a first RF transmission signal in a first angular direction, and according to beamforming mode 3200b, transmitter 3220 can be configured to focus the transmission of a second RF transmission signal in a second angular direction. For example, as... Figure 32F As shown, the angular directions of beamforming modes 3200a, 3200b and 3200c are different in the elevation-longitude plane, wherein beamforming modes 3200a and 3200c are above and below 0 degrees in elevation along the longitudinal axis, respectively, and beamforming mode 3200b is at 0 degrees in elevation along the longitudinal axis.

[0467] In some embodiments, the TX beamforming mode may be selected by the processing circuitry system for scanning during a frame (e.g., frame 1), such as in the above-described combination. Figure 32A The above, etc. It should be understood that although this document describes phase shift as providing a beamforming mode, other beamforming methods can be used, such as using mechanical steering and / or transmit element selection (e.g., where different subsets of transmit elements are selected to transmit pulses focused in different corresponding directions).

[0468] Figure 33This is a block diagram of an example transmitting element 3324 that may be included in a transmitting semiconductor die 3300 in apparatus 400, according to some embodiments of the technology described herein.

[0469] In some embodiments, the semiconductor die 3300 can be delivered as described herein with respect to the semiconductor die 922 (including combinations thereof). Figure 11A Configure as described above. For example, as... Figure 33 As shown, the transmitting semiconductor die 3300 includes an interface 3350a, which includes a frequency multiplier 3352a and a power divider 3354a. Similarly, as... Figure 33 As shown, the transmitting semiconductor die 3300 includes a transmitting element 3324, which can be used as described herein with respect to transmitting element 1124 (including the combination of...). Figure 11A Configure as described above. For example, in Figure 33 In this, the transmitting element 3324 includes a phase shifter 3362, an amplifier 3364, a frequency multiplier 3366, a balanced power amplifier 3368, and an antenna 3370 (e.g., a transmitting antenna array).

[0470] In some embodiments, the processing circuitry (e.g., 440) of the device 400 can be configured to operate the transmission circuitry on the transmission semiconductor die 3300 in a first operating state and a second operating state by providing one or more control signals to the transmission semiconductor die 3300. For example, as Figure 33 As shown, the transmitting semiconductor die 3300 receives transmit control (Tx Ctrl) signal 3302, reference control (Ref. Ctrl) signal 3304, and transmit element control (Tx E1. Ctrl) signal 3306, which can be received from the processing circuit system 440. It should be understood that the transmitting semiconductor die 3300 can be configured to receive fewer than all of the control signals 3302, 3304, and 3306, such as any one or any two of the control signals 3302, 3304, and 3306.

[0471] In some embodiments, the processing circuitry of the device 400 can be configured to operate the transmitting semiconductor die 3300 in a first operating state and a second operating state using a transmitting control signal 3302. For example, as Figure 33 As shown, the transmitting semiconductor die 3300 includes a plurality of current mirrors (CMs) 3318 coupled to corresponding active components of the die 3300, wherein each current mirror 3318 is configured to receive a transmitting control signal 3302. For example, in Figure 33 In the middle, the current mirror 3318 is coupled to the frequency multiplier 3352a, the phase shifter 3362, the amplifier 3364, the frequency multiplier 3366, and the balanced power amplifier 3368, respectively.

[0472] In some embodiments, the transmit control signal 3302 can be configured to adjust the bias of the current mirror 3318 such that when the transmit control signal 3302 has a first voltage level, the active component of the transmitting semiconductor die 3300 can operate in a first operating state, and when the transmit control signal 3302 has a second voltage level, the active component of the transmitting semiconductor die 3300 can operate in a second operating state. In some embodiments, the transmit element control signal 3302 can be configured to adjust the bias of the current mirror 3318 between a high current level and a low current level (e.g., power off). For example, when the current mirror 3318 is implemented using a PMOS transistor, a low voltage level can bias the current mirror 3318 to operate the active component of the transmitting semiconductor die 3300 in the first operating state, and a high voltage level can bias the current mirror 3318 to operate the active component in the second operating state; however, it should be understood that different current levels (e.g., for NMOS transistors) can be used. While in some embodiments, the transmit control signal 3302 may be configured to switch the current mirror 3318 between full power and no power, in other embodiments, the transmit control signal 3302 may be configured to switch the current mirror 3318 between multiple power levels (e.g., full power and reduced power).

[0473] In some embodiments, the processing circuitry of the device 400 can be configured to operate some or all of the transmitting elements 3324 using the transmitting element control signal 3306 in a first operating state and a second operating state. For example, as Figure 33 As shown, some current mirrors 3318 are coupled to corresponding active components of the transmitting element 3324. For example, current mirrors 3318 may be provided for some or all of the transmitting elements 3324, and / or transmitting element control signals 3306 may be received from the processing circuitry system for some or all of the transmitting elements 3324.

[0474] In some embodiments, the sending element control signal 3306 can be configured to disable the bias of the current mirror 3318. For example, as Figure 33As shown, a current mirror 3318 of the transmitting element 3324 is coupled to a transmitting element bias generator 3316, which is configured to receive a transmitting element control signal 3306. For example, when the transmitting element control signal 3306 enables the transmitting element bias generator 3316, the active components of the transmitting element 3324 can operate in a first operating state, while when the transmitting element control signal 3306 disables the transmitting element bias generator 3316, the active components of the transmitting semiconductor die 3300 can operate in a second operating state. Although in some embodiments, the transmitting element control signal 3306 can be configured to fully enable and disable the transmitting element bias generator 3316, in other embodiments, the transmitting element control signal 3306 can be configured to switch the transmitting element bias generator 3316 between multiple power levels (e.g., full power and reduced power).

[0475] In some embodiments, the processing circuitry of the device 400 can be configured to operate active components of the interface 3350a using a reference control signal 3304 in a first operating state and a second operating state. For example, such as Figure 33 As shown, the current mirror 3318 is coupled to the frequency multiplier 3352a and also coupled to the reference bias generator 3314, which is configured to receive the reference control signal 3304. For example, when the reference control signal 3304 enables the reference bias generator 3314, the frequency multiplier 3352a can operate in a first operating state, and when the reference control signal 3304 disables the reference bias generator 3314, the frequency multiplier 3352a can operate in a second operating state.

[0476] In some embodiments, the transmitting element bias generator 3316 and / or the reference bias generator 3314 may include a bandgap voltage reference generator.

[0477] Figure 34 This is a block diagram of an example receiving element 3438 that may be included in a receiving semiconductor die 3400 in apparatus 400, according to some embodiments of the technology described herein.

[0478] In some embodiments, the receiving semiconductor die 3400 may be as described herein with respect to the receiving semiconductor die 1432 (including combinations thereof). Figure 14A Configure as described above. For example, as... Figure 34 As shown, the receiving semiconductor die 3400 includes an input interface 3460, which includes a frequency multiplier 3462 and a power divider 3464. Similarly, as... Figure 34 As shown, the receiving semiconductor die 3400 includes a receiving element 3438, which can be configured as described herein with respect to receiving element 1438 (including the combination of...). Figure 14A Configure as described above. For example, in Figure 34In the receiver element 3438, there are amplifier 3482, mixer 3484, antenna 3486 (e.g., receiving antenna array) and amplifier 3488 coupled to output interface 3470.

[0479] In some embodiments, the processing circuitry (e.g., 440) of the device 400 can be configured to operate the receiving circuitry on the receiving semiconductor die 3400 in a first operating state and a second operating state by providing one or more control signals to the...

Claims

1. An apparatus comprising: A substrate, defined in a plane extending in a first direction and a second direction that are substantially orthogonal to each other; A signal generation circuit system, which is mounted on the substrate and configured to generate a reference RF signal; A transmitter, mounted on the substrate, comprising: A first transmitting semiconductor die is coupled to the signal generation circuit system and has the following integrated thereon: A first transmitting circuit system is configured to generate a first RF signal having an RF center frequency between 300-320 GHz based on the reference RF signal, and A first transmitting antenna array includes a first plurality of RF antennas configured to transmit the first RF signal; A receiver, mounted on the substrate, includes: A first receiving semiconductor die is coupled to the signal generation circuit system and has the following integrated thereon: A first receiving antenna array includes a second plurality of RF antennas configured to receive a second RF signal having the RF center frequency, and The first receiving circuit system is configured as follows: A third RF signal is generated based on the reference RF signal, and The second RF signal is mixed with the third RF signal to obtain a fourth RF signal; and An interface circuit system, mounted on the substrate and coupled to the first receiving circuit system, the interface circuit system including an analog-to-digital converter (ADC) circuit system configured to digitize the fourth RF signal.

2. The apparatus according to claim 1, wherein, The substrate includes a printed circuit board, i.e., a PCB.

3. The apparatus according to claim 1 or 2, wherein, The signal generation circuit system is configured to generate the reference RF signal as a linear frequency modulated chirp signal, i.e., an LFM chirp signal.

4. The apparatus according to claim 3, wherein, The LFM chirped signal has a center frequency between 16 GHz and 20 GHz.

5. The apparatus according to any one of claims 1 to 4, in, The transmitter includes a first column of transmitting semiconductor dies laid flat in the first direction, the first column of transmitting semiconductor dies including the first transmitting semiconductor die and a second transmitting semiconductor die spaced apart from the first transmitting semiconductor die in the first direction, and The second transmitting semiconductor die is coupled to the signal generation circuit system, and the following are integrated on the second transmitting semiconductor die: Second transmitting antenna array; and A second transmitting circuit system is configured to generate an RF signal based on the reference RF signal and feed the RF signal to the RF antenna in the second transmitting antenna array.

6. The apparatus according to claim 5, wherein, A first transmitting RF antenna is integrated on the first transmitting semiconductor die. A second transmitting RF antenna is integrated on the second transmitting semiconductor die, and The first transmitting semiconductor die and the second transmitting semiconductor die are arranged in the transmitter such that the center-to-center distance between the first transmitting RF antenna and the second transmitting RF antenna is less than half of the free space wavelength at the RF center frequency or within 10% of half of the free space wavelength at the RF center frequency.

7. The apparatus according to claim 6, wherein, The center-to-center distance between the first transmitting RF antenna and the second transmitting RF antenna is equal to half the free space wavelength at the RF center frequency.

8. The apparatus according to any one of claims 5 to 7, in, The transmitter includes transmitting semiconductor bare dies in a second column laid out in the first direction. Wherein, the second column of transmitting semiconductor dies is spaced apart from the first column of transmitting semiconductor dies in the second direction by a distance, and The second column of transmitting semiconductor dies includes a third transmitting semiconductor die and a fourth transmitting semiconductor die. Each of the third transmitting semiconductor die and the fourth transmitting semiconductor die integrates a corresponding transmitting circuit system and a transmitting antenna array, and each of the third transmitting semiconductor die and the fourth transmitting semiconductor die is coupled to the signal generation circuit system.

9. The apparatus according to any one of claims 1 to 8, wherein, Each of the first plurality of RF antennas includes a patch.

10. The apparatus according to any one of claims 1 to 8, wherein, Each of the first plurality of RF antennas includes a dipole.

11. The apparatus according to any one of claims 1 to 10, wherein, The first plurality of RF antennas integrated on the first transmitting semiconductor die are arranged in a two-dimensional grid with two columns and multiple rows, and wherein the first plurality of RF antennas have mirror symmetry across a line extending in the first direction.

12. The apparatus according to claim 11, wherein, The first plurality of RF antennas consist of 32 RF antennas arranged in a grid with 2 columns and 16 rows.

13. The apparatus according to any one of claims 1 to 12, in, The receiver includes rows of receiving semiconductor dies laid out in the second direction. Each row of receiving semiconductor dies includes the first receiving semiconductor die and a plurality of other receiving semiconductor dies, each of which is coupled to the signal generation circuit system and integrates a corresponding receiving antenna array and a corresponding receiving circuit system on each of the plurality of other receiving semiconductor dies. The corresponding receiving circuit system is configured to use the reference RF signal to process the RF signal received by the corresponding receiving antenna array.

14. The apparatus of claim 13, further comprising a fastener mechanically coupled to the substrate and configured to limit thermal expansion of the substrate.

15. The apparatus according to claim 13 or 14, wherein, The plurality of other receiving semiconductor dies include a second receiving semiconductor die. A first receiving RF antenna is integrated on the first receiving semiconductor die. A second receiving RF antenna is integrated on the second receiving semiconductor die, and The first receiving semiconductor die and the second receiving semiconductor die are arranged in the receiver such that the center-to-center distance between the first receiving RF antenna and the second receiving RF antenna is less than half of the free space wavelength at the RF center frequency or within 10% of half of the free space wavelength at the RF center frequency.

16. The apparatus according to claim 15, wherein, The center-to-center distance between the first receiving RF antenna and the second receiving RF antenna is equal to half the free space wavelength at the RF center frequency.

17. The apparatus according to any one of claims 13 to 16, wherein, The receiving semiconductor die row includes 26 receiving semiconductor dies, and 16 receiving antennas are integrated on each receiving semiconductor die.

18. The apparatus according to any one of claims 1 to 17, wherein, Each of the second plurality of RF antennas includes a patch.

19. The apparatus according to any one of claims 1 to 18, wherein, Each of the second plurality of RF antennas includes a dipole.

20. The apparatus according to any one of claims 1 to 18, wherein, The first receiving semiconductor die is mounted on an interposer layer, and the interposer layer is mounted on the substrate.

21. The apparatus according to claim 13, wherein, Each receiving semiconductor die in the receiving semiconductor die row is mounted on an interposer layer, and the interposer layer is mounted on the substrate.

22. The apparatus of claim 21, further comprising a focusing element mounted on the interposer layer and at least partially covering the receiving semiconductor dies in the receiving semiconductor die row.

23. The apparatus according to claim 22, wherein, The focusing element includes a cylindrical lens having a main axis extending in the second direction.

24. The apparatus according to claim 23, wherein, The receiver has a slit having a length extending along the first direction and a width extending parallel to the second direction, wherein the width is greater than the length.

25. The apparatus according to claim 22, wherein, The focusing element is formed of silicon.

26. The apparatus according to claim 22, wherein, The focusing element includes a spherical or elliptical lens.

27. The apparatus according to any one of claims 1 to 26, wherein, The third RF signal has a second harmonic at the RF center frequency, and the first receiving circuit system is configured to mix the second RF signal with the second harmonic of the third RF signal to obtain the fourth RF signal.

28. The apparatus according to any one of claims 1 to 27, wherein, The fourth RF signal indicates the distance between the device and the target object, which reflects RF energy to at least partially generate the second RF signal received by the first receiving antenna array.

29. The apparatus according to any one of claims 1 to 28, wherein, The first RF signal has a bandwidth of at least 3 GHz or at least 6 GHz.

30. The apparatus according to any one of claims 1 to 29, wherein, The first transmitting circuit system includes a frequency multiplier circuit system configured to multiply the center frequency of the reference RF signal to the RF center frequency.

31. The apparatus according to any one of claims 1 to 30, wherein, The first transmitting circuit system includes a power divider circuit system configured to divide the reference RF signal into reference RF signal portions, and the first RF signal is based on each of the reference RF signal portions.

32. The apparatus according to claim 31, wherein, The first transmitting circuit system includes multiple frequency multipliers configured to multiply the reference RF signal to generate the first RF signal.

33. The apparatus according to any one of claims 1 to 32, wherein, The first receiving circuit system includes a frequency multiplier circuit system configured to multiply the center frequency of the reference RF signal to generate the third RF signal.

34. The apparatus according to claim 33, wherein, The frequency multiplier circuit system of the first receiving circuit system includes a plurality of frequency multipliers configured to multiply a portion of the reference RF signal to generate the third RF signal.

35. The apparatus according to any one of claims 1 to 34, wherein, The first receiving circuit system includes a power divider circuit system configured to divide the reference RF signal into reference RF signal portions, and the third RF signal is based on each of the reference RF signal portions.

36. The apparatus according to any one of claims 1 to 35, wherein, The ADC circuit system includes multiple ADCs mounted on the substrate.

37. The apparatus according to claim 36, wherein, The receiver includes rows of receiving semiconductor dies laid out in the second direction, the rows of receiving semiconductor dies including the first receiving semiconductor die and a plurality of other receiving semiconductor dies, and The plurality of ADCs are each coupled to a corresponding set of one or more receiving semiconductor dies in the receiving semiconductor die row, and are configured to digitize the signals output by the corresponding set of one or more receiving semiconductor dies.

38. The apparatus according to claim 37, wherein, Each of the plurality of ADCs is coupled to a corresponding receiving semiconductor die pair in the receiving semiconductor die row and is configured to digitize the signal output by the receiving semiconductor die pair.

39. The apparatus according to any one of claims 1 to 38, wherein, The first receiving circuit system includes a first plurality of receiving channels, the first plurality of receiving channels being coupled to a second plurality of RF antennas and configured to mix the second RF signal with the third RF signal to obtain the fourth RF signal; The interface circuit system includes a time-division multiplexing circuit system, which includes multiple time-division multiplexers configured to combine the fourth RF signal into a time-division multiplexed signal; and The ADC circuitry is configured to digitize the fourth RF signal at least in part by digitizing the time-division multiplexed signal into a digitized time-division multiplexed signal.

40. The apparatus according to any one of claims 1 to 39, wherein, The interface circuit system includes a first serial communication circuit system configured to serialize a first subset of the fourth RF signal to obtain and transmit a first serialized processed RF signal. The interface circuit system further includes a second serial communication circuit system configured to serialize a second subset of the fourth RF signal to obtain and transmit a second serialized processed RF signal; and The apparatus includes a processing circuit system configured to synchronize the serialization of a first subset of the fourth RF signal by the first serial communication circuit system with the serialization of a second subset of the fourth RF signal by the second serial communication circuit system.

41. The apparatus according to any one of claims 1 to 40, further comprising: A processing circuit system configured to process the digital signals output by the interface circuit system.

42. The apparatus according to claim 41, wherein, The processing circuit system is coupled to the interface circuit system using the JESD interface protocol.

43. The apparatus according to any one of claims 41 to 42, wherein, The processing circuit system includes one or more FPGAs and / or one or more processors.

44. The apparatus according to any one of claims 41 to 43, wherein, The processing circuit system is mounted on the substrate.

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