Virtual image display device

Abstract

In a perspective-type virtual image display device (1), the generation of peri-ocular luminescence is suppressed. The virtual image display device (1) includes: a light-emitting panel (20L) that allows light from the outside in the opposite direction from the Z direction to pass through during a first period and emits a first-color light during a second period; a liquid crystal panel (10L) that allows light from the outside that has passed through the light-emitting panel (20L) to pass through during a first period and generates a transmitted image of the first-color light emitted from the light-emitting panel (20L) during a second period; and a liquid crystal panel (30L) that allows light from the outside to pass through during a first period and blocks the first-color light emitted from the light-emitting part from being emitted in the opposite direction from the Z direction during a second period.

Description

Technical Field

[0001] This disclosure relates to a virtual image display device. Background Technology

[0002] In recent years, virtual image display devices, such as those shaped like glasses, have been proposed that allow external scenery to be seen through an image generated by a display panel. Specifically, techniques are known that involve illuminating a transmissive image generated by a liquid crystal panel with light from a backlight so that the user can see it, while also allowing external scenery to be seen through the liquid crystal panel and the backlight (for example, see Patent Document 1).

[0003] Patent Document 1: International Publication No. 2016 / 056298

[0004] However, in the aforementioned technology, the backlight not only shines towards the user but also outwards in the opposite direction. Therefore, if observed by someone other than the user of the virtual image display device, a phenomenon known as "eye glow" occurs, making the glasses appear to glow. This eye glow presents the problem that people around the user can sense what they are looking at and cannot make eye contact with them. Summary of the Invention

[0005] This disclosure discloses a virtual image display device comprising: a light-emitting unit that allows light from the outside to pass through during a first period and emits a first color light during a second period; a display unit that allows light from the outside that has passed through the light-emitting unit to pass through during the first period and generates a transmissive image of the first color light emitted by the light-emitting unit during the second period; and a transmissive light-shielding switching unit that allows light from the outside to pass through during the first period and blocks the first color light emitted from the light-emitting unit during the second period. Attached Figure Description

[0006] Figure 1 This is a perspective view showing the structure of the virtual image display device according to the first embodiment.

[0007] Figure 2 This is a diagram showing the optical structure of a virtual image display device.

[0008] Figure 3 This is a block diagram showing the structure of the virtual image display device according to the first embodiment.

[0009] Figure 4 This is a cross-sectional view of the main part of the liquid crystal panel in a virtual image display device.

[0010] Figure 5 This is a block diagram showing the structure of a liquid crystal panel that generates a transmissive image.

[0011] Figure 6 This is a diagram showing the equivalent circuit of the pixel circuit in a liquid crystal panel.

[0012] Figure 7 This is a cross-sectional view of the main part of the light-emitting panel in a virtual image display device.

[0013] Figure 8 This is a cross-sectional view of the main part of the liquid crystal panel in a virtual image display device, which allows light to pass through or blocks it.

[0014] Figure 9 This is a diagram illustrating the operation of a virtual image display device.

[0015] Figure 10 This is a diagram illustrating the operation of a liquid crystal panel that generates a transmissive image.

[0016] Figure 11 This is a diagram illustrating the operation of a virtual image display device according to a modified example of the first embodiment.

[0017] Figure 12 This is a diagram illustrating the operation of the virtual image display device according to the second embodiment.

[0018] Figure 13 This is a circuit diagram showing the main part of the scan line driving circuit in an LCD panel.

[0019] Figure 14 This is a diagram illustrating the operation of the scan line drive circuit.

[0020] Figure 15 This is a diagram showing the main parts of the distribution circuit.

[0021] Label Explanation

[0022] 1: Virtual image display device; 10L, 10R: LCD panel; 20L, 20R: Light-emitting panel; 30L, 30R: LCD panel; 110: Pixel circuit. Detailed Implementation

[0023] Hereinafter, the electro-optical device according to the embodiments will be described with reference to the accompanying drawings. In addition, the sizes and scales of the various parts in each drawing are appropriately different from the actual figures. Furthermore, the embodiments described below are preferred examples, and therefore various technically preferred limitations have been added. However, unless otherwise specified in the following description, the scope of this disclosure is not limited to these embodiments.

[0024] The virtual image display device of the first embodiment is a so-called head-mounted display, which is a perspective type that allows a user wearing the head-mounted display to see the virtual image displayed on the liquid crystal panel superimposed on the real scenery.

[0025] Figure 1This is a perspective view showing the virtual image display device 1. Figure 2 This diagram illustrates the optical structure of the virtual image display device 1. As shown, the virtual image display device 1, like ordinary eyeglasses, has temples 310, a bridge 320, and lenses 301L and 301R. Furthermore, as... Figure 2 As shown, the virtual image display device 1 has a display structure 100L for the left eye and a display structure 100R for the right eye located near the nose bridge 320 and inside the lenses 301L and 301R (lower side in the figure).

[0026] With the direction in which the user sees the real-world scenery set to the Z-direction, the display structure 100L is a structure in which the liquid crystal panel 10L, the light-emitting panel 20L, and the liquid crystal panel 30L are stacked in sequence facing the Z-direction. The display structure 100R is similar to the display structure 100L, in which the liquid crystal panel 10R, the light-emitting panel 20R, and the liquid crystal panel 30R are stacked in sequence in the Z-direction.

[0027] Both LCD panels 10L and 10R are transmissive types that generate transmissive images on the XY plane perpendicular to the Z direction. Light-emitting panels 20L and 20R emit R (red), G (green), and B (blue) colors of light in a time-division manner. LCD panels 30L and 30R switch between transmitting and blocking light emitted in opposite directions along the Z direction.

[0028] In addition, the generation of transmitted images in liquid crystal panels 10L and 10R, the emission of light in light-emitting panels 20L and 20R, and the transmission and blocking of light in liquid crystal panels 30L and 30R are controlled by control circuit 200.

[0029] In the virtual image display device 1, if the display structure 100L displays the left-eye image from a binocular image with parallax, and the display structure 100R displays the right-eye image, the user can perceive that the displayed image has depth and a three-dimensional effect. Furthermore, the liquid crystal panels 10L and 10R can also display the same image.

[0030] In addition, in order to enable users to see the display images of the display structures 100L and 100R, which are located at a very close distance to the eyeball, an optical system such as lenses is actually provided. However, to avoid complicating the accompanying drawings, the illustration of the optical system is omitted.

[0031] Figure 3 This is a block diagram showing the structure of the virtual image display device 1.

[0032] The control circuit 200 synchronously inputs image data Dt, representing the color image seen by the user, from the host device (not shown in the diagram) via the synchronization signal Sync.

[0033] The control circuit 200 generates a left-eye image based on the color image represented by image data Dt, and provides the RGB components of the left-eye image as an image signal Dt_L to the liquid crystal panel 10L in a time-division multiplexing manner. The control circuit 200 also generates a right-eye image based on the color image represented by image data Dt, and provides the RGB components of the right-eye image as an image signal Dt_R to the liquid crystal panel 10R in a time-division multiplexing manner. Furthermore, the control circuit 200 supplies control signals Ctr to the liquid crystal panels 10L and 10R for time-division multiplexing the display of the RGB components of the image.

[0034] In this embodiment, the light-emitting panel 20L is, for example, constructed by sequentially stacking a red-light-emitting panel 20L_R, a green-light-emitting panel 20L_G, and a blue-light-emitting panel 20L_B along the Z-direction. Similarly, the light-emitting panel 20R is constructed by sequentially stacking a red-light-emitting panel 20R_R, a green-light-emitting panel 20R_G, and a blue-light-emitting panel 20R_B along the Z-direction.

[0035] The control circuit 200 supplies the control signal R_ctr for controlling red light emission to the light emission panels 20L_R and 20R_R, the control signal G_ctr for controlling green light emission to the light emission panels 20L_G and 20R_G, and the control signal B_ctr for controlling blue light emission to the light emission panels 20L_B and 20R_B.

[0036] In addition, the control circuit 200 outputs a control signal Vsig to control the transmission and blocking of light in the liquid crystal panels 30L and 30R.

[0037] Since LCD panels 10L and 10R have the same structure, LCD panel 10L will be used as the representative for explanation.

[0038] Figure 4 This is a cross-sectional view of the main parts of the 10L LCD panel.

[0039] In the liquid crystal panel 10L, the element substrate 10a with pixel electrode 118 and the opposing substrate 10b with common electrode 108 maintain a certain gap and are bonded together by sealing material 190 with the electrode forming surfaces facing each other, and liquid crystal 105 is sealed in the gap.

[0040] The component substrate 10a and the opposing substrate 10b are respectively made of light-transmitting substrates such as glass and quartz.

[0041] In the component substrate 10a, the pixel electrode 118 disposed on the opposing surface opposite the opposing substrate 10b is formed into a roughly square shape when viewed from above, for example, by patterning a transparent conductive layer such as ITO (Indium Tin Oxide). The pixel electrode 118 is switched on and off by a transistor as described later.

[0042] Additionally, in this description, "viewing from above" refers to viewing the LCD panel 10L from the opposite direction of the Z-axis.

[0043] The common electrode 108 disposed on the opposing surface of the opposing substrate 10b, which is opposite to the component substrate 10a, is made of ITO or the like.

[0044] Figure 5 This is a block diagram showing the structure of the liquid crystal panel 10L. In the liquid crystal panel 10L, a distribution circuit 50, a display control circuit 140, and a scan line drive circuit 150 are arranged around the periphery of the rectangular display area 102.

[0045] In the display area 102, pixel circuits 110 corresponding to the pixels of the image to be displayed are arranged in a matrix. Specifically, in the display area 102, m scan lines 112 are arranged horizontally in the figure, and data lines 114 are arranged vertically in the figure and are electrically insulated from the scan lines 112.

[0046] In this embodiment, the data lines 114 are grouped into groups of 3. If the number of groups is set to n, then the total number of data lines 114 in this embodiment is (3n).

[0047] The pixel circuit 110 is arranged at the intersections of the m scan lines 112 and (3n) data lines 114. Therefore, in this embodiment, the pixel circuit 110 is arranged in a matrix with m rows × (3n) columns.

[0048] Here, m is an integer greater than or equal to 2. n is an integer greater than or equal to 2. Furthermore, in this embodiment, m is assumed to be less than (3n).

[0049] To provide a general description of the rows of scan line 112 and the rows in the matrix-arranged pixel circuit 110, an integer i of 1 to m is used. For example, regarding scan line 112, it is sometimes referred to in the diagram as row 1, 2, 3, ..., (i-1), i, ..., (m-1), m, sequentially from top to bottom.

[0050] Similarly, to provide a general description of the columns of data line 114 and the columns in the matrix-arranged pixel circuit 110, an integer j of 1 to n is used. For example, to distinguish data line 114, it is sometimes referred to in the diagram as column 1, 2, 3, ..., (3j-2), (3j-1), (3j), ..., (3n-2), (3n-1), (3n) from left to right.

[0051] Additionally, regarding data line 114 or column, for the j-th group, sometimes column (3j-2) is described as series 1, column (3j-1) as series 2, and column (3j) as series 3. In other words, in the j-th group, data line 114 of series 1 is column (3j-2), data line 114 of series 2 is column (3j-1), and data line 114 of series 3 is column (3j).

[0052] The display control circuit 140 controls the generation of the transmitted image by performing vertical and horizontal scanning of the pixel circuits in the display area 102. In detail, the display control circuit 140 processes the image signal Dt_L and the control signal Ctr supplied from the control circuit 200, and outputs data signals Vid(1), Vid(2), Vid(3), ..., Vid(n) and control signals Sel(1) to Sel(3) in addition to outputting control signals for the scan line drive circuit 150.

[0053] Data signals Vid(1), Vid(2), Vid(3), ..., Vid(n) are supplied to the distribution circuit 50 via n data signal lines 13. A general description of the data signals Vid(1), Vid(2), Vid(3), ..., Vid(n) is provided. Data signal Vid(j) is a signal that becomes a voltage corresponding to the display grayscale of the three pixels at the intersection of the three data lines 114 belonging to the j-th group and the horizontally scanned scan line 112. In other words, the voltage of data signal Vid(j) varies time-divisionally according to the display grayscale of these three pixels during the horizontal scan.

[0054] The control signal Sel(1) is used to select the data line 114 of the first sequence. Similarly, the control signal Sel(2) is used to select the data line 114 of the second sequence, and the control signal Sel(3) is used to select the data line 114 of the third sequence.

[0055] The scan line driving circuit 150, under the control of the display control circuit 140, independently supplies scan signals to the scan lines 112 of the m rows. Here, the scan signal supplied to the scan line 112 of the first row is denoted as Gwr(1), and similarly, the scan signals supplied to the scan lines 112 of the second, third, ..., (i-1), i, ..., (m-1), and m rows are denoted as Gwr(2), Gwr(3), ..., Gwr(i-1), Gwr(i), ..., Gwr(m-1), and Gwr(m) respectively.

[0056] The display control circuit 140 outputs various control signals for controlling the scan line drive circuit 150. However, in this embodiment, the control signals for the scan line drive circuit 150 are not important, so only the signal paths are shown.

[0057] Distribution circuit 50 is a demultiplexer that distributes the data signal supplied to data signal line 13 to the three data lines 114 according to control signals Sel(1) to Sel(3). Specifically, in distribution circuit 50, switches 52a, 52b, and 52c are sequentially arranged corresponding to the first, second, and third series. Switches 52a, 52b, and 52c are N-channel thin-film transistors, the same type as the transistors in pixel circuit 110. Regarding switches 52a, 52b, and 52c, the explanation will focus on the j-th group.

[0058] A data signal Vid(j) is supplied to the data signal line 13 corresponding to the j-th group. This data signal line 13 has three branches that are connected to the input terminals of switches 52a, 52b, and 52c.

[0059] In the j-th group, the output terminal of switch 52a in the first sequence is connected to the data line 114 of the first sequence in the j-th group. Switch 52a is in an ON or OFF state depending on the logic level of the control signal Sel(1). Specifically, if the control signal Sel(1) is at level H, switch 52a is in the ON state; if it is at level L, switch 52a is in the OFF state.

[0060] In this specification, the "on / conducting state" of a switch or transistor refers to a low-impedance state where the two ends of the switch or the source / drain nodes in the transistor are electrically connected. Conversely, the "off / disconnecting state" of a switch or transistor refers to a high-impedance state where the two ends of the switch or the source / drain nodes are not electrically connected.

[0061] Similarly, in the j-th group, the output of switch 52b in the second sequence is connected to the data line 114 of the second sequence in the j-th group. The on and off states of switch 52b are controlled according to the logic level of control signal Sel(2).

[0062] In the j-th group, the output of switch 52c in the third sequence is connected to the data line 114 of the third sequence in the j-th group. The on and off states of switch 52c are controlled according to the logic level of control signal Sel (3).

[0063] Figure 6 This is a diagram showing the equivalent circuit of a total of 6 pixel circuits 110, consisting of 2×3, corresponding to the intersections of the two adjacent scan lines 112 and the three data lines 114 belonging to the same group in the liquid crystal panel 10L.

[0064] As shown in the figure, the pixel circuit 110 includes a transistor 116 and a liquid crystal element 120. The transistor 116 is, for example, an N-channel thin-film transistor. In the pixel circuit 110, the gate node of the transistor 116 is connected to the scan line 112, its source node is connected to the data line 114, and its drain node is connected to the pixel electrode 118 and one end of the storage capacitor 109.

[0065] In this description, "electrical connection" or simply "connection" refers to a direct or indirect connection or combination between two or more elements, including, for example, cases in a semiconductor substrate where two or more elements are not directly connected but are connected through different wiring layers and contact holes.

[0066] A common electrode 108 is provided for all pixel circuits 110 in a manner opposite to the pixel electrode 118. The common electrode 108 is maintained at a substantially constant voltage Vcom over time. Furthermore, liquid crystal 105 is sandwiched between the pixel electrode 118 and the common electrode 108. Therefore, for each pixel circuit 110, a liquid crystal element 120 is constituted by the pixel electrode 118, the common electrode 108, and the liquid crystal 105.

[0067] Storage capacitor 109 is connected in parallel with liquid crystal element 120, and its other end is connected to capacitor wiring 107. In capacitor wiring 107, a constant potential is maintained over time, for example, the same voltage Vcom as the common electrode 108.

[0068] Here, the liquid crystal panel 10L has been described, but the liquid crystal panel 10R differs from the liquid crystal panel 10L only in that it is supplied with an image signal Dt_R; otherwise, the structure is the same. Furthermore, when the liquid crystal panels 10L and 10R display the same image, the image signals Dt_L and Dt_R are also the same.

[0069] As described above, the light-emitting panel 20L is a structure formed by stacking light-emitting panels 20L_R, 20L_G, and 20L_B. Therefore, the light-emitting panel 20L_R will be described first.

[0070] Figure 7This is a cross-sectional view of the main part of the light-emitting panel 20L_R. In the light-emitting panel 20L_R, an anode 222 is provided on a transparent substrate 210 that has light transmittance and insulation properties, such as glass, quartz, or a thin film. As the anode 222, a transparent conductive layer such as ITO is used, for example. A light-emitting layer 224 corresponding to red is provided on the anode 222, and then a cathode 226 is provided on the light-emitting layer 224. As the cathode, a transparent conductive layer such as IZO (Indium Zinc Oxide) is used, for example.

[0071] To protect against moisture, a light-transmitting and insulating sealing layer 230 is provided to cover the cathode 226, the light-emitting layer 224, and the anode 222.

[0072] A covering layer 340, which has light transmission and insulation properties, such as glass, quartz, or membrane, is provided on the sealing layer 230.

[0073] A control signal R_ctr is supplied from the control circuit 200 to the anode 222, and a voltage Vct is applied to the cathode 226. The voltage Vct is a reference ground potential where the voltage is zero.

[0074] When the control signal R_ctr becomes equivalent to the on voltage, current flows from the anode 222 to the cathode 226. Holes injected from the anode 222 recombine with electrons injected from the cathode 226 in the light-emitting layer 224, generating excitons and producing red light. The generated red light is mainly emitted in the Z direction and the opposite direction of the Z direction.

[0075] Here, the light-emitting panel 20L_R has been described, but the light-emitting panels 20L_G and 20L_B are the same as the light-emitting panel 20L_R, except for the colored light emitted from the light-emitting layer 224. Specifically, the light-emitting layer 224 in the light-emitting panel 20L_G emits green light when current flows, and the light-emitting layer 224 in the light-emitting panel 20L_B emits blue light when current flows.

[0076] In addition, the light-emitting panel 20L has been described here, but the light-emitting panel 20R has the same structure as the light-emitting panel 20L.

[0077] Next, the LCD panel 30L, which controls the transmission and blocking of switching light, will be explained.

[0078] Figure 8 This is a cross-sectional view of the main parts of the 30L LCD panel.

[0079] In the liquid crystal panel 30L, a substrate 30a with an electrode 301 on one side and a substrate 30b with an electrode 302 on one side are separated by a certain gap and bonded together by a sealing material 390 with the electrode forming surfaces facing each other, and liquid crystal 305 is sealed in the gap.

[0080] Substrates 30a and 30b are made of transparent substrates such as glass and quartz. Electrodes 301 and 302 are transparent conductive layers such as ITO. A control signal Vsig is supplied to electrode 301 from the control circuit 200, and a voltage Vcom is applied to electrode 302.

[0081] The liquid crystal panel 30L is transmissive and, for example, normally black. Therefore, if the control signal Vsig is a voltage Vwt (+) or Vwt (-), the liquid crystal panel 30L allows light incident on substrate 30a and emitted from substrate 30b, as well as light incident on substrate 30b and emitted from substrate 30a, to pass through. Conversely, if the control signal Vsig is a voltage Vcom, the liquid crystal panel 30L blocks light incident on substrate 30a and emitted from substrate 30b, as well as light incident on substrate 30b and emitted from substrate 30a.

[0082] Furthermore, the polarizers disposed in the opposite direction to the Z direction relative to the substrate 30a and the polarizers disposed in the Z direction relative to the substrate 30b are omitted from the figures.

[0083] In addition, LCD panel 30L has been described here, but LCD panel 30R has the same structure as LCD panel 30R.

[0084] Next, the operation of the virtual image display device 1 will be explained.

[0085] Figure 9 This is a diagram used to illustrate the action of two consecutive frames in the virtual image display device 1. Figure 10 This is a timing diagram used to illustrate the operation of the unit period Rtm in the LCD panels 10L and 10R.

[0086] For convenience, two consecutive frames are divided into an odd-numbered frame (F_odd) that comes first in time and an even-numbered frame (F_even) that comes later in time. One frame is the period required to display one image specified by the image data Dt. The duration of one frame is the same as the vertical synchronization period, for example, if the vertical synchronization signal contained in the Sync signal has a frequency of 60Hz, then it is 16.7 milliseconds, which is equivalent to one period of that vertical synchronization signal.

[0087] Furthermore, in the first embodiment, there is no difference in the operation of odd-numbered frames (F_odd) and even-numbered frames (F_even), but for the convenience of comparison with the modified examples and the second embodiment described later, two consecutive frames are divided into odd-numbered frames (F_odd) and even-numbered frames (F_even).

[0088] In this embodiment, odd-numbered frames (F_odd) or even-numbered frames (F_even) are divided into four periods: Rtm, Gtm, Btm, and Ttm.

[0089] The unit periods Rtm, Gtm, and Btm are used to allow the user to sequentially see the red, green, and blue components of the virtual image in a time-division manner, while blocking the light emitted from the light-emitting panels 20L and 20R in the Z direction. The unit period Ttm is used to allow the user to see the outside world, i.e., the scenery outside.

[0090] The unit periods Rtm, Gtm, Btm, and Ttm are each divided into a first half and a second half. The first half is the period during which positive polarity data signals are written to the liquid crystal panels 10L and 10R, and the second half is the period during which negative polarity data signals are written to the liquid crystal panels 10L and 10R.

[0091] The data signal writing period refers to the period during which a data signal is applied to the pixel electrode 118 of the liquid crystal element 120 via the data line 114, i.e., the writing is performed. Furthermore, a positive data signal refers to a data signal with a voltage Vcom or higher applied to the common electrode 108, and a negative data signal refers to a data signal with a voltage Vcom or lower.

[0092] If both the liquid crystal panels 10L and 10R are in normal black mode, the transmittance of the liquid crystal element 120 increases as the difference between the voltage of the data signal applied to the pixel electrode 118 and the voltage Vcom of the common electrode 108 increases.

[0093] Specifically, such as Figure 10 As shown, the positive polarity data signals Vd(1) to Vd(n) are voltage Vcom when the transmittance of the liquid crystal element 120 should be minimized, that is, when the displayed grayscale is at its lowest value. As the transmittance increases, that is, as the displayed grayscale increases, they become higher than voltage Vcom. The positive polarity data signals Vd(1) to Vd(n) are voltage Vwt(+) when the transmittance of the liquid crystal element 120 should be maximized, that is, when the displayed grayscale is at its highest value.

[0094] The negative data signal Vd(j) is a voltage Vcom when the displayed grayscale is at its lowest value, and becomes lower than the voltage Vcom as the displayed grayscale increases. The negative data signal Vd(j) becomes a voltage Vwt(-) when the displayed grayscale is at its highest value.

[0095] Additionally, the reference voltage for polarity is the voltage Vcom of the common electrode 108, but considering the feedthrough generated in the N-channel transistor, a voltage slightly higher than Vcom can also be used as the reference. Furthermore, the data signal Vd(j) displaying the lowest grayscale value does not necessarily need to be the reference voltage for polarity.

[0096] In addition, in order to balance the relationship between voltages Vwt(+) and Vwt(-) which are the voltages that maximize transmittance, the voltage Vcom at which the grayscale is at its lowest value is sometimes denoted as the positive voltage Vbk(+) or the negative voltage Vbk(-).

[0097] Unlike LCD panels 10L and 10R, LCD panels 30L and 30R do not display grayscale values, allowing light emitted from light-emitting panels 20L and 20R to pass through or block it. Therefore, if the control signal Vsig is a positive voltage Vwt (+) or a negative voltage Vwt (-), LCD panels 30L and 30R allow light to pass through; if the control signal Vsig is a voltage Vcom, LCD panels 30L and 30R block light.

[0098] about Figure 9 The liquid crystal panels 10L and 10R shown use rows 1 to m, which are the rows of scan lines 112, as the vertical axis to show the time progression of the selected scan lines 112. When the selection of scan lines 112 is represented by thick black lines, the scan lines 112 are selected row by row, so the selected scan lines 112 move sequentially from row 1 to row m over time.

[0099] The control circuit 200 outputs the following control signals: R_Ctr, G_Ctr, and B_Ctr.

[0100] In detail, the control signal R_Ctr, starting from the timing te of selecting the final m-row scan line 112 in the first half of the unit period Rtm, after time td for time t2, indicates the light emission (on) of the light-emitting panels 20L_R and 20R_R, and in the first half of the next unit period Gtm, selects the timing ts of the first row scan line 112, indicating it to be off.

[0101] The control signal G_Ctr indicates the illumination (on) of the light-emitting panels 20L_G and 20R_G during the first half of the unit period Gtm at the same timing t2, and indicates the extinguishing (off) of the light-emitting panels 20L_G and 20R_G during the first half of the next unit period Btm at the same timing ts.

[0102] The control signal B_Ctr indicates the illumination (on) of the light-emitting panels 20L_B and 20R_B during the first half of the unit period Btm at the same timing t2, and indicates the extinguishing (off) of the light-emitting panels 20L_B and 20R_B during the first half of the next unit period Ttm at the same timing ts.

[0103] Time td refers to the delay time in the liquid crystal element 120 of the liquid crystal panel 10L and 10R from the time the voltage of the data signal is applied to the pixel electrode 118 until the transmittance corresponding to that voltage is reached. In reality, there are cases where the transmittance of the liquid crystal element 120 is high (brighter) and low (darker), but for the sake of simplicity, it is treated as the same.

[0104] The control circuit 200 outputs the following control signal Vsig.

[0105] In detail, the control signal Vsig selects the timing te of the final m-th scan line 112 during the first half of the unit period Ttm to become voltage Vwt (+), and then reverses its polarity to become voltage Vwt (-) during the half of the period Ltm, and finally becomes voltage Vcom at timing t3.

[0106] Additionally, timing t3 is a timing step ahead of timing ts, which selects the first scan line 112 in the first half of the unit period Rtm, by time td. The period Ltm is the period from timing te in the unit period Ttm to timing t3.

[0107] During the unit periods Rtm, Gtm, and Btm, the operation of LCD panels 10L and 10R differs only in the color component of the supplied data signal; everything else remains the same. Therefore, the operation of Rtm, Gtm, and Btm will be explained using Rtm as an example.

[0108] like Figure 10 As shown, during the first half of the unit period Rtm, the scan signals Gwr(1), Gwr(2), ..., Gwr(i-1), Gwr(i), ..., Gwr(m-1), Gwr(m) sequentially and exclusively become level H during each horizontal scan period (H) via the scan line drive circuit 150. The horizontal scan period (H) is the interval between the times during which the scan signals Gwr(1) to Gwr(m) sequentially become level H.

[0109] In this embodiment, the periods during which adjacent scan signals in the scan signals Gwr(1) to Gwr(m) are at H level are time-isolated. Specifically, after the scan signal Gwr(i-1) changes from H level to L level, the next scan signal Gwr(i) changes from L level to H level.

[0110] During the period when the scanning signals Gwr(1) to Gwr(m) are at level H, the control signals Sel(1) to Sel(3) sequentially and exclusively become level H.

[0111] During the period when the scan signal Gwr(i) becomes H level and the control signal Sel(1) becomes H level, the display control circuit 140 outputs a data signal Vid(j) of the positive polarity voltage in the display pixel corresponding to the display gray level of the red component in the pixel circuit 110 of row i (3j-2) column.

[0112] If the scan signal Gwr(i) is at level H, then in the pixel circuit 110 of row i (3j-2) column, transistor 116 is turned on. In this state, if the control signal Sel(1) is at level H, then the switch 52a of the distribution circuit 50 is turned on, so the data signal Vid(j) is supplied to the data line 114 of column (3j-2). Therefore, the data signal Vid(j) supplied to the data line 114 reaches the pixel electrode 118 in the pixel circuit 110 of row i (3j-2) column via the turned-on transistor 116, that is, the voltage of the data signal Vid(j) is applied to the pixel electrode 118. Afterwards, the control signal Sel(1) becomes at level L, the switch 52a changes to the off state, but the voltage of the data signal Vid(j) applied to the pixel electrode 118 is maintained by the capacitance of the liquid crystal element 120 and the storage capacitor 109.

[0113] Next, the control signal Sel(2) becomes H level. During the period when the control signal Sel(2) is H level, the display control circuit 140 outputs a data signal Vid(j) of positive polarity voltage corresponding to the display gray level of the red component in the display pixel corresponding to the pixel circuit 110 in row i (3j-1) column. If the control signal Sel(2) becomes H level, the switch 52b of the distribution circuit 50 becomes on, so the data signal Vid(j) is supplied to the data line 114 in column (3j-1). Therefore, the voltage of the data signal Vid(j) supplied to the data line 114 is applied to the pixel electrode 118 in the pixel circuit 110 in row i (3j-1) column via the transistor 116 in the on state. Afterwards, the control signal Sel(2) becomes L level, the switch 52b changes to the off state, but the voltage of the data signal Vid(j) applied to the pixel electrode 118 is maintained by the capacitance of the liquid crystal element 120 and the storage capacitor 109.

[0114] The control signal Sel (3) becomes H level. During the period when the control signal Sel (3) is H level, the display control circuit 140 outputs a data signal Vid (j) of positive polarity voltage corresponding to the display gray level of the red component in the display pixel corresponding to the pixel circuit 110 in row (3j) column. If the control signal Sel (3) becomes H level, the switch 52c of the distribution circuit 50 becomes on, so the data signal Vid (j) is supplied to the data line 114 in column (3j). Therefore, the voltage of the data signal Vid (j) supplied to the data line 114 is applied to the pixel electrode 118 in the pixel circuit 110 in row (3j) column via the transistor 116 in the on state. Afterwards, the control signal Sel (3) becomes L level, the switch 52c changes to the off state, but the voltage of the data signal Vid (j) applied to the pixel electrode 118 is maintained by the capacitance of the liquid crystal element 120 and the storage capacitor 109.

[0115] Here, the pixel circuits 110 belonging to row i (3j-2), row i (3j-1), and row i (3j) of the j-th group are described during the horizontal scan period (H) when the scan signal Gwr(i) becomes H level, but the same operation is performed in other groups. In addition, the operation during such a horizontal scan period (H) is performed in the order of rows 1, 2, 3, ..., m.

[0116] Furthermore, while the liquid crystal panel 10L has been described here, since the control signal Ctr is shared with the liquid crystal panel 10R, a transmission image of the red component of the image is also generated in the liquid crystal panel 10R based on the image signal Dt_R.

[0117] Thus, during the first half of the unit period Rtm, a transmitted image of the red component of the image for the left eye is generated in the liquid crystal panel 10L, and a transmitted image of the red component of the image for the right eye is generated in the liquid crystal panel 10R.

[0118] In order for the user to see the transmitted image of the red component of the liquid crystal panels 10L and 10R, the control circuit 200 supplies the control signal R_Ctr to the light-emitting panels 20L_R and 20R_R to indicate the emission.

[0119] In liquid crystal panels 10L and 10R, the change in optical state (transmittance) relative to the voltage change of liquid crystal element 120 is slower than that in light-emitting panels 20L and 20R. Here, in liquid crystal element 120, we envision a delay time td from the application of a voltage corresponding to the displayed grayscale to the pixel electrode 118 until a transmittance equivalent to that voltage is achieved.

[0120] In this case, at a time t2 that is delayed by time td from the time te selected from the final m-th row of the scan line 112, the control circuit 200 outputs a control signal R_Ctr indicating that the light is turned on, causing the light-emitting panels 20L_R and 20R_R to produce red light.

[0121] Thus, the transmitted image generated by the liquid crystal panel 10L is colored by the red light of the light-emitting panel 20L_R and is seen by the user's left eye, while the transmitted image generated by the liquid crystal panel 10R is colored by the red light of the light-emitting panel 20R_R and is seen by the user's right eye.

[0122] The red light generated by the light-emitting panels 20L_R and 20R_R is emitted not only in the opposite direction to the user's direction (i.e., the Z direction) but also in the Z direction. However, in a unit period Rtm, the liquid crystal panels 30L and 30R become nontransmissive states with minimum transmittance, i.e., blocking light, due to the control signal Vsig of the voltage Vcom.

[0123] Therefore, the red light generated by Rtm in the light-emitting panels 20L_R and 20R_R during the unit period will not be emitted to the outside of the virtual image display device 1.

[0124] The second half of the unit period Rtm operates the same as the first half, except that the data signals Vid(1) to Vid(n) are output with negative polarity. Therefore, in the liquid crystal element 120, the voltage of the negative polarity data signal is applied in the second half of the unit period Rtm, and thus, together with the application of the voltage of the positive polarity data signal in the first half of the period, the liquid crystal element 120 is AC driven.

[0125] Furthermore, during the latter half of the unit period Rtm, the data signals Vid(1) to Vid(n) become negative, but since the absolute value of the voltage applied to the liquid crystal element 120 does not change, it does not impart a change to the transmittance of the voltage written based on the positive polarity during the first half of the period.

[0126] Within a unit period Gtm, the operation is identical to that within a unit period Rtm, except for the color composition of the data signal and the control signal indicating light emission. That is, within a unit period Gtm, a transmitted image of the green component of the image for the left eye is generated in the liquid crystal panel 10L, and a transmitted image of the green component of the image for the right eye is generated in the liquid crystal panel 10R.

[0127] The control circuit 200 outputs a control signal G_Ctr indicating that the light is turned on from time t2 to time ts, which is the start of the next unit period Btm, causing the light-emitting panels 20L_G and 20R_G to produce green light.

[0128] Thus, the transmissive image generated by the liquid crystal panel 10L is colored by the green light of the light-emitting panel 20L_G and is seen by the user's left eye, while the transmissive image generated by the liquid crystal panel 10R is colored by the green light of the light-emitting panel 20R_G and is seen by the user's right eye.

[0129] In the liquid crystal element 120, a positive voltage of a data signal is applied during the first half of the unit period Gtm, and a negative voltage of a data signal is applied during the second half of the unit period, and the liquid crystal element 120 is driven by AC.

[0130] Within a unit period Btm, the operation is identical to that of unit periods Rtm and Gtm, except for the color composition of the data signal and the control signal indicating light emission. That is, within a unit period Btm, a transmitted image of the blue component of the image for the left eye is generated in the liquid crystal panel 10L, and a transmitted image of the blue component of the image for the right eye is generated in the liquid crystal panel 10R.

[0131] The control circuit 200 outputs a control signal B_Ctr indicating the turn-on from the timing ts, which starts from the timing t2 and the next unit period Ttm, so that the light-emitting panels 20L_B and 20R_B produce blue light.

[0132] Thus, the transmissive image generated by the liquid crystal panel 10L is colored by the blue light of the light-emitting panel 20L_B and is seen by the user's left eye, while the transmissive image generated by the liquid crystal panel 10R is colored by the blue light of the light-emitting panel 20R_B and is seen by the user's right eye.

[0133] In the liquid crystal element 120, a positive voltage of a data signal is applied during the first half of the unit period Btm, and a negative voltage of a data signal is applied during the second half of the unit period, and the liquid crystal element 120 is driven by AC.

[0134] In this way, within the unit period Rtm, Gtm, and Btm, the images of the red, green, and blue components arrive at the user's eyes in color order, so the user can see a color image.

[0135] Furthermore, during the unit periods Rtm, Gtm, and Btm, the control signal Vsig is the voltage Vcom, thus the liquid crystal panels 30L and 30R are in a non-transmissive state. Therefore, the light generated by the light-emitting panels 20L and 20R will not be emitted outward from the virtual image display device 1 along the Z direction.

[0136] Next, the unit period Ttm used to allow users to see the external scenery will be explained.

[0137] During the unit period Ttm, the liquid crystal panels 10L and 10R perform the same operations as during the unit periods Rtm, Gtm, and Btm, except that the data signals have voltages independent of the image signals Dt_L and Dt_R. Specifically, the display control circuit 140 of the liquid crystal panels 10L and 10R sets the data signals Vid(1) to Vid(n) to a positive voltage Vwt(+) that maximizes transmittance during the first half of the unit period Ttm, and a negative voltage Vwt(-) that maximizes transmittance during the second half of the period.

[0138] During the unit period Ttm, the control circuit 200 sets the control signals R_Ctr, G_Ctr and B_Ctr to the level indicating extinguishing.

[0139] In addition, the control circuit 200 sets the control signal Vsig supplied to the LCD panels 30L and 30R to voltage Vwt (+) at time te, to voltage Vwt (-) at the middle of time Ltm, and to voltage Vcom at time t3.

[0140] In liquid crystal panels 30L and 30R, the change characteristics of optical state (transmittance) relative to the voltage change of control signal Vsig are slower than those of light-emitting panels 20L and 20R, but it is considered that the change characteristics of optical state in liquid crystal panels 30L and 30R are the same as those in liquid crystal panels 10L and 10R.

[0141] Therefore, in this embodiment, the timing for applying voltage Vwt(+) to liquid crystal panels 30L and 30R is set to the timing te for selecting the final m-th row. Thus, the timing for liquid crystal panels 30L and 30R to enter a transmission state is substantially the same as the timing t2 for all liquid crystal elements 120 in liquid crystal panels 10L and 10R to enter a transmission state.

[0142] The control signal Vsig becomes voltage Vcom at a timing t3 that is td ahead of the timing ts at the start of the next unit period Gtm (which selects the timing of the scan line 112 of the first row during the first half of the period). Therefore, the timing delay td at which the transmittance of the liquid crystal panels 30L and 30R reaches its minimum value coincides with the timing ts at the start of the unit period Rtm in the next frame.

[0143] As a result, during the period when liquid crystal panels 30L and 30R were in a transmissive state, TRTm was... Figure 9 The image is shown without shading, representing the period Ltm during which the control signal Vsig becomes either voltage Vwt(+) or Vwt(-), and the time td required for the optical response to be delayed by the voltage change.

[0144] also, Figure 9The shaded periods indicate the periods during which the LCD panel 30L and 30R blocks light.

[0145] During the unit time Ttm, LCD panels 10L, 10R, 30L, and 30R are in a transmissive state, while luminescent panels 20L and 20R are in a non-luminescent state, allowing the user to see the external scenery.

[0146] Thus, in this embodiment, during unit periods Rtm, Gtm, and Btm, a color image can be seen through a color sequence image of the red, green, and blue components. On the other hand, during unit period Ttm, the external scenery can be seen through the light. Furthermore, during unit periods Rtm, Gtm, and Btm, the liquid crystal panels 30L and 30R are in a non-transmissive state, thereby preventing light generated by the light-emitting panels 20L and 20R from escaping to the outside.

[0147] In the first embodiment, the first half of the unit periods Rtm, Gtm, Btm and Ttm are positive write periods and hold periods, and the second half of the unit periods are negative write periods and hold periods. The positive hold period and the negative hold period are of the same length. However, it is also possible to set the following variation without dividing each unit period into a first half period and a second half period.

[0148] Figure 11 This is a diagram used to illustrate the operation of two consecutive frames in the virtual image display device 1 of the modified example of the first embodiment.

[0149] In the variant, the unit periods Rtm, Gtm, Btm, and Ttm are not divided into first and second halves. However, in odd-numbered frames (F_odd), a negative-numbered write period follows a positive-numbered write period, and in even-numbered frames (F_even), a positive-numbered write period follows a negative-numbered write period.

[0150] That is, in the variant example, in the odd-numbered frames (F_odd), the holding period of the negative polarity becomes longer, which becomes the application of the DC component. Therefore, in order to eliminate the application of the DC component, in the even-numbered frames (F_even), the holding period of the positive polarity becomes longer.

[0151] Furthermore, in the modified example, the operation of the light-emitting panels 20L and 20R, the liquid crystal panels 30L and 30R is the same as in the first embodiment.

[0152] Next, a second implementation method will be described, which allows users to see a brighter image of the external scenery.

[0153] Figure 12 This is a diagram illustrating the operation of the virtual image display device 1 according to the second embodiment.

[0154] Implementation Method 2 and Figure 5 as well as Figure 9 The difference in the first embodiment shown is in the construction of the liquid crystal panels 10L and 10R, and the operation of the liquid crystal panels 10L, 10R, 30L, and 30R in a unit period Ttm.

[0155] For ease of explanation, the structure of LCD panels 10L and 10R will be explained first.

[0156] Figure 13 This is a circuit diagram showing the main part of the scan line driving circuit 150 in the liquid crystal panels 10L and 10R. Specifically, it is a diagram showing the structure of the final stage in the scan line driving circuit 150 that outputs three lines of scan signals Gwr(i-1), Gwr(i), and Gwr(i+1).

[0157] When described using the i-th row as an example, one of the two inputs of the NOR circuit L11_i is supplied with the negative logic pulse / Y(i) output from the shift register (not shown) corresponding to the i-th row. The other input of the NOR circuit L11_i is supplied with the control signal / Env_Y output from the display control circuit 140.

[0158] In addition, the control signal / Env_Y is not only supplied to row i, but also publicly supplied to all rows.

[0159] The output of NOR circuit L11_i is connected to one of the two inputs of NOR circuit L12_i. The other input of NOR circuit L12_i is supplied with the control signal Ally_on output from display control circuit 140.

[0160] In addition, the control signal Ally_on is not only supplied to row i, but also publicly supplied to all rows.

[0161] The output of the NOR circuit L12_i is connected to the input of the NOT circuit L13_i. The NOT circuit L13_i inverts the logic level of the signal supplied to the input and outputs it as the scan signal Gwr(i) to the scan line 112 of the i-th row.

[0162] Figure 14 This is a diagram illustrating the operation of the scan line drive circuit 150.

[0163] During the unit period Rtm, Gtm, Btm, the display control circuit 140 outputs the control signal Ally_on at the L level. Therefore, during the unit period Rtm, Gtm, Btm, the pulses / Y(i-1), / Y(i), and / Y(i+1) that are sequentially transmitted and exclusively become L level pulses are limited to the L level pulse width in the control signal / Env_Y, and then the logic levels are inverted by the NOT circuit L13_(i-1), L13_(i), and L13_(i+1), and output as scan signals Gwr(i-1), Gwr(i), and Gwr(i+1) that are time-isolated during the period that become H level.

[0164] In the second embodiment, there is no latter half of the unit period Ttm. Furthermore, during the unit period Ttm, the display control circuit 140 outputs a control signal Ally_on at H level from the timing ts for selecting the scan line 112 of the first row during the first half of the period to the timing te for selecting the scan line 112 of the m-th row.

[0165] If the control signal Ally_on is at level H, then the NOR circuits L12_(i-1), L12_(i), and L12_(i+1) output level L regardless of the pulses / Y(i-1), / Y(i), and / Y(i+1) and the control signal / Env_Y.

[0166] Therefore, during the period when the control signal Ally_on is at level H, the NOT circuits L13_(i-1), L13_(i), and L13_(i+1) output scanning signals Gwr(i-1), Gwr(i), and Gwr(i+1) at level H.

[0167] Figure 15 This is a circuit diagram showing the main parts of the distribution circuit 50 in the liquid crystal panels 10L and 10R. Specifically, this diagram shows the structure of the three columns in the j-th group of the distribution circuit 50.

[0168] In addition, Figure 5 In the diagram, switches 52a, 52b, and 52c are N-channel transistors, but... Figure 15 In the diagram, switches 52a, 52b, and 52c are transmission gates.

[0169] Therefore, the on and off states of switch 52a are controlled not only by the control signal Sel (1), but also by the control signal / Sel (1) which is the inverse of the logic level of the control signal Sel (1).

[0170] Similarly, the on and off states of switch 52b are controlled by control signals Sel (2) and / Sel (2), and the on and off states of switch 52c are controlled by control signals Sel (3) and / Sel (3).

[0171] A group of NOT circuits L21 and switches L22 are provided corresponding to each data line 114. Taking the first series as an example, the input of the NOT circuit L21 is connected to the control line 16. The display control circuit 140 supplies a common control signal Allx_on to each column of the control line 16. The control signal Allx_on is at level H during the unit period Ttm of odd frames (F_odd) and even frames (F_even), and at level L during other periods.

[0172] Furthermore, in the second embodiment, the control signals Sel(1) to Sel(3) are sequentially and exclusively at the H level during the unit period Rtm, Gtm and Btm in the first embodiment during a horizontal scan period (H), but are all at the L level during the unit period Ttm.

[0173] In addition, the control signals / Sel(1) to / Sel(3) become L level sequentially during the unit period Rtm, Gtm and Btm during a horizontal scan period (H), but become H level during the unit period Ttm.

[0174] The input terminal of switch L22, which serves as a transmission gate, is connected to control line 17. Display control circuit 140 applies a voltage Vwt(+) or Vwt(-) to the common ground of each column of control line 17. Specifically, display control circuit 140 applies voltage Vwt(+) to control line 17 during the unit period Ttm of odd-numbered frames (F_odd) and voltage Vwt(-) during the unit period Ttm of even-numbered frames (F_even).

[0175] The on / off state of switch L22 is controlled by the control signal Allx_on. Specifically, switch L22 in each column is on when the control signal Allx_on is at level H, and off when it is at level L.

[0176] In the distribution circuit 50, if it is a unit period Rtm, Gtm, Btm, the control signal Allx_on is at level L, so the switches L22 of each column are in the off state, thus performing the same operation as in the first embodiment.

[0177] On the other hand, in the distribution circuit 50, if it is a unit period Ttm, the control signals Sel(1) to Sel(3) become L level, so switches 52a, 52b, and 52c are in the off state. In addition, if it is a unit period Ttm, the control signal Allx_on becomes H level, so the switches L22 of each column are in the on state. Therefore, if it is a unit period Ttm of an odd frame (F_odd), a voltage Vwt(+) is applied to the data lines 114 of each column simultaneously, and in the unit period Ttm of an even frame (F_even), a voltage Vwt(-) is applied to the data lines 114 of each column simultaneously.

[0178] In the second embodiment, the control circuit 200 outputs the following control signal Vsig.

[0179] In detail, such as Figure 12 As shown, the control signal Vsig becomes voltage Vwt(+) when the first scan line 112 of the first row is selected during the first half of the unit period Ttm, i.e., without waiting for the final selection of the scan line 112 of the mth row.

[0180] In addition, in the second embodiment, the polarity is reversed at half the time of period Ltm to become voltage Vwt(-), and at time t3 it becomes voltage Vcom.

[0181] In the second embodiment, at the timing ts that begins during the unit period Ttm, the control signal Ally_on becomes H level, so the scan signals Gwr(1) to Gwr(m) all become H level.

[0182] On the other hand, since the control signal Allx_on becomes H level, if it is an odd frame (F_odd) unit period Ttm, then the voltage Vwt(+) is applied to the data lines 114 of each column at the same time.

[0183] Therefore, in the second embodiment, a voltage Vwt(+) is applied as a data signal to all pixel electrodes 118 in the liquid crystal panels 10L and 10R at time ts, so the state where the transmittance is maximized arrives earlier than in the first embodiment. On the other hand, the state where the transmittance is maximized ends at time td, so it is unchanged compared to the first embodiment.

[0184] Therefore, in the second embodiment, compared with the first embodiment, the period Tltm (not marked with a shaded line in the figure) can be extended, that is, the period during which the user can see the real image as the external scenery can be extended, thus enabling the user to see the real image more brightly.

[0185] Furthermore, in the second embodiment, if it is the unit period Ttm of an odd-numbered frame (F_odd), only a positive voltage Vwt(+) is applied to the liquid crystal elements 120 of the liquid crystal panels 10L and 10R. Therefore, in order to prevent the application of a DC component, in the unit period Ttm of the next even-numbered frame (F_even), a negative voltage Vwt(-) with reversed polarity is applied to the liquid crystal elements 120 of the liquid crystal panels 10L and 10R.

[0186] In the first embodiment, variations of the first embodiment, and the second embodiment (hereinafter referred to as "the embodiments, etc."), various modifications or applications can be made as follows.

[0187] In other implementations, the liquid crystal panels 30L and 30R may be configured to drive the liquid crystal element 120 for each pixel in the same way as the liquid crystal panels 10L and 10R, and write signals to the pixels in the liquid crystal panels 30L and 30R to maximize the transmittance in a unit period Ttm in sync with the writing in the liquid crystal panels 10L and 10R.

[0188] Alternatively, the light-emitting panels 20L and 20R can be configured to drive each pixel in the same way as the liquid crystal panels 10L and 10R. In the case of driving the light-emitting panels 20L and 20R pixel by pixel, so-called local dimming can also be employed. Specifically, the brightness of the colored light generated in the light-emitting panels 20L and 20R can be adjusted according to the brightness of the color components in the image pixels seen by the user in the liquid crystal panels 10L and 10R.

[0189] Local dimming can improve image visibility and reduce power consumption.

[0190] In addition, in the implementation, etc., a color image is seen by viewing the red, green and blue color components in sequence according to the unit period Rtm, Gtm and Btm. However, it can also be configured to see a monochrome image without dividing it into unit periods Rtm, Gtm and Btm.

[0191] The liquid crystal panel 10L and the light-emitting panel 20L, as well as the liquid crystal panel 10R and the light-emitting panel 20R, can each be composed of a self-emissive display panel, such as a transmissive organic EL display panel. Based on the self-emissive display panel, the liquid crystal panels 30L and 30R are positioned on the opposite side of the user's eyes. In this structure, the self-emissive display panel serves as both a light-emitting unit and a display unit.

[0192] In addition, the LCD panels 30L and 30R switch between light transmission and blocking, so they can be replaced with mechanical shutters, for example.

[0193] Based on the examples above, for instance, master the following methods.

[0194] A virtual image display device of embodiment 1 includes: a light-emitting unit that allows light from the outside to pass through during a first period and emits a first color light during a second period; a display unit that allows light from the outside that has passed through the light-emitting unit to pass through during the first period and generates a transmissive image of the first color light emitted by the light-emitting unit during the second period; and a transmissive light-blocking switching unit that allows light from the outside to pass through during the first period and blocks the first color light emitted from the light-emitting unit during the second period.

[0195] According to the virtual image display device of method 1, the user sees the external scenery during the first period and sees the transmitted image of the display unit as a virtual image during the second period. During the second period, the first color light emitted from the light-emitting unit is blocked, thereby suppressing the generation of periorbital luminescence.

[0196] Unit period Ttm is an example of "first period", and unit period Rtm is an example of "second period". Red light is an example of "first color light", light-emitting panel 20L is an example of "light-emitting part", liquid crystal panel 10L is an example of "display part", and liquid crystal panel 30L is an example of "transmission and light-blocking switching part".

[0197] In the virtual image display device of Method 2 of Method 1, the first period and the second period are repeated alternately. According to the virtual image display device of Method 2, the user can see the virtual image in the transmitted image overlapping with the external scenery in the first period.

[0198] In the virtual image display device of embodiment 3 of embodiment 1, the display unit, the light-emitting unit, and the transmission light-shielding switching unit are arranged in the order of facing the outside. According to the virtual image display device of embodiment 3, an appropriate arrangement of the display unit, the light-emitting unit, and the transmission light-shielding switching unit is achieved.

[0199] In another specific embodiment 4 of the virtual image display device of the first method, during the second period, the light-emitting portion emits the first color light, the second color light, and the third color light in a timely manner, the transmission blocking switching unit blocks the first color light, the second color light, and the third color light emitted from the light-emitting portion, and the display portion generates the transmitted image of the first color light, the transmitted image of the second color light, and the transmitted image of the third color light in a timely manner.

[0200] According to the virtual image display device of method 4, the user can see a colored virtual image. Green light is an example of "secondary color light", and blue light is an example of "tertiary color light".

[0201] In another specific embodiment 5 of the virtual image display device of the first embodiment, the display unit has a plurality of display pixels, which generate the transmission image by vertical scanning and horizontal scanning during the second period.

[0202] According to the virtual image display device of method 5, a transmissive image is generated by multiple display pixels during the second period. Pixel circuit 110 is an example of a "display pixel".

[0203] In the virtual image display device of embodiment 6, specifically embodiment 5, the plurality of display pixels allow light from the outside to pass through simultaneously during the first period. According to the virtual image display device of embodiment 6, since light from the outside is allowed to pass through simultaneously during the first period, the transition to a transmission state occurs in a shorter time compared to the cases where light passes through through horizontal and vertical scans. Therefore, the period during which external light is visible during the first period can be extended.

Claims

1. A virtual image display device, wherein, The virtual image display device includes: The light-emitting part allows light from the outside to pass through during the first period and emits light of the first color during the second period; The display unit allows light from the outside that has passed through the light-emitting unit to pass through during the first period, and generates a transmitted image of the first color light emitted by the light-emitting unit during the second period; as well as The transmission and shielding switching unit allows light from the outside to pass through during the first period and shields the first color light emitted from the light-emitting unit during the second period.

2. The virtual image display device according to claim 1, wherein, The first period and the second period are repeated alternately.

3. The virtual image display device according to claim 1, wherein, The display unit, the light-emitting unit, and the light-transmitting and light-shielding switching unit are arranged in the order of facing the outside.

4. The virtual image display device according to claim 1, wherein, During the second period, The light-emitting portion emits the first color light, the second color light, and the third color light in a timed manner. The transmission-shielding switching unit blocks the first color light, the second color light, and the third color light emitted from the light-emitting unit. The display portion generates, in real time, the transmitted image of the first color light, the transmitted image of the second color light, and the transmitted image of the third color light.

5. The virtual image display device according to claim 1, wherein, The display unit has multiple display pixels. The plurality of display pixels generate the transmission image by vertical and horizontal scanning during the second period.

6. The virtual image display device according to claim 5, wherein, The plurality of display pixels allow light from the outside world to pass through simultaneously during the first period.

Images