A reference voltage switching circuit

Abstract

This application discloses a reference voltage switching circuit, relating to the field of electronic circuit technology. The circuit includes: a judgment module, a clamping follower module, and a switching module; the judgment module is connected to the clamping follower module and the switching module, and the clamping follower module is connected to the switching module; the judgment module and the clamping follower module receive an external reference voltage, and the judgment module and the switching module receive an internal reference voltage; the switching module outputs a reference voltage based on the amplitude of the external reference voltage and the internal reference voltage. By implementing the reference voltage switching circuit described in this application, the reference voltage output to subsequent circuits can be automatically switched according to the amplitude of the external reference voltage and the internal reference voltage, achieving flexible switching of the reference voltage and ensuring the stability and accuracy of the reference voltage output.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to a reference voltage switching circuit. Background Technology

[0002] A single integrated circuit chip typically has an internal reference circuit that provides a reference voltage to the integrated circuit during normal operation. However, in a circuit system composed of multiple integrated circuit chips, a unified reference voltage is often required to ensure consistent voltage across all chips. Currently, diode clamping is commonly used to switch between internal and external reference voltages. However, because the forward voltage of a diode is fixed, obtaining an accurate external reference voltage is difficult, limiting the ability to switch between internal and external reference voltages in large-scale circuit applications. Summary of the Invention

[0003] To address the problems mentioned in the background section, this application provides the following technical solutions: A reference voltage switching circuit is provided, including: a judgment module, a clamping follower module, and a switching module.

[0004] The judgment module is connected to the clamping follow module and the switching module, and the clamping follow module is connected to the switching module.

[0005] The judgment module and the clamping follower module receive an external reference voltage, the judgment module and the switching module receive an internal reference voltage, and the switching module outputs a reference voltage based on the amplitude of the external reference voltage and the internal reference voltage.

[0006] By implementing the reference voltage switching circuit described in the embodiments of this application, the reference voltage output to the subsequent circuit can be automatically switched according to the magnitude of the external reference voltage and the internal reference voltage, realizing flexible switching of the reference voltage; when outputting an external reference voltage to the subsequent circuit, the magnitude of the external reference voltage can be limited to the upper and lower clamping voltage range to prevent abnormal voltage input and ensure the stability and accuracy of the reference voltage output; by using a Schmitt trigger, the logic level is effectively prevented from flipping incorrectly due to small voltage disturbances, improving the circuit's anti-interference capability; a low-power design is also adopted, which turns off some transistors when the external reference voltage is not used, saving static power consumption. Attached Figure Description

[0007] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0008] Figure 1 This is a schematic diagram of the reference voltage switching circuit module provided in an embodiment of this application; Figure 2 This is a schematic diagram of the judgment module provided in an embodiment of this application; Figure 3 This is a schematic diagram of the analog input unit circuit provided in an embodiment of this application; Figure 4 This is a schematic diagram of a logic judgment unit circuit provided in an embodiment of this application; Figure 5 This is a schematic diagram of another logic judgment unit circuit provided in an embodiment of this application; Figure 6 This is a circuit simulation diagram provided in the embodiments of this application; Figure 7 This is a schematic diagram of the clamping follower module circuit provided in an embodiment of this application; Figure 8 This is a schematic diagram of an operational amplifier circuit provided in an embodiment of this application; Figure 9 This is a schematic diagram of the switching module circuit provided in an embodiment of this application; Figure 10 This is another schematic diagram of a resistor network provided in an embodiment of this application; Figure 11 This is a schematic diagram of another switching module circuit provided in an embodiment of this application; Figure 12 This is a simulation diagram of the lower clamping reference voltage provided in the embodiments of this application; Figure 13 This is a simulation diagram of the reference voltage provided in the embodiments of this application; Figure 14 This is a simulation diagram of the upper clamping reference voltage provided in the embodiments of this application. Detailed Implementation

[0009] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0010] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The numbers in the accompanying drawings are only used to distinguish individual functional parts or modules and do not indicate logical relationships between parts or modules. The terms “comprising,” “including,” or “including,” and similar terms mean that the element or object preceding the term encompasses the element or object listed following the term and its equivalents, without excluding other elements or objects. The terms “connected,” “linked,” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. “Above,” “below,” “left,” “right,” etc., are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0011] The various embodiments according to this disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that in the drawings, the same reference numerals are assigned to components having substantially the same or similar structure and function, and repeated descriptions of them will be omitted.

[0012] In view of the problems of switching between internal and external reference voltages in integrated circuit chips as mentioned in the background art, this application provides the following implementation method.

[0013] In some embodiments, such as Figure 1 As shown, a reference voltage switching circuit includes: a judgment module 100, a clamping follower module 200, and a switching module 300.

[0014] The judgment module 100 is connected to the clamping follow module 200 and the switching module 300, and the clamping follow module 200 is connected to the switching module 300.

[0015] The judgment module 100 and the clamping follower module 200 receive the external reference voltage V. REF_EXT The judgment module 100 and the switching module 300 receive the internal reference voltage V. REF_INT The switching module 300 switches according to the external reference voltage V. REF_EXT and internal reference voltage V REF_INT Amplitude output reference voltage V REF .

[0016] The judgment module 100 has: a first port 100a, a second port 100b, a third port 100c, a fourth port 100d, a fifth port 100e, and a sixth port 100f.

[0017] The clamping follower module 200 has: a clamping follower first port 200a, a clamping follower second port 200b, a clamping follower third port 200c, and a clamping follower fourth port 200d.

[0018] The switching module 300 has: a first port 300a, a second port 300b, a third port 300c, a fourth port 300d, and a fifth port 300e.

[0019] After the first port 100a of the judgment module is connected to the first port 200a of the clamp follower, it is used to receive the external reference voltage V. REF_EXT After the second port 100b of the judgment module is connected to the fourth port 300d of the switching module, it is used to receive the internal reference voltage V. REF_INT The third port 100c of the judgment module is connected to the first port 300a of the switching module; the fourth port 100d of the judgment module is connected to the second port 300b of the switching module; the fifth port 100e of the judgment module is connected to the second port 200b of the clamping follower; the sixth port 100f of the judgment module is connected to the third port 200c of the clamping follower; the fourth port 200d of the clamping follower is connected to the third port 300c of the switching module; and the fifth port 300e of the switching module is used to output the reference voltage V. REF .

[0020] like Figure 2 As shown, the judgment module 100 includes: an analog input unit 110 and a logic judgment unit 120.

[0021] The analog input unit 110 has: an analog input first port 110a, an analog input second port 110b, and an analog input third port 110c.

[0022] The logic judgment unit 120 has: a first logic judgment port 120a, a second logic judgment port 120b, a third logic judgment port 120c, a fourth logic judgment port 120d, and a fifth logic judgment port 120e.

[0023] The analog input first port 110a serves as the first port 100a of the judgment module 100, the analog input second port 110b serves as the second port 100b of the judgment module 100, the analog input third port 110c is connected to the logic judgment first port 120a, the logic judgment second port 120b serves as the third port 100c of the judgment module 100 for transmitting the first logic signal, the logic judgment third port 120c serves as the fourth port 100d of the judgment module 100 for transmitting the second logic signal, the logic judgment fourth port 120d serves as the fifth port 100e of the judgment module 100 for transmitting the third logic signal, and the logic judgment fifth port 120e serves as the sixth port 100f of the judgment module 100 for transmitting the fourth logic signal.

[0024] Among them, the level states of the first logic signal are opposite to those of the second logic signal, and the level states of the third logic signal are opposite to those of the fourth logic signal.

[0025] Schematic representation: when the first logic signal is high, the second logic signal is low; when the first logic signal is low, the second logic signal is high. When the third logic signal is high, the fourth logic signal is low; when the third logic signal is low, the fourth logic signal is high.

[0026] Before further describing the specific circuit structures of the judgment module 100, the clamping follower module 200, and the switching module 300, it should be noted that: the first transistor T1 to the fifty-fourth transistor T involved in this application 54 All of these are MOSFETs, and the specific channel types of each MOSFET will be described in detail below.

[0027] like Figure 3 As shown, the analog input unit 110 includes: a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, a ninth transistor T9, and a tenth transistor T1. 10 And the eleventh transistor T 11 .

[0028] The source of the first transistor T1 is connected to the sources of the second transistor T2, the fifth transistor T5, and the sixth transistor T6 to provide the operating voltage AVDD. The gate of the first transistor T1 is connected to its drain, and then to the gate of the second transistor T2 and the drain of the seventh transistor T7. The drain of the second transistor T2 is connected to the source of the third transistor T3 and the source of the fourth transistor T4. The gate of the third transistor T3 serves as the first analog input port 110a, and the gate of the fourth transistor T4 serves as the second analog input port 110b. The drain of the third transistor T3 is connected to the drain and gate of the eighth transistor T8, and the tenth transistor T6. 10 The gate connection of the fourth transistor T4, the drain of the ninth transistor T9, the drain and gate of the eleventh transistor T... 11 The gate of the fifth transistor T5 is connected to its drain, and then the gate of the sixth transistor T6 and the tenth transistor T5 are connected to each other. 10 The drain connection of the sixth transistor T6 is connected to that of the eleventh transistor T. 11 After the drain is connected, it serves as the third analog input port 110c. The source of the seventh transistor T7 is connected to the source of the eighth transistor T8, the source of the ninth transistor T9, and the tenth transistor T10. 10 The source and the eleventh transistor T 11 After the source is connected, it is used to connect the equipotential point AGND.

[0029] It should be noted that the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all P-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), and the substrates of the above transistors are connected to the operating voltage AVDD.

[0030] Seventh transistor T7, eighth transistor T8, ninth transistor T9, tenth transistor T 10 And the eleventh transistor T 11 All are N-channel MOSFETs, and the substrates of the above transistors are connected to the equipotential point AGND.

[0031] The gate of the seventh transistor T7 is connected to the first bias voltage NVBI1. The first bias voltage NVBI1 is only used to set the operating state of the analog input unit 110 circuit. Those skilled in the art can set the amplitude of the first bias voltage NVBI1 according to the operating principle of the analog input unit 110, so that the analog input unit 110 is in normal operating state.

[0032] The operating voltage AVDD is the power supply voltage of the analog circuit in this application, i.e., the analog power supply voltage.

[0033] The equipotential point AGND is the 0 potential point of the analog circuit in this application, i.e., "analog ground".

[0034] like Figure 4 As shown, the logic judgment unit 120 includes: a Schmitt trigger 121, a first inverter 122, a first NOR gate 123, and a second NOR gate 124.

[0035] The input of Schmitt trigger 121 serves as the first logic judgment port 120a. The output of Schmitt trigger 121 is connected to the input of the first inverter 122 and one input of the second NOR gate 124. The output of the first inverter 122 is connected to one input of the first NOR gate 123. The output of the first NOR gate 123 is connected to the other input of the second NOR gate 124 and serves as the second logic judgment port 120b. The output of the second NOR gate 124 is connected to the other input of the first NOR gate 123 and serves as the third logic judgment port 120c.

[0036] When the logic judgment first port 120a receives a high-level signal, the Schmitt trigger 121 flips the high-level signal and transmits the low-level signal to the input of the first inverter 122 and one input of the second NOR gate 124.

[0037] After the first inverter 122 flips the low-level signal to a high-level signal, it transmits the signal to one input of the first NOR gate 123, thereby generating a low-level signal at the output of the first NOR gate 123 and transmitting the low-level signal to the other input of the second NOR gate 124. At the same time, one input of the second NOR gate 124 receives the low-level signal transmitted from the output of the Schmitt trigger 121, thereby generating a high-level signal at the output of the second NOR gate 124.

[0038] In summary, when the first logic judgment port 120a receives a high-level signal, a low-level signal is generated at the second logic judgment port 120b, and a high-level signal is generated at the third logic judgment port 120c.

[0039] Conversely, when the first logic judgment port 120a receives a low-level signal, a high-level signal is generated at the second logic judgment port 120b, and a low-level signal is generated at the third logic judgment port 120c.

[0040] Using a Schmitt trigger can effectively prevent logic level erroneous flipping caused by minor voltage disturbances.

[0041] The first logic signal and the second logic signal are a pair of inverted logic level signals, and the third logic signal and the fourth logic signal are a pair of inverted logic level signals. In this application, the level state of the first logic signal is the same as the level state of the third logic signal. Therefore, the logic levels of different nodes in the logic judgment unit 120 can be obtained as the third logic signal and the fourth logic signal.

[0042] Indicatively, in some embodiments, such as Figure 4 As shown, the input terminal of the first inverter 122 is used as the fourth logic judgment port 120d, and the output terminal of the first inverter 122 is used as the fifth logic judgment port 120e.

[0043] In other embodiments, such as Figure 5 As shown, the output of the first NOR gate 123 is used as the fourth logic judgment port 120d, and the output of the second NOR gate 124 is used as the fifth logic judgment port 120e.

[0044] When the external reference voltage V REF_EXT The amplitude is less than the internal reference voltage V. REF_INT When the amplitude reaches a certain value, an external reference voltage will be enabled. This is because the external reference voltage V... REF_EXT The amplitude is less than the internal reference voltage V. REF_INT The amplitude of this will cause the current in the current mirror of the first transistor T1 to mainly flow to ground through the third transistor T3 and the eighth transistor T8, which in turn will cause the current in the tenth transistor T1 to flow to ground. 10 The gate voltage is higher than that of the eleventh transistor T. 11 The gate voltage, thereby causing current to flow through the tenth transistor T 10 The current is greater than that flowing through the eleventh transistor T 11 The current then pulls up the eleventh transistor T. 11 The drain voltage is output as a high level to the subsequent circuit. At this time, the Schmitt trigger 121 toggles the high level to a low level, causing the second logic port 120b to output a low level and the third logic port 120c to output a high level. Conversely, when the external reference voltage V... REF_EXT The amplitude is greater than the internal reference voltage V. REF_INT When the amplitude is reached, the logic determines the output level of the second port 120b, which is high, and the logic determines the output level of the third port 120c, which is low. The circuit simulation results are as follows: Figure 6 As shown. When the external reference voltage V REF_EXT When the amplitude exceeds 1.3V, the first logic signal flips to a high level, and the second logic signal flips to a low level.

[0045] like Figure 7As shown, the clamping follower module 200 includes: an operational amplifier 210, a first resistor network 220, a second resistor network 230, a third resistor network 240, a fourth resistor network 250, and a twelfth transistor T. 12 Thirteenth transistor T 13 Fourteenth transistor T 14 The fifteenth transistor T 15 The sixteenth transistor T 16 The seventeenth transistor T 17 The eighteenth transistor T 18 The nineteenth transistor T 19 20th transistor T 20 Twenty-first transistor T 21 Twenty-second transistor T 22 Twenty-third transistor T 23 24th transistor T 24 Twenty-fifth transistor T 25 26th transistor T 26 Twenty-seventh transistor T 27 Twenty-eighth transistor T 28 29th transistor T 29 30th transistor T 30 31st transistor T 31 32nd transistor T 32 And the first capacitor C1.

[0046] The operational amplifier 210 has: a first input terminal 210a, a second input terminal 210b, a third input terminal 210d, and an output terminal 210c.

[0047] Twelfth transistor T 12 The source and the thirteenth transistor T 13 The source, the fourteenth transistor T 14 The source and the fifteenth transistor T 15 After the source is connected, it is used to connect the working voltage AVDD. The twelfth transistor T 12 After the gate of the transistor is connected to its drain, it is connected to the thirteenth transistor T. 13 The gate and the sixteenth transistor T 16 The source connection, the thirteenth transistor T 13 The drain of the seventeenth transistor T 17 The source connection, the sixteenth transistor T 16 After the gate of the transistor is connected to its drain, it is connected to the seventeenth transistor T. 17 The gate of the eighteenth transistor T 18 The gate and the twenty-third transistor T 23 The drain connection, the seventeenth transistor T17 The drain of the nineteenth transistor T 19 The drain, source, and twentieth transistor T 20 The gate connection of the fourteenth transistor T 14 After the gate of the transistor is connected to its drain, it is connected to the fifteenth transistor T. 15 The gate of the twentieth transistor T 20 The drain and the twenty-first transistor T 21 The drain connection, the fifteenth transistor T 15 The drain of the eighteenth transistor T 18 The source connection, the twenty-third transistor T 23 The gate of the twenty-second transistor T 22 The gate, drain, and twenty-fourth transistor T 24 The drain and the twenty-fifth transistor T 25 The drain connection, the twenty-second transistor T 22 The source of the 26th transistor T 26 The drain, gate, and twenty-seventh transistor T 27 The gate and the twenty-eighth transistor T 28 The gate connection, the twenty-fifth transistor T 25 The gate of the 32nd transistor T 32 After the gate is connected, the twenty-third transistor T serves as the clamp follower second port 200b of the clamp follower module 200. 23 The source of the 27th transistor T 27 The drain connection, the nineteenth transistor T 19 The source of the transistor is connected to one end of the first resistor network 220, and the other end of the first resistor network 220 is connected to one end of the second resistor network 230. The twentieth transistor T 20 The source of the 21st transistor T 21 After the source terminal is connected, it is connected to one end of the third resistor network 240. The other end of the third resistor network 240 is connected to one end of the fourth resistor network 250 and the second input terminal 210b of the operational amplifier, which serves as the clamp follower fourth port 200d of the clamp follower module 200. The output terminal 210c of the operational amplifier is connected to the twenty-first transistor T. 21 The gate of the thirtieth transistor T 30 The drain of the thirty-first transistor T 31 The drain and the thirty-second transistor T 32 The drain connection is such that the first input terminal 210a of the operational amplifier serves as the first clamp follower port 200a of the clamp follower module 200, and the third input terminal 210d of the operational amplifier serves as the third clamp follower port 200c of the clamp follower module 200. The eighteenth transistor T... 18 The source of the 28th transistor T 28The drain of the twenty-ninth transistor T 29 The drain of the thirtieth transistor T 30 The gate of the transistor is connected to one end of the first capacitor C1, and the twenty-sixth transistor T... 26 The source of the 24th transistor T 24 The source of the 25th transistor T 25 The source of the 27th transistor T 27 The source of the transistor, the other end of the second resistor network 230, the other end of the fourth resistor network 250, and the twenty-eighth transistor T. 28 The source of the 29th transistor T 29 The source of the transistor, the other end of the first capacitor C1, and the thirtieth transistor T. 30 The source, the thirty-first transistor T 31 The source and the thirty-second transistor T 32 After the source is connected, it is used to connect the equipotential point AGND.

[0048] It should be noted that: the twelfth transistor T 12 Thirteenth transistor T 13 Fourteenth transistor T 14 The fifteenth transistor T 15 The sixteenth transistor T 16 The seventeenth transistor T 17 and the eighteenth transistor T 18 All are P-channel MOSFETs, and the substrates of the above transistors are connected to the operating voltage AVDD.

[0049] Nineteenth transistor T 19 20th transistor T 20 Twenty-first transistor T 21 Twenty-second transistor T 22 Twenty-third transistor T 23 24th transistor T 24 Twenty-fifth transistor T 25 26th transistor T 26 Twenty-seventh transistor T 27 Twenty-eighth transistor T 28 29th transistor T 29 30th transistor T 30 31st transistor T 31 32nd transistor T 32 All are N-channel MOSFETs, and the substrates of the above transistors are connected to the equipotential point AGND.

[0050] Twenty-second transistor T 22The drain of the clamping follower module 200 is used to connect to the second bias voltage PIBI1, which is only used to set the operating state of the clamping follower module 200 circuit. Those skilled in the art can set the amplitude of the second bias voltage PIBI1 according to the operating principle of the clamping follower module 200, and the clamping follower module 200 circuit will be in normal operating condition.

[0051] Twenty-fourth transistor T 24 The gate of the twenty-ninth transistor T 29 The gate and the thirty-first transistor T 31 After the gate is connected, it is used to connect the first enable signal ENN.

[0052] In some embodiments, the first resistor network 220 includes a fourth resistor (not shown), the second resistor network 230 includes a fifth resistor (not shown), the third resistor network 240 includes a sixth resistor (not shown), and the fourth resistor network 250 includes a seventh resistor (not shown). The resistance values ​​of the fourth and sixth resistors are equal, and the resistance values ​​of the fifth and seventh resistors are equal, to ensure circuit matching and improve circuit accuracy.

[0053] Twenty-sixth transistor T 26 With the twenty-seventh transistor T 27 They are the same size. The twenty-eighth transistor T 28 The dimensions are based on the voltage ratio of the upper and lower clamps and the twenty-seventh transistor T. 27 The size is determined by this. Illustratively, if the upper clamping voltage is 0.9V and the lower clamping voltage is 0.4V, and the upper clamping voltage is 2.25 times the lower clamping voltage, then the twenty-eighth transistor T... 28 The aspect ratio is the twenty-seventh transistor T. 27 The aspect ratio must be 2.25 times to ensure the accuracy of the clamping.

[0054] Schematic illustration: In the clamp follower module 200 circuit, the first enable signal ENN is active low. When the first enable signal ENN is high, the twenty-fourth transistor T... 24 When the circuit is turned on, the function of the clamping follower module 200 is turned off.

[0055] Operational amplifier 210 is used to output an external reference voltage V at clamp follower third port 200c based on the signals obtained from clamp follower first port 200a and clamp follower third port 200c. REF_EXT .

[0056] like Figure 8 As shown, the operational amplifier 210 includes: the thirty-third transistor T 33 34th transistor T 3435th transistor T 35 The thirty-sixth transistor T 36 37th transistor T 37 The thirty-eighth transistor T 38 39th transistor T 39 40th transistor T 40 41st transistor T 41 42nd transistor T 42 43rd transistor T 43 44th transistor T 44 45th transistor T 45 46th transistor T 46 47th transistor T 47 48th transistor T 48 49th transistor T 49 The fiftieth transistor T 50 51st transistor T 51 52nd transistor T 52 53rd transistor T 53 54th transistor T 54 The components are: first transistor Q1, second transistor Q2, first resistor R1, second resistor R2, third resistor R3, and second capacitor C2.

[0057] The 33rd transistor T 33 The source of the 34th transistor T 34 The source of the 35th transistor T 35 The source of the 36th transistor T 36 The source of the 37th transistor T 37 The source, the thirty-eighth transistor T 38 The source and the thirty-ninth transistor T 39 After the source is connected, it is used to connect the working voltage AVDD. The thirty-third transistor T 33 The drain of the transistor and the drain and gate of the thirty-fourth transistor, and the thirty-fifth transistor T 35 The gate of the thirty-sixth transistor T 36 The gate of the 37th transistor T 37 The gate of the forty-fourth transistor T 44 The drain of the forty-fifth transistor T 45 The drain and the forty-seventh transistor T 47 The drain connection, the forty-fourth transistor T 44 The source of the forty-eighth transistor T 48 The drain connection, the forty-fifth transistor T 45 The gate of the transistor is used as the third input terminal 210d of the operational amplifier, and the forty-fifth transistor T...45 The source of the forty-ninth transistor T 49 The drain connection, the forty-sixth transistor T 46 After the drain is connected to its gate, it is connected to the forty-seventh transistor T. 47 The gate of the forty-eighth transistor T 48 The gate of the forty-ninth transistor T 49 The gate and the fiftieth transistor T 50 The drain connection, the thirty-fifth transistor T 35 The drain of the forty-second transistor T 42 The source of transistor Q1 is connected to the base of transistor Q2, and the forty-second transistor T1 is connected to the source of transistor Q2. 42 The drain of transistor T is connected to one end of the first resistor R1. 42 The gate of the transistor serves as the first input terminal 210a of the operational amplifier, and the thirty-sixth transistor T... 36 The drain of the forty-third transistor T 43 The source of transistor Q1 is connected to the base of transistor Q2, and the forty-third transistor T is connected to the base of transistor Q1. 43 The drain of transistor T is connected to one end of the second resistor R2. 43 The gate of the transistor serves as the second input terminal 210b of the operational amplifier, and the thirty-seventh transistor T... 37 The drain of transistor Q1 is connected to the emitter of transistor Q2 and the emitter of transistor Q1. The collector of transistor Q1 is connected to transistor T51. 51 The drain, gate, and the fifty-third transistor T 53 The gate of the second transistor Q2 is connected to the collector of the fifty-second transistor T. 52 The drain, gate, and the fifty-fourth transistor T 54 The gate connection, the thirty-eighth transistor T 38 After the gate of the transistor is connected to its drain, it is connected to the thirty-ninth transistor T. 39 The gate and the fortieth transistor T 40 The source link, the fortieth transistor T 40 After the gate of the transistor is connected to its drain, it is connected to the forty-first transistor T. 41 The gate and the fifty-third transistor T 53 The drain connection, the thirty-ninth transistor T 39 The drain of the forty-first transistor T 41 The source connection, the forty-first transistor T 41 The drain of the 54th transistor T 54 The drain of the first transistor and one end of the third resistor R3 are connected together to form the output terminal 210c of the op-amp. The other end of the third resistor R3 is connected to one end of the second capacitor C2. The forty-sixth transistor T 46 The source of the forty-seventh transistor T47 The source of the forty-eighth transistor T 48 The source of the 49th transistor T 49 The source of the 50th transistor T 50 The source of the 51st transistor T 51 The source of the 52nd transistor T 52 The source of the 53rd transistor T 53 The source of the 54th transistor T 54 After the source and the second capacitor C2 are connected, they are used to connect to the equipotential point AGND.

[0058] It should be noted that: the thirty-third transistor T 33 34th transistor T 34 35th transistor T 35 The thirty-sixth transistor T 36 37th transistor T 37 The thirty-eighth transistor T 38 39th transistor T 39 40th transistor T 40 41st transistor T 41 42nd transistor T 42 and the forty-third transistor T 43 All are P-channel MOSFETs, and the substrates of the above transistors are connected to the operating voltage AVDD.

[0059] Forty-fourth transistor T 44 45th transistor T 45 46th transistor T 46 47th transistor T 47 48th transistor T 48 49th transistor T 49 The fiftieth transistor T 50 51st transistor T 51 52nd transistor T 52 53rd transistor T 53 54th transistor T 54 All are N-channel MOSFETs, and the substrates of the above transistors are connected to the equipotential point AGND.

[0060] Both transistor Q1 and transistor Q2 are PNP transistors.

[0061] The first input terminal 210a of the operational amplifier is the non-inverting input terminal of the operational amplifier 210, and the second input terminal 210b of the operational amplifier is the inverting input terminal of the operational amplifier.

[0062] Forty-sixth transistor T 46The drain of the amplifier is used to connect to the third bias voltage PIBI2, which is only used to set the operating state of the operational amplifier 210 circuit. Those skilled in the art can set the amplitude of the third bias voltage PIBI2 according to the operating principle of the operational amplifier 210, and the operational amplifier 210 will be in normal operating state.

[0063] The fiftieth transistor T 50 The gate of transistor T is used to connect to the first enable signal ENN, and the thirty-third transistor T. 33 The gate is used to connect the second enable signal ENNZ, and the forty-fourth transistor T 44 The gate is used to connect to ENNZ.

[0064] The first enable signal ENN and the second enable signal ENNZ are a pair of logic level signals with opposite phases, provided by an external circuit, used to enable the circuit to enter the working state. Schematic, in the operational amplifier circuit, the first enable signal ENN is active high. This application does not limit the specific circuitry provided for the first enable signal ENN and the second enable signal ENNZ. Schematic, the first enable signal ENN is input to an inverter, and the second enable signal ENNZ is obtained from the output of the inverter; the second enable signal ENNZ is input to an inverter, and the first enable signal ENN is obtained from the output of the inverter.

[0065] Forty-sixth transistor T 46 47th transistor T 47 48th transistor T 48 and the forty-ninth transistor T 49 This forms a current mirror structure. Those skilled in the art can flexibly adjust the forty-sixth transistor T according to circuit requirements. 46 47th transistor T 47 48th transistor T 48 and the forty-ninth transistor T 49 The aspect ratio.

[0066] The fourth logic signal acts on the forty-fifth transistor T. 45 When no external reference voltage is used, the gate of the forty-fifth transistor T is at a low level, and the fourth logic signal is low. 45 Turning it off saves static power consumption for the circuit.

[0067] The 34th transistor T 34 35th transistor T 35 The thirty-sixth transistor T 36 And the thirty-seventh transistor T 37 This forms a current mirror structure. Those skilled in the art can flexibly adjust the thirty-fourth transistor T according to circuit requirements. 3435th transistor T 35 The thirty-sixth transistor T 36 And the thirty-seventh transistor T 37 The aspect ratio.

[0068] Forty-second transistor T 42 and the forty-third transistor T 43 And the first resistor R1 and the second resistor R2 are used for input matching, therefore, the forty-second transistor T 42 and the forty-third transistor T 43 The first and second resistors R1 and R2 have the same dimensions. The first transistor Q1 and the second transistor Q2 have the same dimensions. The fifty-first transistor T... 51 and the fifty-second transistor T 52 They are the same size.

[0069] The third resistor R3 is connected in series with the second capacitor C2, serving as frequency compensation for the operational amplifier and maintaining circuit stability.

[0070] like Figure 9 As shown, the switching module 300 includes a first switching transistor TS1 and a second switching transistor TS2.

[0071] The gate of the first switching transistor TS1 serves as the first port 300a of the switching module, the drain of the first switching transistor TS1 serves as the third port 300c of the switching module, the gate of the second switching transistor TS2 serves as the second port 300b of the switching module, the drain of the second switching transistor TS2 serves as the fourth port 300d of the switching module, and the source of the first switching transistor TS1 and the source of the second switching transistor TS2 are connected to serve as the fifth port 300e of the switching module.

[0072] Both the first switch TS1 and the second switch TS2 are MOSFETs.

[0073] Preferably, both the first switch TS1 and the second switch TS2 are N-channel MOSFETs.

[0074] The switching module 300 is capable of switching between internal and external reference voltages and outputting the reference voltage to subsequent circuits. When an external reference voltage is enabled, it is output to the subsequent circuit; otherwise, the internal reference voltage is output to the subsequent circuit. When an external reference voltage is enabled, the first port 300a of the switching module receives a high level, the first switch TS1 is turned on, the second port 300b of the switching module receives a low level, the second switch TS2 is turned off, and the external reference voltage V received at the third port 300c of the switching module is switched. REF_EXTThe output is transmitted through the fifth port 300e of the switching module. When the internal reference voltage is enabled, the first port 300a of the switching module receives a low level, the first switch TS1 is turned off, the second port 300b of the switching module receives a high level, the second switch TS2 is turned on, and the internal reference voltage V received by the fourth port 300d of the switching module is transmitted. REF_INT By switching the output of port 5 (300e) of the module.

[0075] In other embodiments, such as Figure 10 As shown, the third resistor network 240 includes an eighth resistor R8 and a ninth resistor R9. One end of the eighth resistor R8 serves as one end of the third resistor network 240, and the other end of the eighth resistor R8 is connected to one end of the ninth resistor R9. The other end of the ninth resistor R9 serves as the other end of the third resistor network 240. The fourth resistor network 250 includes a tenth resistor R... 10 Eleventh resistor R 11 and the twelfth resistor R 12 The tenth resistor R 10 One end serves as one end of the fourth resistor network 240, and the tenth resistor R 10 The other end is connected to the eleventh resistor R 11 One end is connected to the eleventh resistor R. 11 The other end is connected to the twelfth resistor R 12 One end is connected to the twelfth resistor R. 12 The other end serves as the other end of the fourth resistor network 250.

[0076] One end of the eighth resistor R8, the connection point between the eighth resistor R8 and the ninth resistor R9, and the connection point between the ninth resistor R9 and the tenth resistor R 10 At the connection point, the tenth resistor R 10 With the eleventh resistor R 11 At the connection point, the eleventh resistor R 11 With the twelfth resistor R 12 Voltage output ports are led out from the connection points of the resistors. Specifically, the ninth resistor R9 and the tenth resistor R... 10 The connection point serves as the clamping follower for the output voltage of the fourth port 200d. The voltage amplitudes output from other voltage output ports are several times the output voltage amplitude of the clamping follower for the fourth port 200d. Schematic, the voltage amplitude output at one end of the eighth resistor R8 is 1.15 times the output voltage amplitude of the clamping follower for the fourth port 200d; the voltage amplitude output at the connection between the eighth resistor R8 and the ninth resistor R9 is 1.05 times the output voltage amplitude of the clamping follower for the fourth port 200d; and the voltage amplitude at the connection of the tenth resistor R... 10 With the eleventh resistor R 11 The voltage amplitude output at the connection point is 0.925 times the voltage amplitude output at the clamp follower fourth port 200d, at the eleventh resistor R.11 With the twelfth resistor R 12 The voltage amplitude output at the connection point is 0.75 times the voltage amplitude of the clamp follower's fourth port 200d output voltage. The specific multiple is determined by adjusting the eighth resistor R8, the ninth resistor R9, and the tenth resistor R... 10 Eleventh resistor R 11 and the twelfth resistor R 12 The resistance values ​​are determined. This is to facilitate monitoring of the characteristic voltage amplitudes (V1, V2, V3, and V4) in subsequent circuits.

[0077] Accordingly, the first resistor network 220 includes: a thirteenth resistor R 13 and the fourteenth resistor R 14 The second resistor network 230 includes: a fifteenth resistor R 15 The sixteenth resistor R 16 and the seventeenth resistor R 17 The thirteenth resistor R 13 One end serves as one end of the first resistor network 220, and the thirteenth resistor R 13 The other end is connected to the fourteenth resistor R 14 One end is connected to the fourteenth resistor R. 14 The other end serves as the other end of the first resistor network 220, and the fifteenth resistor R 15 One end serves as one end of the second resistor network 230, and the fifteenth resistor R 15 The other end is connected to the sixteenth resistor R 16 One end is connected to the sixteenth resistor R. 16 The other end is connected to the seventeenth resistor R 17 One end is connected to the seventeenth resistor R. 17 The other end serves as the other end of the second resistor network 230. The thirteenth resistor R 13 The resistance value of the fourteenth resistor R is equal to that of the eighth resistor R8. 14 The resistance value is equal to that of the ninth resistor R9, and the resistance value of the fifteenth resistor R... 15 The resistance value and the tenth resistor R 10 The resistance values ​​are equal, the sixteenth resistor R 16 The resistance value and the eleventh resistor R 11 The resistance values ​​are equal, the seventeenth resistor R 17 The resistance value of the twelfth resistor R 12 The resistance values ​​are equal.

[0078] like Figure 11 As shown, in order to detect the characteristic voltage amplitude, corresponding switching transistors (TS3, TS4, TS5 and TS6) are set in the switching module 300, so that the drain of the corresponding switching transistor is connected to the corresponding voltage, and the voltage amplitude is output from its source.

[0079] The working principle of the reference voltage switching circuit described in this application is as follows: When an external reference voltage is enabled, but its amplitude is less than the amplitude of the lower clamping voltage, the lower clamping function will be activated. In this case, the judgment module 100 will operate first, and the external reference voltage V... REF_EXT The amplitude is less than the internal reference voltage V. REF_INT The amplitude of the signal causes the third port 100c and the fifth port 100e of the judgment module to output low-level signals, while the fourth port 100d and the sixth port 100f of the judgment module output high-level signals. The twenty-sixth transistor T in the clamping follower module 200... 26 Upon receiving the second bias voltage PIBI1, a first current is generated and mirrored to the twenty-seventh transistor T. 27 Then, after passing through the twenty-third transistor T... 23 The sixteenth transistor T 16 and the twelfth transistor T 12 Mirroring to the thirteenth transistor T 13 The mirror current flows through the seventeenth transistor T. 17 The nineteenth transistor T 19 The first resistor network 220 and the second resistor network 230 flow to ground, generating the nineteenth transistor T. 19 The drain voltage of the nineteenth transistor T 19 The drain voltage is that of the nineteenth transistor T. 19 The sum of the gate-source voltage and the voltage generated by the mirror current flowing through the first resistor network 220 and the second resistor network 230. At this time, the external reference voltage V REF_EXT The output voltage generated by operational amplifier 210 is less than that of the nineteenth transistor T. 19 The drain voltage of the twentieth transistor T. 20 And the twenty-first transistor T 21 Together, they determine the current flowing through the third resistor network 240 and the fourth resistor network 250. At this time, the twentieth transistor T... 20 Turn on, transistor T21 21 When turned off, the output voltage of the operational amplifier is the product of the mirror current and the resistance of the fourth resistor network 250. At this time, the voltage at the second input terminal 210b of the operational amplifier is greater than the voltage at the first input terminal 210a of the operational amplifier, causing the potential at the output terminal 210c of the operational amplifier to be pulled to 0, and clamping voltage is output at the fourth port 200d. Figure 12 The simulation results of the above process are shown. Figure 12 The lower clamping voltage is 400mV, the external reference voltage is 200mV, and the reference voltage supplied to the subsequent circuit is 400mV.

[0080] When the external reference voltage VREF_EXT When the clamping voltage is increased to the lower clamping voltage, it will enter follower mode, that is, the voltage output from the fourth port 200d will follow the external reference voltage V. REF_EXT The amplitude change. The judgment module 100 operates first, with the external reference voltage V... REF_EXT The amplitude is less than the internal reference voltage V. REF_INT The amplitude of the signal causes the third port 100c and the fifth port 100e of the judgment module to output low-level signals, while the fourth port 100d and the sixth port 100f of the judgment module output high-level signals. Subsequently, the operational amplifier 210 operates, and the external reference voltage V... REF_EXT The signal is transmitted to the first input terminal 210a of the operational amplifier, i.e., the forty-second transistor T. 42 The gate of transistor T. At this time, the forty-second transistor T... 42 The source voltage is conducted to the base of the second transistor Q2, and the collector voltage of the second transistor Q2 drives the fifty-fourth transistor T. 54 The gate of the transistor generates an output voltage at the output terminal 210c of the operational amplifier, which drives the twenty-first transistor T. 21 A current is generated, resulting in a voltage drop across the third resistor network 240 and the fourth resistor network 250. The voltage at the connection point of the third resistor network 240 and the fourth resistor network 250 is fed back to the second input terminal 210b of the operational amplifier, making the collector voltage of the first transistor Q1 equal to the collector voltage of the second transistor Q2, and the base voltage of the first transistor Q1 equal to the base voltage of the second transistor Q2. The voltage at the second input terminal 210b is equal to the external reference voltage V. REF_EXT Equal. The circuit simulation results under this mode are as follows: Figure 13 As shown. External reference voltage V REF_EXT The reference voltage provided to the subsequent circuit is 600mV.

[0081] When the external reference voltage V REF_EXT When the voltage is increased further to trigger the upper clamping voltage, the circuit enters the upper clamping mode, clamping the reference voltage supplied to subsequent circuits at the upper clamping voltage. The judgment module 100 operates first, with the external reference voltage V... REF_EXT The amplitude is less than the internal reference voltage V. REF_INT The amplitude of the signal causes the third port 100c and the fifth port 100e of the judgment module to output low-level signals, while the fourth port 100d and the sixth port 100f of the judgment module output high-level signals. The twenty-sixth transistor T... 26 After receiving the second bias voltage PIBI1, the current is generated and mirrored to the twenty-eighth transistor T. 28 Assuming the twenty-eighth transistor T 28 The aspect ratio of the 26th transistor T 26The aspect ratio is 2.25 times that of the 28th transistor T. 28 The magnitude of the mirror current flowing through the twenty-sixth transistor T is 26 2.25 times the current. With the external reference voltage V REF_EXT As the voltage gradually increases, the voltage at the output terminal 210c of the op-amp also gradually increases, causing current to flow through the twenty-first transistor T. 21 The current increases, thus causing current to flow through the fourteenth transistor T. 14 The current increases, and a corresponding gate-source voltage is generated at the gate of the fourteenth transistor, due to the fourteenth transistor T 14 With the fifteenth transistor T 15 Since they are the same size, current flows through the fifteenth transistor T. 15 The current flowing through the fourteenth transistor T 14 The currents are equal. When the current flows through the fourteenth transistor T 14 The current flowing through the twenty-eighth transistor T is greater than that flowing through the transistor T. 28 When the current is [current], the twenty-eighth transistor T 28 The drain voltage will increase, which in turn will cause the thirtieth transistor T to... 30 Turn on, thirtieth transistor T 30 When turned on, it will pull down the voltage at the output terminal 210c of the op-amp, forming negative feedback. This, in turn, limits the power supplied to the twenty-first transistor T. 21 The gate drive voltage generates a fixed voltage at the connection between the third resistor network 240 and the fourth resistor network 250, which clamps and follows the voltage output of the fourth port 200d. Figure 14 The circuit simulation results under the upper clamping state are shown, with the external reference voltage V. REF_EXT It is 1V, and the reference voltage provided to the subsequent circuit is 900mV.

[0082] Finally, when the external reference voltage V REF_EXT The amplitude is greater than the internal reference voltage V. REF_INT The amplitude causes the third port 100c and the fifth port 100e of the judgment module to output high-level signals, and the fourth port 100d and the sixth port 100f of the judgment module to output low-level signals. At this time, the twenty-fifth transistor T... 25 And the thirty-second transistor T 32 Turn on, twentieth transistor T 20 The gate potential is pulled low, and the clamp follower module 200 is turned off. The reference voltage switching circuit outputs the internal reference voltage V to the subsequent circuit. REF_INT This application does not limit the application to the twentieth transistor T. 20 To illustrate, the gate potential of the twentieth transistor T can be pulled low by driving the switching transistor to conduct. 20 The gate potential is pulled low.

[0083] By implementing the reference voltage switching circuit described in the embodiments of this application, the reference voltage output to the subsequent circuit can be automatically switched according to the magnitude of the external reference voltage and the internal reference voltage, realizing flexible switching of the reference voltage; when outputting an external reference voltage to the subsequent circuit, the magnitude of the external reference voltage can be limited to the upper and lower clamping voltage range to prevent abnormal voltage input and ensure the stability and accuracy of the reference voltage output; by using a Schmitt trigger, the logic level is effectively prevented from flipping incorrectly due to small voltage disturbances, improving the circuit's anti-interference capability; a low-power design is also adopted, which turns off some transistors when the external reference voltage is not used, saving static power consumption.

[0084] All of the above-mentioned optional technical solutions can be combined in any way to form the optional embodiments of this application, and will not be described in detail here.

[0085] Note that the above description is merely a preferred embodiment and the technical principles employed in this application. Those skilled in the art will understand that this application is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application. Therefore, although this application has been described in detail through the above embodiments, this application is not limited to the above embodiments. Many other equivalent embodiments may be included without departing from the concept of this application, and the scope of this application is determined by the scope of the appended claims.

Claims

1. A reference voltage switching circuit, characterized in that, include: The system includes a judgment module (100), a clamping and following module (200), and a switching module (300). The judgment module (100) is connected to the clamping follow module (200) and the switching module (300), and the clamping follow module (200) is connected to the switching module (300); The judgment module (100) and the clamping follower module (200) receive an external reference voltage (V). REF_EXT The judgment module (100) and the switching module (300) receive the internal reference voltage (V). REF_INT The switching module (300) adjusts the switching based on the external reference voltage (V). REF_EXT ) and the internal reference voltage (V REF_INT The amplitude output reference voltage (V) REF ).

2. The reference voltage switching circuit according to claim 1, characterized in that, The judgment module (100) has: a first judgment module port (100a), a second judgment module port (100b), a third judgment module port (100c), a fourth judgment module port (100d), a fifth judgment module port (100e), and a sixth judgment module port (100f). The clamping follow module (200) has: a clamping follow first port (200a), a clamping follow second port (200b), a clamping follow third port (200c), and a clamping follow fourth port (200d); The switching module (300) has: a first port (300a), a second port (300b), a third port (300c), a fourth port (300d), and a fifth port (300e). After the first port (100a) of the judgment module is connected to the first port (200a) of the clamping follower, it is used to receive the external reference voltage (V). REF_EXT After the second port (100b) of the judgment module is connected to the fourth port (300d) of the switching module, it is used to receive the internal reference voltage (V). REF_INT The third port (100c) of the judgment module is connected to the first port (300a) of the switching module; the fourth port (100d) of the judgment module is connected to the second port (300b) of the switching module; the fifth port (100e) of the judgment module is connected to the second port (200b) of the clamping follower; the sixth port (100f) of the judgment module is connected to the third port (200c) of the clamping follower; the fourth port (200d) of the clamping follower is connected to the third port (300c) of the switching module; and the fifth port (300e) of the switching module is used to output the reference voltage (V). REF ).

3. The reference voltage switching circuit according to claim 1, characterized in that, The judgment module (100) includes: an analog input unit (110) and a logic judgment unit (120); The analog input unit (110) has: an analog input first port (110a), an analog input second port (110b), and an analog input third port (110c). The logic judgment unit (120) has: a first logic judgment port (120a), a second logic judgment port (120b), a third logic judgment port (120c), a fourth logic judgment port (120d), and a fifth logic judgment port (120e). The analog input first port (110a) serves as the first port (100a) of the judgment module (100), the analog input second port (110b) serves as the second port (100b) of the judgment module (100), the analog input third port (110c) is connected to the logic judgment first port (120a), the logic judgment second port (120b) serves as the third port (100c) of the judgment module (100) and is used to transmit a first logic signal, the logic judgment third port (120c) serves as the fourth port (100d) of the judgment module (100) and is used to transmit a second logic signal, the logic judgment fourth port (120d) serves as the fifth port (100e) of the judgment module (100) and is used to transmit a third logic signal, and the logic judgment fifth port (120e) serves as the sixth port (100f) of the judgment module (100) and is used to transmit a fourth logic signal. Wherein, the first logic signal has the opposite level state to the second logic signal, and the third logic signal has the opposite level state to the fourth logic signal.

4. The reference voltage switching circuit according to claim 3, characterized in that, The analog input unit (110) includes: a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), a seventh transistor (T7), an eighth transistor (T8), a ninth transistor (T9), and a tenth transistor (T1). 10 ) and the eleventh transistor (T 11 ); The source of the first transistor (T1) is connected to the sources of the second transistor (T2), the fifth transistor (T5), and the sixth transistor (T6) to provide the operating voltage (AVDD). The gate of the first transistor (T1) is connected to its drain, and then to the gate of the second transistor (T2) and the drain of the seventh transistor (T7). The drain of the second transistor (T2) is connected to the source of the third transistor (T3) and the source of the fourth transistor (T4). The gate of the third transistor (T3) serves as the first analog input port (110a), and the gate of the fourth transistor (T4) serves as the second analog input port (110b). The drain of the third transistor (T3) is connected to the drain and gate of the eighth transistor (T8) and the tenth transistor (T1). 10 The gate of the fourth transistor (T4) is connected to the drain of the ninth transistor (T9) and the gate of the eleventh transistor (T1). 11 The gate of the fifth transistor (T5) is connected to its drain, and the gate of the fifth transistor (T5) is connected to the gate of the sixth transistor (T6) and the gate of the tenth transistor (T7). 10 The drain of the sixth transistor (T6) is connected to the drain of the eleventh transistor (T1). 11 The drain of the seventh transistor (T7) is connected to the third analog input port (110c). The source of the seventh transistor (T7) is connected to the source of the eighth transistor (T8), the source of the ninth transistor (T9), and the source of the tenth transistor (T10c). 10 The source of the eleventh transistor (T) and the source of the eleventh transistor (T) 11 After the source of the ) is connected, it is used to connect the equipotential point (AGND).

5. The reference voltage switching circuit according to claim 3, characterized in that, The logic judgment unit (120) includes: a Schmitt trigger (121), a first inverter (122), a first NOR gate (123), and a second NOR gate (124). The input terminal of the Schmitt trigger (121) serves as the first port (120a) for the logic judgment. The output terminal of the Schmitt trigger (121) is connected to the input terminal of the first inverter (122) and one input terminal of the second NOR gate (124). The output terminal of the first inverter (122) is connected to one input terminal of the first NOR gate (123). The output terminal of the first NOR gate (123) is connected to the other input terminal of the second NOR gate (124) and serves as the second port (120b) for the logic judgment. The output terminal of the second NOR gate (124) is connected to the other input terminal of the first NOR gate (123) and serves as the third port (120c) for the logic judgment.

6. The reference voltage switching circuit according to claim 5, characterized in that, The output of the first NOR gate (123) is used as the fourth port (120d) of the logic judgment, or the input of the first inverter (122) is used as the fourth port (120d) of the logic judgment. The output of the second NOR gate (124) is used as the fifth port (120e) of the logic judgment, or the output of the first inverter (122) is used as the fifth port (120e) of the logic judgment.

7. The reference voltage switching circuit according to claim 1, characterized in that, The clamping follower module (200) includes: an operational amplifier (210), a first resistor network (220), a second resistor network (230), a third resistor network (240), a fourth resistor network (250), and a twelfth transistor (T). 12 ), the thirteenth transistor (T) 13 ), the fourteenth transistor (T) 14 ), the fifteenth transistor (T) 15 ), the sixteenth transistor (T) 16 ), the seventeenth transistor (T) 17 ), the eighteenth transistor (T) 18 ), the nineteenth transistor (T) 19 ), the twentieth transistor (T) 20 ), Twenty-first transistor (T) 21 ), Twenty-second transistor (T) 22 ), Twenty-third transistor (T) 23 ), Twenty-fourth transistor (T) 24 ), Twenty-fifth transistor (T) 25 ), the twenty-sixth transistor (T) 26 ), Twenty-seventh transistor (T) 27 ), the twenty-eighth transistor (T) 28 ), the twenty-ninth transistor (T) 29 ), the thirtieth transistor (T) 30 ), the thirty-first transistor (T) 31 ), the thirty-second transistor (T) 32 ) and the first capacitor (C1); The operational amplifier (210) has: a first input terminal (210a), a second input terminal (210b), a third input terminal (210d), and an output terminal (210c). The twelfth transistor (T) 12 The source of ) and the thirteenth transistor (T) 13 The source of the fourteenth transistor (T) 14 The source of the transistor and the fifteenth transistor (T) 15 After the source of the ) is connected, it is used to connect the working voltage (AVDD). The twelfth transistor (T) 12 After the gate of the transistor is connected to its drain, it is connected to the thirteenth transistor (T). 13 The gate of the sixteenth transistor (T) and the gate of the sixteenth transistor (T) 16 The source connection of the thirteenth transistor (T) 13 The drain of the transistor and the seventeenth transistor (T) 17 The source connection of the sixteenth transistor (T) 16 After the gate of the transistor is connected to its drain, it is connected to the seventeenth transistor (T). 17 The gate of the eighteenth transistor (T) 18 The gate of the 23rd transistor and the gate of the 24th transistor (T) 23 The drain connection of the seventeenth transistor (T) 17 The drain of the nineteenth transistor (T) and the drain of the nineteenth transistor (T) 19 The drain and source of the 10th transistor (T) and the 20th transistor (T) 20 The gate connection of the fourteenth transistor (T) 14 After the gate of the transistor is connected to its drain, it is connected to the fifteenth transistor (T). 15 The gate of the twentieth transistor (T) 20 The drain of the 21st transistor (T) and the 22nd transistor (T) 21 The drain connection of the fifteenth transistor (T) 15 The drain of the transistor and the eighteenth transistor (T) 18 The source connection of the 23rd transistor (T) 23 The gate of the 22nd transistor (T) and the gate of the 22nd transistor (T) 22 The gate, drain, and the twenty-fourth transistor (T) 24 The drain of the 25th transistor (T) and the drain of the 25th transistor (T) 25 The drain connection of the 22nd transistor (T) 22 The source of ) and the 26th transistor (T) 26 The drain, gate, and the twenty-seventh transistor (T) 27 The gate of the 28th transistor and the gate of the 28th transistor (T) 28 The gate connection of the 25th transistor (T) 25 The gate of the 32nd transistor (T) and the gate of the 32nd transistor (T) 32 After the gate of the ) is connected, as the clamp follower second port (200b) of the clamp follower module (200), the 23rd transistor (T) 23 The source of ) and the twenty-seventh transistor (T) 27 The drain connection of the nineteenth transistor (T) 19 The source of the twentieth transistor (T) is connected to one end of the first resistor network (220), and the other end of the first resistor network (220) is connected to one end of the second resistor network (230). 20 The source of ) and the twenty-first transistor (T) 21 The source of the op-amp is connected to one end of the third resistor network (240), and the other end of the third resistor network (240) is connected to one end of the fourth resistor network (250) and the second input terminal (210b) of the op-amp as the clamp follower fourth port (200d) of the clamp follower module (200). The output terminal (210c) of the op-amp is connected to the twentieth eleventh transistor (T). 21 The gate of the thirtieth transistor (T) 30 The drain of the 31st transistor (T) 31 The drain of the 32nd transistor (T) and the drain of the 32nd transistor (T) 32 The drain connection of the operational amplifier is such that the first input terminal (210a) of the operational amplifier serves as the first clamp follower port (200a) of the clamp follower module (200), and the third input terminal (210d) of the operational amplifier serves as the third clamp follower port (200c) of the clamp follower module (200). The eighteenth transistor (T) 18 The source of ) and the twenty-eighth transistor (T) 28 The drain of the 29th transistor (T) 29 The drain of the thirtieth transistor (T) 30 The gate of the 26th transistor (T) is connected to one end of the first capacitor (C1), and the gate of the second sixteenth transistor (T) is connected to one end of the first capacitor (C1). 26 The source of the transistor and the twenty-fourth transistor (T) 24 The source of the 25th transistor (T) 25 The source of the 27th transistor (T) 27 The source of the second resistor network (230), the other end of the fourth resistor network (250), and the twenty-eighth transistor (T) 28 The source of the 29th transistor (T) 29 The source of the first capacitor (C1), the other end of the first capacitor (C1), and the thirtieth transistor (T) 30 The source of the transistor, the thirty-first transistor (T) 31 The source of the transistor and the thirty-second transistor (T) 32 After the source of the ) is connected, it is used to connect the equipotential point (AGND).

8. The reference voltage switching circuit according to claim 7, characterized in that, The operational amplifier (210) is used to output the external reference voltage (V) at the clamp follower third port (200c) based on the signals obtained from the clamp follower first port (200a) and the clamp follower third port (200c). REF_EXT ).

9. The reference voltage switching circuit according to claim 1, characterized in that, The switching module (300) includes: a first switching transistor (TS1) and a second switching transistor (TS2); The gate of the first switching transistor (TS1) serves as the first port (300a) of the switching module, the drain of the first switching transistor (TS1) serves as the third port (300c) of the switching module, the gate of the second switching transistor (TS2) serves as the second port (300b) of the switching module, the drain of the second switching transistor (TS2) serves as the fourth port (300d) of the switching module, and the source of the first switching transistor (TS1) and the source of the second switching transistor (TS2) are connected to serve as the fifth port (300e) of the switching module.

10. The reference voltage switching circuit according to claim 9, characterized in that, The first switch (TS1) and the second switch (TS2) are N-channel MOSFETs.

Images