Controller circuit applied to switching voltage regulator and control method thereof

CN122837577APending Publication Date: 2026-09-29AIROHA TECHNOLOGY CORPORATION
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Patent Information

Application Number
CN202610381256.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2026-01-25
Filing Date
2026-03-26
Publication Date
2026-09-29

AI Technical Summary

Technical Problem

当切换式稳压器的输出电压提供至轻载(light load)(或极轻载(extremely light load))时,切换式稳压器的切换频率(switching frequency)FSW较低,可能会导致可听见的电源噪声(power noise)而影响了使用者的听觉体验

Benefits of technology

[0003]本发明的目的之一在于提出一种用于控制切换式稳压器中的适应性电荷回收的方法和装置。

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Abstract

The present application provides a controller circuit and a control method thereof applied to a switching regulator. The controller circuit includes a constant on-time setting circuit and a decision circuit. The constant on-time setting circuit adaptively adjusts a constant on-time control setting, wherein a turn-on time of an upper bridge power switch of the switching regulator depends on the constant on-time control setting. The decision circuit enables a control mechanism to periodically trigger a regulation operation of an output voltage of the switching regulator during a period in which the constant on-time control setting is assigned a minimum constant on-time control value allowed by the switching regulator, wherein a turn-off time point of a lower bridge power switch of the switching regulator depends on a comparison between a feedback voltage and a first reference voltage during the period, wherein the feedback voltage is derived from the output voltage.
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Description

Technical Field

[0001] This invention relates to the design of switching regulators, and more particularly to a method and apparatus for controlling adaptive charge-recovery in switching regulators. Background Technology

[0002] With the advancement of technology, various electronic products have emerged and are widely used in daily life. Generally, electronic products require switching regulators to provide operating power. A switching regulator is a buck converter that can convert high DC voltage to low and stable DC voltage to meet the normal operating requirements of electronic products. Switching regulators can be used in audio devices such as Bluetooth headsets. When the output voltage of a switching regulator is provided to a light load (or extremely light load), the switching frequency F of the switching regulator... SW A lower frequency may result in audible power noise, affecting the user's auditory experience. To maintain the switching frequency F under light (or very light) load conditions... SW Above the audio frequency band (i.e., F) SW For frequencies above 20kHz, a common solution is to add a dummy load to the output node of the switching regulator. However, adding a dummy load causes energy loss, resulting in decreased efficiency under light (or very light) load conditions. Summary of the Invention

[0003] One of the objectives of this invention is to provide a method and apparatus for controlling adaptive charge recovery in a switching regulator.

[0004] In one embodiment of the present invention, a controller circuit for a switching regulator is disclosed. The controller circuit includes a constant on-time setting circuit and a decision circuit. The constant on-time setting circuit adaptively adjusts a constant on-time control setting, wherein the on-time of an upper-bridge power switch of the switching regulator depends on the constant on-time control setting. The decision circuit enables a control mechanism to periodically trigger a voltage regulation operation of an output voltage of the switching regulator during a period in which the constant on-time control setting is assigned a minimum allowable constant on-time control value for the switching regulator, wherein during this period, the off-time of a lower-bridge power switch of the switching regulator depends on a comparison between a feedback voltage and a first reference voltage, wherein the feedback voltage is derived from the output voltage.

[0005] In one embodiment of the present invention, a method for controlling a switching regulator is disclosed. The method includes: adaptively adjusting a constant on-time control setting, wherein an on-time of an upper-bridge power switch of the switching regulator depends on the constant on-time control setting; and during a period in which the constant on-time control setting is assigned a minimum allowable constant on-time control value for the switching regulator, enabling a control mechanism to periodically trigger a voltage regulation operation of an output voltage of the switching regulator, wherein during this period, a shutdown time of a lower-bridge power switch of the switching regulator depends on a comparison between a feedback voltage and a first reference voltage, wherein the feedback voltage is derived from the output voltage.

[0006] When the switching regulator operates in the CB mode proposed in this invention, the on state of the upper bridge power switch can be periodically triggered based on a fixed clock CLK, while the off state of the lower bridge power switch can be based on the feedback voltage V. FB This is triggered when specific conditions are met. The CB control scheme proposed in this invention will be activated. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of a switching voltage regulator according to an embodiment of the present invention.

[0008] Figure 2 This is a schematic diagram of normal COT voltage regulation operation and CB mode voltage regulation operation according to an embodiment of the present invention.

[0009] Figure 3 This is a schematic diagram of an adaptive adjustment algorithm based on pulse width modulation used in the controller circuit of an embodiment of the present invention.

[0010] Figure 4 This is a schematic diagram of the output voltage waveform generated by voltage regulation in CB mode according to an embodiment of the present invention.

[0011] Figure 5 This is a schematic diagram of the controller circuit of a switching regulator according to an embodiment of the present invention.

[0012] Figure 6 This is a flowchart of a method for controlling a switching voltage regulator according to an embodiment of the present invention.

[0013] Figure 7 This is a flowchart of a hysteresis-based control method for controlling the voltage regulation operation of the output voltage according to an embodiment of the present invention.

[0014] Figure 8 This is a schematic diagram of the hysteresis behavior of a switching regulator according to an embodiment of the present invention.

[0015] [Symbol Explanation]

[0016] 100: Switching voltage regulator

[0017] 102: Feedback Circuit

[0018] 104, 500: Controller circuit

[0019] 106, 108: Body diodes

[0020] 110: ACOT control scheme

[0021] 112: CB Control Scheme

[0022] 502: COT setting circuit

[0023] 504: Decision Circuit

[0024] 508: On-time generator

[0025] 506, 510, 512, 522: Comparators

[0026] 514, 516: Multiplexers

[0027] 518: Power Switch Controller

[0028] 520: Current Source

[0029] V IN Input voltage

[0030] V OUT Output voltage

[0031] GND: Grounding voltage

[0032] LX, LX2: Switch nodes

[0033] L: Inductance

[0034] I L Inductor current

[0035] UG: Upper Bridge Power Switch

[0036] LG: Downbridge power switch

[0037] C O Output capacitor

[0038] V FB Feedback voltage

[0039] V REF V REFOFFSET VREF_CIP: Reference voltage

[0040] V LX V C : Voltage

[0041] CS: COT control settings

[0042] CLK, 28uS_CLK fixed clock

[0043] R1, R2: Resistors

[0044] T ON On-time

[0045] OFF LG Closing time point

[0046] T HIZ HiZ Time

[0047] I peak Peak current

[0048] I NEG Negative peak current

[0049] Cot_max: Maximum COT control value

[0050] Cot_min: Minimum COT control value

[0051] TH1, TH2: Thresholds

[0052] CMPOUT, ZX, V DROP Comparator output

[0053] VDSET, VRST, ZX_S: Control inputs

[0054] C1, C2, C3: Capacitors

[0055] SW1, SW2: Switches

[0056] S602, S604, S606, S608, S610, S612, S614, S616, S702, S704, S706, S708, S710, S712, S714, S716, S718, S720, S722, S724: Steps Detailed Implementation

[0057] Certain terms are used in the specification and claims to refer to specific elements. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same element. This specification and claims do not distinguish elements based on differences in name, but rather on differences in function. The terms "comprising" and "including" used throughout the specification and claims are open-ended and should be interpreted as "comprising but not limited to." Furthermore, the terms "coupled" or "coupled" herein include any direct and indirect electrical connection means. Therefore, if a first device is described as coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices and connection means.

[0058] Figure 1 This is a schematic diagram of a switching voltage regulator according to an embodiment of the present invention. The switching voltage regulator 100 is a voltage converter, such as a buck converter. In this embodiment, the switching voltage regulator 100 is designed to switch the input voltage V... IN Converted to output voltage V OUT (For example, V) OUT < V IN Input voltage V IN It can be powered by a battery or similar source. Output voltage V OUT Provided to a load device (not shown), which can be any electronic device that consumes electrical energy. The switching regulator (e.g., a buck converter) 100 includes an inductor L, a high-side power switch UG, a low-side power switch LG, a feedback circuit 102, and an output capacitor C. O and controller circuitry (e.g., buck controller) 104.

[0059] The upper-bridge power switch UG can be implemented using a P-channel metal-oxide-semiconductor (PMOS) transistor, and the lower-bridge power switch LG can be implemented using an N-channel metal-oxide-semiconductor (NMOS) transistor. Due to the inherent characteristics of PMOS transistors, the upper-bridge power switch UG has a body diode 106, whose anode is coupled to the drain and whose cathode is coupled to the source. Due to the inherent characteristics of NMOS transistors, the lower-bridge power switch LG has a body diode 108, whose anode is coupled to the source and whose cathode is coupled to the drain. The upper-bridge power switch UG and the lower-bridge power switch LG are connected in series at a first voltage node (e.g., input voltage V). IN Specifically, the upper bridge power switch UG is coupled between the first voltage node (e.g., ground voltage GND) and the second voltage node. IN The inductor L is coupled between the switching node LX and the lower bridge power switch LG, while the lower bridge power switch LG is coupled between the switching node LX and the second voltage node (e.g., ground voltage GND). The inductor L has a first end coupled to the switching node LX and a second end coupled to another switching node LX2. When the inductor current I... L Along the positive direction When energy is transferred to the load device by flowing water, the inductor current I flowing through the inductor L is... L It is defined as having positive polarity. When the inductor current IL flows in the reverse direction... Flow (and positive) When the flow direction is opposite, the inductor current I flowing through inductor L is... L It is defined as having negative polarity.

[0060] Controller circuit 104 is used to control the ON / OFF state of each of the upper bridge power switch UG and the lower bridge power switch LG, so as to control the output voltage V. OUT Voltage regulation is performed. Feedback circuit 102 is used to regulate the output voltage V of the switching regulator 100. OUT To generate feedback voltage V FB In this embodiment, the feedback circuit 102 is implemented by a voltage divider circuit, which has a voltage divider circuit connected in series with the output voltage V. OUTResistors R1 and R2 are connected between the input terminal and the reference terminal (e.g., ground voltage GND), and the resistance values ​​of resistors R1 and R2 can be set according to actual needs. Feedback circuit 102 is used to monitor the output voltage V. OUT A voltage divider is used to generate a divided voltage, which is then used as the feedback voltage V. FB and the feedback voltage V FB Provided to controller circuit 104. Due to feedback voltage V FB With output voltage V OUT The two are positively correlated, therefore the controller circuit 104 can determine the output voltage V. OUT The instantaneous state. Or, the feedback voltage V. FB It can also be directly determined by the output voltage V OUT Setting. In short, the feedback voltage V FB It can be derived from any source of output voltage V OUT The voltage signal is used for setting. The controller circuit 104 is also used to receive the voltage V on the switching node LX. LX .

[0061] The switching regulator 100 can employ an adaptive constant on-time (ACOT) control scheme in discontinuous current mode (DCM). In this embodiment, the controller circuit 104 can support multiple control schemes, including the conventional ACOT control scheme 110 and the charge back (CB) control scheme 112 proposed in this invention. When the switching regulator 100 operates in normal mode (e.g., normal constant on-time (COT) mode), the ON state of the upper bridge power switch UG can be determined based on the feedback voltage V. FB ( or The triggering mechanism, and the OFF state of the lower bridge power switch LG, can be determined based on the voltage V. LX When the switching regulator 100 operates in the CB mode proposed in this invention, the on state of the upper bridge power switch UG can be periodically triggered based on a fixed clock CLK (e.g., a 35kHz clock with a period of 28µs or a 32kHz clock with a period of 31.25µs), while the off state of the lower bridge power switch LG can be triggered based on the feedback voltage V. FB ( or The CB control scheme 112 proposed in this invention will be activated when specific conditions are met.

[0062] Figure 2 This is a schematic diagram of normal COT voltage regulation operation and CB mode voltage regulation operation according to an embodiment of the present invention. Assume the output voltage V... OUT Feedback is required as the feedback voltage V for the controller circuit (e.g., buck controller) 104. FB For normal COT voltage regulation operation, the controller circuit 104 will adjust the feedback voltage V. FB With reference voltage V REF (This is compared to the target voltage level of the regulator output.) When the output voltage V OUT Below the reference voltage V REF At this time, the controller circuit 104 will turn on the upper bridge power switch UG to initiate a voltage regulation operation. The ACOT control scheme 110 has a COT control setting CS, which is set to control the on-time T of the upper bridge power switch UG. ON During the conduction time T ON After the expiration date, controller circuit 104 turns off the upper bridge power switch UG and turns on the lower bridge power switch LG. Controller circuit 104 will then adjust the voltage V... LX Compare with the ground voltage GND. When the voltage V continues to drop... LX When the voltage reaches ground GND, this indicates that the inductor current I... L It is zero (that is, I) L = 0mA), the controller circuit 104 will OFF at the turn-off time. LG (that is, V) LX At the point when V = 0V, the lower bridge power switch LG is turned off. Since both the upper bridge power switch UG and the lower bridge power switch LG are off and the inductor current I... L When the impedance is zero, the switching regulator 100 will enter a high-impedance (high-Z, hereinafter referred to as "HiZ") state.

[0063] Controller circuit 104 checks the HiZ time T between the previous voltage regulation operation and the current voltage regulation operation. HIZ Whether the threshold is exceeded (e.g., 35µs), that is, whether the controller circuit 104 monitors the HiZ time T from the end of the previous voltage regulation operation. HIZ If HiZ time T HIZ The duration exceeds the threshold (e.g., 35µs), which indicates that the switching frequency F SWApproaching the upper limit of the audio frequency band, the controller circuit 104 can activate the CB control scheme 112 to periodically trigger a CB mode voltage regulation operation based on a fixed clock CLK. For example, a CB mode voltage regulation operation is triggered once within each cycle of the fixed clock CLK. It should be noted that setting the threshold to 35µs is merely an example and not a limitation of the invention. When the HiZ time T... HIZ When the threshold is reached, this indicates a switching frequency F higher than the audio frequency band. SW This is already close to the upper limit of the audio frequency band (e.g., 20kHz). In fact, the threshold setting can be based on actual design considerations.

[0064] After CB control scheme 112 is activated, controller circuit 104 turns on the upper bridge power switch UG to initiate the current voltage regulation operation (CB mode voltage regulation operation) immediately following the previous voltage regulation operation (which is a normal COT voltage regulation operation). During the on-time T... ON (This is set by the minimum COT control value indicated by the COT control setting CS.) After the expiration date, the controller circuit 104 turns off the upper bridge power switch UG and turns on the lower bridge power switch LG. The controller circuit 104 will then feed back the voltage V. FB With reference voltage V REF Compare. When the voltage V drops... LX When the voltage reaches ground GND, this indicates that the inductor current I... L It is zero (that is, I) L =0mA), at this time, CB control scheme 112 will not turn off the lower bridge power switch LG, thus allowing the inductor current I L Reverse the polarity and increase its current magnitude. Specifically, CB control scheme 112 only applies when the output voltage V... OUT Drop to reference voltage V REF Below (or to V) REF The lower bridge power switch LG will only be turned off when the output voltage V... OUT Reaching reference voltage V REF At that time, the negative inductor current is equal to I. NEG After the lower bridge power switch LG is turned off, the negative inductor current returns to the power source (e.g., battery) through the body diode 106 of the upper bridge power switch UG, thus returning excess energy (i.e., excess charge) to the power source (e.g., battery). It is important to note that both the upper bridge power switch UG and the lower bridge power switch LG are turned off by the controller circuit 104, and the body diode 106 of the turned-off upper bridge power switch UG is forward biased to conduct the negative inductor current from inductor L back to the power source (e.g., battery). When the inductor current I...L When both the upper bridge power switch UG and the lower bridge power switch LG are off, the value becomes zero (i.e., I). L When the voltage drops to 0mA, the switching regulator 100 will re-enter the HiZ state.

[0065] It is important to note that Figure 2 The waveforms shown are for illustrative purposes only and are not intended to limit the invention. In some embodiments of the invention, the CB control scheme 112 proposed in this invention will be activated when certain conditions are met, for example, unless the HiZ time T between the previous voltage regulation operation and the current voltage regulation operation is met. HIZ The value is greater than the threshold (e.g., 35µs) and the COT control setting CS has been assigned the minimum COT control value (which corresponds to the minimum peak current I of the inductor L that the switching regulator 100 can allow due to its own hardware limitations). peak Otherwise, the switching regulator 100 will not enter CB mode. Furthermore, the CB control scheme 112 proposed in this invention will be disabled when certain conditions are met; for example, unless the output voltage V... OUT Reaching reference voltage V REFOFFSET (V) REFOFFSET = V REF -OFFSET), otherwise the switching regulator 100 will not exit CB mode, where the reference voltage V REFOFFSET Below the reference voltage V REF (It is the target voltage level output by the regulator).

[0066] Specifically, the COT control setting CS is determined by a preset value (e.g., the maximum COT control value Cot_max, which corresponds to the maximum peak current I of the inductor L that the switching regulator 100 can allow due to its hardware limitations). peak The ACOT control scheme 110 will adaptively adjust the COT control setting CS until the COT control setting CS is assigned the minimum COT control value Cot_min (which corresponds to the minimum peak current I of the inductor L that the switching regulator 100 can allow due to its hardware limitations). peak Due to peak current I peak Since the COT control setting CS has already been assigned the minimum COT control value Cot_min, it cannot be further reduced to increase the switching frequency F. SW Therefore, this invention proposes to enable CB control scheme 112 to allow the switching frequency F to... SWMaintaining a higher frequency value above the audio frequency band (e.g., 32kHz), and further proposing the use of a pulse-width modulation-based adaptive adjustment algorithm to maintain a fixed switching frequency F SW The charge recovery is adaptively adjusted for each CB regulation operation, wherein the off-time of the lower bridge power switch LG is OFF. LG Based on feedback voltage V FB and output voltage V OUT Adaptive adjustments are made by comparing the two.

[0067] Figure 3 This is a schematic diagram of the adaptive adjustment algorithm based on pulse width modulation used in the controller circuit 104 of an embodiment of the present invention. When the switching frequency F SW When the HiZ time exceeds 35µs due to the value being below the threshold, the positive peak current I can be reduced by adaptively adjusting (reducing) the COT control setting CS. peak When the feedback voltage V FB Drop to reference voltage V REF The following condition will trigger a normal mode voltage regulation operation when the comparator output CMPOUT triggers a CMPOUT trigger pulse. Once the positive peak current I... peak Because the COT control setting CS is given the minimum COT control value Cot_min and decreases to its minimum value, and the HiZ time is still greater than 35us, the fixed clock CLK will be adopted by the CB control scheme 112 to periodically trigger the output voltage V during the period when the COT control setting CS is given the minimum COT control value Cot_min. OUT The voltage regulation operation is performed under the feedback voltage V. FB Reaching reference voltage V REF At this time, the lower bridge power switch LG will be turned off by the trigger pulse of the comparator output CMPOUT, while the negative peak current I of the inductor... NEG The value is set at the off time of the lower bridge power switch LG. If the feedback voltage V FB The voltage did not drop to a lower reference voltage V before the fixed clock CLK triggered the next regulation operation. REFOFFSET The following is the negative peak current I of the inductor. NEG Adaptive adjustments will be made. For example... Figure 4 As shown, when the load device suddenly becomes a heavy load requiring high power, the feedback voltage V FB In CB mode (which periodically triggers a regulation operation based on a fixed clock CLK), the voltage drops to a lower reference voltage V. REFOFFSETThe following causes the switching regulator 100 to exit CB mode and re-enter normal mode (based on the feedback voltage V). FB and output voltage V OUT (A voltage regulation operation is triggered by comparing the values ​​between them). The following section, with accompanying diagrams, provides a more detailed description of the pulse-width modulation-based adaptive adjustment algorithm.

[0068] Figure 5 This is a schematic diagram of the controller circuit of a switching regulator according to an embodiment of the present invention. Figure 1 The controller circuit 104 shown can be implemented using controller circuit 500. Controller circuit 500 includes a COT setting circuit 502, a decision circuit 504, an on-time generator 508, comparators 510 and 512, multiplexers 514 and 516, and a power switch controller 518. The COT setting circuit 502 is used to adaptively adjust the COT control setting CS, wherein the on-time T of the upper bridge power switch UG of the switching regulator 100... ON Depending on the COT control setting CS, the decision circuit 504 enables / disables the CB control scheme (i.e., CB mode), which periodically triggers the output voltage V during the period when the COT control setting CS is given the minimum COT control value Cot_min allowed by the switching regulator 100. OUT In terms of voltage regulation operation, specifically, the decision circuit 504 asserts the control signal CB_MODE (CB_MODE = 1) to enable CB mode and deasserts the control signal CB_MODE (CB_MODE = 0) to disable CB mode.

[0069] In this embodiment, the decision circuit 504 serves as both a normal mode controller and a CB mode controller. For example, the decision circuit 504 monitors the HiZ time T between two consecutive voltage regulation operations. HIZ The system determines whether to instruct the COT setting circuit 502 to adjust the COT control setting CS. The COT setting circuit 502 can adjust the setting based on the HiZ time T. HIZ This allows for increasing, decreasing, or maintaining the current COT control setting CS. For example, the decision circuit 504 monitors the HiZ time T between two consecutive voltage regulation operations. HIZ And the COT control setting CS is used to determine whether to activate the control signal CB_MODE (CB_MODE = 1). In this embodiment, when the output voltage V OUT Below the lower reference voltage V REFOFFSET (V REFOFFSET = V REF-OFFSET < V REF When the switching regulator 100 exits CB mode, the decision circuit 504 may include a function to compare the output voltage V. OUT and reference voltage V REFOFFSET The comparator 506, and when the comparator outputs V DROP Indicates output voltage V OUT Below the reference voltage V REFOFFSET At that time, invalidate the control signal CB_MODE (that is, if V OUT < V REFOFFSET If CB_MODE = 0, then CB_MODE = 0.

[0070] When CB mode is not in operation (i.e., CB_MODE = 0), multiplexer 516 selects the comparator output CMPOUT of comparator 512 as the control input VDSET of power switch controller 518. The control input VDSET determines the turn-on time of the upper bridge power switch UG. Specifically, the control input VDSET controls whether to start the output voltage V OUT This is a voltage regulation operation. When the feedback voltage V... FB Not lower than the reference voltage V REF At this time, the control input VDSET is at a low logic level, and the upper bridge power switch UG will not be turned on. However, when the feedback voltage V... FB Below the reference voltage V REF When the control input VDSET is high, the upper bridge power switch UG will be turned on. When CB mode is in operation (i.e., CB_MODE = 1), the multiplexer 516 selects a fixed clock CLK (e.g., CLK = 28µs_CLK, which is a 35kHz clock with a period of 28µs) as the control input VDSET of the power switch controller 518. Therefore, in CB mode, the upper bridge power switch UG will be turned on periodically at a fixed clock frequency.

[0071] The on-time generator 508 generates the control input VRST to the power switch controller 518. The control input VRST determines the turn-off time of the upper bridge power switch UG and the on-time of the lower bridge power switch LG. Specifically, the on-time T of the upper bridge power switch UG... ON The on-time is determined by both the control input VDSET and the control input VRST. For example, the on-time generator 508 may include a current source 520, multiple capacitors (e.g., C1, C2, and C3), multiple switches (e.g., SW1 and SW2), and a comparator 522. The current source 520 provides a reference current. The on / off state of each of switches SW1 and SW2 is controlled by the COT control setting CS. When the COT control setting CS is given the maximum COT control value, both switches SW1 and SW2 will be turned on, causing voltage V to... C It has the longest charging time. When the COT control setting CS is given the minimum COT control value, both switches SW1 and SW2 are turned off, causing the voltage V to... C It has the shortest charging time. When the COT control setting CS is assigned a medium COT control value, only one of switches SW1 and SW2 will be turned on, causing the voltage V to... C It has an intermediate charging time. When the voltage V C When the voltage is below the reference voltage VREF_CIP, the control input VRST is at a high logic level, the upper bridge power switch UG will not be turned off, and the lower bridge power switch LG will not be turned on. However, when the voltage V... C When the voltage is higher than the reference voltage VREF_CIP, the control input VRST is at a low logic level, the upper bridge power switch UG will be turned off, and the lower bridge power switch LG will be turned on.

[0072] When CB mode is not in operation (i.e., CB_MODE = 0), multiplexer 514 selects the comparator output ZX of comparator 510 as the control input ZX_S of power switch controller 518, and the control input ZX_S determines the off-time of the lower bridge power switch LG. Comparator 510 converts voltage V... LX The voltage is compared with the ground voltage GND to set the comparator output ZX. When the voltage V... LX When the ground voltage GND is reached, the comparator output ZX is set to indicate that the lower bridge power switch LG should be turned off, thereby making the inductor current zero (i.e., I...). L = 0mA). When CB mode is in operation (i.e., CB_MODE = 1), the multiplexer 514 selects the comparator output CMPOUT of the comparator 512 as the control input ZX_S of the power switch controller 518, and when the output voltage V OUT Below the reference voltage V REF At this time, the comparator output COMOUT is set to indicate that the lower bridge power switch LG should be turned off, thereby causing a negative peak current I. NEG .

[0073] Please refer to this as well. Figure 5 and Figure 6 . Figure 6 This is a flowchart of a method for controlling a switching voltage regulator according to an embodiment of the present invention. For example, this method can be... Figure 5The controller circuit 500 shown is used in this circuit. If a substantially similar result can be obtained, the steps do not necessarily need to be followed exactly. Figure 6 The operations are performed in the order shown. In step S602, the controller circuit 500 performs ACOT control in DCM mode. In step S604, the decision circuit 504 checks the HiZ time T between the previous voltage regulation operation and the current voltage regulation operation. HIZ Is it greater than the threshold TH1 (e.g., TH1 = 35 μs)? If the HiZ time T HIZ If the duration exceeds the threshold TH1 (e.g., TH1 = 35µs), this indicates that the switching frequency F... SW If the frequency band approaches its upper limit, the decision circuit 504 checks whether the COT control setting CS is assigned the minimum COT control value Cot_min (step S606). If the COT control setting CS is not assigned the minimum COT control value Cot_min, the decision circuit 504 instructs the COT setting circuit 502 to lower the COT control setting CS to reduce the on-time T of the upper bridge power switch UG. ON And the positive peak current I in the current voltage regulation operation peak (Step S608). If the COT control setting CS has been assigned the minimum COT control value Cot_min, the decision circuit 504 will activate the control signal CB_MODE (CB_MODE = 1) to enable the CB control scheme (i.e., CB mode). In step S610, the output voltage V OUT The voltage regulation operation is periodically triggered by a fixed clock CLK (e.g., CLK = 28uS_CLK).

[0074] CB mode voltage regulation operation consists of three stages: a first stage, a second stage, and a third stage. During the first stage, the upper bridge power switch UG is turned on by a fixed clock CLK (e.g., CLK = 28μS_CLK), and the lower bridge power switch LG is turned off. During the second stage, the upper bridge power switch UG is turned on for a period T... ON (It is set by the minimum COT control value Cot_min) When it expires, it is turned off, and the lower bridge power switch LG will turn on, where the lower bridge power switch LG will wait until the output voltage V OUT Reaching reference voltage V REF It will only conduct when the time is right, and the negative peak current I NEG At the output voltage V OUT Reaching reference voltage V REF The timing is determined at this point. During the third phase, both the upper bridge power switch UG and the lower bridge power switch LG are turned off, and the negative inductor current flows back to the power source (e.g., the battery) through the body diode 106 of the upper bridge power switch UG, thereby returning excess energy to the power source (e.g., the battery).

[0075] In step S612, the decision circuit 504 checks the output voltage V. OUT Whether the voltage drops below the lower reference voltage V before the next CB mode regulation operation is triggered by a fixed clock CLK (e.g., CLK = 28μS_CLK). REFOFFSET (V REFOFFSET <V REF If the output voltage V OUT It did not fall below the lower reference voltage V REFOFFSET Then the switching regulator 100 continues to operate in CB mode (step S610). If the output voltage V OUT Below the lower reference voltage V REFOFFSET This means that the load device suddenly becomes a heavy load that requires high power. In this case, the decision circuit 504 will invalidate the control signal CB_MODE (CB_MODE = 0) to disable the CB control scheme (i.e., CB mode), and the process will proceed to step S602. In other words, the switching regulator 100 exits the CB mode and re-enters the normal mode (e.g., ACOT control in DCM mode).

[0076] If step S604 determines the HiZ time T between the previous voltage regulation operation and the current voltage regulation operation... HIZ (That is, if the duration of the HiZ state since the end of the previous voltage regulation operation) is not greater than the threshold TH1 (e.g., TH1 = 35us), the process proceeds to step S614. In step S614, the decision circuit 504 checks the HiZ time T between the previous voltage regulation operation and the current voltage regulation operation. HIZ (That is, the duration of the HiZ state since the end of the previous voltage regulation operation) is less than the threshold TH2 (e.g., TH2 = 17us). If the HiZ time T HIZ Not less than the threshold TH2 (e.g., TH2 = 17us), which means the HiZ time T HIZ If the voltage is between threshold TH1 and threshold TH2, the COT setting circuit 502 will maintain the current COT control setting CS unchanged, and the upper bridge power switch UG will have the same on-time T during the current voltage regulation operation. ON If the HiZ time T HIZ If the value is less than the threshold TH2 (e.g., TH2 = 17µs), then the decision circuit 504 instructs the COT setting circuit 502 to increase the COT control setting CS, thereby increasing the on-time T of the upper bridge power switch UG. ON And the positive peak current I in the current voltage regulation operation peak (Step S616).

[0077] like Figure 6As shown, when the condition When the conditions are met, ACOT control scheme 110 will reduce the COT control setting CS (i.e., the on-time T). ON ); when the condition When the conditions are met, ACOT control scheme 110 adds COT control setting CS (i.e., conduction time T). ON ); when the condition When the conditions are met, ACOT control scheme 110 will maintain the current COT control setting CS (i.e., conduction time T). ON ) remains unchanged; when two conditions remain unchanged. and When all conditions are met, the switching from ACOT control scheme 110 to CB control scheme 112 will be triggered; and when conditions are met... When the conditions are met, the switching from CB control scheme 112 to ACOT control scheme 110 will be triggered. The COT control setting CS used in ACOT control scheme 110 can support multiple COT control values. ACOT control scheme 110 changes the COT control setting CS (positive peak current I...) peak The switching between the first COT control scheme 110 and the second COT control scheme 112 can exhibit hysteresis to prevent frequent switching between the two COT control values. In other words, the triggering condition for switching from the first COT control value to the second COT control value is different from the triggering condition for switching from the second COT control value back to the first COT control value. Similarly, the switching between the ACOT control scheme 110 and the CB control scheme 112 also exhibits hysteresis to prevent frequent switching between the two control schemes. In other words, the triggering condition for switching from the ACOT control scheme 110 to the CB control scheme 112 is different from the triggering condition for switching from the CB control scheme 112 back to the ACOT control scheme 110.

[0078] Please refer to this as well. Figure 7 and Figure 8 . Figure 7 This is an embodiment of the present invention used to control the output voltage V OUT The flowchart shows the hysteresis-based control method for voltage regulation operation. Figure 8 This is a schematic diagram illustrating the hysteresis behavior of a switching regulator according to an embodiment of the present invention. For simplicity, the following assumes that the ACOT control scheme supports three COT control values: Cot_max, Cot_med, and Cot_min, where the COT control value Cot_max is a preset value that defines the hysteresis behavior for achieving 180mA I. peak Maximum conduction time T ON The COT control value Cot_med (Cot_med < Cot_max) defines the implementation of 130mA I. peak Intermediate conduction time T ONThe COT control value Cot_min (Cot_min < Cot_med) defines the implementation of 100mA I. peak Minimum conduction time T ON .

[0079] Initially, the ACOT control scheme 110 selects a preset value (i.e., Cot_max) and sets it at 180mA I. peak Operating in mode (step S702). When ACOT control scheme 110 is at 180mA I peak When operating in mode, HiZ time T HIZ It will be checked to determine if it exceeds the threshold TH1 (e.g., TH1 = 35us) (step S704). When HiZ time T HIZ When the value exceeds the threshold TH1 (e.g., TH1 = 35µs), the ACOT control scheme 110 selects the COT control value Cot_med and starts from 180mA I. peak Switch mode to 130mA I peak Pattern (step S706). When HiZ time T HIZ When the value is not greater than the threshold TH1 (e.g., TH1 = 35µs), the ACOT control scheme 110 will continue to operate at 180mA I. peak Operates in the mode (step S702).

[0080] When ACOT control scheme 110 is at 130mA I peak When operating in mode, HiZ time T HIZ It will be checked to determine if it is less than a threshold TH2 (e.g., TH2 = 17us) (step S708), and / or to determine if it is greater than a threshold TH1 (e.g., TH1 = 35us) (step S710). When HiZ time T HIZ When the value is less than the threshold TH2 (e.g., TH2 = 17µs), the ACOT control scheme 110 selects the COT control value Cot_max and starts from 130mA I. peak Switch mode to 180mA I peak Mode (step S702). When HiZ time T HIZ When the value exceeds the threshold TH1 (e.g., TH1 = 35µs), the ACOT control scheme 110 selects the COT control value Cot_min and starts from 130mA I. peak Switch mode to 100mA I peak Pattern (step S712). When HiZ time T HIZ When the value is between threshold TH1 and threshold TH2, ACOT control scheme 110 will continue to operate at 130mA. peakOperates in the mode (step S706).

[0081] When ACOT control scheme 110 is at 100mA I peak When operating in mode, HiZ time T HIZ It will be checked to determine if it is less than a threshold TH2 (e.g., TH2 = 17us) (step S714), and / or to determine if it is greater than a threshold TH1 (e.g., TH1 = 35us) (step S716). When HiZ time T HIZ When the value is less than the threshold TH2 (e.g., TH2 = 17µs), the ACOT control scheme 110 selects the COT control value Cot_med and starts from 100mA I. peak Switch mode to 130mA I peak Pattern (step S706). When HiZ time T HIZ When the time exceeds the threshold TH1 (e.g., TH1 = 35µs), CB control scheme 112 is activated (step S718). When the time T in HiZ is greater than the threshold TH1, CB control scheme 112 is activated (step S718). HIZ When the value is between threshold TH1 and threshold TH2, the ACOT control scheme 110 will continue to operate at 100mA. peak Operates in the mode (step S712).

[0082] When the ACOT control scheme 110 is operating in CB mode, the output voltage V OUT The voltage regulation operation is periodically triggered by a fixed clock CLK (e.g., CLK = 28μs_CLK), and the lower bridge power switch LG will operate at the output voltage V. OUT Below the reference voltage V REF The circuit is turned off (steps S720 and S722). In step S724, the output voltage V... OUT It will be checked to determine if it is below the lower reference voltage V. REFOFFSET When the output voltage V OUT Reaching a lower reference voltage V REFOFFSET At this time, CB control scheme 112 will be deactivated, and the process will enter the ACOT control scheme at 100mA I. peak Step S712 in the mode.

[0083] The foregoing outlines the features of several embodiments, enabling those skilled in the art to fully understand the various aspects of the invention. Those skilled in the art should recognize that the invention provides a basis for designing or modifying other processes and structures to achieve substantially the same functionality and / or substantially the same results as the embodiments described above. Furthermore, such equivalent configurations do not depart from the spirit and scope of the invention, and various changes, substitutions, and modifications can be made without departing from that spirit and scope.

Claims

1. A controller circuit for a switching voltage regulator, comprising: A constant on-time setting circuit is used to adaptively adjust the constant on-time control setting, wherein the on-time of the upper bridge power switch of the switching regulator depends on the constant on-time control setting; and A decision circuit is configured to enable a control mechanism to periodically trigger the voltage regulation operation of the switching regulator's output voltage during the period when the constant on-time control setting is assigned to the minimum constant on-time control value allowed by the switching regulator, wherein during this period, the off-time of the lower bridge power switch of the switching regulator depends on a comparison between a feedback voltage and a first reference voltage, wherein the feedback voltage is derived from the output voltage.

2. The controller circuit as claimed in claim 1, wherein the decision circuit is further configured to check whether the high impedance time between the previous voltage regulation operation and the current voltage regulation operation is greater than a threshold, and to check whether the constant on-time control setting is assigned the minimum constant on-time control value; and when the high impedance time is greater than the threshold and the constant on-time control setting is assigned the minimum constant on-time control value, the decision circuit is configured to enable the control mechanism.

3. The controller circuit of claim 1, wherein the decision circuit is further configured to compare the feedback voltage with a second reference voltage lower than the first reference voltage; and when the feedback voltage reaches the second reference voltage during the period, the decision circuit is further configured to disable the control mechanism.

4. The controller circuit of claim 1, wherein the decision circuit is further configured to check whether the high impedance time between the previous voltage regulation operation and the current voltage regulation operation is greater than a threshold, and to check whether the constant on-time control setting is assigned the minimum constant on-time control value; and when the high impedance time is greater than the threshold and the constant on-time control setting has not been assigned the minimum constant on-time control value, the decision circuit is further configured to instruct the constant on-time setting circuit to reduce the constant on-time control setting.

5. The controller circuit as claimed in claim 1, wherein the decision circuit is further configured to check whether the high impedance time between the previous voltage regulation operation and the current voltage regulation operation is greater than a first threshold, and to check whether the high impedance time between the previous voltage regulation operation and the current voltage regulation operation is less than a second threshold; and when the high impedance time is not greater than the first threshold and not less than the second threshold, the constant on-time setting circuit is configured to maintain the constant on-time control setting unchanged.

6. The controller circuit of claim 1, wherein the decision circuit is further configured to check whether the high impedance time between the previous voltage regulation operation and the current voltage regulation operation is less than a threshold; and when the high impedance time is less than the threshold, the decision circuit is further configured to instruct the constant on-time setting circuit to increase the constant on-time control setting.

7. A method for controlling a switching voltage regulator, comprising: The constant on-time control setting is adaptively adjusted, wherein the on-time of the upper bridge power switch of the switching regulator depends on the constant on-time control setting; and During the period when the constant on-time control setting is given the minimum constant on-time control value allowed by the switching regulator, a control mechanism is enabled to periodically trigger the voltage regulation operation of the output voltage of the switching regulator, wherein during this period, the off-time of the lower bridge power switch of the switching regulator depends on a comparison between a feedback voltage and a first reference voltage, wherein the feedback voltage is derived from the output voltage.

8. The method of claim 7, further comprising: Check whether the high-impedance time between the previous voltage regulation operation and the current voltage regulation operation is greater than the threshold; and Check whether the constant on-time control setting is assigned the minimum constant on-time control value; The step of enabling the control mechanism to periodically trigger the voltage regulation operation of the output voltage of the switching regulator includes: The control mechanism is enabled when the high impedance time is greater than the threshold and the constant on-time control setting is assigned the minimum constant on-time control value.

9. The method of claim 7, further comprising: Compare the feedback voltage with a second reference voltage that is lower than the first reference voltage; and The control mechanism is disabled when the feedback voltage reaches the second reference voltage during this period.

10. The method of claim 7, further comprising: Check whether the high impedance time between the previous voltage regulation operation and the current voltage regulation operation is greater than the threshold. Check whether the constant on-time control setting is assigned the minimum constant on-time control value; and Since the high impedance time is greater than the threshold and the constant on-time control setting has not yet been assigned the minimum constant on-time control value, the constant on-time control setting is reduced.

11. The method of claim 7, further comprising: Check whether the high impedance time between the previous voltage regulation operation and the current voltage regulation operation is greater than the first threshold. Check whether the high impedance time between the previous voltage regulation operation and the current voltage regulation operation is less than the second threshold; and Since the high impedance time should not be greater than the first threshold and not less than the second threshold, the constant on-time control setting should be maintained unchanged.

12. The method of claim 7, further comprising: Check whether the high-impedance time between the previous voltage regulation operation and the current voltage regulation operation is less than the threshold; and Since the high impedance time is less than this threshold, the constant on-time control setting should be increased.