Display device and display panel

Abstract

Embodiments of the present disclosure relate to a display device and a display panel. According to embodiments of the present disclosure, a display device can include a base circuit layer including a plurality of array-in-gate units constituting a gate driving circuit in a display area, a pixel layer disposed on the base circuit layer and including a plurality of pixels, a touch electrode layer disposed above the pixel layer and including a plurality of sensing touch electrodes, and a touch driving circuit for amplifying a touch sensing signal transmitted through the plurality of sensing touch electrodes to generate touch sensing data, wherein the plurality of array-in-gate units can include a first gate circuit block including a first dummy pixel formed at a position overlapping with a first sensing touch electrode, and a second gate circuit block including a second dummy pixel formed at a position overlapping with a second sensing touch electrode.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2025-0038097, filed on March 25, 2025, which is incorporated herein by reference for all purposes as if fully set forth herein. Technical Field

[0003] Embodiments of this disclosure relate to display devices and display panels, and more specifically, to display devices and display panels capable of reducing touch noise and improving touch performance. Background Technology

[0004] A means of transport is a vehicle that uses kinetic energy to move people or goods. The term "means of transport" can include various types of vehicles used to carry people, such as cars, trucks, buses, airplanes, and ships.

[0005] Vehicles can be equipped with display devices including various types of display panels, and vehicle control equipment can control the information output to the display panels to provide various convenience and safety features to the driver or passengers.

[0006] In the case of display devices used in vehicles, gate in array (GIA) technology, in which the gate drive circuit is located in the display area, can be applied to reduce the size of the non-display area (bezel) of the display panel.

[0007] However, when the display panel is configured with an in-array gate structure, touch noise may be generated on the touch electrodes that overlap with the gate drive circuit due to different gate signals, thereby degrading the touch performance. Summary of the Invention

[0008] Embodiments of this disclosure can provide a display device and a display panel that can reduce touch noise and improve touch performance in a display panel having an in-array gate structure.

[0009] Embodiments of this disclosure can provide a display device and a display panel that can reduce touch noise by arranging dummy pixels in a gate array region overlapping with touch electrodes and applying a common dummy signal to the dummy pixels.

[0010] The objectives of the embodiments disclosed herein are not limited to those described above, and other objectives not mentioned will be clearly understood by those skilled in the art from the following description.

[0011] A display device according to embodiments of the present disclosure may include: a base circuit layer including a plurality of in-array gate units constituting a gate driving circuit in a display area; a pixel layer disposed on the base circuit layer and including a plurality of pixels; a touch electrode layer disposed above the pixel layer and including a plurality of sensing touch electrodes; and a touch driving circuit for amplifying touch sensing signals transmitted through the plurality of sensing touch electrodes to generate touch sensing data. The plurality of in-array gate units may include: a first gate circuit block including a first dummy pixel formed at a location overlapping with a first sensing touch electrode; and a second gate circuit block including a second dummy pixel formed at a location overlapping with a second sensing touch electrode.

[0012] A display panel according to embodiments of the present disclosure may include: a base circuit layer including a plurality of in-array gate units constituting a gate driving circuit in a display area; a pixel layer disposed on the base circuit layer and including a plurality of pixels; and a touch electrode layer disposed above the pixel layer and including a plurality of sensing touch electrodes. The plurality of in-array gate units may include: a first gate circuit block including a first dummy pixel formed at a location overlapping with a first sensing touch electrode; and a second gate circuit block including a second dummy pixel formed at a location overlapping with a second sensing touch electrode.

[0013] According to embodiments of the present disclosure, a display device and a display panel can be provided that can reduce touch noise and improve touch performance in a display panel having an array in-gate structure.

[0014] According to embodiments of the present disclosure, a display device and a display panel can be provided that can reduce touch noise by arranging dummy pixels in a gate array region overlapping with touch electrodes and applying a common dummy signal.

[0015] According to embodiments of this disclosure, a lightweight display device and display panel can be provided, which can achieve narrow bezels in non-display areas and improve touch performance.

[0016] The effects of the embodiments disclosed herein are not limited to those described above, and other effects not mentioned will be clearly understood by those skilled in the art based on the description of the claims. Attached Figure Description

[0017] This disclosure will be more fully understood from the following detailed description and accompanying drawings. The detailed description and accompanying drawings are provided for illustrative purposes only and are not intended to limit the scope of this specification.

[0018] Figure 1 The interior of a vehicle according to an embodiment of the present disclosure is shown.

[0019] Figure 2 The structure of a display device according to an embodiment of the present disclosure is shown schematically.

[0020] Figure 3 The structure of a display panel having an array in-gate structure according to an embodiment of the present disclosure is shown.

[0021] Figure 4 A sub-pixel circuit of a display device according to an embodiment of the present disclosure is shown.

[0022] Figure 5 This is a schematic diagram showing an array of gate cells formed in the display area of ​​a display panel according to an embodiment of the present disclosure.

[0023] Figure 6 This is a plan view showing the structure of an in-array gate cell according to an embodiment of the present disclosure.

[0024] Figure 7 This is a plan view comparing a gate circuit block that does not include dummy pixels with a gate circuit block that includes dummy pixels in the first gate circuit region of a display device according to an embodiment of the present disclosure.

[0025] Figure 8 This is a plan view comparing a gate circuit block including a dummy pixel in a first gate circuit region and a gate circuit block including a dummy pixel in a second gate circuit region in a display device according to an embodiment of the present disclosure.

[0026] Figure 9 The structure of a differential amplifier for amplifying touch sensing signals in a touch driving circuit of a display device according to an embodiment of the present disclosure is shown. Detailed Implementation

[0027] In the following description, some embodiments of this disclosure will be described in detail with reference to exemplary accompanying drawings. Reference will be made to the accompanying drawings in which specific examples or embodiments that may be implemented are illustrated by way of illustration, and in which the same reference numerals and symbols may be used to designate the same or similar components, even if they are shown in different drawings. Furthermore, in the following description of examples or embodiments of the invention, detailed descriptions of well-known functions and components will be omitted herein where such detailed descriptions may obscure the subject matter of some embodiments of the invention. Terms such as “comprising,” “having,” “including,” “constituting,” “forming,” and “formed from” as used herein are generally intended to allow for the addition of additional components unless these terms are used in conjunction with “only.” As used herein, singular forms are intended to include plural forms unless the context clearly indicates otherwise.

[0028] Terms such as “first,” “second,” “A,” “B,” “(A),” or “(B)” may be used herein to describe elements of the invention. Each of these terms is not used to define the nature, order, sequence, or number of elements, but only to distinguish the corresponding element from other elements.

[0029] When referring to a first element being connected to or coupled to a second element, in contact with a second element, or overlapping with a second element, it should be interpreted as meaning that not only is the first element directly connected to or coupled to the second element, or directly in contact with or overlapping with the second element, but a third element may also be inserted between the first and second elements, or the first and second elements may be connected to or coupled to each other, in contact with or overlapping each other via a fourth element. Here, the second element may be included in at least one of two or more elements that are connected to or coupled to each other, in contact with or overlapping each other.

[0030] When time-relative terms such as “after,” “following,” “next,” “before,” etc., are used to describe the process or operation of an element or configuration, or the flow or steps in an operation, process, or manufacturing method, these terms may be used to describe a discontinuous or non-sequential process or operation, unless used with “directly” or “immediately after.”

[0031] Furthermore, when referring to any size, relative size, etc., even if no specific description is specified, it should be assumed that the numerical values ​​or corresponding information of the component or feature (e.g., level, range, etc.) include tolerances or error ranges that can be caused by various factors (e.g., process factors, internal or external influences, noise, etc.). In addition, the term "may" fully encompasses all the meanings of the term "may".

[0032] Various embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0033] Figure 1 The interior of a vehicle according to an embodiment of the present disclosure is shown.

[0034] refer to Figure 1 The interior of a vehicle 1000 according to an embodiment of the present disclosure may include a driver's seat and a passenger seat, and may include an instrument panel and a center trim panel located in front of the driver's seat and the passenger seat. The instrument panel is equipped with various instruments required for driving, and the center trim panel has a control panel for electronic devices.

[0035] The instrument panel may include a first display panel 111 for displaying information needed for driving, such as speedometer readings. The first display panel 111 may be referred to as an instrument panel display panel.

[0036] The first display panel 111 is a display panel that provides the driver with information about the driving status of the vehicle 1000 and the operation of various electronic devices installed in the vehicle 1000, thereby enabling the vehicle 1000 to be driven safely. It is located behind the steering wheel relative to the driver's seat and can display various information such as a speedometer indicating driving speed, an odometer indicating driving distance, a tachometer indicating engine speed, a fuel gauge, a coolant temperature gauge, an engine temperature gauge, and various warning lights.

[0037] The center trim panel is located between the driver's seat and the passenger seat, and may correspond to the area where the dashboard and gearshift lever meet vertically. Components such as audio controllers, air conditioning and heater controllers, navigators, air vents, and cup holders may be housed in the center trim panel. Additionally, a second display panel 112 may be included in the center trim panel.

[0038] The second display panel 112 can display a route to the destination or a map image corresponding to the current location, and can provide a user interface related to the control of various electronic devices installed in the vehicle 1000. When the vehicle 1000 is connected to a mobile terminal, it can also display a screen provided by the mobile terminal.

[0039] The second display panel 112 located between the driver's seat and the passenger seat of the vehicle 1000 can be referred to as the central trim display panel.

[0040] Furthermore, for the convenience of passengers seated in the passenger seats, the third display panel 113 can also be located in front of the passenger seats. The third display panel 113 located at the passenger seats can be referred to as the passenger seat display panel.

[0041] In addition to the instrument panel display panel 111, the center trim display panel 112, and the passenger seat display panel 113, the display panel 110 may also include at least one of the following: a front window display panel, a side mirror display panel, a rearview mirror display panel, and a side window display panel. Furthermore, various other types of display panels can be installed.

[0042] The windshield allows a view of the area ahead of the vehicle 1000. The windshield display panel can be a display panel that projects virtual images onto a portion of the windshield. The windshield display panel can display information such as vehicle speed, remaining fuel, and navigation information, thereby minimizing the need for the driver to unnecessarily take their gaze away.

[0043] The side mirror is configured to allow viewing of the side of the vehicle 1000, and the side mirror display panel can be a display panel that displays the side view image captured by the side camera on a part or the entire area of ​​the side mirror. Therefore, the driver can not only view the reflected side image through the side mirror, but also view the image captured by the side camera through the side mirror display panel.

[0044] The rearview mirror is configured to allow viewing behind the vehicle 1000, and the rearview mirror display panel can be a display panel that displays the rear view image captured by a rear-view camera on a portion or the entire area of ​​the rearview mirror. Therefore, the driver can not only view the reflected rear image through the rearview mirror, but also view the image captured by the rear-view camera via the rearview mirror display panel.

[0045] The side window allows a view of the vehicle 1000 from the side. The side window display panel can project virtual images onto a portion of the side window. Various types of vehicle-related information can be displayed through the side window display panel.

[0046] Figure 2 The structure of a display device according to an embodiment of the present disclosure is shown schematically.

[0047] Reference Figure 2 The display device 100 according to embodiments of the present disclosure may include components for image display, such as a display panel 110, a data driving circuit 130, a gate driving circuit 120, and a timing controller 140.

[0048] The display panel 110 may include an instrument panel display panel 111, a center trim display panel 112, and a passenger seat display panel 113.

[0049] The display panel 110 may include a display area DA for displaying images and a non-display area NDA for not displaying images.

[0050] The non-display area NDA can be the outer area of ​​the display area DA, or it can be referred to as the border area. The non-display area NDA can be an area visible from the front of the display device 100, or it can be a curved area not visible from the front of the display device 100.

[0051] The display panel 110 may include a plurality of sub-pixels SP. For example, the display device 100 may be any type of display device, including liquid crystal display devices, organic light-emitting display devices, micro light-emitting diode (Micro LED) display devices, quantum dot display devices, etc. However, the embodiments disclosed herein are not limited thereto.

[0052] The structure of each of the plurality of sub-pixels SP can vary depending on the type of display device 100. For example, when the display device 100 is a self-emissive display device in which each sub-pixel SP emits its own light, each sub-pixel SP may include a light-emitting element, one or more transistors, and one or more capacitors.

[0053] The display panel 110 may also include various types of signal lines for driving multiple sub-pixels SP. For example, the signal lines may include multiple data lines DL that transmit data signals (also known as data voltages or image data) and multiple gate lines GL that transmit gate signals (also known as scan signals or light emission signals).

[0054] Multiple data lines DL and multiple gate lines GL can intersect each other. Each of the multiple data lines DL can extend in the column direction. Each of the multiple gate lines GL can extend in the row direction.

[0055] The data driving circuit 130 can be a circuit configured to drive multiple data lines DL. The data driving circuit 130 can output data signals to the multiple data lines DL. The gate driving circuit 120 can be a circuit configured to drive multiple gate lines GL, and can output gate signals to the multiple gate lines GL.

[0056] The timing controller 140 can control the data drive circuit 130 and the gate drive circuit 120. The timing controller 140 can control the driving timing of multiple data lines DL and multiple gate lines GL.

[0057] The timing controller 140 can provide various types of data drive control signals DCS to the data drive circuit 130 to control the data drive circuit 130, and can provide various types of gate drive control signals GCS to the gate drive circuit 120 to control the gate drive circuit 120.

[0058] The data driver circuit 130 can provide data signals to multiple data lines DL according to the driving timing control of the timing controller 140. The data driver circuit 130 can receive digital image data DATA from the timing controller 140, convert the received image data DATA into analog data signals, and output the analog data signals to the multiple data lines DL. The data driver circuit 130 may include one or more source driver integrated circuits (SDICs).

[0059] The gate drive circuit 120 can provide gate signals to multiple gate lines GL according to the timing control of the timing controller 140. The gate drive circuit 120 can receive a first gate voltage corresponding to the on level and a second gate voltage corresponding to the off level, as well as various gate drive control signals GCS, to generate gate signals and provide the generated gate signals to the multiple gate lines GL.

[0060] The gate driving circuit 120 can be disposed outside the display panel 110, or it can be disposed within the non-display area NDA or display area DA of the display panel 110. The gate driving circuit 120 may include one or more gate driving integrated circuits (GDICs).

[0061] The display device 100 may also include a touch screen panel and a touch circuit 150 to provide touch sensing functionality in addition to image display. The touch circuit 150 is used to sense the touch screen panel to detect whether a touch object (such as a finger or pen) is touching or to detect the touch location.

[0062] The touch circuit 150 may include a touch driving circuit 152 and a touch controller 154. The touch driving circuit 152 is configured to drive and sense the touch screen panel and generate and output touch sensing data. The touch controller 154 is configured to detect the occurrence of a touch or detect the touch position based on the touch sensing data.

[0063] The touchscreen panel may include multiple touch electrodes TE as touch sensors. The touchscreen panel may also include multiple touch lines TL, configured to electrically connect the multiple touch electrodes TE and the touch driving circuit 152. The touchscreen panel or touch electrodes TE can be used as touch sensors.

[0064] The touchscreen panel can be located outside or inside the display panel 110. When the touchscreen panel is located outside the display panel 110, it can be referred to as an external touchscreen panel. In the case of an external touchscreen panel, the touchscreen panel and the display panel 110 can be manufactured separately and then combined. The external touchscreen panel may include a substrate and a plurality of touch electrodes TE on the substrate.

[0065] When the touchscreen panel is located inside the display panel 110, the touchscreen panel may be referred to as an internal touchscreen panel. In the case of an internal touchscreen panel, the touchscreen panel may be formed inside the display panel 110 during the manufacturing process of the display panel 110.

[0066] The touch driving circuit 152 can provide a touch driving signal to at least one of a plurality of touch electrodes TE, and can detect touch sensing signals sent from at least one of the plurality of touch electrodes TE to generate touch sensing data.

[0067] The touch circuit 150 may perform touch sensing based on a self-capacitance sensing method or a mutual capacitance sensing method. However, embodiments of this disclosure are not limited thereto.

[0068] According to the mutual capacitance sensing method, the multiple touch electrodes TE may include driving touch electrodes and sensing touch electrodes. The touch driving circuit 152 can use a touch driving signal to drive the driving touch electrodes and can detect touch sensing signals from the sensing touch electrodes.

[0069] According to the self-capacitance sensing method, each of the plurality of touch electrodes TE can act as both a driving touch electrode and a sensing touch electrode. The touch driving circuit 152 can drive all or part of the plurality of touch electrodes TE, and can sense all or part of the plurality of touch electrodes TE.

[0070] The touch driver circuit 152 and the touch controller 154 can be implemented as separate devices or as a single device.

[0071] The display device 100 according to the embodiments of the present disclosure may be a self-emissive display device in which a self-emissive light-emitting element is disposed on a display panel 110, such as an organic light-emitting display device, a quantum dot display device, or a micro LED display device.

[0072] In this case, the gate drive circuit 120 can be implemented as an in-panel gate (GIP) directly formed in the non-display area NDA of the display panel 110, or as an array in-panel gate formed in the display area DA of the display panel 110.

[0073] Figure 3 The structure of a display panel having an in-array gate structure according to an embodiment of the present disclosure is shown.

[0074] Reference Figure 3 According to embodiments of the present disclosure, the display panel 110 may include a substrate 210, a basic circuit layer 220, a pixel layer 240, an encapsulation layer 250, and a touch electrode layer 260.

[0075] The pixel layer 240 may be a layer having a plurality of sub-pixels SP, and may be located on the substrate 210. The pixel layer 240 may include a plurality of sub-pixels SP arranged in the display area DA of the displayed image.

[0076] The base circuit layer 220 may be a layer in which the gate driving circuit 120 is formed in an in-array gate type. The base circuit layer 220 may be located between the substrate 210 and the pixel layer 240. The base circuit layer 220 may include the gate driving circuit 120 of the in-array gate type.

[0077] For example, the base circuit layer 220 may include a plurality of gate driver integrated circuits (GDICs) disposed over the entire display area DA. In another example, the base circuit layer 220 may include a plurality of gate driver integrated circuits (GDICs) disposed in at least a portion of the display area DA.

[0078] The base circuit layer 220 may include gate voltage lines for delivering a gate high voltage (VGH) or gate low voltage (VGL) supplied to the gate driver integrated circuit (GDIC). Additionally, the base circuit layer 220 may include control signal lines for providing control signals to the gate driver integrated circuit (GDIC).

[0079] In another example, the base circuit layer 220 may also include two or more driving voltage lines, to which two or more sub-pixel voltages supplied to the pixel layer 240 are applied.

[0080] For example, two or more subpixel voltages may include a high-potential subpixel voltage EVDD and a low-potential subpixel voltage EVSS provided to pixel layer 240. However, embodiments of this disclosure are not limited thereto. Two or more drive voltage lines may be electrically connected to a pattern (e.g., metal) in pixel layer 240.

[0081] The encapsulation layer 250 may be located on the pixel layer 240. The encapsulation layer 250 can prevent the organic film disposed in the pixel layer 240 from being exposed to moisture or oxygen.

[0082] On the upper surface of the encapsulation layer 250, a touch electrode layer 260 in which touch electrodes are formed may be disposed.

[0083] In the case of the mutual capacitance sensing method, the touch electrode layer 260 may include a driving touch electrode that provides a touch driving signal thereto and a sensing touch electrode that detects the touch sensing signal.

[0084] In the display device 100 according to an embodiment of the present disclosure, the gate driving circuit 120 is provided in the display area DA, which can significantly reduce the size of the non-display area NDA.

[0085] Furthermore, in the display device 100 according to the embodiments of the present disclosure, since the pixel voltage line and the gate voltage line are provided in the display area DA, the size of the non-display area NDA can be further reduced.

[0086] The display panel 110 according to an embodiment of the present disclosure may include a first shielding layer 430 located between the basic circuit layer 220 and the pixel layer 240.

[0087] The first shielding layer 430 can shield the electric field between the base circuit layer 220 and the pixel layer 240. Therefore, the accidental electrical influence between the base circuit layer 220 and the pixel layer 240 can be reduced.

[0088] The display panel 110 according to an embodiment of the present disclosure may include a second shielding layer 450 located between the basic circuit layer 220 and the substrate 210.

[0089] The second shielding layer 450 can not only shield the electric field between the base circuit layer 220 and the substrate 210, but also reduce electrical interference between the signal wiring of the gate driver integrated circuit (GDIC) formed in the base circuit layer 220.

[0090] Figure 4 A sub-pixel circuit in a display device according to an embodiment of the present disclosure is shown.

[0091] Reference Figure 4 The sub-pixel circuit of the display device 100 according to the embodiments of the present disclosure may include a light-emitting element ED, a driving transistor DRT, a plurality of switching transistors T1 to T5, and a storage capacitor Cst.

[0092] The driving transistor DRT and multiple switching transistors T1 to T5 included in the sub-pixel circuit can be implemented as PMOS-type LTPS (low-temperature polysilicon) transistors, thereby ensuring the desired response characteristics.

[0093] Alternatively, at least one of the multiple switching transistors T1 to T5 can be implemented as an NMOS or PMOS type oxide transistor with excellent leakage current characteristics in the off state, and the remaining switching transistors can be implemented as PMOS type LTPS transistors with excellent response characteristics.

[0094] The light-emitting element (ED) emits light by a drive current controlled according to the gate-source voltage Vgs of the driving transistor DRT. The anode of the ED is connected to the fourth node P4, and the cathode of the ED is connected to the low-potential sub-pixel voltage EVSS.

[0095] When the light-emitting element ED is an organic light-emitting diode, an organic compound layer is disposed between the anode and the cathode.

[0096] The organic compound layer may include a hole injection layer (HIL), a hole transport layer (HTL), an emissive layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). For example, two or more organic compound layers emitting different colors may be stacked in a tandem structure.

[0097] When a driving current flows through the light-emitting element (ED), holes passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) move to the light-emitting layer (EML) to form excitons. Therefore, the light-emitting layer (EML) can emit visible light.

[0098] The driving transistor DRT controls the current flowing into the light-emitting element ED according to the gate-source voltage Vgs. The gate of the driving transistor DRT is connected to the second node P2, the drain (or source) is connected to the line supplying the high-potential sub-pixel voltage EVDD, and the source (or drain) is connected to the third node P3.

[0099] The subpixel circuit may include a first switching transistor T1 to a fifth switching transistor T5 and a storage capacitor Cst, which are configured to sample the gate-source voltage Vgs to compensate for the threshold voltage or mobility of the driving transistor DRT.

[0100] The first switching transistor T1 is connected between the data line DL and the first node P1, and is switched by the first scan signal SCAN1. The gate of the first switching transistor T1 is connected to the first gate line to which the first scan signal SCAN1 is applied, the drain (or source) is connected to the data line DL, and the source (or drain) is connected to the first node P1.

[0101] The second switching transistor T2 is connected between the second node P2 and the third node P3, and is switched by the second scan signal SCAN2. The gate of the second switching transistor T2 is connected to the second gate line to which the second scan signal SCAN2 is applied, the drain (or source) is connected to the third node P3, and the source (or drain) is connected to the second node P2.

[0102] Because one electrode of the second switching transistor T2 is connected to the gate of the driving transistor DRT, the second switching transistor T2 preferably has excellent turn-off current characteristics. Therefore, the second switching transistor T2 can be designed with a dual-gate structure to suppress leakage current in the turn-off state.

[0103] In a dual-gate structure, the first and second gates are connected at the same potential, and the channel length becomes longer than in a single-gate structure. As the channel length increases, the resistance increases and the leakage current in the off-state decreases, thereby improving operational stability. However, the second switching transistor T2 can also be implemented as a single-gate structure; in this case, the second switching transistor T2 can be implemented as an oxide transistor.

[0104] The third switching transistor T3 is connected between the first node P1 and the reference voltage line to which the reference voltage Vref is applied, and is switched by the light-emitting signal EM. The gate of the third switching transistor T3 is connected to the third gate line to which the light-emitting signal EM is applied, the drain (or source) is connected to the first node P1, and the source (or drain) is connected to the reference voltage line.

[0105] The fourth switching transistor T4 is connected between the third node P3 and the fourth node P4, which serves as the anode of the light-emitting element ED, and is switched by the light-emitting signal EM. The gate of the fourth switching transistor T4 is connected to the third gate line to which the light-emitting signal EM is applied, the drain (or source) is connected to the third node P3, and the source (or drain) is connected to the fourth node P4. Because the fourth switching transistor T4 controls the drive current flowing into the light-emitting element ED, it can be called a light-emitting control transistor.

[0106] The fifth switching transistor T5 is connected between the fourth node P4 and the reference voltage line, and is switched by the second scan signal SCAN2. The gate of the fifth switching transistor T5 is connected to the second gate line to which the second scan signal SCAN2 is applied, the drain (or source) is connected to the fourth node P4, and the source (or drain) is connected to the reference voltage line.

[0107] The storage capacitor Cst is connected between the first node P1 and the second node P2.

[0108] As described above, when the sub-pixel circuit consists of six transistors (DRT, T1 to T5) and one capacitor (Cst), it can be referred to as a 6T1C structure. In this case, the gate signals used to drive the sub-pixel circuit may include a first scan signal SCAN1, a second scan signal SCAN2, and a light emission signal EM.

[0109] As described above, when the gate signal includes a first scan signal SCAN1, a second scan signal SCAN2, and a light emission signal EM, and the gate driving circuit 120 is formed in an in-array gate structure, the basic circuit layer 220 in the display area DA may include a plurality of in-array gate units for generating the gate signal.

[0110] Figure 5 This is a schematic diagram showing an array of gate cells formed in the display area of ​​a display panel in a display device according to an embodiment of the present disclosure.

[0111] Reference Figure 5 In the display device 100 according to an embodiment of the present disclosure, when the gate driving circuit 120 is formed as an in-array gate structure, the in-array gate unit GU constituting the gate driving circuit 120 may be located in the display area DA.

[0112] For example, when the sub-pixel circuit has a 6T1C structure and the first scan signal SCAN1, the second scan signal SCAN2, and the light emission signal EM are used as gate signals, the in-array gate unit GU may include a first gate circuit region GCA1 for generating the first scan signal SCAN1, a second gate circuit region GCA2 for generating the second scan signal SCAN2, and a third gate circuit region GCA3 for generating the light emission signal EM.

[0113] When the sub-pixel circuits are different, the structure of the gate unit (GU) in the array can be modified according to the structure of the gate signal.

[0114] The first gate circuit region GCA1, the second gate circuit region GCA2, and the third gate circuit region GCA3 constituting the gate unit GU in the array can be arranged sequentially and repeatedly, but this arrangement can be changed according to the structure of the display panel 110.

[0115] Meanwhile, the shape of the display panel 110 used in the vehicle 1000 can vary depending on its position, and the source driver integrated circuits SDIC1 to SDIC10 constituting the data driving circuit 130 can be arranged according to the shape of the display panel 110. As an example, the data driving circuit 130 consists of ten source driver integrated circuits SDIC1 to SDIC10 arranged along the lower edge of the display panel 110.

[0116] Figure 6 This is a plan view showing the structure of an in-array gate unit in a display device according to an embodiment of the present disclosure.

[0117] Reference Figure 6 In the display device 100 according to an embodiment of the present disclosure, the in-array gate unit GU located in the display area DA of the display panel 110 may include a first gate circuit region GCA1 for generating a first scan signal SCAN1, a second gate circuit region GCA2 for generating a second scan signal SCAN2, and a third gate circuit region GCA3 for generating a light emission signal EM.

[0118] The first gate circuit region GCA1, the second gate circuit region GCA2, and the third gate circuit region GCA3 can be formed in the base circuit layer 220, and the pixel layer 240, which has multiple sub-pixels SP, can be formed on the upper surface of the base circuit layer 220. The sub-pixels SP can include red sub-pixels, green sub-pixels, or blue sub-pixels, and may also include white sub-pixels.

[0119] The first gate circuit region GCA1 may include a plurality of first gate circuit blocks GCB1, the first gate circuit blocks GCB1 being configured to generate a first scan signal SCAN1 for driving sub-pixel circuits located on the same row.

[0120] Multiple first gate circuit blocks GCB1 can be arranged in the first gate circuit region GCA1 so as not to overlap with each other. As an example, four first gate circuit blocks GCB11, GCB12, GCB13 and GCB14 are formed in the first gate circuit region GCA1.

[0121] In this configuration, the touch electrode layer 260 can be disposed on the upper surface of the pixel layer 240. In the mutual capacitance structure, the touch electrode layer 260 may include a driving touch electrode (not shown) for transmitting touch driving signals and a sensing touch electrode Rx for transmitting touch sensing signals.

[0122] Because the display panel 110 with an in-array gate structure forms driving touch electrodes and sensing touch electrodes Rx based on the total number of pixels, the gate circuit blocks located below each sensing touch electrode Rx can be different from each other.

[0123] In this situation, gate noise generated by the gate clock signal used to drive the gate drive circuit 120 can be coupled into the touch sensing signal transmitted through the sensing touch electrode Rx. Therefore, the touch drive circuit 152 may amplify the touch sensing signal including the gate noise, which can lead to a degraded touch performance.

[0124] The display device 100 of this disclosure can reduce touch noise and improve touch performance by arranging dummy pixels in a gate circuit block located at a position overlapping with the sensing touch electrode Rx and applying a common dummy signal through the dummy pixels.

[0125] For example, four first gate circuit blocks GCB11, GCB12, GCB13, and GCB14, including gate circuit blocks GCB11 to GCB14 (1-1 to 1-4), can be located in the first gate circuit region GCA1. In this case, the first sensing touch electrode Rx1 formed on the upper surface can overlap with a portion of gate circuit block GCB13 (1-3) and a portion of gate circuit block GCB14 (1-4).

[0126] In this configuration, the first dummy pixel DPX1 may be additionally formed in the first-to-third gate circuit blocks GCB13 located in the first gate circuit region GCA1. The first dummy pixel DPX1 may be formed to extend from the end of the first-to-third gate circuit blocks GCB13. In this configuration, the first-to-third gate circuit blocks GCB13 may be considered to have a structure including the first dummy pixel DPX1.

[0127] When the first dummy pixel DPX1 is included in the first-third gate circuit block GCB13, the first-fourth gate circuit block GCB14 can be formed at a position that does not overlap with the first-third gate circuit block GCB13.

[0128] When the first dummy pixel DPX1 is formed in the first-third gate circuit block GCB13 and a common signal for noise cancellation is applied to the first dummy pixel DPX1, the effect of touch noise on the first touch sensing signal transmitted through the first sensing touch electrode Rx1 can be reduced.

[0129] Furthermore, five second gate circuit blocks GCB21 to GCB25, including gate circuit blocks 2-1 to 2-5, can be located in the second gate circuit region GCA2. The number of gate circuit blocks in each gate circuit region can vary depending on the pixel structure of the display panel 110.

[0130] In this case, the second sensing touch electrode Rx2 formed in the touch electrode layer 260 can overlap with a portion of the second-fifth gate circuit block GCB25.

[0131] In this configuration, the second dummy pixel DPX2 may be additionally formed in the second-to-fifth gate circuit block GCB25 located in the second gate circuit region GCA2. The second dummy pixel DPX2 may be formed to extend from the end of the second-to-fifth gate circuit block GCB25. In this configuration, the second-to-fifth gate circuit block GCB25 may be considered to have a structure including the second dummy pixel DPX2.

[0132] When the second dummy pixel DPX2 is included in the second-to-fifth gate circuit block GCB25, the third gate circuit region GCA3 can be formed at a position that does not overlap with the second-to-fifth gate circuit block GCB25.

[0133] With the second dummy pixel DPX2 formed in the gate circuit block GCB25 (2-5), when a common signal for noise cancellation is applied to the second dummy pixel DPX2, the influence of touch noise on the second touch sensing signal transmitted through the second sensing touch electrode Rx2 can be reduced.

[0134] In this case, the size of the first dummy pixel DPX1 formed in the first gate circuit region GCA1 can be the same as the size of the second dummy pixel DPX2 formed in the second gate circuit region GCA2.

[0135] In this state, the same common signal can be applied to the first dummy pixel DPX1 and the second dummy pixel DPX2. Therefore, the touch driving circuit 152, which receives touch sensing signals through the first sensing touch electrode Rx1 and the second sensing touch electrode Rx2, can use the same common signal applied to the first dummy pixel DPX1 and the second dummy pixel DPX2 to eliminate noise caused by the gate signal.

[0136] Figure 7 This is a plan view comparing a gate circuit block that does not include dummy pixels with a gate circuit block that includes dummy pixels in the first gate circuit region of a display device according to an embodiment of the present disclosure.

[0137] Reference Figure 7 In the display device 100 according to an embodiment of the present disclosure, the first gate circuit region GCA1 may include a plurality of gate circuit blocks GCB11 to GCB14 in which a gate drive circuit 120 is formed.

[0138] In this configuration, among the multiple gate circuit blocks GCB11 to GCB14, the first to third gate circuit blocks GCB13, located at a position overlapping with the first sensing touch electrode Rx1, may include a first dummy pixel DPX1, to which a common signal CS may be applied. On the other hand, the remaining gate circuit blocks GCB11, GCB12, and GCB14 may not include dummy pixels.

[0139] The first and second gate circuit blocks GCB12 may include a sub-circuit region SCA, multiple sub-pixel driving regions SDA, and a power line region PLA. For example, the first and second gate circuit blocks GCB12 may include a sub-circuit region SCA, six sub-pixel driving regions SDA1 to SDA6, and a power line region PLA at a position corresponding to eight sub-pixels SP.

[0140] The gate drive circuit with an in-array gate structure can be located in the sub-circuit region SCA.

[0141] Within the six sub-pixel driving regions SDA1 to SDA6, high-potential sub-pixel voltage lines, data lines, and reference voltage lines can be respectively configured to drive the first to sixth sub-pixels. These lines, including the high-potential sub-pixel voltage lines, data lines, and reference voltage lines, can be referred to as driving voltage lines.

[0142] In other words, the first sub-pixel driving region SDA1 may include a first high-potential sub-pixel voltage line, a first data line, and a first reference voltage line for driving the first sub-pixel. Similarly, the second sub-pixel driving region SDA2 may include a second high-potential sub-pixel voltage line, a second data line, and a second reference voltage line for driving the second sub-pixel. The third sub-pixel driving region SDA3 may include a third high-potential sub-pixel voltage line, a third data line, and a third reference voltage line for driving the third sub-pixel.

[0143] Additionally, the fourth sub-pixel driving region SDA4 may include a fourth high-potential sub-pixel voltage line, a fourth data line, and a fourth reference voltage line for driving the fourth sub-pixel. The fifth sub-pixel driving region SDA5 may include a fifth high-potential sub-pixel voltage line, a fifth data line, and a fifth reference voltage line for driving the fifth sub-pixel. The sixth sub-pixel driving region SDA6 may include a sixth high-potential sub-pixel voltage line, a sixth data line, and a sixth reference voltage line for driving the sixth sub-pixel.

[0144] In the display device 100 of this disclosure, a first pixel and a second pixel with different emission angles can be arranged together, and the viewing angle of the image can be controlled by selectively controlling the driving of the first pixel or the second pixel.

[0145] The first pixel and the second pixel can be collectively referred to as a unit pixel. In this case, the first sub-pixel to the third sub-pixel can form the first pixel, and the fourth sub-pixel to the sixth sub-pixel can form the second pixel. Therefore, the first sub-pixel driving region SDA1 to the third sub-pixel driving region SDA3 can be called the first pixel driving region, and the fourth sub-pixel driving region SDA4 to the sixth sub-pixel driving region SDA6 can be called the second pixel driving region.

[0146] In this configuration, the gate driving circuit 120 of the display device 100 of this disclosure can generate a first selection signal for driving a first pixel and a second selection signal for driving a second pixel, and the first selection signal line and the second selection signal line can be disposed in the power line region PLA. Furthermore, the power line region PLA may additionally include high-potential sub-pixel voltage lines.

[0147] The gate signal output from the sub-circuit region SCA can be supplied from the base circuit layer 220 to the sub-pixel SP arranged in the pixel layer 240.

[0148] Furthermore, the first-to-third gate circuit blocks GCB13, located at a position overlapping with the first sensing touch electrode Rx1 in the first gate circuit region GCA1, may include a sub-circuit region SCA, multiple sub-pixel driving regions SDA1 to SDA6, and a power line region PLA. In this case, the first-to-third gate circuit blocks GCB13 may also include a first dummy pixel DPX1, to which a common signal CS can be applied.

[0149] The first dummy pixel DPX1 can be formed in a region that does not overlap with adjacent gate circuit blocks (e.g., GCB12 and GCB14). The first dummy pixel DPX1 can receive a common signal CS, thereby reducing noise affecting the first sensing touch electrode Rx1.

[0150] Figure 8 This is a plan view comparing a gate circuit block including a dummy pixel in a first gate circuit region and a gate circuit block including a dummy pixel in a second gate circuit region in a display device according to an embodiment of the present disclosure.

[0151] Reference Figure 8 In the display device 100 according to an embodiment of the present disclosure, the first gate circuit region GCA1 in the display area DA of the display panel 110 may include gate circuit blocks GCB11 to GCB14 from the first to the fourth. Furthermore, the second gate circuit region GCA2 may include gate circuit blocks GCB21 to GCB25 from the second to the second to the fifth.

[0152] In this configuration, gate circuit blocks GCB13 (positions 1-3) in the first gate circuit region GCA1, which overlap with the first sensing touch electrode Rx1, may include a first dummy pixel DPX1. Additionally, gate circuit blocks GCB25 (positions 2-5) in the second gate circuit region GCA2, which overlap with the second sensing touch electrode Rx2, may include a second dummy pixel DPX2.

[0153] The first dummy pixel DPX1 and the second dummy pixel DPX2 can be formed to have the same size. For this purpose, the first dummy pixel DPX1 and the second dummy pixel DPX2 can be formed to have the same width DW. In addition, the same common signal CS can be applied to the first dummy pixel DPX1 and the second dummy pixel DPX2.

[0154] Therefore, the touch driving circuit 152, which receives the first touch sensing signal transmitted through the first sensing touch electrode Rx1 and the second touch sensing signal transmitted through the second sensing touch electrode Rx2, can use the common signal CS applied to both the first dummy pixel DPX1 and the second dummy pixel DPX2 to eliminate the gate noise caused by the first-3 gate circuit block GCB13 and the second-5 gate circuit block GCB25.

[0155] Figure 9 An example configuration of a differential amplifier for amplifying touch sensing signals in a touch driving circuit of a display device according to an embodiment of the present disclosure is shown.

[0156] Reference Figure 9 The display device 100 according to the embodiments of the present disclosure may include n sensing touch electrodes Rx1 to Rxn for touch detection of the display panel 110.

[0157] In this case, the touch driving circuit 152 included in the touch circuit 150 may include a differential amplifier OP, which compares and amplifies the first touch sensing signal TSS1 transmitted from the first sensing touch electrode Rx1 and the second touch sensing signal TSS2 transmitted from the second sensing touch electrode Rx2.

[0158] For example, the first touch sensing signal TSS1 received through the first sensing touch electrode Rx1 can be provided to the inverting input terminal (-) of the differential amplifier OP, and the second touch sensing signal TSS2 received through the second sensing touch electrode Rx2 can be provided to the non-inverting input terminal (+) of the differential amplifier OP. The differential amplifier OP may include a first feedback capacitor CF1 to reduce the noise of the first touch sensing signal TSS1, and may include a second feedback capacitor CF2 to reduce the noise of the second touch sensing signal TSS2.

[0159] In this case, the same common signal CS can be applied to the first dummy pixel DPX1, which is formed in the first-3 gate circuit block GCB13 at a position overlapping with the first sensing touch electrode Rx1, and the second dummy pixel DPX2, which is formed in the second-5 gate circuit block GCB25 at a position overlapping with the second sensing touch electrode Rx2.

[0160] Therefore, since both the first touch sensing signal TSS1 and the second touch sensing signal TSS2 include the same common signal component, the deviation dVs of the signal output by the differential amplifier OP is reduced. Thus, the display device 100 of this disclosure can reduce the noise deviation caused by the first-3 gate circuit blocks GCB13 formed at a position overlapping with the first sensing touch electrode Rx1 and the second-5 gate circuit blocks GCB25 formed at a position overlapping with the second sensing touch electrode Rx2, thereby improving touch performance.

[0161] This structure can also be applied to individual differential amplifiers that receive and amplify touch sensing signals from adjacent sensing touch electrodes.

[0162] The display device according to embodiments of the present disclosure can be described as follows.

[0163] The display device disclosed herein may include: a base circuit layer including a plurality of in-array gate units constituting a gate driving circuit in a display area; a pixel layer disposed on the base circuit layer and including a plurality of pixels; a touch electrode layer disposed on the upper surface of the pixel layer and including a plurality of sensing touch electrodes; and a touch driving circuit configured to amplify touch sensing signals transmitted through the plurality of sensing touch electrodes to generate touch sensing data. The plurality of in-array gate units may include: a first gate circuit block including a first dummy pixel formed at a location overlapping with a first sensing touch electrode; and a second gate circuit block including a second dummy pixel formed at a location overlapping with a second sensing touch electrode.

[0164] Multiple gate units within the array may include a first gate circuit region for generating a first scan signal, a second gate circuit region for generating a second scan signal, and a third gate circuit region for generating a light emission signal. Each of the first, second, and third gate circuit regions may include multiple gate circuit blocks.

[0165] Each of the plurality of gate circuit blocks may include: a sub-circuit region for generating a gate signal; a first pixel driving region, wherein a first driving voltage line is provided for providing a driving voltage to a first pixel in the pixel layer; a second pixel driving region, wherein a second driving voltage line is provided for providing a driving voltage to a second pixel in the pixel layer; and a power line region, wherein a selection signal line is provided for providing a first selection signal for driving the first pixel and a second selection signal for driving the second pixel.

[0166] The power line area can be located between the first pixel driving area and the second pixel driving area.

[0167] The first dummy pixel can be formed to have the same size as the second dummy pixel.

[0168] The first and second dummy pixels can be configured not to overlap with adjacent gate circuit blocks.

[0169] The same common signal can be applied to both the first and second dummy pixels.

[0170] The touch driving circuit may include a differential amplifier, wherein a first touch sensing signal from a first sensing touch electrode is provided to the inverting input of the differential amplifier, and a second touch sensing signal from a second sensing touch electrode is provided to the non-inverting input of the differential amplifier.

[0171] Additionally, the display panel disclosed herein may include: a base circuit layer including a plurality of in-array gate units constituting a gate driving circuit in the display area; a pixel layer disposed on the base circuit layer and including a plurality of pixels; and a touch electrode layer disposed on the upper surface of the pixel layer and including a plurality of sensing touch electrodes. The plurality of in-array gate units may include: a first gate circuit block including a first dummy pixel formed at a location overlapping with a first sensing touch electrode; and a second gate circuit block including a second dummy pixel formed at a location overlapping with a second sensing touch electrode.

[0172] The above description has been presented to enable those skilled in the art to implement and use the technical ideas of the invention, and has been provided in the context of specific applications and their requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of the invention. The above description and drawings provide examples of the technical ideas of the invention for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical ideas of the invention.

Claims

1. A display device, comprising: The basic circuit layer includes multiple in-array gate units that constitute the gate drive circuit in the display area; A pixel layer is disposed on the base circuit layer and includes a plurality of pixels; A touch electrode layer is disposed above the pixel layer and includes a plurality of sensing touch electrodes; and A touch driving circuit is configured to amplify touch sensing signals transmitted through the plurality of sensing touch electrodes to generate touch sensing data. The plurality of array-internal gate units include: A first gate circuit block includes a first dummy pixel formed at a location overlapping with a first sensing touch electrode; and The second gate circuit block includes a second dummy pixel formed at a location overlapping with the second sensing touch electrode.

2. The display device according to claim 1, wherein, The plurality of array in-gate units include: A first gate circuit region is configured to generate a first scan signal; The second gate circuit region is configured to generate a second scan signal; and The third gate circuit region is configured to generate light-emitting signals. Each of the first gate circuit region, the second gate circuit region, and the third gate circuit region includes a plurality of gate circuit blocks.

3. The display device according to claim 2, wherein, Each of the plurality of gate circuit blocks includes: Sub-circuit region, configured to generate gate signals; A first pixel driving region is provided, wherein a first driving voltage line is provided for providing a driving voltage to the first pixel of the pixel layer; A second pixel driving region is provided, wherein a second driving voltage line is provided for providing a driving voltage to the second pixel of the pixel layer; and The power line area includes selection signal lines that provide a first selection signal for driving the first pixel and a second selection signal for driving the second pixel.

4. The display device according to claim 3, wherein, The power line area is located between the first pixel driving area and the second pixel driving area.

5. The display device according to claim 1, wherein, The first dummy pixel has the same size as the second dummy pixel.

6. The display device according to claim 5, wherein, The first dummy pixel and the second dummy pixel are configured not to overlap with adjacent gate circuit blocks.

7. The display device according to claim 5, wherein, The same common signal is applied to the first dummy pixel and the second dummy pixel.

8. The display device according to claim 7, wherein, The touch driving circuit includes a differential amplifier, wherein a first touch sensing signal from the first sensing touch electrode is provided to the inverting input of the differential amplifier, and a second touch sensing signal from the second sensing touch electrode is provided to the non-inverting input of the differential amplifier.

9. The display device according to claim 1, wherein, The first dummy pixel is disposed at the end of the first gate circuit block, and the second dummy pixel is disposed at the end of the second gate circuit block.

10. A display panel, comprising: The basic circuit layer includes multiple in-array gate units that constitute the gate drive circuit in the display area; A pixel layer is disposed on the base circuit layer and includes a plurality of pixels; and A touch electrode layer is disposed above the pixel layer and includes multiple touch sensing electrodes. The plurality of array-internal gate units include: A first gate circuit block includes a first dummy pixel formed at a location overlapping with a first sensing touch electrode; and The second gate circuit block includes a second dummy pixel formed at a location overlapping with the second sensing touch electrode.

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