Memory management method, memory, device, program product, and storage medium

Abstract

Embodiments of the present specification relate to the technical field of memory, and provide a memory management method, a memory, an apparatus, a program product and a storage medium. The memory comprises a storage medium, the storage medium is divided into a plurality of strips, and each strip comprises a plurality of continuous access units; the plurality of strips comprise strips of different categories, and the strips of different categories are used to store data of different update frequencies; the method comprises: in response to one or more access units of a target strip being written with data, increasing the number of times of writing of the target strip in a statistical record; wherein the statistical record is used to record the number of times of writing of the strips; if it is determined based on the statistical record that two strips need to be exchanged, exchanging the data stored by the two strips respectively; wherein the difference between the number of times of writing of the two strips satisfies a preset exchange condition.

Description

Technical Field

[0001] This specification relates to the field of memory technology, and in particular to memory management methods, memory, devices, program products, and storage media. Background Technology

[0002] Currently in the storage field, some memory technologies need to address the uneven wear caused by repeatedly written hot data. For example, the material properties of new storage media such as phase-change memory, magnetic-change memory, and variable resistance memory are continuously being researched and improved. However, due to limitations in process maturity and production yield, these new storage media still lag behind commonly used dynamic random access memory in terms of stability and lifespan. Summary of the Invention

[0003] To overcome the problems existing in related technologies, this specification provides methods for managing memory, memory, devices, program products, and storage media.

[0004] According to a first aspect of the embodiments of this specification, a method for managing a memory is provided. The memory includes a storage medium divided into multiple stripes, each stripe including multiple consecutive access units. The multiple stripes include stripes divided into different categories, each category being used to store data with different update frequencies. The method includes:

[0005] In response to data being written to one or more access units of the target stripe, the write count of the target stripe is incremented in the statistics record; wherein the statistics record is used to record the write count of the stripe;

[0006] If two stripes that need to be swapped are determined based on the statistical records, the data stored in the two stripes are swapped; wherein the difference between the number of writes of the two stripes satisfies the preset swapping condition.

[0007] According to a second aspect of the embodiments of this specification, a memory is provided, the memory including a host interface, a persistent memory controller, a media interface, and a persistent memory medium, the media interface being connected to the persistent memory medium, and the host interface and the media interface being respectively connected to the persistent memory controller; the host interface is used to connect to a processor of a computer device; the persistent memory controller is used to perform the steps of the method described in the first aspect.

[0008] According to a third aspect of the embodiments of this specification, a computer device is provided, including a processor and the memory described in the second aspect.

[0009] According to a fourth aspect of the embodiments of this specification, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps of the method described in the first aspect.

[0010] According to a fifth aspect of the embodiments of this specification, a computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a processor, implements the steps of the method described in the first aspect.

[0011] The technical solutions provided in the embodiments of this specification may include the following beneficial effects:

[0012] In this embodiment, the storage medium is divided into multiple stripes, and each stripe includes multiple consecutive access units. Therefore, this embodiment is designed with stripes as the granularity. Whenever data is written to one or more access units of a stripe, the write count of the stripe is added to the statistical record. Thus, the write count of a stripe can be used as an indicator to evaluate the wear level of the stripe. Based on the statistical record, it can be determined whether there is a large difference in the write count between stripes. When the difference between the write counts of two stripes meets the preset swapping conditions, the data stored in the two stripes can be swapped. Thus, the stripe with higher wear can be swapped to store data with a lower update frequency, and the stripe with lower wear can be swapped to store data with a higher update frequency. Therefore, this embodiment achieves wear leveling of the storage medium and can prevent uneven wear from affecting the lifespan of the storage medium.

[0013] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this specification. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of an address mapping for a DRAM according to an exemplary embodiment of this specification.

[0015] Figure 2 This is a flowchart illustrating a memory management method according to an exemplary embodiment of this specification.

[0016] Figure 3A This is a schematic diagram of the physical space of a storage medium according to an exemplary embodiment of this specification.

[0017] Figure 3B This is a schematic diagram illustrating the write count statistics of a physical stripe and the classification of the corresponding physical stripes according to an exemplary embodiment of this specification.

[0018] Figure 3C This is a schematic diagram illustrating stripe swapping based on the number of writes per stripe, according to an exemplary embodiment of this specification.

[0019] Figure 3D This specification is a schematic diagram illustrating the address mapping of physical stripes in a temperature region according to an exemplary embodiment.

[0020] Figure 3E This is a schematic diagram illustrating the processing of physical stripes in a thermal region according to an exemplary embodiment of this specification.

[0021] Figure 3F This is a schematic diagram illustrating a hot zone waste recycling and strip recycling method according to an exemplary embodiment of this specification.

[0022] Figure 3G This is a schematic diagram of a cooling buffer according to an exemplary embodiment of this specification.

[0023] Figure 4A This is a schematic diagram of a memory according to an exemplary embodiment of this specification.

[0024] Figure 4B This is a schematic diagram of a computer device illustrated in this specification according to an exemplary embodiment.

[0025] Figure 5 This specification is a hardware structure diagram of a computer device containing a memory management device according to an exemplary embodiment.

[0026] Figure 6 This is a block diagram illustrating a memory management device according to an exemplary embodiment of this specification. Detailed Implementation

[0027] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this specification. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this specification as detailed in the appended claims.

[0028] The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to be limiting of this specification. The singular forms “a,” “the,” and “the” as used in this specification and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0029] It should be understood that although the terms first, second, third, etc., may be used in this specification to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this specification, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to determination."

[0030] The user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this manual are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of related data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation portals are provided for users to choose to authorize or refuse.

[0031] The material properties of novel storage media, such as Phase Change Memory (PCM), Magnetic Random-Access Memory (MRAM), and Resistive Random-Access Memory (ReRAM), are continuously being researched and improved. However, compared to widely used Dynamic Random-Access Memory (DRAM), these novel storage media still lag behind in terms of stability and lifespan. Limited by process maturity and production yield, the wear and write crosstalk of novel storage media are lower than those of DRAM, thus becoming an obstacle to the large-scale commercialization of these media. Designing memory modules suitable for various application scenarios using existing storage media, based on the capabilities of current process technology, requires overcoming limitations such as write crosstalk and wear.

[0032] Write crosstalk refers to the physical process of writing data to a medium cell that can affect surrounding medium cells (e.g., through electromagnetic fields or heat dissipation), thereby affecting the quality of the data stored on the surrounding medium cells.

[0033] Current non-volatile storage media employ a near-fixed mapping, similar to DRAM modules. This mapping establishes a direct correspondence between the memory address space (logical address) and the physical address of the storage medium through simple calculations. For example... Figure 1The diagram shown is a schematic representation of an address mapping for DRAM according to an exemplary embodiment of this specification. A direct computational correspondence can be established between the memory logical address and the media physical address. For example, several bits in the address represent the Bank number of the accessed unit, and several other bits represent the Row number; similarly, several bits represent the sequence number of the accessed unit within the Row. The advantage of this type of mapping is its speed and the elimination of the need to store and look up mapping tables. For media with strong resistance to wear and crosstalk (such as DRAM), this is a feasible option after large-scale product application. However, for new storage media, there are currently one or more of the following main problems:

[0034] 1. Repeatedly written hot data will increase the wear difference between different physical addresses, thus creating uneven wear and affecting the life of the media;

[0035] 2. Each physical address is updated randomly, and the access granularity is small (e.g., the memory write unit cacheline is 64 bytes per second, and data is accessed and updated in random order in 64-byte units). It is difficult to accurately count the number of write crosstalk at each access granularity, making it difficult to maintain data storage quality in a timely manner. There is a risk that data cannot be read due to severe crosstalk.

[0036] 3. Even if write crosstalk and write wear can be accurately counted, the poor crosstalk immunity necessitates frequent background data refreshes, leading to an increase in overall write amplification on the medium, accelerating medium wear, and also resulting in performance loss.

[0037] Based on this, embodiments of this specification provide a memory management method capable of achieving wear leveling of the storage medium. The memory includes a storage medium divided into multiple stripes, each stripe comprising multiple consecutive access units; the multiple stripes include stripes divided into different categories, each category used to store data with different update frequencies. For example... Figure 2 As shown, Figure 2 This is a flowchart illustrating a memory management method according to an exemplary embodiment of this specification, the method including the following steps:

[0038] In step 202, in response to data being written to one or more access units of the target stripe, the write count of the target stripe is incremented in the statistics record. The statistics record is used to record the write count of the stripe.

[0039] In step 204, if two stripes are identified as needing to be swapped based on the statistical records, the data stored in the two stripes are swapped. The difference between the number of writes to the two stripes satisfies a preset swapping condition.

[0040] As an example, the storage medium in this embodiment can be a non-volatile storage medium, such as PCM, MRAM, or ReRAM; optionally, the storage medium in this embodiment can be used as memory in a computer device, thus it can be called a persistent memory medium. Of course, this embodiment does not exclude other possibilities such as application to volatile storage media.

[0041] As an example, the method of this embodiment can be used to manage storage media within a memory; in some examples, the memory may contain a controller, and the method of this embodiment can run on the controller inside the memory. Of course, it is also optional that the memory is managed by the CPU, which runs on the central processing unit (CPU) of the computer device.

[0042] As an example, the storage medium can be divided into multiple physical stripes, each stripe having a contiguous physical address and a fixed capacity; the specific capacity can be configured as needed, such as a custom setting like 1MB (Megabyte), which is not limited in this embodiment.

[0043] Optionally, each stripe contains multiple consecutive access units, and each access unit can have a fixed capacity; the specific capacity can be configured as needed, for example, a custom setting such as 128 bytes; or, the capacity of each unit can be greater than the aforementioned cacheline, etc., and this embodiment does not limit this.

[0044] Optionally, this embodiment can divide the physical space of the storage medium into different categories of stripes. Each category can include multiple stripes, and different categories of stripes are used to store data with different update frequencies. The number of categories can be configured according to actual needs, such as two, three, or four categories, etc., and this embodiment does not limit this. Optionally, in practical applications, the storage medium may also include stripes with other functions different from the stripes "used to store data with different update frequencies" mentioned here, such as blank stripes; or it may also include physical space for storing other functions such as metadata or the program in this case.

[0045] Considering that in practical applications, some data is updated frequently while others are updated less frequently, the write count of the stripe storing this data will increase rapidly for data with a high update frequency, while the write count of the stripe storing this data will increase slowly for data with a low update frequency. Therefore, this embodiment designs different types of stripes to store data with different update frequencies.

[0046] As an example, different update frequency levels can be determined based on the number of stripe categories; for instance, if there are three stripe categories, there can be three different levels of update frequency. As another example, when data is to be written to a stripe, the data's update frequency can be obtained. The data update frequency can be obtained in various ways, such as through prediction or by statistics from the application.

[0047] Because different stripes store data with different update frequencies, there are wear differences between stripes, resulting in uneven wear and affecting media lifespan. Therefore, in step 202, this embodiment designs a statistical record to record the number of writes for each stripe. However, to count the number of writes, the small granularity of the storage medium makes it difficult to count the number of writes. Therefore, in this embodiment, the write count is not based on the access unit, but on the stripe. Thus, as long as a stripe is written to once, regardless of the size of the written data—that is, whether the write unit is the entire stripe or one or more access units (i.e., a portion of the stripe)—the write count will increase by one.

[0048] Optionally, there are multiple ways to record the write count of a stripe. For example, a counter can be implemented to record the write count of each stripe. Each stripe can have its own corresponding counter, implemented in software. When a write event occurs on a stripe, the counter increments the write count by one. Optionally, stripe metadata can be maintained. The metadata for each stripe records relevant information, including the write count. In practical applications, using dedicated hardware counters or other methods to record the stripe write count is also optional. Optionally, the statistical record can consist of the write count from the metadata corresponding to each stripe, or it can be a single dataset containing the write counts for each stripe. Other methods can also be used to implement the statistical record in practical applications; this embodiment does not limit this approach.

[0049] Therefore, based on statistical records, this embodiment designs a stripe swapping process to achieve wear leveling. If the difference in write counts between stripes is large, the data stored on the two stripes can be swapped. Specifically, in step 204, a preset swapping condition can be defined, which indicates that the difference between the write counts of the two stripes is large. For example, the difference between the write counts of the two stripes can be greater than a preset threshold. Optionally, other conditions based on this difference can also be set as needed, such as the difference being a percentage of the write counts of one of the stripes being higher than a preset proportion.

[0050] Optionally, there are multiple ways to determine the two stripes that need to be swapped. For example, the write counts of each stripe recorded in the statistics log can be read. Alternatively, the two stripes to be swapped can be stripes of different categories, such as a first category stripe and a second category stripe, where the first category represents the category with the highest update frequency of stored data, and the second category represents the category with the lowest update frequency of stored data. The specific method can be determined based on the number of categories used in the actual application; this embodiment does not impose any limitations on this.

[0051] Optionally, in step 204, this embodiment can read the data from the two stripes, temporarily store it in a cache, and then swap the data between the two stripes. That is, data A stored in stripe A is changed to be stored in stripe B; and data B stored in stripe B is changed to be stored in stripe A. After the data swap, the category of the stripe can change. For example, stripe A becomes a cold stripe because it stores cold data, and similarly, stripe B becomes a hot stripe.

[0052] Since the data stored in the stripe with a high write count is updated frequently, after data swapping, the data with a high write count is transferred to the stripe with a low write count. This redirects high write counts to the stripe with a low write count, while the stripe with a high write count stores data with a low update frequency. This prevents the write count of the stripe from increasing at a high frequency, i.e., it stops heating up rapidly, thus achieving wear leveling between the two stripes.

[0053] As can be seen from the above embodiments, this embodiment divides the storage medium into multiple stripes, and each stripe includes multiple consecutive access units. Therefore, this embodiment is designed with stripes as the granularity. Whenever one or more access units of a stripe are written with data, the write count of the stripe is added to the statistical record. Thus, the write count of a stripe can be used as an indicator to evaluate the wear level of the stripe. Based on the statistical record, it can be determined whether there is a large difference in the write count between stripes. When the difference between the write counts of two stripes meets the preset swap condition, the data stored in the two stripes can be swapped. Thus, the stripe with higher wear can be swapped to store data with a lower update frequency, and the stripe with lower wear can be swapped to store data with a higher update frequency. Therefore, this embodiment achieves wear leveling of the storage medium.

[0054] In some examples, considering that multiple categories may exist in practical applications, and that uneven wear typically occurs in stripes with significantly different data update frequencies, in this embodiment, the different categories of stripes include: hot stripes in hot regions and cold stripes in cold regions; the update frequency of the data stored in the hot stripes is higher than that of other categories of stripes in the different categories; the update frequency of the data stored in the cold stripes is lower than that of other categories of stripes in the different categories; wherein, the two stripes that need to be interchanged include: hot stripes that need to be interchanged and cold stripes that need to be interchanged.

[0055] Optionally, this embodiment incorporates data exchange between hot and cold strips. The hot strip stores data with the highest update frequency, while the cold strip stores data with the lowest update frequency; therefore, the uneven wear between these two types of strips is most pronounced. In practical applications, the number of other categories between hot and cold strips can be greater than or equal to zero, and can be set according to actual needs; this embodiment does not impose any limitations on this.

[0056] Optionally, the write counts of each hot stripe and each cold stripe can be read from the statistical records to determine if there are any hot and cold stripes that need to be swapped due to differences in write counts that satisfy preset swapping conditions. Optionally, there may be multiple hot and cold stripes that need to be swapped due to differences satisfying preset swapping conditions. For example, there are hot stripe H1, hot stripe H2, cold stripe C1, and cold stripe C2. The difference in write counts between H1 and C1 satisfies the preset swapping condition; similarly, the difference between H1 and C2, H2 and C1, and H2 and C2 also satisfy this condition. Any pair of hot and cold stripes that need to be swapped can be selected as needed. In other methods, it is also possible to prioritize selecting the pair of hot and cold stripes with the largest difference from multiple hot and cold stripes that need to be swapped. For example, if H1 has the highest number of writes, and the difference between the number of writes of H1 and C1 is greater than the difference between the number of writes of H1 and C2, then H1 and C1 are selected as a pair of hot and cold stripes that need to be swapped. Then, based on this idea, another pair of hot and cold stripes that need to be swapped can be selected from the remaining hot and cold stripes.

[0057] Optionally, for a pair of hot and cold strips that need to be swapped, this embodiment can read the data from both strips and temporarily store it in a buffer, and then swap the data between the two strips. After the data swap, the original hot strip that needs to be swapped can be changed to a cold strip, and the cold strip that needs to be swapped can be changed to a hot strip.

[0058] In this embodiment, the hot strip stores the data with the highest update frequency, while the cold strip stores the data with the lowest update frequency. Therefore, this embodiment is designed to directly exchange data between the hot and cold strips, which can reduce the number of data replications, reduce resource consumption, reduce wear and crosstalk on the medium, and alleviate the wear difference between the hot and cold strips.

[0059] In some examples, considering the complexity and difficulty of implementing the management scheme, in this embodiment, the different types of stripes include the following three types of stripes: hot stripes, warm stripes, and cold stripes; wherein, the update frequency of the data stored in the hot stripes, warm stripes, and cold stripes decreases sequentially.

[0060] In this embodiment, three types of stripes are designed to store data at three different update frequencies. For example, hot stripes are used to store data with the highest update frequency, warm stripes are used to store data with a medium update frequency, and cold stripes are used to store data with the highest update frequency. Optionally, in practical applications, the data update frequency can be divided into three different levels according to the application scenario of the memory in this embodiment.

[0061] Optionally, the number of each type of strip in the hot strip, warm strip and cold strip can be configured according to actual needs, and this embodiment does not limit this.

[0062] Based on this, this embodiment designs three types of stripes. On the one hand, they can store data with different update frequencies to achieve wear leveling. On the other hand, compared with more complex multi-level classification, they reduce complexity and operational overhead, making them easier to implement and maintain.

[0063] like Figure 3A The diagram shown is a physical space diagram of a storage medium according to an exemplary embodiment of this specification, illustrating the division of the physical space of the storage medium into cold regions, warm regions, hot regions, and over-provisioning (OP) regions. Here, the regions refer to the categories to which the stripes belong, and a region may include one or more stripes. Figure 3A For ease of illustration, multiple stripes of the same category are shown as a continuous area; in reality, multiple physical stripes within an area can be non-contiguous, meaning that stripes from different areas can be arbitrarily distributed within the storage medium.

[0064] Hot, warm, and cold regions can be used to store data with different update frequencies. Due to the different update frequencies of the stored data, the number of writes to hot, warm, and cold stripes is likely to decrease sequentially.

[0065] Optionally, this embodiment includes a reserved area where the stripes are blank stripes without stored data. These stripes can be dynamically adjusted and allocated as hot, warm, or cold stripes during storage medium usage. Based on this embodiment, the physical space of the storage medium can be classified according to data write activity, and scheduling can be performed on the classified media to overcome the limitations of new media such as write crosstalk and write wear.

[0066] As an example, in addition to the above, the storage medium in this embodiment... Figure 3A In addition to the physical space shown, other types of physical spaces may be included, which do not require the management method of this embodiment. These other types of physical spaces may include physical spaces storing metadata for managing the storage medium. The metadata of the storage medium refers to data that records the status information of each management unit of the storage medium (such as the physical stripe and media range unit in this embodiment) to facilitate management. Since the amount of metadata is relatively small, it does not need to distinguish between hot and cold data, and therefore does not require the management method of this embodiment.

[0067] As an example, each physical stripe in this embodiment has a corresponding number of writes; Figure 3B The diagram illustrates the write count statistics and classification of physical stripes according to an exemplary embodiment of this specification. Optionally, each stripe may have a corresponding counter. This counter counts the total number of writes for the corresponding stripe. Optionally, the source of the written data can be a foreground write or a background write. A foreground write refers to one initiated by the host (such as an operating system). A background write is initiated by the internal components of the storage medium (i.e., the program that manages the storage medium in this embodiment), such as data refresh, garbage collection, wear leveling, etc. Each write operation, regardless of the size of the written data, increments the count. The write unit can be the entire stripe or one or more access units, i.e., a portion of the stripe. The storage medium component counts the write counts for all physical stripes, and these write counts can be used for wear leveling.

[0068] Optionally, taking the memory application scenario of this embodiment as an example, most memory management schemes involve logical addresses. Logical addresses are mainly used to abstract physical storage locations, providing a mechanism for the operating system and applications to access memory in a consistent manner without needing to concern themselves with the specific layout or limitations of the underlying physical storage. Therefore, it is usually necessary to maintain an address mapping table that records the mapping relationship between logical addresses and physical addresses. Based on this, in this embodiment, due to the data swapping between stripes, the address mapping table can be updated as needed during actual implementation. For example, in the aforementioned embodiment where stripe A and stripe B's data are swapped, the physical address of stripe A can be updated accordingly to map to the logical address of stripe B, while the physical address of stripe B can be mapped to the logical address of stripe A. Of course, it is possible in practical applications not to use logical addresses or involve an address mapping table; this embodiment does not limit this.

[0069] Optionally, in this embodiment, the stripes or access units inside the storage medium can be constructed using methods such as... Figure 1 The embodiment shown designs the physical address and address mapping relationship in this way. Of course, other custom methods can also be used, and this embodiment does not limit them.

[0070] As an example, the memory in this embodiment may also store a stripe mapping table for the plurality of stripes. The number of entries in the stripe mapping table is equal to the number of stripes in the plurality of stripes. The serial number of each entry in the stripe mapping table represents the logical serial number of the stripe. Each entry in the stripe mapping table records the physical address of the stripe represented by that entry. The logical addresses of the plurality of stripes are consecutive and arranged in ascending order. The high n bits of the logical address represent the logical serial number of the stripe, and the low m bits represent the access unit in the stripe. n and m are both positive integers.

[0071] The method may further include:

[0072] In response to receiving an access request for a target logical address, a target logical number is determined from the high n bits of the target logical address, and the corresponding stripe to be accessed is retrieved from the stripe mapping table based on the target logical number. The access unit of the stripe to be accessed is determined from the low m bits of the target logical address.

[0073] As an example, the stripe mapping table in this embodiment is a mapping table based on the stripe level, rather than refined to the access unit; the stripe mapping table can be understood as a table that records the correspondence between the logical address and physical address of a stripe.

[0074] For example, assuming the total capacity of the storage medium is 512 GB (Gigabytes) and the stripe size is 1 MB, then there are 2 192 physical stripes. The table is used to store 2 19 The physical addresses of the physical stripes, that is, the mapping table will contain 2 19 One entry is sufficient to represent 2 19 There are 10 logical stripes. In the mapping table structure, the number of table entries = the number of logical stripes (2... 19 Each entry stores the corresponding physical stripe address. Assume the logical stripe numbers range from 0 to 2. 19 "-1" indicates that the logical stripe index is equivalent to the table index. For example, logical stripe 0 corresponds to the 0th entry in the table, logical stripe 1 corresponds to the 1st entry, and so on. The physical address of the stripe is stored in the entry with that index in the table.

[0075] Taking an access unit size of 128 bytes as an example, the logical address structure can be:

[0076] Total number of stripes: 512GB / 1MB = 2 19 Therefore, the high 19 bits of the logical address represent the stripe index.

[0077] Number of cells per strip: 1MB / 128B = 2 13 The access units in the strip range from 0 to "2". 13 The "-1" number indicates that the lower 13 bits of the logical address represent the offset of the accessed unit within the stripe.

[0078] Therefore, the physical stripe address can be obtained from the mapping table, and the offset of the access unit to be accessed can be directly obtained by using the lower 13 bits of the logical address.

[0079] For example, suppose the received target logical address is 0x12345678 (32-bit address); this address can be split. The high 19 bits are: 0x12345678>>13=0x2468, so the logical stripe index (i.e., logical sequence number) is 0x2468; while the low 13 bits are: 0x12345678&0x1FFF=0x1678, so the offset of the accessed unit is 0x1678.

[0080] Next, the stripe mapping table is queried. The 0x2468th entry in the table is used to obtain the physical stripe address (e.g., physical stripe 0xABCD, where 0x1678 represents the access cell within that physical stripe). Optionally, the target physical address corresponding to the target logical address can be generated, which is the starting address of physical stripe 0xABCD plus a cell offset of 0x1678.

[0081] In practical applications, the specific values ​​of n and m in the logical address can be set based on the total capacity of the actual storage medium, the size of the stripe, and the size of the access unit. This embodiment does not limit this.

[0082] As can be seen from the above embodiments, this embodiment designs a stripe mapping table based on the stripe level, rather than fine-grained to the access unit. Therefore, it simplifies the complexity of global address management, significantly reduces the data volume of the stripe mapping table, and makes the mapping between logical stripe addresses and physical stripe addresses simpler and more efficient, while maintaining efficient data access capabilities.

[0083] In practical applications, when data is swapped between two stripes, not all access units of the stripe may store data; some access units may store data. During data swapping, data can be written to any location within the stripe. Optionally, in some examples, swapping the data stored in the hot stripe and the cold stripe to be swapped may include:

[0084] Based on the first position of the access unit for storing data in the hot strip to be swapped, the data stored in the hot strip to be swapped is written into the access unit at the first position in the cold strip to be swapped;

[0085] Based on the second position of the access unit for the data stored in the cold strip to be swapped, the data stored in the cold strip to be swapped is written into the access unit at the second position of the hot strip to be swapped.

[0086] In this embodiment, the data is swapped by keeping the access unit where the data is located in the stripe in the same position. For example, the data stored in the i-th access unit in the cold strip is written to the i-th access unit in the hot strip, and the data stored in the j-th access unit in the hot strip is written to the j-th access unit in the cold strip.

[0087] Thus, the data exchange method adopted in this embodiment does not require complex remapping or recalculation of the new location of the access unit where the data is located, since the location of the access unit where the data is located remains unchanged. Therefore, it simplifies the address management and mapping table update during the data migration process.

[0088] For example, in the embodiment using the above-mentioned stripe mapping table, when the mapping relationship between logical address and physical address is updated due to the data swapping of stripes, only a simple update needs to be performed; for example, in the aforementioned embodiment, stripe A and stripe B swap data, changing the entry that records the physical address of stripe A to the entry that records the physical address of stripe B; and changing the entry that records the physical address of stripe B to the entry that records the physical address of stripe B.

[0089] In practical applications, the update modes of data stored in different types of stripes can be the same or different. Specific update modes include, but are not limited to, in-place update mode or append write mode. In-place update mode refers to directly overwriting the existing location where the data is stored. Append write mode refers to recording data in consecutive spatial locations according to the chronological order of the update time, and can record expired data in each spatial location.

[0090] Based on this, in practical applications, when data is exchanged in this embodiment, the data exchanged between the two stripes can also be determined based on different data update modes. For example, if the stripe adopts the in-place update mode, the data exchanged by the stripe is all the data stored in the stripe; if the stripe adopts the append write mode, the data exchanged by the stripe is the valid data stored in the stripe, and invalid data does not need to be exchanged.

[0091] like Figure 3C The diagram illustrates a stripe swapping scheme based on write counts, according to an exemplary embodiment of this specification. In this embodiment, a mapping table from logical addresses to physical addresses, organized by physical stripes, can be created, maintained, and updated internally within the memory. The write counts for each physical stripe are accumulated in real time. In this embodiment, hot stripes from hot regions with high write counts can be selected in the background, and cold stripes from cold regions with low write counts can be swapped.

[0092] The data swapping process can involve first exchanging the valid data in the two physical stripes to be swapped, while the position of the access units within the physical stripes remains unchanged. For example, the nth access unit (e.g., 128B) in the cold strip is written to the nth unit in the hot strip, and vice versa. In other words, the correspondence between access units remains unchanged when the two stripes are swapped. This can be achieved as follows: Figure 3C The diagram illustrates the mapping between two physical stripes to indicate which two stripes are swapped. Considering the global implementation complexity, a... Figure 3C The mapping between logical and physical stripe addresses is simpler and more efficient. Because logical addresses are contiguous and arranged in ascending order, only the corresponding physical addresses need to be stored, and the logical addresses can be represented by their position numbers in the storage table. When accessing a cell corresponding to a logical address, the stripe mapping table can be consulted to obtain the corresponding physical address of the stripe. Then, based on the last few bits of the logical cell address, the sequentially arranged media cells are found. At this point, the logical cells and physical cells within a stripe still satisfy... Figure 1 The correspondence shown is (i.e., the number of LSBs required to select a cell).

[0093] Strip swapping refers to writing valid data from a hot stripe to a cold stripe, and vice versa. Persistent memory media supports in-situ updates. For example, a hot stripe may contain four 64-byte blocks of data, with the first and third being valid; while a cold stripe may contain four 64-byte blocks of data, with the first and second being valid. First, the valid data from both the hot and cold stripes can be read out. This valid data is temporarily stored in a data buffer within the memory controller, such as Static Random Access Memory (SRAM). Then, the two valid data from the hot stripe are written to the positions of the first and third 64-byte blocks of the cold stripe, and the two 64-byte blocks read from the cold stripe are written to the positions of the first and second 64-byte blocks of the hot stripe. This swapping achieves wear leveling.

[0094] In some examples, for stripes with moderate storage update frequency, this embodiment employs migration to blank stripes to prevent write amplification. For example, the method may further include:

[0095] If a temperature band to be improved is determined based on the statistical records, a band to be written is obtained from the blank bands in the reserved area; wherein the number of times the temperature band to be improved is written is greater than or equal to a preset threshold.

[0096] After writing the data stored in the temperature strip to be improved to the strip to be written, the strip to be written is divided into temperature strips, the data stored in the temperature strip to be improved is cleared, and the temperature strip to be improved is divided into blank strips in the reserved area.

[0097] As an example, the preset threshold here can be set as needed, for example, it can be set comprehensively based on the characteristics of storage medium such as durability or write disturbance. This embodiment does not limit this.

[0098] As an example, when the number of writes to a certain temperature strip reaches a threshold (below the hot zone threshold), migration to a blank strip is triggered. Optionally, a blank strip can be selected from the reserved area; the selection method can be arbitrary, and this embodiment does not limit this. As an example, the selection can be based on the number of writes to the blank strip, with the selection priority negatively correlated with the number of writes, meaning the strip with the lowest number of writes is selected first. This selected blank strip will serve as the strip to be written, used to store the valid data copied from the temperature strip to be improved. This strip will then be divided into temperature strips. The original temperature strip to be improved, after data clearing, can be recycled back to the reserved area.

[0099] As can be seen from the above embodiments, in this embodiment, when the number of writes to the warm strip increases to a certain extent, the data stored therein is promptly migrated to a blank strip, which can prevent the warm strip from being worn due to write amplification.

[0100] In some examples, writing the data stored in the temperature strip to be improved to the strip to be written may include:

[0101] Based on the third position of the access unit for the data stored in the temperature strip to be improved, the data stored in the temperature strip to be improved is written into the access unit at the third position in the strip to be written.

[0102] In this embodiment, when data from the warm strip is migrated to the blank strip, the principle of keeping the location of the access unit unchanged can be followed, so that the access unit address within the strip remains unchanged. For example, similar to the principle of data swapping between hot and cold strips, if data is stored in the i-th access unit of the warm strip, then the data will be copied to the i-th access unit of the blank strip.

[0103] Similarly, the data migration method used in this embodiment does not require complex remapping or recalculation of the new location of the access unit where the data is located, thus simplifying address management and mapping table updates during the data migration process.

[0104] For example, in the embodiment using the above-mentioned strip mapping table, when the mapping relationship between logical address and physical address is updated due to the data migration of the temperature strip, only a simple update needs to be performed; for example, in the aforementioned embodiment, when the data of temperature strip C is migrated to strip D, the entry recording the physical address of temperature strip C is changed to the entry recording the physical address of strip D.

[0105] like Figure 3DThe diagram illustrates the address mapping of physical stripes in a warm region according to an exemplary embodiment of this specification. The address mapping design of the warm region improves performance in terms of crosstalk and wear resistance. The update frequency of data stored in the warm stripe in the warm region is between that of the hot and cold regions, therefore its write count is between that of the hot and cold regions. A trigger threshold can be preset, and the specific threshold can be set comprehensively based on the endurance, write disturb, and other characteristics of the medium. When the number of writes recorded for the warm stripe exceeds this threshold, the improvement mechanism for that warm stripe in this embodiment will be triggered. Specifically, when the write count of a stripe in a warm region is high and triggers the improvement mechanism of this embodiment, the entry storing the physical address of that warm stripe in the stripe mapping table will be updated to the physical address of a blank stripe allocated from the OP region. Then, the valid data of the entire stripe is copied to the stripe allocated from the OP region, and the original stripe is recycled back to the OP region. During this process, the write count of each stripe remains unchanged and is not altered by the recycling. When copying stripes, only valid data is copied. In other words, if the data stored in an access unit has been deleted, it does not need to be copied. During copying, the access unit addresses within the stripe remain unchanged. For example... Figure 3D As shown, the lower m bits of the logical address are used to select the corresponding physical unit.

[0106] In some cases, for stripes with high storage update frequency, the frequent data updates can easily lead to local write hotspots within the stripe if an in-place update mode is used. Therefore, in this embodiment, instead of an in-place update mode, an append-only write mode is used for hot stripes, recording them in consecutive physical locations according to their write time sequence.

[0107] Based on this, in order to implement this update mode, in the embodiments of this specification, the different types of stripes include hot stripes in the hot region, and the update frequency of the data stored in the hot stripes is higher than that of other types of stripes in the different categories; the memory also stores an access unit mapping table of the hot stripes, the serial number of the entry in the access unit mapping table represents the logical serial number of the access unit in the hot stripe, and the entry in the access unit mapping table records the physical address and tag of the access unit represented by the entry, the tag indicating whether the data stored in the access unit is valid;

[0108] The method may further include:

[0109] If a write request for hot data to be written is obtained, a new write access unit with a blank hot stripe in the hot region is obtained, and the hot data to be written is written to the new write access unit;

[0110] In the access unit mapping table, the target entry corresponding to the logical number and the logical address carried by the write request is determined, and the physical address of the new write access unit and a mark representing the storage of valid data are recorded in the target entry.

[0111] like Figure 3E The diagram shown is a schematic representation of the physical stripe processing within a hot region, as illustrated in an embodiment of this specification. The hot region employs a finer-grained mapping, based on access units. For example, the hot stripe can be further designed with an access unit mapping table at the granularity of the aforementioned stripe mapping table, and applied to the hot stripe. For instance, assuming the hot region capacity is 1GB and the access units are 128B, the hot region has a total of 2... 23 One access unit; optionally, an additional bit can be added to indicate the above flag, that is, to indicate whether the data of an access unit is valid (bit 0) or invalid (bit 1). Therefore, a total of 24 bits, or 3 bytes, are needed to represent it. Therefore, a total of 3 × 2 23 Each byte = 24MB is used to store the physical address and tag of the hot stripe.

[0112] like Figure 3E As shown, the stripe mapping table and access unit mapping table for hot stripes in the hot zone represent a two-level mapping. The first level is the inter-strip mapping, which specifies the physical stripe address where the corresponding logical stripe is located. This physical stripe address is the calculated intermediate address. Then, this physical stripe address can be used as the input to the second-level mapping table (i.e., the access unit number on the left side of the table, which is also the row number of the table), so that the physical address of the hot zone at the access unit granularity (i.e., the address of the physical access unit) can be retrieved.

[0113] Therefore, the first-level mapping, namely the stripe mapping table, manages the mapping from logical addresses to physical addresses for all stripes. Its granularity is in stripe units (e.g., 1MB), and the entries record: logical stripe address → physical stripe base address (i.e., the starting physical address of the stripe). As an example:

[0114] Logical stripe A address → Physical stripe X (starting address 0x10000000).

[0115] Logical stripe B address → Physical stripe Y (starting address 0x20000000).

[0116] The second-level mapping, namely the hot stripe access unit mapping table, operates only on the hot stripe and manages the mapping from logical address to physical address for each access unit (e.g., 128B) within the hot stripe. Its granularity is based on access units (e.g., 128B). The entry number represents the logical sequence number of the access unit in the hot stripe. Each entry in the access unit mapping table records the physical address and a flag for the access unit represented by that entry; for example, the entry records: physical stripe address (as base address) + access unit number → final physical address, with a 1-bit valid bit appended to the final physical address (marking whether the data is valid). As an example:

[0117] Logic unit C (in logic strip A) → Physical address 0x10000000 + 200 × 128B = 0x10003200, valid bits = 0.

[0118] For the first-level mapping (strip mapping table), the input can be a logical stripe address (such as logical stripe A), and the output can be a physical stripe address (such as 0x10000000).

[0119] For the second-level mapping (access unit mapping table), the input can be the physical stripe address (0x10000000) + access unit number (e.g., 200). The output can be: final physical address (0x10000000 + 200 × 128B = 0x10003200).

[0120] When accessing data in a hot stripe, the physical stripe address can be found first through the first-level mapping, and then the specific physical address can be located through the second-level mapping in combination with the logical sequence number of the access unit.

[0121] For example, assuming accessing the logical address A (logical stripe 5, cell number 200) of a hot stripe, it could be:

[0122] First, look up the stripe mapping table to get the logical stripe 5 → physical stripe base address 0x30000000.

[0123] Then, by querying the access unit mapping table, we get access unit number 200 → physical address 0x30000000 + 200 × 128B = 0x30003200.

[0124] The validity of data can be checked from the retrieved physical address. For example, if the last bit of the physical address "0x30003200" is "0", it means that the data is valid.

[0125] Based on this, an append-only writing mode for data within the hot strip can be implemented. That is, once new hot data (new data or updates to existing hot data) is written to the access unit in the hot strip, it will be sequentially written to the continuous physical space of the hot area.

[0126] It is understood that the aforementioned write request for obtaining hot data to be written includes both write requests for newly written hot data and update requests for already stored hot data. Therefore, when a write request is obtained, a new write access unit with a blank space in the hot stripe of the hot region can be obtained, and then the hot data to be written can be written to the new write access unit. Afterwards, in the access unit mapping table, in the entry determined based on the logical address carried by the write request, the physical address of the new write access unit and a marker representing valid stored data are recorded.

[0127] For example, such as Figure 3E As shown, all hot strips have stored data. When access unit P is updated, the updated data P1 stored in access unit P can be received. A blank strip can be allocated from the blank strips in the reserved area to the hot area, and this strip will become a hot strip. Then, the updated data P1 will be written to the first access source in the newly allocated strip. Similarly, if an update to the data stored in access unit C occurs, the updated data C1 can be received. At this time, the updated data C1 can be sequentially written to the access units after data P1. If an update to data P1 occurs again at this time, similarly, the new updated data P2 will continue to be sequentially written to the access units after data C1.

[0128] When data is updated, the mapping between logical addresses and physical addresses is synchronized, and the logical address is mapped to the physical address where the updated data is located.

[0129] like Figure 3E As shown, a blank stripe is allocated from the OP area to the hot area; this blank stripe is the hot stripe. Units C and P successively obtain their updated P1 and C1, respectively, and the latest version data is written to the stripe allocated by the OP area according to log mode, synchronously updating the mapping from logical unit address to physical unit address. Specifically, when access unit P is updated, the updated data P1 of access unit P is written to the newly allocated hot stripe; similarly, the updated data C1 of unit C is written to the newly allocated hot stripe. If unit P is subsequently updated again, obtaining data P2, it will continue to be written sequentially to the next access unit, without overwriting P1.

[0130] like Figure 3EAs shown, using the update mode of this embodiment, the write crosstalk inside the hot strip will be controlled to single digits, and the write crosstalk of each unit is naturally uniform, without worrying about local write hot spots causing data crosstalk failure in the surrounding medium.

[0131] Meanwhile, the update mode of this embodiment also ensures uniform write wear within the hot zone, with each medium being written to an equal number of times the entire hot zone is globally written. Therefore, this embodiment effectively achieves write wear balancing and write crosstalk control in frequently updated areas, i.e., hot stripes. Figure 3E The example illustrates a mapping design with Hn hot stripes and a total of Gm access units, where each stripe has Gm / Hn access units.

[0132] In some examples, the method may also include:

[0133] In response to receiving a deletion request to delete data stored in the access unit to be deleted in the first hot strip, the marker recorded in the entry corresponding to the access unit to be deleted is updated to a marker representing invalid data; wherein, the first hot strip is any hot strip in the hot region.

[0134] In this embodiment, since the hot strip adopts an append-write mode, for an access unit that has already stored data in the hot strip, a deletion request to delete the stored data may be received. Based on the append-write mode of this embodiment and the design of the above entries, if the data stored in the access unit that needs to be deleted in the first hot strip that has stored data needs to be deleted, the mark recorded in the corresponding entry of the access unit that needs to be deleted can be directly updated to a mark that represents invalid data. The actual deletion of data can be temporarily suspended, and only the mark can be updated, thereby improving the response efficiency of the deletion request.

[0135] In some examples, the method may also include:

[0136] Based on the access units that store invalid data recorded in the access unit mapping table, a hot strip to be recycled is selected from the hot zone, and the number of access units storing invalid data in the hot strip to be recycled meets the preset recycling conditions.

[0137] If the recycled hot strip does not store valid data, the data stored in the recycled hot strip is cleared, and the recycled hot strip is divided into blank strips in the reserved area.

[0138] If the recycled hot strip contains valid data, then the write strip is obtained from the blank strip in the reserved area, and the valid data in the recycled hot strip is written into the write strip.

[0139] As an example, this embodiment can also be configured with a background garbage collection mechanism, which can select stripes with a large amount of invalid data for recycling to free up media space. The preset recycling conditions can be set according to actual needs; for example, they can be determined by the number of access units storing invalid data in the hot stripe, such as a number exceeding a set threshold. If a hot stripe meets the preset recycling conditions, then that hot stripe can undergo recycling processing.

[0140] Optionally, if the recycled hot strip does not store valid data, it can be cleared and recycled to a reserved area. If the recycled hot strip stores valid data, a blank strip can be allocated from the reserved area as a write strip to migrate the valid data stored in the recycled hot strip to the write strip. Thus, after the valid data stored in the recycled hot strip is migrated, the recycled hot strip can be cleared and recycled, and the hot data written to the write strip will then become the hot strip.

[0141] Based on this, this embodiment, through the design of a recycling mechanism, can promptly recover the hot strip and release the medium space.

[0142] In some examples, after the step of writing valid data from the recycled hot strip to the written strip, the method may further include:

[0143] Based on the statistical records, it is determined whether there are other types of strips that can be interchanged with the recycled hot strip. If so, the recycled hot strip and the strip to be interchanged are taken as the two strips, and the step of exchanging the data stored in the two strips is performed.

[0144] If not, the recycled hot strip is divided into blank strips in the reserved area.

[0145] like Figure 3F The diagram shown is a schematic representation of hot zone waste collection and strip collection according to an exemplary embodiment of this specification. The background waste collection program selects strips with a large amount of invalid data (deleted or updated) for collection to free up media space. This can be achieved... Figure 3EBased on this, blank stripes are further allocated to write valid data stored in the recycled hot stripes (i.e., GC writes in the diagram). Valid data units in the recycled hot stripe K1 (as mentioned above, valid or invalid is indicated by a bit in the mapping table) are copied sequentially to stripe K2 allocated from the reserved area (access units A and T in the diagram). When valid data in a recycled stripe K is successfully copied, it is checked whether the cumulative write count of stripe K has triggered a swap with a cold stripe. If so, stripe K is replaced with a cold region, and the valid data in the corresponding cold region stripe is copied over; simultaneously, the stripe in the corresponding cold region is used for the next hot region stripe to be written after the data is copied. Otherwise, if hot and cold wear leveling is not triggered, the recycled hot stripe K1 will return to the OP region; this stripe can subsequently be used for full stripe replacement in the warm region or for fine-grained replacement in the hot region. As can be seen from this, in this embodiment, after the step of writing the valid data in the recycled hot strip into the written strip, this embodiment can continuously determine whether there are other types of strips that can be interchanged with the recycled hot strip based on statistical records, thereby triggering the data exchange process in a timely manner and adjusting the wear balance between the hot strip and other strips in a timely manner.

[0146] For example, fine-grained replacement of hot stripes in a hot zone can refer to replacement at the access unit level. If data stored in an access unit of a hot stripe is deleted, the physical address of this access unit can be used to store physical addresses with greater wear in the hot zone, thereby achieving fine-grained replacement of physical addresses in the hot zone to achieve wear leveling.

[0147] Strips in the cold, hot, and warm zones are all recycled and returned to the OP zone, not their original zone. The write counts of each strip are accumulated. However, the overall write count growth of multiple strips within a component is considered. If the write counts of other strips grow faster and more significantly, strips in the OP zone are selectively reassigned to the cold, hot, or warm zones based on this comparison. The write count of each individual strip will not decrease, but the write counts of other strips will increase.

[0148] To effectively adapt to the new storage medium and reduce the impact of high-frequency updates on medium lifespan and data retention, this embodiment also proposes setting a write cache to cool down the data writing process. Based on the characteristics of the new storage medium, if data is written to the same location on the medium and then updated within a short period (e.g., a set period of 900µs), its stability and lifespan will be significantly reduced compared to updates occurring over a slightly longer period (e.g., 900µs).

[0149] Accordingly, in some examples, the memory further includes a dynamic random access memory medium, the storage medium including a persistent memory medium; the method may further include:

[0150] In response to obtaining the data to be written to the persistent memory medium, the data to be written is cached in the dynamic random access memory medium;

[0151] According to a preset period, the data cached in the dynamic random access memory medium is written to the persistent memory medium.

[0152] As an example, the memory in this embodiment includes a host interface, a persistent memory controller, a media interface, and a persistent memory medium. The media interface is connected to the persistent memory medium, and the host interface and the media interface are respectively connected to the persistent memory controller. The host interface is used to connect to the processor of a computer device.

[0153] As an example, the memory in this embodiment may include Dynamic Random Access Memory (DRAM). A write cooling cache can be allocated within the internal DRAM of the memory to adjust the aforementioned time interval, thereby improving the media-friendly design. This DRAM can be used to store the aforementioned mapping table and cached data of this embodiment.

[0154] In this embodiment, the preset period can be set according to actual needs and can be any value such as 900 microseconds (µs). For example, taking 900µs as an example, if the write throughput of a single non-volatile memory is 10GB / s, then setting part of the internal DRAM space as a write cooling cache would only require a capacity of 10GB * (900µs / 1s) = 9MB. This mere 9MB of cache would achieve a more than tenfold improvement in write crosstalk capability.

[0155] Therefore, as Figure 3G The diagram shown is a schematic of a cooling cache according to an exemplary embodiment of this specification. This embodiment is designed with a cooling cache to handle data of different sizes (A, B, C, etc.) being written. The write-cooled cache writes data within a 900µs interval to the new medium all at once. This ensures that the time interval between writes to the same physical address is no less than 900µs, thus allowing the improved medium capability resulting from longer time intervals to be utilized. Furthermore, for frequently updated data (e.g., update cycles less than 900µs), the write-cooled cache can also replace intermediate versions of the data in DRAM, thereby reducing the write pressure on the new storage medium and consequently reducing wear and write crosstalk.

[0156] The cache stores data A, B, and C themselves, and records the logical address of each data. After cooling down, before writing to the persistent medium, the physical address is allocated, and the physical address is expressed and recorded according to the mapping method in this embodiment.

[0157] As can be seen from the above embodiments, this embodiment innovatively designs a hybrid mapping media scheduling system aimed at improving the anti-crosstalk and anti-wear capabilities of novel storage media to pave the way for its commercialization. Based on the write count statistics of each stripe (e.g., 1MB), this innovation divides the physical region into hot region, warm region, cold region, and OP region, and adopts different media scheduling and recycling mechanisms.

[0158] The cold regions employ simplified addressing without mapping tables and continuously write and maintain data through in-situ updates; the number of writes is counted in units of stripes.

[0159] Among them, the warm region combines write statistics to select the stripe that triggers data migration and copies the entire stripe to the new stripe allocated from the OP region, which overcomes local stripe write crosstalk and write wear hotspots.

[0160] The hot zone aggregates write-intensive stripes and uses finer-grained (e.g., 128B) logging-patterned writing, deletion, and updating of data to naturally achieve wear leveling and crosstalk control, while asynchronous background reclamation releases space. The fine-grained scheduling and logging-patterned writing of the hot zone reduce the background flush write amplification required to mitigate wear and crosstalk caused by write hotspots.

[0161] In addition, this embodiment also designs a write cooling cache to increase the time interval between adjacent writes, thereby improving the media's data retention, anti-crosstalk and anti-wear capabilities in a more media-friendly way. The cache also integrates multiple version updates, alleviating the update pressure of hot data.

[0162] Accordingly, embodiments of this specification also provide a memory, such as Figure 4A The diagram shown is a schematic representation of a memory according to an exemplary embodiment of this specification. The memory includes a host interface, a persistent memory controller, a media interface, and a persistent memory medium. The media interface is connected to the persistent memory medium, and the host interface and the media interface are respectively connected to the persistent memory controller. The host interface is used to connect to the processor of a computer device. The persistent memory controller is used to execute the steps of the method described in the foregoing embodiments.

[0163] As an example, such as Figure 4B The diagram shown is a schematic representation of a computer device according to an exemplary embodiment of this specification. The computer device of this embodiment may include a processor and a memory as described in the foregoing embodiments.

[0164] Corresponding to the aforementioned embodiments of the memory management method, this specification also provides embodiments of a memory management device and the device to which it is applied.

[0165] The embodiments of the memory management device described in this specification can be applied to a memory controller or a processor of a computer device. The device embodiments can be implemented in software, hardware, or a combination of both. Taking software implementation as an example, as a logical device, it is formed by the processor / controller reading computer program instructions into memory for execution. From a hardware perspective, such as... Figure 5 The diagram shown is a hardware structure diagram of a computer device containing the memory management device described in this specification, except... Figure 5 In addition to the processor 510, network interface 520, memory 530, and non-volatile memory 540 shown, the computer device in which the memory management device is located in the embodiment may also include other hardware depending on the actual function of the computer device, which will not be described in detail here.

[0166] like Figure 6 As shown, Figure 6 This is a block diagram illustrating a memory management apparatus according to an exemplary embodiment of the present specification. The memory includes a storage medium divided into multiple stripes, each stripe including multiple consecutive access units. The multiple stripes include stripes divided into different categories, each category being used to store data with different update frequencies. The apparatus includes:

[0167] The recording module 61 is configured to: in response to data being written to one or more access units of the target stripe, increment the number of writes of the target stripe in a statistical record; wherein the statistical record is used to record the number of writes of the stripe;

[0168] The swapping module 62 is used to: swap the data stored in the two stripes if two stripes that need to be swapped are determined based on the statistical records; wherein the difference between the number of writes of the two stripes satisfies a preset swapping condition.

[0169] In some examples, the different categories of stripes include: hot stripes in hot regions and cold stripes in cold regions; the data stored in the hot stripes is updated more frequently than that of other categories of stripes; the data stored in the cold strips is updated less frequently than that of other categories of stripes.

[0170] The two strips that need to be interchanged include: the hot strip that needs to be interchanged and the cold strip that needs to be interchanged.

[0171] In some examples, the interchange module 62 is specifically used for:

[0172] Based on the first position of the access unit for storing data in the hot strip to be swapped, the data stored in the hot strip to be swapped is written into the access unit at the first position in the cold strip to be swapped;

[0173] Based on the second position of the access unit for the data stored in the cold strip to be swapped, the data stored in the cold strip to be swapped is written into the access unit at the second position of the hot strip to be swapped.

[0174] In some examples, the different categories of stripes include the following three categories of stripes: hot stripes, warm stripes, and cold stripes; wherein the update frequency of the data stored in the hot stripes, warm stripes, and cold stripes decreases in that order.

[0175] In some examples, the interchange module 62 is further specifically used for:

[0176] Based on the first position of the access unit storing valid data in the hot strip to be interchanged, the valid data stored in the hot strip to be interchanged is written into the access unit at the first position in the cold strip to be interchanged.

[0177] Based on the second position of the access unit storing valid data in the cold strip to be swapped, the valid data stored in the cold strip to be swapped is written into the access unit at the second position in the hot strip to be swapped.

[0178] In some examples, the plurality of strips also includes blank strips with reserved areas; the device further includes an improvement module for:

[0179] If a temperature band to be improved is determined based on the statistical records, a band to be written is obtained from the blank bands in the reserved area; wherein the number of times the temperature band to be improved is written is greater than or equal to a preset threshold.

[0180] After writing the data stored in the temperature strip to be improved to the strip to be written, the strip to be written is divided into temperature strips, the data stored in the temperature strip to be improved is cleared, and the temperature strip to be improved is divided into blank strips in the reserved area.

[0181] In some examples, the improvement module is specifically used for:

[0182] Based on the third position of the access unit for the data stored in the temperature strip to be improved, the data stored in the temperature strip to be improved is written into the access unit at the third position in the strip to be written.

[0183] In some examples, the memory also stores a stripe mapping table for the plurality of stripes. The number of entries in the stripe mapping table is equal to the number of stripes in the plurality of stripes. The sequence number of each entry in the stripe mapping table represents the logical sequence number of the stripe. Each entry in the stripe mapping table records the physical address of the stripe represented by that entry. The logical addresses of the plurality of stripes are consecutive and arranged in ascending order. The high n bits of the logical address represent the logical sequence number of the stripe, and the low m bits represent the access unit in the stripe. Where n and m are positive integers.

[0184] The device further includes a mapping query module, used for:

[0185] In response to receiving an access request for a target logical address, a target logical number is determined from the high n bits of the target logical address, and the corresponding stripe to be accessed is retrieved from the stripe mapping table based on the target logical number. The access unit of the stripe to be accessed is determined from the low m bits of the target logical address.

[0186] In some examples, the different categories of strips include hot strips in hot regions, and the data stored in the hot strips is updated more frequently than that of other categories of strips in the different categories;

[0187] The memory also stores an access unit mapping table for the hot strip. The serial number of the entry in the access unit mapping table represents the logical serial number of the access unit in the hot strip. The entry in the access unit mapping table records the physical address and a tag of the access unit represented by the entry. The tag indicates whether the data stored in the access unit is valid.

[0188] The device further includes an update module for:

[0189] If a write request for hot data to be written is obtained, a new write access unit with a blank hot stripe in the hot region is obtained, and the hot data to be written is written to the new write access unit;

[0190] In the access unit mapping table, the target entry corresponding to the logical number and the logical address carried by the write request is determined, and the physical address of the new write access unit and a mark representing the storage of valid data are recorded in the target entry.

[0191] In some examples, the device also includes a deletion module for:

[0192] In response to receiving a deletion request to delete data stored in the access unit to be deleted in the first hot strip, the marker recorded in the entry corresponding to the access unit to be deleted is updated to a marker representing invalid data; wherein, the first hot strip is any hot strip in the hot region.

[0193] In some examples, the device also includes a recycling module for:

[0194] Based on the access units that store invalid data recorded in the access unit mapping table, a hot strip to be recycled is selected from the hot zone, and the number of access units storing invalid data in the hot strip to be recycled meets the preset recycling conditions.

[0195] If the recycled hot strip does not store valid data, the data stored in the recycled hot strip is cleared, and the recycled hot strip is divided into blank strips in the reserved area.

[0196] If the recycled hot strip contains valid data, then the write strip is obtained from the blank strip in the reserved area, and the valid data in the recycled hot strip is written into the write strip.

[0197] In some examples, the device further includes a secondary interchange module for:

[0198] Based on the statistical records, it is determined whether there are other types of strips that can be interchanged with the recycled hot strip. If so, the recycled hot strip and the strip to be interchanged are taken as the two strips, and the step of exchanging the data stored in the two strips is performed.

[0199] If not, the recycled hot strip is divided into blank strips in the reserved area.

[0200] In some examples, the memory further includes a dynamic random access memory medium, the storage medium including a persistent memory medium; the device further includes a cache module for:

[0201] In response to obtaining the data to be written to the persistent memory medium, the data to be written is cached in the dynamic random access memory medium;

[0202] According to a preset period, the data cached in the dynamic random access memory medium is written to the persistent memory medium.

[0203] The specific implementation process of the functions and roles of each module in the memory management device described above can be found in the implementation process of the corresponding steps in the memory management method described above, and will not be repeated here.

[0204] Accordingly, embodiments of this specification also provide a computer program product, including a computer program that, when executed by a controller within a processor / memory, implements the steps of the aforementioned memory management method embodiments.

[0205] Accordingly, embodiments of this specification also provide a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein a controller within the processor / memory executes the program to implement the steps of an embodiment of a memory management method.

[0206] Accordingly, embodiments of this specification also provide a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of an embodiment of a memory management method.

[0207] For the device embodiments, since they basically correspond to the method embodiments, the relevant parts can be referred to in the description of the method embodiments. The device embodiments described above are merely illustrative. The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of the solution in this specification according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0208] The above embodiments can be applied to one or more computer devices. The computer device is a device that can automatically perform numerical calculations and / or information processing according to pre-set or stored instructions. The hardware of the computer device includes, but is not limited to, microprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), embedded devices, etc.

[0209] The computer device can be any electronic product that can interact with the user, such as a personal computer, tablet computer, smartphone, personal digital assistant (PDA), game console, interactive network television (IPTV), smart wearable device, etc.

[0210] The computer equipment may also include network equipment and / or user equipment. The network equipment includes, but is not limited to, a single network server, a server group consisting of multiple network servers, or a cloud based on cloud computing consisting of a large number of hosts or network servers.

[0211] The network in which the computer device is located includes, but is not limited to, the Internet, wide area network, metropolitan area network, local area network, and virtual private network (VPN).

[0212] The foregoing has described specific embodiments of this specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing are possible or may be advantageous.

[0213] The steps of the various methods described above are only for clarity. In practice, they can be combined into one step or some steps can be split into multiple steps. As long as they include the same logical relationship, they are all within the scope of protection of this patent. Adding insignificant modifications or introducing insignificant designs to the algorithm or process, but without changing the core design of the algorithm and process, are also within the scope of protection of this application.

[0214] While this specification contains numerous specific implementation details, these should not be construed as limiting the scope of any invention or the scope of the claims, but rather are primarily intended to describe features of specific embodiments of a particular invention. Certain features described in the various embodiments herein may also be implemented in combination in a single embodiment. Conversely, various features described in a single embodiment may also be implemented separately in various embodiments or in any suitable sub-combination. Furthermore, while features may function in certain combinations as described above and even initially claimed in this way, one or more features from a claimed combination may be removed from that combination in some cases, and a claimed combination may refer to a sub-combination or a variation thereof.

[0215] The terms "specific example" or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with the embodiments or examples, which are included in at least one embodiment or example of this specification. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0216] Other embodiments of this specification will readily occur to those skilled in the art upon consideration of the specification and practice of the invention claimed herein. This specification is intended to cover any variations, uses, or adaptations that follow the general principles of this specification and include common knowledge or customary techniques in the art not claimed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this specification are indicated by the following claims.

[0217] It should be understood that this specification is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this specification is limited only by the appended claims.

[0218] The above description is merely a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this specification should be included within the scope of protection of this specification.

Claims

1. A method for managing a memory, the memory comprising a storage medium divided into multiple stripes, each stripe comprising a multiple consecutive access units; the multiple stripes comprising: The stripes are divided into different categories, and different categories of stripes are used to store data with different update frequencies; the method includes: In response to data being written to one or more access units of the target stripe, the write count of the target stripe is incremented in the statistics record; wherein the statistics record is used to record the write count of the stripe; If two stripes that need to be swapped are determined based on the statistical records, the data stored in the two stripes are swapped; wherein the difference between the number of writes of the two stripes satisfies the preset swapping condition.

2. The method according to claim 1, wherein the different categories of stripes include: Hot stripes in hot regions and cold stripes in cold regions; The data stored in the thermal strip is updated more frequently than that of other categories of strips in the different categories; The data stored in the cold strip is updated less frequently than that of other categories of strips in the different categories; The two strips that need to be interchanged include: the hot strip that needs to be interchanged and the cold strip that needs to be interchanged.

3. The method according to claim 2, wherein the step of swapping the data stored in the two stripes respectively includes: Based on the first position of the access unit for storing data in the hot strip to be swapped, the data stored in the hot strip to be swapped is written into the access unit at the first position in the cold strip to be swapped; Based on the second position of the access unit for the data stored in the cold strip to be swapped, the data stored in the cold strip to be swapped is written into the access unit at the second position of the hot strip to be swapped.

4. The method according to any one of claims 1 to 3, wherein the different types of strips include the following three types of strips: hot strips, warm strips, and cold strips; in, The update frequencies of the data stored in the hot strip, warm strip, and cold strip decrease sequentially.

5. The method according to claim 4, wherein the plurality of strips further includes blank strips in reserved areas; the method further includes: If a temperature band to be improved is determined based on the statistical records, a band to be written is obtained from the blank bands in the reserved area; wherein the number of times the temperature band to be improved is written is greater than or equal to a preset threshold. After writing the data stored in the temperature strip to be improved to the strip to be written, the strip to be written is divided into temperature strips, the data stored in the temperature strip to be improved is cleared, and the temperature strip to be improved is divided into blank strips in the reserved area.

6. The method according to claim 5, wherein writing the data stored in the temperature strip to be improved to the strip to be written comprises: Based on the third position of the access unit for the data stored in the temperature strip to be improved, the data stored in the temperature strip to be improved is written into the access unit at the third position in the strip to be written.

7. The method according to claim 1, wherein the memory further stores a stripe mapping table of the plurality of stripes, the number of entries in the stripe mapping table being the number of stripes of the plurality of stripes, the sequence number of the entry in the stripe mapping table representing the logical sequence number of the stripe, and the entry in the stripe mapping table recording the physical address of the stripe represented by the entry; the logical addresses of the plurality of stripes are consecutive and arranged in ascending order, the high n bits of the logical address representing the logical sequence number of the stripe, and the low m bits representing the access unit in the stripe, wherein n and m are positive integers; The method further includes: In response to receiving an access request for a target logical address, a target logical number is determined from the high n bits of the target logical address, and the corresponding stripe to be accessed is retrieved from the stripe mapping table based on the target logical number. The access unit of the stripe to be accessed is determined from the low m bits of the target logical address.

8. The method according to claim 7, wherein the different categories of strips include hot strips in the hot region, and the update frequency of the data stored in the hot strips is higher than that of other categories of strips in the different categories; The memory also stores an access unit mapping table for the hot strip. The serial number of the entry in the access unit mapping table represents the logical serial number of the access unit in the hot strip. The entry in the access unit mapping table records the physical address and a tag of the access unit represented by the entry. The tag indicates whether the data stored in the access unit is valid. The method further includes: If a write request for hot data to be written is obtained, a new write access unit with a blank hot stripe in the hot region is obtained, and the hot data to be written is written to the new write access unit; In the access unit mapping table, the target entry corresponding to the logical number and the logical address carried by the write request is determined, and the physical address of the new write access unit and a mark representing the storage of valid data are recorded in the target entry.

9. The method according to claim 8, further comprising: In response to receiving a deletion request to delete data stored in the access unit to be deleted in the first hot strip, the marker recorded in the entry corresponding to the access unit to be deleted is updated to a marker representing invalid data; wherein, the first hot strip is any hot strip in the hot region.

10. The method according to claim 9, wherein the plurality of strips further includes blank strips in reserved areas; the method further includes: Based on the access units that store invalid data recorded in the access unit mapping table, a hot strip to be recycled is selected from the hot zone, and the number of access units storing invalid data in the hot strip to be recycled meets the preset recycling conditions. If the recycled hot strip does not store valid data, the data stored in the recycled hot strip is cleared, and the recycled hot strip is divided into blank strips in the reserved area. If the recycled hot strip contains valid data, then the write strip is obtained from the blank strip in the reserved area, and the valid data in the recycled hot strip is written into the write strip.

11. The method of claim 10, further comprising, after the step of writing valid data from the recycled hot strip to the written strip: Based on the statistical records, it is determined whether there are other types of strips that can be interchanged with the recycled hot strip. If so, the recycled hot strip and the strip to be interchanged are taken as the two strips, and the step of exchanging the data stored in the two strips is performed. If not, the recycled hot strip is divided into blank strips in the reserved area.

12. The method according to any one of claims 1 to 3, wherein the memory further comprises a dynamic random access memory medium, the memory medium comprising a persistent memory medium; the method further comprises: In response to obtaining the data to be written to the persistent memory medium, the data to be written is cached in the dynamic random access memory medium; According to a preset period, the data cached in the dynamic random access memory medium is written to the persistent memory medium.

13. A memory comprising a host interface, a persistent memory controller, a media interface, and a persistent memory medium, wherein the media interface is connected to the persistent memory medium, and the host interface and the media interface are respectively connected to the persistent memory controller; the host interface is configured to connect to a processor of a computer device; and the persistent memory controller is configured to perform the steps of the method according to any one of claims 1 to 12.

14. A computer device comprising a processor and the memory as claimed in claim 13.

15. A computer program product comprising a computer program that, when executed by a processor, implements the steps of the method according to any one of claims 1 to 12.

16. A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method according to any one of claims 1 to 12.

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