Data storage and dump method with power fail safe

Abstract

The application provides a data storage and dumping method with power-off keeping, which comprises the following steps: step one, continuously monitoring the power supply state and performing data pre-dumping when the system is normally working; classifying the data to be protected in the volatile memory according to the update frequency; the low-frequency updated static configuration and parameter data are the first-class data, and the high-frequency updated dynamic operation and collected data are the second-class data; step two, when the power supply is normal, the first-class data is written into the first storage area of the non-volatile memory immediately after being updated, and the latest version identification is recorded in the index area; the second-class data is written into the second storage area in batches or as a whole in a timing or quantitative manner, the pre-stored progress information containing the address range and the time stamp in the index area is synchronously updated, and the stored and non-stored data are distinguished; step three, triggering the dumping interruption immediately when the power-off is detected, collecting the residual power of the energy storage element, calculating the effective power supply duration in combination with the power consumption of the system during the power-off, and determining the maximum data amount that can be written according to the dumping rate.

Description

Technical Field

[0001] This invention belongs to the field of data storage, and specifically relates to a data storage and transfer method with power-off retention capability. Background Technology

[0002] Currently, in the operation of electronic devices such as industrial control, intelligent monitoring, and embedded terminals, volatile memory is commonly used for real-time data caching and operational data interaction, while non-volatile memory is relied upon for persistent data storage. Volatile memory offers advantages such as fast read / write speeds and strong real-time performance, meeting the operational needs of high-frequency data acquisition, status updates, and parameter interaction. However, it suffers from the drawback of immediate data loss upon power failure. Therefore, reliable power-off data retention and dumping technology is crucial for ensuring the integrity of equipment operational data, traceability of system status, and smooth restart of equipment.

[0003] Most existing power-loss data storage solutions employ a uniform and fixed data dumping strategy, failing to provide differentiated storage processing for data with varying update frequencies and importance levels. Traditional solutions either use a timed overall storage mode, which easily leads to frequent repeated writing of static parameter data, wasting storage hardware resources and shortening hardware lifespan; or they only perform a centralized dumping of all data at the moment of power failure, failing to distinguish between dynamic operating data and static configuration data, and lacking a data priority filtering mechanism. When the remaining power of energy storage components is limited and the power supply duration is insufficient, problems such as failure to dump core critical data and the occupation of storage resources by ordinary redundant data are highly likely to occur, resulting in the loss of important operating data, fault data, and metering data.

[0004] Meanwhile, existing technologies often rely on fixed parameters to estimate the amount of data to be transferred during power outage data dumping. This makes it difficult to accurately calculate the effective dumping capacity based on the real-time remaining power of the energy storage components and the dynamic power consumption of the system. This can easily lead to data dumping estimation errors, resulting in wasted energy resources or overflow of dumped data. Furthermore, conventional solutions lack comprehensive dumping progress recording, fault tolerance for abnormal termination, and power-on data verification and recovery mechanisms. After an abnormal termination of power outage data dumping, it is impossible to accurately trace the dumped and un-dumped data. Log data is prone to missing or corrupted issues, and invalid data residue and disordered data recovery may occur after device restart, seriously affecting the stability of system operation and the integrity and reliability of data.

[0005] In summary, existing power-loss data storage and transfer technologies suffer from numerous technical shortcomings, such as poor data classification and storage adaptability, insufficient core data protection capabilities, low power utilization, weak fault tolerance, and poor data recovery accuracy. These shortcomings make it difficult to meet the power-loss data preservation requirements of high-precision, high-reliability industrial equipment and smart terminals. Therefore, there is an urgent need for a power-loss data storage and transfer method that can perform hierarchical classification and pre-storage, dynamically adapt to power-loss transfer, and has fault-tolerant verification capabilities. Summary of the Invention

[0006] This invention proposes a data storage and transfer method with power loss retention, which solves the problems of existing power loss data storage solutions that mostly adopt a uniform transfer strategy, cannot differentiate between static and dynamic data, are prone to losing core data when power storage power supply is limited, cannot dynamically adapt to the transfer of remaining power, lack accurate progress recording and reliable data recovery mechanism, and have poor data storage integrity and reliability.

[0007] The technical solution of the present invention is implemented as follows: a data storage and transfer method with power-off retention, the method comprising the following steps: Step 1: When the system is working normally, continuously monitor the power status and perform data pre-dumping; classify the data to be protected in volatile memory according to the update frequency: low-frequency updated static configuration and parameter data are classified as the first type of data, and high-frequency updated dynamic operation and acquisition data are classified as the second type of data.

[0008] Step 2: When the power supply is normal, the first type of data is written to the first storage area of ​​the non-volatile memory immediately after being updated, and the latest version identifier is recorded in the index area; the second type of data is written to the second storage area in batches or in whole at regular intervals or in quantitative quantities, and the pre-stored progress information containing the address range and timestamp in the index area is updated synchronously to distinguish between stored and unstored data.

[0009] Step 3: When a power failure is detected, a dump interrupt is immediately triggered to collect the remaining power of the energy storage element. The effective power supply duration is calculated in combination with the power consumption of the system during the power failure, and the maximum amount of data that can be written is determined based on the dump rate.

[0010] Step 4: Based on the pre-storage progress of the index area, extract the second type of data that has not been pre-storaged, filter it in descending order of importance, and select data whose total amount does not exceed the maximum writable data volume to form an emergency dump dataset.

[0011] Step 5: Write the urgent data to the third storage area of ​​the non-volatile memory one by one according to the importance priority. After each write is completed, update the corresponding data in the index area to the "dumped" status.

[0012] Step 6: Continue writing until all emergency data has been dumped, or the energy storage voltage is lower than the safety threshold. Then, terminate the operation and record the reason for the termination of this dump, as well as the list of dumped and undumped data, in the log area.

[0013] Step 7: After the system powers on and restarts, read the data in the index area and log area, identify the pre-stored data and the valid data dumped after power failure, restore it to the volatile memory according to the original address, clear the status flag, and complete the data recovery.

[0014] This solution employs a tiered storage protection mechanism: "normal-level pre-storage + dynamic, optimized emergency storage during power outages + precise backtracking and recovery upon power-on," addressing data loss during power outages throughout the entire operational lifecycle. During normal system operation, the traditional unified storage model is abandoned. Based on data update frequency, the data to be protected is divided into static parameter data and dynamically acquired data, implementing differentiated pre-storage strategies. For low-frequency updated static data, updates are immediately fixed and written to a dedicated storage area with version traceability, avoiding repeated read / write losses. For high-frequency dynamic data, normalized pre-storage is completed through a dual-mode approach of timed and quantitative storage. The index area records address and timestamp progress information to accurately define the boundaries of stored and unstored data, providing a data baseline for power outage emergency handling.

[0015] The system monitors power status in real time. Upon detecting a power outage, it immediately activates a hardware interruption protection mechanism. By collecting the remaining energy of the energy storage components and combining this with the actual power consumption during the outage and the write rate, it dynamically calculates the maximum amount of data that can be dumped under the current operating conditions, eliminating the bias caused by fixed parameter estimations. Based on this, for dynamic data that has not yet been pre-stored, it selects emergency datasets with appropriate capacity according to business importance priority. High-priority data is written to a dedicated emergency storage area first, and the storage status is updated in real time. If power is exhausted and the dump is terminated prematurely, the dump log is automatically archived, ensuring a complete record of the data flow.

[0016] After the device is powered on again, it relies on two-way traceability of index and log records to accurately match valid pre-stored data and emergency dump data due to power failure, and restores the data according to the original address to achieve error-free recovery of power failure data.

[0017] As a preferred implementation, the threshold for setting the data update frequency supports custom configuration by the system. This threshold is comprehensively calibrated based on the device operating conditions, data acquisition frequency, and storage hardware read / write performance. The first type of static configuration data includes long-term fixed data such as system parameters, device calibration parameters, and communication configuration parameters. The second type of dynamic data includes high-frequency changing data such as real-time sensor data, device operating status data, and real-time interactive log data.

[0018] As a preferred implementation, the pre-dumping strategy for the second type of data supports dual-mode adaptive switching. The timed dumping mode uses a configurable fixed period to perform data writing, while the quantitative dumping mode counts the cached data capacity in real time and triggers batch writing immediately when the accumulated data volume reaches a preset threshold. At the same time, the pre-stored progress information in the index area is updated in real time, retaining only the latest address range and timestamp data.

[0019] As a preferred implementation, the effective power supply duration and maximum writable data volume are calculated using a dynamic calibration method. The system pre-stores the discharge loss parameters of the energy storage element and the hardware dump power consumption parameters corresponding to different voltage ranges. After the power outage is triggered, the system matches the corresponding loss coefficient with the real-time remaining power parameters to accurately calculate the effective power supply duration, and then dynamically calculates the maximum writable data volume with the real-time read and write rate.

[0020] As a preferred implementation, the importance priority of the second type of data that is not pre-stored adopts a hierarchical grading mechanism. The system pre-divides multiple priority levels according to the data business attributes, with core control data, fault alarm data, and key metering data being assigned high priority, and ordinary monitoring data and redundant log data being assigned low priority.

[0021] As a preferred implementation, the power-down dump termination logic has a fault-tolerant recording function. When the energy storage voltage drops to a safe threshold and the writing is forcibly terminated, the system automatically freezes the current dump process, accurately counts the data entries that have been written and those that have not been written, their corresponding storage addresses and time information, and simultaneously marks the fault cause of the abnormal voltage termination and saves it to the log area. The log data is encrypted and stored to avoid the loss of log data at the moment of power failure.

[0022] As a preferred implementation, the system power-on data recovery has a verification and error correction mechanism. After restarting and reading the data in the index area and log area, the system first performs integrity verification on the pre-stored data and emergency dump data, and removes damaged, incomplete and invalid data. After the verification is passed, the data is accurately restored to the volatile memory according to the original storage mapping address. After the recovery is completed, all temporary status identifiers and the cache of this dump log are cleared.

[0023] After adopting the above technical solution, the beneficial effects of this invention are as follows: Compared with the traditional unified power-down storage solution, this solution achieves substantial improvements in data storage efficiency, hardware lifespan, power-down data reliability, and system fault tolerance. By hierarchical and differentiated storage of static and dynamic data, static data updates are fixed, and dynamic data is pre-stored in batches, the defects of repeated redundant writing of static data and untimely data storage of dynamic data in traditional solutions are completely avoided. This effectively reduces the number of invalid read / write operations of non-volatile memory, significantly extends the lifespan of storage hardware, and saves system computing resources.

[0024] During power outages, the system dynamically calculates storage capacity based on real-time power and power consumption, and employs a data priority-based storage mechanism. This prioritizes the complete retention of core operational and critical data, even with limited energy storage resources, addressing the core issues of traditional solutions that involve blind storage during power outages and the risk of losing important data. Furthermore, the system includes independent index and log areas to record data storage progress, storage status, and anomaly information throughout the process. This ensures traceability of the storage process and pinpoints the causes of anomalies, overcoming the shortcomings of traditional solutions such as ambiguous storage status, lack of anomaly records, and inability to trace the root cause of problems.

[0025] After power-on, relying on the dual-zone data verification and recovery mechanism, it accurately restores valid data and clears invalid status markers, avoiding the problems of invalid data residue and data recovery disorder. It significantly improves data consistency and operational stability after system restart, and can adapt to high-reliability data storage application scenarios such as industrial control and intelligent acquisition, making it more practical and adaptable. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a flowchart of the method of the present invention. Detailed Implementation

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] Example 1, such as Figure 1 As shown, a data storage and transfer method with power-loss retention capability is disclosed, the method comprising the following steps: Step 1: When the system is working normally, continuously monitor the power status and perform data pre-dumping; classify the data to be protected in volatile memory according to the update frequency: low-frequency updated static configuration and parameter data are classified as the first type of data, and high-frequency updated dynamic operation and acquisition data are classified as the second type of data.

[0030] Step 2: When the power supply is normal, the first type of data is written to the first storage area of ​​the non-volatile memory immediately after being updated, and the latest version identifier is recorded in the index area; the second type of data is written to the second storage area in batches or in whole at regular intervals or in quantitative quantities, and the pre-stored progress information containing the address range and timestamp in the index area is updated synchronously to distinguish between stored and unstored data.

[0031] Step 3: When a power failure is detected, a dump interrupt is immediately triggered to collect the remaining power of the energy storage element. The effective power supply duration is calculated in combination with the power consumption of the system during the power failure, and the maximum amount of data that can be written is determined based on the dump rate.

[0032] Step 4: Based on the pre-storage progress of the index area, extract the second type of data that has not been pre-storaged, filter it in descending order of importance, and select data whose total amount does not exceed the maximum writable data volume to form an emergency dump dataset.

[0033] Step 5: Write the urgent data to the third storage area of ​​the non-volatile memory one by one according to the importance priority. After each write is completed, update the corresponding data in the index area to the "dumped" status.

[0034] Step 6: Continue writing until all emergency data has been dumped, or the energy storage voltage is lower than the safety threshold. Then, terminate the operation and record the reason for the termination of this dump, as well as the list of dumped and undumped data, in the log area.

[0035] Step 7: After the system powers on and restarts, read the data in the index area and log area, identify the pre-stored data and the valid data dumped after power failure, restore it to the volatile memory according to the original address, clear the status flag, and complete the data recovery.

[0036] This embodiment is an industrial embedded data acquisition controller. The hardware includes DDR-SDRAM as volatile memory, SPI-NORFlash as non-volatile memory, a supercapacitor module as energy storage, a power monitoring chip, and a main control MCU. The DDR-SDRAM is used to cache all configuration parameters to be protected, real-time running data, and acquired data during system operation. The SPI-NORFlash is internally divided into five logical partitions: a first storage area, a second storage area, a third storage area, an index area, and a log area. These partitions are used to store static configuration data, normally stored dynamic data, emergency dump data after power failure, version and progress index information, and dump process log records, respectively. The supercapacitor module serves as a backup power supply after power failure. The power monitoring chip collects the external power supply voltage and the supercapacitor module output voltage in real time. The main control MCU is the core of the entire system's computation and control. The power monitoring chip's signal pins are electrically connected to the external interrupt pins of the main control MCU. The supercapacitor module's power supply output is connected to the power supply circuits of the main control MCU, SPI-NORFlash, and DDR-SDRAM, respectively. The external normal power supply circuit prioritizes powering the entire system while simultaneously charging the supercapacitor module.

[0037] Upon power-up and normal operation, the main control MCU continuously monitors the power status by cyclically collecting external power signals through the power monitoring chip. Simultaneously, it performs pre-dumping processing on the data to be protected within the DDR-SDRAM. The main control MCU divides the data to be protected within the DDR-SDRAM into two categories: static configuration and parameter data (Category 1) and dynamic operation and acquisition data (Category 2), based on a pre-set update frequency threshold. When the content of Category 1 data changes, the main control MCU immediately initiates an SPI bus write command to write the updated complete Category 1 data to the first storage area of ​​the SPI-NORFlash. It then writes the latest version identifier corresponding to this data to the index area. For Category 2 data in the DDR-SDRAM, the main control MCU performs timed timing or real-time statistics on the cached data volume. When the timing period condition is met or the accumulated data volume reaches a preset trigger value, the main control MCU writes the entire or batches of Category 2 data to the second storage area via the SPI interface. After writing, it immediately updates the pre-stored progress information within the index area. This pre-stored progress information records the address range and corresponding timestamp of the written data, thus distinguishing between Category 2 data that has been pre-stored and that has not yet been pre-stored within the DDR-SDRAM.

[0038] Once the power monitoring chip detects an external power failure, it immediately outputs a level transition signal to the external interrupt pin of the main control MCU, triggering the power failure dump interrupt service routine. Upon entering the interrupt service routine, the main control MCU reads the current remaining power parameters of the supercapacitor module collected by the power monitoring chip, retrieves the power consumption parameters of each hardware unit under power failure conditions stored internally, calculates the effective power supply duration that the supercapacitor module can maintain, and then, combined with the actual dump rate of the SPI-NORFlash, calculates the maximum amount of data that can be written under this condition. The main control MCU reads the pre-stored progress information stored in the index area, locates the second type of data in the DDR-SDRAM that has not yet been pre-stored, filters it according to the pre-configured data importance level from high to low, selects data whose total data volume does not exceed the aforementioned maximum data volume, and generates an emergency dump dataset.

[0039] The main control MCU writes each data item in the emergency dump dataset sequentially to the third storage area of ​​the SPI-NORFlash via the SPI bus, according to their importance priority. After each data item is written, the main control MCU immediately changes the status flag of that data item in the index area to "dumped". During the writing process, the main control MCU continuously reads the output voltage of the supercapacitor module. If all data in the emergency dump dataset has been written, or if the supercapacitor output voltage drops to a preset safety threshold, the main control MCU immediately stops writing to the third storage area and writes the reason for the dump termination, the actual dumped data list, and the undumped data list to the log area. The interrupt service routine ends, and the device uses the residual power of the supercapacitor to complete the subsequent hardware shutdown.

[0040] When external power is restored and the device restarts, after the main control MCU completes hardware initialization, it first reads the contents of the index and log areas stored in the SPI-NORFlash. Based on the index area status flags and log records, it identifies the data already pre-stored in the second storage area and the data successfully dumped to the third storage area during the power outage. The main control MCU then writes the identified valid data back to the DDR-SDRAM according to the original storage address. After the recovery operation is complete, it clears the temporary status flags corresponding to the index area, ending the data recovery process, and the device enters normal business operation. Those skilled in the art can reproduce the complete implementation of this method by following the above hardware connection relationships and steps.

[0041] Example 2 illustrates an embedded data acquisition terminal for industrial applications. The hardware system includes a main control MCU, DDR volatile memory, SPI-NOR non-volatile memory, a power monitoring chip, and a supercapacitor energy storage module. All components are electrically connected to the main control MCU via a standard bus. The power monitoring chip samples the system power supply voltage and the energy storage module voltage in real time, providing the hardware sampling basis for this method. The core improvement in this example is a customizable data update frequency threshold calibration algorithm, enabling accurate classification of both static and dynamic data and solving the technical problems of poor adaptability and inaccurate classification due to fixed classification thresholds.

[0042] This embodiment employs a multi-parameter coupled threshold calibration algorithm. The core principle of the algorithm is as follows: using device acquisition frequency, hardware read / write lifespan threshold, and system operating condition weights as core variables, a dynamically updated frequency threshold is calculated through weighted fitting. The system pre-stores calibration weight parameters: high-frequency acquisition condition weight 0.6, hardware read / write performance weight 0.3, and normal operating condition correction weight 0.1. The final classification threshold is calculated using the formula T = 0.6 × T1 + 0.3 × T2 + 0.1 × T3, where T1 is the maximum acquisition cycle of the device sensor, T2 is the optimal read / write interval of the non-volatile memory, and T3 is the system default operating condition threshold, in units of times / minute. During system operation, the MCU continuously counts the number of updates per unit time for various data types and compares this count with the calculated custom threshold to complete data classification.

[0043] The specific implementation process is as follows: After the system is powered on and initialized, it first reads the locally stored device operating parameters, sensor acquisition configuration, and storage hardware parameters. Then, it automatically generates data classification thresholds specific to the current operating condition using the aforementioned fitting algorithm, eliminating the need for manual parameter fixing. The MCU classifies all data to be protected in the DDR memory into attributes. Data that remains unchanged for a long time and is only updated during the debugging phase, such as system calibration parameters, communication baud rate configuration, device address parameters, and system start / stop thresholds, is fixedly classified as the first category of static parameter data. High-frequency changing data, such as real-time temperature and humidity data from sensors, pressure acquisition data, device start / stop operation status, real-time communication logs, and temporary fault marker data, is fixedly classified as the second category of dynamic data.

[0044] When the system is operating under normal power supply, the MCU continuously monitors the update frequency of various data types and dynamically verifies the classification results. If changes in operating conditions cause significant fluctuations in the data update frequency, the system automatically recalculates the threshold and updates the classification rules. Once the first type of static data is modified, calibrated, or updated, the MCU immediately triggers a write operation to the first storage area of ​​the non-volatile memory, simultaneously iterating the version number in the index area to ensure that the static parameter version is unique and up-to-date. The second type of dynamic data enters the normalized pre-dump queue, awaiting subsequent timed / quantitative storage processing. This embodiment, through adaptive threshold calibration, adapts to different device operating conditions and hardware performance, completely solving the problem of poor universality of fixed classification thresholds and storage resource waste caused by classification failures. Those skilled in the art can fully reproduce this classification mechanism by configuring the corresponding weight parameters and data attribute list.

[0045] This embodiment is based on the hardware architecture of Embodiment 1, retaining the original main control, storage, power supply and energy storage hardware structure. It integrates a dual-mode adaptive pre-dumping algorithm and a power failure energy dynamic calibration computing power algorithm, providing accurate algorithm support for dynamic data normal pre-storage and power failure extreme dumping. It is the core working condition optimization embodiment of the present invention, which can realize full-process adaptive, high-precision, and deviation-free data dumping control.

[0046] The dual-mode pre-dump algorithm in this embodiment works as follows: A timed and quantitative dual-trigger mechanism is set up, employing mutually exclusive adaptive switching logic. The system monitors two types of trigger conditions in real time, triggering the write operation once either condition is met. Simultaneously, a latest progress overwrite mechanism is used to streamline index data. The timed mode uses a configurable clock interrupt timing, supporting any period configuration from 100ms to 10s. The quantitative mode dynamically accumulates the number of bytes of data in the DDR cache in real time, with a preset single-batch storage threshold range of 4KB to 64KB. The index area uses an incremental overwrite algorithm, retaining only the start and end addresses and high-precision timestamps of the latest pre-stored data, automatically discarding historical expired progress data to avoid redundant data accumulation in the index area.

[0047] In the normal workflow, the MCU runs timing and data volume statistics tasks simultaneously. For the second type of dynamic data, if the preset timing period is reached or the cached data volume reaches the standard, the second storage area is immediately started for batch writing. After the writing is completed, the index pre-stored progress is immediately overwritten and updated, accurately marking the boundaries of the currently pre-stored and unpre-stored data, providing an accurate data benchmark for power failure dumping.

[0048] The principle of the dynamic power consumption calibration algorithm in this embodiment is based on segmented fitting power consumption calculation. The system pre-calibrates the discharge loss coefficient of the supercapacitor in different voltage ranges, the read / write power consumption of the memory chip, and the MCU operating power consumption comparison table. After a power failure interruption is triggered, the MCU collects the instantaneous voltage U of the supercapacitor in real time, matches the loss coefficient K of the corresponding voltage range, and calculates the effective power supply duration using the formula T=E / (P×K), where E is the real-time remaining power and P is the system's instantaneous total power consumption. Then, combined with the real-time measured read / write rate V of the memory, the maximum amount of data S that can be written under the current operating conditions is dynamically calculated using the formula S=T×V, completely abandoning the traditional fixed parameter estimation method.

[0049] The specific power failure execution process is as follows: Upon detecting a power failure, the power chip immediately triggers an MCU advanced interrupt. The system suspends normal business tasks and prioritizes the execution of the power calculation program to accurately determine the maximum transferable data capacity. Combined with the list of data not pre-stored in the index area and a data priority grading mechanism, high-priority data such as fault alarms, critical metering, and core control data are prioritized to form an emergency dataset. The total data volume is strictly controlled to not exceed the calculation limit. Data is then written to the third storage area sequentially, and the index status is updated. This embodiment adapts to different data throughput conditions through dual-mode pre-storage, and dynamic power calibration ensures accurate and controllable power failure dump capacity and maximizes power utilization. Those skilled in the art can fully reproduce this process by configuring the corresponding voltage range parameters and read / write cycle parameters.

[0050] Example 3, based on the aforementioned hardware and algorithms, fully integrates a data priority hierarchical classification mechanism, a power failure fault tolerance log solidification mechanism, and a power-on integrity verification error correction and recovery mechanism, constructing a fully closed-loop high-reliability data protection system of "pre-storage-power failure dump-abnormal record-precise recovery", providing a safety net for data security under extreme operating conditions of the equipment, and is the optimal high-reliability embodiment of the present invention.

[0051] The data priority hierarchical algorithm in this embodiment works as follows: It employs a three-tiered hierarchical classification rule, statically fixing the tiers based on business importance, eliminating dynamic jump conflicts and ensuring absolute stability of the power-down screening logic. Level 1 (High Priority): Core equipment control parameters, real-time fault alarm data, and key metering and settlement data are the data that must be prioritized for data dumping. Level 2 (Medium Priority): Equipment operating status and operating parameter data. Level 3 (Low Priority): Ordinary environmental monitoring data and redundant interactive log data. During power-down screening, data is strictly selected in the order of Level 1, Level 2, and Level 3 until the maximum dumpable data volume is filled, prioritizing the prevention of loss of core business data.

[0052] Power-loss fault tolerance and data solidification principle: The system sets a critical voltage protection threshold. When the supercapacitor voltage drops to the critical value, a hardware-level write freeze command is immediately triggered, stopping all new data writing. The MCU instantly records the current dump process in snapshot form, accurately capturing the data IDs, storage addresses, and write times of completed data, as well as a list of unwritten data, and simultaneously marking the fault type as "insufficient voltage forced termination". The log area adopts an encrypted and solidified storage mechanism, locking the log storage sectors through hardware write protection registers to prevent log packet loss and corruption caused by voltage fluctuations during power outages, ensuring that abnormal records are permanently retained and traceable.

[0053] The power-on verification and recovery algorithm works by employing a three-tiered recovery logic: verification first, recovery then zeroing out. After the device restarts and initializes, it first reads the status identifier in the index area and the complete record in the log area. It then performs CRC integrity verification on all pre-stored data and emergency power-off dump data, comparing the data checksums and automatically removing incomplete, misaligned, or damaged invalid data. For valid data that passes verification, it precisely writes back to the DDR volatile memory according to the original physical mapping address before the power outage, ensuring complete restoration of data address, content, and status. After recovery, it batch-clears the temporary dump status identifier in the index area and the current dump log cache to prevent historical data residue from interfering with the device's current operation.

[0054] This embodiment achieves priority preservation of core data under extreme power failure conditions, full traceability of abnormal states, and accurate and error-free recovery of power-on data. It completely solves the defects of traditional solutions such as data loss, disordered recovery, and no fault record. The overall logic is complete and the parameter configuration is simple. Those skilled in the art can completely reproduce the entire high-reliability data power failure protection scheme based on the above-mentioned hierarchical rules, verification logic, and log solidification process.

[0055] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A data storage and transfer method with power-loss retention capability, characterized in that, The method includes the following steps: Step 1: When the system is working normally, continuously monitor the power status and perform data pre-dumping; classify the data to be protected in volatile memory according to the update frequency: low-frequency updated static configuration and parameter data are classified as the first type of data, and high-frequency updated dynamic operation and acquisition data are classified as the second type of data; Step 2: When the power supply is normal, the first type of data is written to the first storage area of ​​the non-volatile memory immediately after being updated, and the latest version identifier is recorded in the index area; the second type of data is written to the second storage area in batches or in whole at regular intervals or in quantitative quantities, and the pre-stored progress information containing address range and timestamp in the index area is updated synchronously to distinguish between stored and unstored data. Step 3: When a power failure is detected, a dump interrupt is immediately triggered to collect the remaining power of the energy storage element, calculate the effective power supply duration in combination with the power consumption of the system during the power failure, and then determine the maximum amount of data that can be written based on the dump rate. Step 4: Based on the pre-storage progress of the index area, extract the second type of data that has not been pre-storaged, filter it in descending order of importance, and select data whose total amount does not exceed the maximum writable data volume to form an emergency dump dataset; Step 5: Write the urgent data into the third storage area of ​​the non-volatile memory one by one according to the importance priority. After each write is completed, update the corresponding data in the index area to the "dumped" status. Step 6: Continue writing until all emergency data has been dumped, or the energy storage voltage is lower than the safety threshold. Then, terminate the operation and record the reason for the termination of this dump, the list of dumped and undumped data in the log area. Step 7: After the system powers on and restarts, read the data in the index area and log area, identify the pre-stored data and the valid data dumped after power failure, restore it to the volatile memory according to the original address, clear the status flag, and complete the data recovery.

2. The data storage and transfer method with power-loss retention as described in claim 1, characterized in that: The threshold for setting the data update frequency supports custom configuration by the system. This threshold is determined based on the device's operating conditions, data acquisition frequency, and the read / write performance of the storage hardware. The first type of static configuration data includes long-term fixed data such as system parameters, device calibration parameters, and communication configuration parameters. The second type of dynamic data includes high-frequency changing data such as real-time sensor data, device operating status data, and real-time interactive log data.

3. The data storage and transfer method with power-off retention as described in claim 1, characterized in that: The pre-dumping strategy for the second type of data supports dual-mode adaptive switching. The timed dumping mode uses a configurable fixed period to perform data writing, while the quantitative dumping mode counts the cached data capacity in real time. When the accumulated data volume reaches a preset threshold, batch writing is triggered immediately. At the same time, the pre-stored progress information in the index area is updated in real time, retaining only the latest address range and timestamp data.

4. The data storage and transfer method with power-loss retention as described in claim 1, characterized in that: The effective power supply duration and maximum writable data volume are calculated using a dynamic calibration method. The system pre-stores the discharge loss parameters of the energy storage element and the hardware dump power consumption parameters corresponding to different voltage ranges. After a power outage is triggered, the system matches the corresponding loss coefficient with the real-time remaining power parameters to accurately calculate the effective power supply duration. Then, it dynamically calculates the maximum writable data volume in combination with the real-time read and write rates.

5. The data storage and transfer method with power-loss retention as described in claim 1, characterized in that: The importance priority of the second type of data that is not pre-stored adopts a hierarchical grading mechanism. The system pre-divides multiple priority levels according to the data business attributes. Core control data, fault alarm data, and key metering data are assigned high priority, while ordinary monitoring data and redundant log data are assigned low priority.

6. The data storage and transfer method with power-loss retention as described in claim 1, characterized in that: The power failure dump termination logic has a fault-tolerant recording function. When the energy storage voltage drops to a safe threshold and the writing is forcibly terminated, the system automatically freezes the current dump process, accurately counts the data entries that have been written and those that have not been written, their corresponding storage addresses and time information, and simultaneously marks the fault cause of the abnormal voltage termination and saves it to the log area. The log data is encrypted and stored to avoid the loss of log data at the moment of power failure.

7. The data storage and transfer method with power-loss retention as described in claim 1, characterized in that: The system has a verification and error correction mechanism for power-on data recovery. After restarting and reading data from the index area and log area, it first performs integrity verification on the pre-stored data and emergency dump data, and removes damaged, incomplete and invalid data. After the verification is passed, it accurately restores the data to the volatile memory according to the original storage mapping address. After the recovery is completed, all temporary status identifiers and the cache of this dump log are cleared.

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