A consumable chip communication method, consumable chip and imaging system

Abstract

Embodiments of the present application provide a consumable chip communication method, a consumable chip and an imaging system. The method comprises: receiving an instruction task of an imaging device and storing the instruction task in a task list; the instruction task at least comprises a first type of task and a second type of task; dividing a processing time of the consumable chip into a plurality of continuous time slices; judging whether a target instruction task meets a running precondition; if yes, executing the target instruction task in a current time slice; if not, suspending the target instruction task and executing other ready tasks in the current time slice; when the current time slice is exhausted, interrupting a currently executed task, saving a context environment, and re-scheduling tasks in a subsequent time slice. The present scheme can realize dynamic allocation of consumable chip computing power resources and concurrent scheduling of tasks, thereby significantly shortening the waiting time of printer startup and authentication process and improving system response efficiency.

Description

Technical Field

[0001] This application relates to the field of communication technology for printed consumable chips, and in particular to a consumable chip communication method, a consumable chip, and an imaging system. Background Technology

[0002] In existing printer consumable chip communication technologies, the host (such as the printer) and slave (such as the consumable chip) typically employ a one-way or two-way verification mechanism to ensure communication security and the legitimacy of the consumables. The communication process generally includes authentication, data exchange, and encryption algorithm verification. To enhance security, after establishing communication, the printer and consumable chip perform a series of command interactions and encryption calculations to generate the security authentication data required for subsequent communication (such as dynamic keys, hash tables, and intermediate algorithm results).

[0003] However, with increasing security requirements, encryption algorithms are becoming more complex, and the amount of computational data is significantly increasing. In the traditional serial execution mode, the consumable chip must complete all algorithm tasks sequentially before responding to host commands, resulting in significantly longer waiting times when the printer is turned on, consumables are replaced, or complex tasks are performed, severely impacting the user experience. Summary of the Invention

[0004] This application provides a consumable chip communication method, a consumable chip, and an imaging system, which solves the problems of excessively long calculation instruction time, rigid task scheduling, and poor real-time performance in related technologies. It realizes a technical solution that can optimize the task scheduling mechanism of consumable chips and improve communication efficiency and response speed without significantly increasing hardware costs.

[0005] In a first aspect, embodiments of this application provide a consumable chip communication method, applied to a consumable chip, wherein the consumable chip communicates with an imaging device through a communication interface, the method comprising:

[0006] The system receives instructions from the imaging device and stores these instructions in a task list. The instructions include at least a first type of task and a second type of task. The second type of task has a higher priority than the first type of task.

[0007] The processing time of the consumable chip is divided into multiple consecutive time slices;

[0008] Determine whether the target instruction task meets the preconditions for execution;

[0009] If the aforementioned preconditions are met, the target instruction task will be executed in the current time slice.

[0010] If the aforementioned preconditions for execution are not met, the target instruction task is suspended, and other ready tasks are executed within the current time slice.

[0011] When the current time slice expires, the currently executing task is interrupted, the context is saved, and the task is rescheduled in a subsequent time slice.

[0012] The classification characteristics of the instruction tasks are as follows: the first type of task is a computationally intensive instruction that generates security authentication data; the second type of task is a real-time authentication instruction or status response instruction that responds to queries from the imaging device.

[0013] The determination of whether the target instruction task meets the preconditions for execution includes:

[0014] When the selected target instruction task is the second type of task, check whether the execution of the second type of task depends on the intermediate calculation results generated by the first type of task;

[0015] If the intermediate calculation results on which the operation depends have not yet been generated, it is determined that the preconditions for running are not met.

[0016] If the intermediate calculation results that the task depends on have been generated, or if the second type of task does not depend on other tasks, then it is determined that the preconditions for running are met.

[0017] The step of suspending the target instruction task if the preconditions for execution are not met includes:

[0018] Temporarily suspend the second type of task;

[0019] In the current time slice or the next time slice, schedule and execute the ready first type of task until the intermediate calculation result is generated;

[0020] Once the intermediate calculation results are generated, the suspension status of the second type of task is lifted, and the second type of task is scheduled with priority in the next time slice.

[0021] The method also includes a dynamic priority adjustment step:

[0022] Set initial priorities for the tasks in the task list;

[0023] Monitor the waiting time of low-priority tasks in the task list;

[0024] If the waiting time exceeds a preset threshold or multiple consecutive time slices are not scheduled, the priority of the low-priority task is temporarily increased until the task obtains the right to execute at least one time slice.

[0025] The method further includes:

[0026] When scheduling the execution of the second type of task, the allocated first time slice is shorter to ensure high-frequency task switching and real-time response;

[0027] When scheduling the execution of the first type of task, the allocated second time slice is longer than the first time slice to reduce context switching overhead and improve computational continuity.

[0028] The method further includes:

[0029] When the task list is empty, or during the power-on initialization phase of the consumable chip, the third type of task is scheduled to be executed.

[0030] The third type of task has a lower priority than the first type of task and is used to maintain the system operating at the lowest power consumption.

[0031] The method further includes:

[0032] The processing time of the consumable chip is based on a timer or a real-time operating system that divides the process into multiple consecutive time slices.

[0033] When the processing time of the consumable chip is divided into multiple consecutive time slices based on a timer, the method further includes:

[0034] The consumable chip includes a timer, which is configured to use the timer's interrupt to record the start and end times, and to record a fixed time interval between the start and end times as a time slice.

[0035] The processing time of the consumable chip is based on dividing the continuous multiple time slices according to the real-time operating system, and the method further includes:

[0036] The consumable chip includes a real-time operating system with a built-in timer. The consumable chip is configured to use the timer's interrupt to record the start and end times, and to record a fixed time interval between the start and end times as a time slice.

[0037] Secondly, embodiments of this application also provide a consumable chip, comprising:

[0038] A communication interface for data exchange with the imaging device's host computer;

[0039] Memory, used to store the task list;

[0040] The processor is connected to the communication interface and the memory;

[0041] The processor is configured to execute the consumable chip communication method according to any embodiment of this application.

[0042] Thirdly, embodiments of this application also provide an imaging system, which includes an imaging device host and a consumable chip as described in any of the foregoing embodiments of the second aspect of this application.

[0043] This application's embodiments introduce time-slice round-robin scheduling, task priority mechanisms, and pre-run condition judgments to achieve dynamic allocation of computing resources and concurrent task scheduling for consumable chips, thereby significantly shortening the waiting time for printer startup and authentication processes and improving system response efficiency. Simultaneously, by setting mixed time slice lengths, short time slices are allocated to the second type of tasks to ensure high-frequency real-time response, while long time slices are allocated to the first type of tasks to reduce context switching overhead. This application achieves an optimized balance between real-time performance and computational continuity, making it particularly suitable for consumable chip scenarios that simultaneously require rapid authentication responses and complex encryption calculations. Attached Figure Description

[0044] Figure 1 A flowchart illustrating a consumable chip communication method provided in this application embodiment;

[0045] Figure 2 A flowchart illustrating a process for satisfying preconditions for operation is provided in this application embodiment;

[0046] Figure 3 A flowchart illustrating a process that does not meet the preconditions for execution, as provided in this application embodiment;

[0047] Figure 4 A flowchart illustrating an example of a consumable chip operation provided in this application embodiment;

[0048] Figure 5 This is a structural block diagram of a consumable chip provided in an embodiment of this application. Detailed Implementation

[0049] The embodiments of this application will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the embodiments of this application and are not intended to limit the scope of the embodiments. Furthermore, it should be noted that, for ease of description, only the parts relevant to the embodiments of this application are shown in the accompanying drawings, not the entire structure.

[0050] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0051] Figure 1A flowchart illustrating a consumable chip communication method provided in this application embodiment is shown below. Figure 1 As shown, the communication method of this consumable chip specifically includes:

[0052] The tasks are categorized into three types: the first type includes computationally intensive instructions for generating security authentication data; the second type includes real-time authentication instructions or status response instructions in response to queries from the imaging device; and the third type consists of idle system tasks used to maintain the system at the lowest power consumption. Task priorities are determined based on urgency or resource availability, with priorities decreasing from highest to lowest as follows: second type, first type, and third type.

[0053] After the consumable chip system powers on, it defaults to executing the third type of task, waiting for the printer to send other instructions. Upon receiving a task instruction from the printer, it stores the task in a task list, specifying its ID, priority, task status (e.g., ready, running, suspended, and completed), context pointer, precondition flags, and intermediate result dependency flags, allowing the scheduler to flexibly schedule tasks. Before the time slice begins, tasks in the task list are sorted by priority, with tasks of the same priority arranged in the order they were received. Simultaneously, required tasks are moved to the front based on preconditions. Within the same priority, tasks received earlier are placed before later tasks of the same level, and necessary tasks are moved to the front based on preconditions, ensuring rapid switching of the task to generate intermediate calculation results during time slice transitions.

[0054] like Figure 1As shown, the processing time of the consumable chip is divided into multiple consecutive time slices, and an instruction task is selected for execution within each time slice. First, step S101 reads the task list, and step S202 executes the idle task (third type of task) by default, maintaining the system at the lowest power consumption while waiting for other priority instruction tasks to appear. If an instruction task from the printer is received, it is added to the task list. At the start of the next time slice, steps S103 and S104 are executed, and the task list is read again. The system scheduler performs a traversal and retrieval operation, comparing the priorities of all ready tasks in the current task list and selecting the task with the highest priority as the target instruction task. Next, in response to an instruction task sent by the printer, the priority of the instruction task is determined, and instructions with higher priority are placed at the top of the task list for priority execution. If multiple tasks have the same priority, they are arranged according to the order in which the instructions were received, forming an ordered task list for scheduling. The first instruction task in the task list is in a "ready" state. This task has high priority and is received before other instruction tasks, or it is an instruction task that requires intermediate calculation results. If the previous instruction task is completed, the first instruction task in the task list will be executed in the next time slice. If a task is interrupted during the execution of an instruction task, the consumable chip immediately terminates the instruction execution, releases the bus, saves the current task context to the chip's internal RAM, and rolls back to a safe state. If the write operation is not completed, it is marked as "incomplete," an error code is sent to the printer, and the chip waits for the printer to resend the instruction or a reset signal. After the task is completed or the time slice expires, the computing resources are immediately reclaimed and reallocated according to the current task list and priority. This interrupt handling process is an exemplary implementation of this application and does not constitute a limitation on the scope of protection of this application.

[0055] Then, as Figure 2 As shown, before executing a task, it is determined whether the task meets the preconditions. Preconditions are a mechanism that checks whether a task depends on the intermediate computation results of other tasks before execution. In other words, before scheduling a task, it's determined whether the intermediate computation results of other tasks are required; otherwise, the task cannot be executed. Specifically, it checks whether the task's input parameters come from the output data of another task. If not, the preconditions are met; otherwise, they are not.

[0056] If the preconditions are met, the target instruction task continues execution in the current time slice; if the preconditions are not met, the target instruction task is suspended, the priority of tasks requiring intermediate calculation results is adjusted, and those tasks are executed in the current time slice. Specifically, for example... Figure 3As shown, when the selected target task is a second-type task, it checks whether the execution of the second-type task depends on intermediate computation results generated by other first-type tasks. If the dependent intermediate computation results have not yet been generated, it is determined that the preconditions for execution are not met. In this case, the second-type task needs to be temporarily suspended in the current time slice, and the priority of the first-type task is increased. In the current time slice or the next time slice, the ready first-type task is scheduled for execution until the intermediate computation results are generated and stored in the on-chip RAM. After the intermediate computation results are generated, the suspension of the second-type task is lifted, and the suspended second-type task is reactivated and executed in the next time slice until the second-type task is completed. Of course, during the continued execution of the second-type task, it is still necessary to check whether the preconditions for execution are met. If the preconditions are met, execution continues; if the preconditions are not met, the first-type task is rescheduled for execution until the first-type task completes the intermediate computation results, and then the second-type task continues to be executed. That is, during the execution of the second-type task, it is necessary to check whether the preconditions for execution are met multiple times to avoid wasting time slices. Meanwhile, when the time slice is exhausted, the current program calculator PC, register state, stack pointer SP are saved, the task state is updated, and the program re-enters the scheduling process in the next time slice to execute the task at the top of the list.

[0057] In a specific embodiment, within the master-slave communication architecture comprised of the consumable chip and the imaging device, the first type of task (the computationally intensive instruction for generating secure authentication data) is specifically manifested as the digital signature generation process. When the consumable chip, acting as the slave, receives an authentication challenge sent by the imaging device, acting as the master, through the communication interface, the first type of task is triggered. The processor invokes a built-in encryption algorithm and uses a securely stored key to perform highly intensive algebraic operations on the authentication challenge to generate a corresponding digital signature, which constitutes the intermediate computation result.

[0058] During the digital signature generation process, if the host sends a real-time authentication query command belonging to the second type of task to the slave, the scheduler will pop up this second type of task as the target command task at the start of the current time slice and check its execution prerequisites. Since the real-time authentication query requires comparison with the aforementioned digital signature, and the digital signature has not yet been generated, the system determines that the execution prerequisites are not met and temporarily suspends the second type of task. In the current time slice or the next time slice, the system resumes scheduling and executing the ready digital signature generation task (first type of task) until the digital signature calculation is completed and written to the on-chip memory. Once the intermediate calculation result is generated, the system immediately releases the suspension of the real-time authentication query command and prioritizes its execution in the next time slice, using its high priority characteristic, and feeds back the verification result to the imaging device host in real time.

[0059] Set dynamic or static priorities for different types of instruction tasks. The steps for adjusting the dynamic priority of instruction tasks include:

[0060] Assign initial priorities to tasks in the task list. For example, the first type of task is a computationally intensive instruction that generates security authentication data; the second type of task is a real-time authentication instruction or status response instruction that responds to queries from the imaging device; and the third type of task is a system idle task.

[0061] Simultaneously, the waiting time of low-priority tasks in the task list is monitored. If the waiting time exceeds a preset threshold or multiple consecutive time slices are not scheduled, the priority of the low-priority task is temporarily increased until it obtains execution rights for at least one time slice. The preset threshold can be set when designing the consumable chip, for example, 10ms-30ms. Priority is dynamically increased based on task waiting time to prevent low-priority tasks from starving. Specifically, a waiting time slice counter (or aging counter) variable is added to each task in the array structure of the task list. This counter is incremented by 1 for each unscheduled time slice. When the scheduler traverses the task list, if it finds that the counter value of a low-priority task exceeds the preset threshold (such as the number of slices corresponding to 10ms-30ms), its priority pointer is temporarily increased to the same level as or higher than the current highest priority task. After it executes for one time slice, the counter is cleared and the original priority is restored.

[0062] Meanwhile, the length of the time slice is not fixed. A mixed time slice length is set, with high-priority tasks using short time slices and low-priority tasks using long time slices. Specifically, when scheduling the execution of the second type of task, a shorter time slice is allocated to ensure high-frequency task switching and real-time response; when scheduling the execution of the first type of task, the allocated second time slice is longer than the first time slice to reduce context switching overhead and improve computational continuity. See the table below for details:

[0063] High priority 1ms 1 1 1 Medium priority 5ms 5 5 5 low priority 10ms 10 10 10

[0064] Figure 4 This is a flowchart illustrating an example of the operation of a consumable chip provided in this application. After the consumable chip system is powered on, it executes an idle task by default. The printer sends a T1 instruction, which is a first-type task. The consumable chip starts executing Task1 in the next time slice (P1). Task1 is a time variable of the T1 instruction under the same hardware execution capability (Task2 and Task3 are the same below). During the execution of the T1 instruction, the printer sends a T2 instruction, which is a second-type task. Since the priority of the T2 instruction is higher than that of the T1 instruction, the consumable chip will start executing Task2 in the next time slice (P2) until it is completed, and then switch back to the lower-priority Task1.

[0065] In time slice P2, the consumable chip receives instruction T3 from the printer. Instruction T3 is a second type of task. The consumable chip starts executing Task3 in the next time slice (P3). After executing for a period of time, it checks whether Task3 meets the preconditions. If Task3 does not meet the preconditions and requires the intermediate algorithm result of Task1, Task3 is suspended, releasing the consumable chip's computing resources, and Task1 is executed until the intermediate algorithm result of Task1 is obtained. Then, Task3 is re-executed until the instruction task is completed. This process continues until time slice (P3) ends, and Task1 continues to be executed in the next time slice (P4). After Task1 is completed, it switches back to the idle task, waiting for other instruction tasks to be sent by the printer.

[0066] In one possible embodiment, in a consumable chip without an operating system, the processing time of the consumable chip is divided into multiple consecutive time slices based on a timer (such as SysTick). Specifically, the consumable chip includes a timer, which uses interrupts to record the start and end times, and records a fixed time interval between the start and end times as a time slice, such as a time slice length of 5ms. The task list is stored in an array structure, and each task includes: function pointer, priority, dependency flag, status, etc. Specifically, the dependency flag works as follows: after the first type of task is completed, the corresponding flag in the global variable area is set to 1; before scheduling the second type of task, the flag is polled and read; if it is 0, a suspension mechanism is triggered. The timer interrupt service function implements the task switching and scheduling logic, which is suitable for resource-constrained 8-bit / 16-bit MCUs.

[0067] In one possible embodiment, the processing time of the consumable chip is divided into multiple consecutive time slices based on the real-time operating system. In chips supporting RTOS (such as FreeRTOS or Zephyr), the system creates multiple tasks (Threads) corresponding to modules such as table calculation, verification, and communication. Dependency management is implemented using priority scheduling, semaphores, and message queue mechanisms provided by the RTOS. The time slices are managed by the RTOS kernel, and dynamic priority adjustment is supported, making it suitable for chips with 32-bit or higher performance. Dependency management is achieved through binary semaphores or event flag groups provided by the RTOS. After the first type of task completes its intermediate result, it releases the semaphore, which is then temporarily stored in an independent isolated storage area, waiting for the second type of task to be awakened and enter the ready state to participate in the competition for the next time slice.

[0068] like Figure 5As shown, the consumable chip includes a communication interface 301, a memory 302, and a processor 303. The communication interface 301 is used for data interaction with the imaging device host. The number of memories 302 in the chip can be one or more, including volatile memory and non-volatile memory. In this embodiment, the memory 302 is used to store a task list so that the instructions and tasks can be executed in sequence. The processor 303 executes various functional applications and data processing of the device by running software programs, instructions, and modules stored in the memory, thereby realizing the above-mentioned consumable chip communication method.

[0069] The consumable chip provided above can be used to execute the communication method provided in any of the above embodiments, and has the corresponding functions and beneficial effects.

[0070] This application also provides an imaging system, including an imaging device host and a consumable chip that can be used to perform the communication method provided in any of the above embodiments.

[0071] When the host sends commands frequently, if the consumable chip detects an illegal query, it enters an abnormal handling process and enters a temporary silent period, not responding to any commands, so as not to affect the operation of the first type of task.

[0072] It should be noted that the numbering of each step in this solution is only used to describe the overall design framework of this solution and does not indicate a necessary sequential relationship between the steps. As long as the overall implementation process conforms to the overall design framework of this solution, it falls within the protection scope of this solution. The order of the text in the description is not an exclusive limitation on the specific implementation process of this solution. Those skilled in the art should understand that the embodiments of this application can be provided as methods, systems, or computer program products. In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory. Memory may include non-persistent memory in computer-readable media, random access memory (RAM), and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0073] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0074] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A consumable chip communication method, characterized in that, Applied to a consumable chip, the consumable chip communicating with an imaging device via a communication interface, the method includes: The system receives instructions from the imaging device and stores these instructions in a task list. The instructions include at least a first type of task and a second type of task. The second type of task has a higher priority than the first type of task. The processing time of the consumable chip is divided into multiple consecutive time slices; Within a time slice, the task that needs to be executed at the moment is selected from the task list based on priority as the target instruction task; Determine whether the target instruction task meets the preconditions for execution; If the aforementioned preconditions are met, the target instruction task will be executed in the current time slice. If the aforementioned preconditions for execution are not met, the target instruction task is suspended, and other ready tasks are executed within the current time slice. When the current time slice expires, the currently executing task is interrupted, the context is saved, and the task is rescheduled in a subsequent time slice.

2. The consumable chip communication method according to claim 1, characterized in that, The classification characteristics of the instruction tasks are as follows: The first type of task consists of computationally intensive instructions for generating security authentication data; The second type of task is responding to real-time authentication commands or status response commands queried by the imaging device.

3. The consumable chip communication method according to claim 2, characterized in that, The determination of whether the target instruction task meets the preconditions for execution includes: When the selected target instruction task is the second type of task, check whether the execution of the second type of task depends on the intermediate calculation results generated by the first type of task; If the intermediate calculation results on which the operation depends have not yet been generated, it is determined that the preconditions for running are not met. If the intermediate calculation results that the task depends on have been generated, or if the second type of task does not depend on other tasks, then it is determined that the preconditions for running are met.

4. The consumable chip communication method according to claim 3, characterized in that, The step of suspending the target instruction task if the preconditions for execution are not met includes: Temporarily suspend the second type of task; In the current time slice or the next time slice, schedule and execute the ready first type of task until the intermediate calculation result is generated; Once the intermediate calculation results are generated, the suspension status of the second type of task is lifted, and the second type of task is scheduled with priority in the next time slice.

5. The consumable chip communication method according to claim 1, characterized in that, The method also includes a dynamic priority adjustment step: Set initial priorities for the tasks in the task list; Monitor the waiting time of low-priority tasks in the task list; If the waiting time exceeds a preset threshold or multiple consecutive time slices are not scheduled, the priority of the low-priority task is temporarily increased until the task obtains the right to execute at least one time slice.

6. The consumable chip communication method according to claim 1, characterized in that, The method further includes: When scheduling the execution of the second type of task, the allocated first time slice is shorter to ensure high-frequency task switching and real-time response; When scheduling the execution of the first type of task, the allocated second time slice is longer than the first time slice to reduce context switching overhead and improve computational continuity.

7. The consumable chip communication method according to claim 1, characterized in that, The method further includes: When the task list is empty, or during the power-on initialization phase of the consumable chip, the third type of task is scheduled to be executed. The third type of task has a lower priority than the first type of task and is used to maintain the system operating at the lowest power consumption.

8. The consumable chip communication method according to claim 1, characterized in that, The method further includes: The processing time of the consumable chip is based on a timer or a real-time operating system that divides the process into multiple consecutive time slices.

9. The consumable chip communication method according to claim 8, characterized in that, When the processing time of the consumable chip is divided into multiple consecutive time slices based on a timer, the method further includes: The consumable chip includes a timer, which is configured to use the timer's interrupt to record the start and end times, and to record a fixed time interval between the start and end times as a time slice.

10. The consumable chip communication method according to claim 8, wherein the processing time of the consumable chip is divided into multiple consecutive time slices based on a real-time operating system, and the method further includes: The consumable chip includes a real-time operating system with a built-in timer. The consumable chip is configured to use the timer's interrupt to record the start and end times, and to record a fixed time interval between the start and end times as a time slice.

11. A consumable chip, characterized in that, A communication interface used for data exchange with imaging equipment; Memory, used to store the task list; The processor is connected to the communication interface and the memory; The processor is configured to perform the consumable chip communication method as described in any one of claims 1 to 10.

12. An imaging system, characterized in that, It includes the imaging device host and the consumable chip as described in claim 11.

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