Display device

Abstract

A display device is disclosed, comprising: a display panel having pixels, each pixel including a light-emitting element configured to emit light and connected to a data line and a sensing line; and a display driver configured to receive sensing signals from the sensing line in a first RT interval, a second RT interval, and an OFF-RS interval, wherein the display driver may include: a first switching element configured to be turned on in the first RT interval based on a first switching signal and electrically connecting a reference voltage line to the sensing line; a second switching element configured to be turned on in the OFF-RS interval based on a second switching signal and electrically connecting a low-potential line to the sensing line; and a third switching element configured to be turned on in the second RT interval based on a third switching signal and electrically connecting a variable initialization line to the sensing line.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2025-0040509, filed on March 28, 2025, the entire contents of which are incorporated herein by reference for all purposes. Technical Field

[0003] This disclosure relates to a display device. Background Technology

[0004] With the development of the information society, the demand for display devices for displaying images is increasing. Furthermore, various types of display devices, such as liquid crystal displays (LCDs) and organic light-emitting diode (OLEDs), are already in use.

[0005] The image displayed on the display device can be a still image or a moving image. If the image is a moving image, it can be of various types, such as sports images, game images, movies, etc. The display device may include multiple pixels and multiple switching elements for driving the pixels. Summary of the Invention

[0006] The technical problem to be solved by this disclosure is to provide a display device that can easily perform sensing in a relatively small RT range with high frequency and high resolution, and determine appropriate compensation values ​​by ensuring constant sensing values.

[0007] The technical problems to be solved by this disclosure are not limited to those described above. Other technical problems not mentioned will be inferred from the embodiments provided below.

[0008] One embodiment discloses a display device comprising: a display panel having pixels, each pixel including a light-emitting element configured to emit light and connected to a data line and a sensing line; and a display driver configured to receive sensing signals from the sensing line in a first RT interval, a second RT interval, and an OFF-RS interval, the display driver comprising: a first switching element configured to be turned on in the first RT interval based on a first switching signal and electrically connecting a reference voltage line to the sensing line; a second switching element configured to be turned on in the OFF-RS interval based on a second switching signal and electrically connecting a low-potential line to the sensing line; and a third switching element configured to be turned on in the second RT interval based on a third switching signal and electrically connecting a variable initialization line to the sensing line.

[0009] Another embodiment discloses a display device comprising: a display panel having pixels, each pixel including a light-emitting element configured to emit light and connected to a data line and a sensing line; and a display driver configured to receive sensing signals from the sensing line in a first RT interval, a second RT interval, and an OFF-RS interval, the display driver further comprising: a multiplexer configured to receive a reference voltage from a reference voltage line, a low-potential voltage from a low-potential line, and a variable initialization voltage from a variable initialization line; and a switching element configured to be turned on based on one of a first to a third switching signal, and to supply one of the reference voltage, the low-potential voltage, and the variable initialization voltage to the sensing line.

[0010] Further details of the embodiments are included in the detailed description and the accompanying drawings.

[0011] The display device according to embodiments of the present disclosure can easily perform sensing in a relatively small RT range with high frequency and high resolution by using a variable initialization voltage that has a different voltage level in each of the RT range and the OFF-RS range, and can determine an appropriate compensation value by ensuring a constant sensing value.

[0012] The display device according to embodiments of the present disclosure can perform sensing in the RT range even when the power supply voltage is reduced to lower the data voltage in order to reduce power consumption.

[0013] However, the effects that can be obtained by this disclosure are not limited to those described above, and those skilled in the art to which this disclosure pertains can clearly understand other technical effects not described above through the following description. Attached Figure Description

[0014] Figure 1 This is a plan view of a display device according to one embodiment.

[0015] Figure 2 This is a block diagram illustrating a display device according to one embodiment.

[0016] Figure 3 This is a circuit diagram illustrating a display driver and pixels of a display device according to one embodiment.

[0017] Figure 4 This is a timing diagram showing the signals and voltages in a first RT region of a display device according to one embodiment.

[0018] Figure 5 It shows according to Figure 4 The timing diagram in the image shows the circuit diagram of the driver and the operation of the pixels.

[0019] Figure 6 This is a timing diagram showing the signals and voltages in a second RT region of a display device according to one embodiment.

[0020] Figure 7 It shows according to Figure 6 The timing diagram in the image shows the circuit diagram of the driver and the operation of the pixels.

[0021] Figure 8 This is a timing diagram showing the signals and voltages in the OFF-RS region of a display device according to one embodiment.

[0022] Figure 9 It shows according to Figure 8 The timing diagram in the image shows the circuit diagram of the driver and the operation of the pixels.

[0023] Figure 10 This is a circuit diagram illustrating the connection relationship between a display driver, a power supply unit, and a timing controller in a display device according to one embodiment.

[0024] Figure 11 This is a circuit diagram illustrating the connection relationship between a display driver, a power supply unit, and a timing controller in a display device according to another embodiment.

[0025] Figure 12 This is a block diagram illustrating the driving module and sensing module of the display driver in a display device according to one embodiment. Detailed Implementation

[0026] In the following description, embodiments of the present disclosure will be described with reference to the accompanying drawings. In this specification, when a component (or region, layer, part, etc.) is referred to as being "on" or "connected to" or "integrated into" another component, it means that the component may be directly on or directly connected to or integrated into the other component, or that a third component may be present between them.

[0027] Similar reference numerals indicate similar elements. Furthermore, in the accompanying drawings, the thickness, scale, and dimensions of components are exaggerated for effective description. "And / or" includes all combinations of one or more combinations defined by the relevant components.

[0028] It should be understood that when the terms “first” and “second” are used herein to describe various components, those components should not be limited by these terms. The terms are used only to distinguish one component from another. For example, a first component may be referred to as a second component without departing from the scope of this disclosure, and vice versa. Unless the context clearly indicates otherwise, the singular expressions and terms used herein also include or include the plural expressions and terms.

[0029] Furthermore, terms such as "below," "lower side," "above," and "upper side" are used to describe the relationships of the configurations shown in the accompanying drawings. These terms are described as relative concepts based on the directions shown in the drawings.

[0030] In various embodiments of this disclosure, the terms “comprising” or “including” specify a characteristic, fixed quantity, step, process, element and / or component or combination thereof, but do not exclude the presence or addition of other characteristics, fixed quantities, steps, processes, elements and / or components or combinations thereof.

[0031] Figure 1 This is a plan view of a display device according to one embodiment.

[0032] refer to Figure 1 The display device 10 can be applied to portable electronic devices such as mobile phones, smartphones, tablets, mobile communication terminals, electronic notebooks, e-book readers, portable multimedia players (PMPs), navigation devices, and ultra-mobile PCs (UMPCs). For example, the display device 10 according to this embodiment can be used as a display unit for televisions, laptops, monitors, billboards, Internet of Things (IoT) devices, etc. As another example, the display device 10 can be applied to various wearable devices such as smartwatches, watch phones, glasses displays, and head-mounted displays (HMDs).

[0033] The display device 10 may include a display panel 100, a display driver 200, a source circuit board 300, a flexible film 310, a flexible cable 320, a control circuit board 400, a timing controller 500, a power supply unit 600, and a memory 700.

[0034] The display device 10 may include a display area DA and a non-display area NDA. The display area DA may include a plurality of pixels SP configured to display an image. Each of the plurality of pixels may emit light from a light-emitting area or an opening area. For example, the display area DA may include pixel circuitry including switching elements, a pixel defining layer defining the light-emitting area, and self-emissive elements.

[0035] For example, a self-emissive element may include at least one of an organic light-emitting diode containing an organic light-emitting layer, a quantum dot light-emitting diode (LED) containing a quantum dot light-emitting layer, an inorganic light-emitting diode (LED) containing an inorganic semiconductor, and a micro light-emitting diode (LED) or a nano light-emitting diode (LED), but is not limited thereto.

[0036] The display driver 200 can supply data voltage to the data lines of the display panel 100. The display driver 200 can be electrically connected to the flexible film 310 and electrically connected to the data lines DL of the display panel 100 via pads on the display panel 100. The display driver 200 can be formed as an integrated circuit (IC). For example, the display driver 200 can be attached to a surface of the flexible film 310 in a chip-on-film (COF) manner. The flexible film 310 can include wiring that electrically connects the display driver 200 and the display panel 100. One side of the flexible film 310 can be electrically connected to the pads on the display panel 100, and the other side of the flexible film 310 can be electrically connected to the source circuit board 300.

[0037] The source circuit board 300 can electrically connect the control circuit board 400 and the flexible film 310 to each other. The source circuit board 300 can be a printed circuit board including wiring that electrically connects the display driver 200 and other devices to each other. The source circuit board 300 can be electrically connected to the control circuit board 400 via a flexible cable 320. For example, the flexible cable 320 can be a flexible flat cable (FFC), but is not limited thereto.

[0038] The control circuit board 400 can be a printed circuit board that mounts a timing controller 500, a power supply unit 600, and a memory 700. Control components and various electronic devices can be mounted in the control circuit board 400, and are not limited to... Figure 1 The attached diagram.

[0039] The timing controller 500 can be attached to one surface of the control circuit board 400. The timing controller 500 can control the operating timing of the display driver 200 by transmitting digital video data to the display driver 200.

[0040] The power supply unit 600 can generate a power supply voltage and supply the power supply voltage to the display panel 100. Here, the power supply voltage may include, but is not limited to, the drive voltage EVDD, the low potential voltage VSS, the initialization voltage Vint, the reference voltage VREF, and the bias voltage Vbias.

[0041] The memory 700 can store pixel sensing information. For example, the memory 700 can store information about the threshold voltage of the transistor received from the display driver 200 and supply the threshold voltage information to the timing controller 500.

[0042] Figure 2 This is a block diagram illustrating a display device according to one embodiment.

[0043] refer to Figure 2The display panel 100 may include a display area DA and a non-display area NDA. The display area DA may include multiple pixels SP, as well as power lines VL, scan lines SL and data lines DL connected to the pixels SP.

[0044] Each pixel SP can be connected to a scan line SL, a data line DL, and a power line VL. Each pixel SP may include a transistor, a light-emitting element, and a capacitor.

[0045] Scan lines SL can extend along a first direction DR1 and can be spaced apart from each other along a second direction DR2 that intersects with the first direction DR1. Scan lines SL can sequentially supply scan signals to multiple pixels SP.

[0046] Data lines DL can extend along the second direction DR2 and can be spaced apart from each other along the first direction DR1. Data lines DL supply data voltage to pixels SP. The data voltage determines the brightness of pixel SP.

[0047] The power lines VL can extend along the second direction DR2 and can be spaced apart from each other in the first direction. The power lines VL can supply power voltages to multiple pixels SP. The power voltages may include, but are not limited to, the drive voltage VDD, the low-level voltage VSS, the initialization voltage Vint, the reference voltage VREF, and the bias voltage Vbias.

[0048] Scan driver 220 may include multiple transistors and can generate scan signals based on scan control signals SCS. Scan driver 220 can use a shift register to shift the scan signals and can sequentially supply the shifted scan signals to scan lines SL. The scan signals of scan driver 220 can select pixels SP to which data voltages are supplied, and the selected pixels SP can receive data voltages through data lines DL. Scan driver 220 can be disposed on one or both sides of the non-display area DNA in a gate-in-panel (GIP) configuration.

[0049] The timing controller 500 can receive digital video data DATA and timing signals from the host system or unit module. The timing controller 500 can generate a data control signal DCS based on the timing signals. The timing controller 500 can supply the digital video data DATA and the data control signal DCS to the display driver 200 to control the operating timing of the display driver 200. The display driver 200 can convert the digital video data DATA into analog data voltage and supply the analog data voltage to the data line DL. The timing controller 500 can generate a scan control signal SCS based on the timing signals. The timing controller 500 can supply the scan control signal SCS to the scan driver 220 to control the operating timing of the scan driver 220. The timing controller 500 can change the driving frequency of the display panel 100 based on the input frequency received from the host system or unit module.

[0050] The power supply unit 600 can supply a power supply voltage to the power line VL. The power supply voltage may include, but is not limited to, a drive voltage VDD, a low-level voltage VSS, an initialization voltage Vint, a reference voltage VREF, and a bias voltage Vbias. The power supply unit 600 can generate the drive voltage VDD and supply it to the drive voltage line, generate the initialization voltage Vint and supply it to the initialization voltage line, generate the bias voltage Vbias and supply it to the bias voltage line, generate the reference voltage VREF and supply it to the reference voltage line, and generate the low-level voltage VSS and supply it to the low-level line.

[0051] Figure 3 This is a circuit diagram illustrating a display driver and pixels of a display device according to one embodiment.

[0052] refer to Figure 3 Each of the multiple pixels SP can be connected to the first scan line SCL, the second scan line SSL, the data line DL, the sensing line SEL, the drive voltage line VDL, and the low potential line VSL.

[0053] A pixel SP may include a first transistor T1, a second transistor T2, a third transistor T3, a first capacitor C1, and a light-emitting element ED.

[0054] The first transistor T1 may include a gate, a drain, and a source. The gate of the first transistor T1 may be connected to a first node N1, its drain may be connected to a drive voltage line VDL, and its source may be connected to a second node N2. The drain of the first transistor T1 may receive a drive voltage VDD from the drive voltage line VDL. The first transistor T1 may be a drive transistor configured to regulate the current flowing from the drive voltage line VDL to the light-emitting element ED based on the voltage difference between the gate and source. The first transistor T1 may operate as a source follower. The first transistor T1 may control the current (or drive current) between the drain and source based on the data voltage applied to the gate.

[0055] An LED can emit light by receiving a driving current. The amount or brightness of light emitted by the LED can be proportional to the magnitude of the driving current. An LED can include, but is not limited to, at least one of the following: an organic light-emitting diode containing an organic light-emitting layer, a quantum dot light-emitting diode containing a quantum dot light-emitting layer, an inorganic light-emitting diode containing an inorganic light-emitting layer, and a micro LED.

[0056] The first electrode of the light-emitting element (ED) can be connected to the second node N2. Through the second node N2, the first electrode of the ED can be connected to the source of the first transistor T1, the drain of the third transistor T3, and the second capacitor electrode of the first capacitor C1. The second electrode of the ED can be connected to the low-potential line VSL. The second electrode of the ED can receive a low-potential voltage VSS from the low-potential line VSL.

[0057] The second transistor T2 can be turned on by the first scan signal of the first scan line SCL, and can electrically connect the data line DL and the first node N1, which serves as the gate of the first transistor T1, to each other. When the second transistor T2 is turned on based on the first scan signal, the second transistor T2 can supply data voltage to the first node N1. The gate of the second transistor T2 can be connected to the first scan line SCL, its drain can be connected to the data line DL, and its source can be connected to the first node N1. The source of the second transistor T2 can be electrically connected to the gate of the first transistor T1 and the first capacitor electrode of the first capacitor C1 through the first node N1.

[0058] The third transistor T3 can be turned on by the second scan signal of the second scan line SSL, and can electrically connect the sensing line SEL and the second node N2, which is the source of the first transistor T1, to each other. When the third transistor T3 is turned on based on the second scan signal, it can supply one of the reference voltage VREF, the low potential voltage VSS, and the variable initialization voltage VRTA to the second node N2. The gate of the third transistor T3 can be connected to the second scan line SSL, its drain can be connected to the second node N2, and its source can be connected to the sensing line SEL. Through the second node N2, the drain of the third transistor T3 can be electrically connected to the source of the first transistor T1, the second capacitor electrode of the first capacitor C1, and the first electrode of the light-emitting element ED.

[0059] For example, the drain and source of each of the first transistor T1, the second transistor T2, and the third transistor T3 may not be limited to those described above, and may be formed in opposite directions. Each of the first transistor T1, the second transistor T2, and the third transistor T3 may be an n-type MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), but is not limited to this.

[0060] The display driver 200 may include a first switching element SW1, a second switching element SW2, a third switching element SW3, a fourth switching element SW4, a holding capacitor HC, an analog-to-digital converter (ADC), and a digital-to-analog converter (DAC).

[0061] The first switching element SW1 can electrically connect the sensing line SEL to the reference voltage line VRL based on the first switching signal RPRE. When the first switching element SW1 is turned on, the reference voltage line VRL can supply the reference voltage VREF to the sensing line SEL.

[0062] The second switching element SW2 can electrically connect the sensing line SEL to the low-potential line VSL based on the second switching signal SPRE. For example, the second switching element SW2 can be grounded. When the second switching element SW2 is turned on, the low-potential line VSL can supply a low-potential voltage VSS to the sensing line SEL.

[0063] The third switching element SW3 can electrically connect the sensing line SEL to the variable initialization line VRTL based on the third switching signal RTPRE. When the third switching element SW3 is turned on, the variable initialization line VRTL can supply the variable initialization voltage VRTA to the sensing line SEL.

[0064] The variable initialization voltage VRTA can have different voltage levels in both the real-time sensing (RT) and off-state real-time sensing (OFF-RS) regions. For example, the variable initialization voltage VRTA can have a first voltage level in the second RT region and a second voltage level higher than the first voltage level in the OFF-RS region. The variable initialization voltage VRTA can be the initialization voltage used to sense the pixel SP in the second RT region. The variable initialization voltage VRTA can be used to correct the offset voltage of the display driver 200 in the OFF-RS region. In the OFF-RS region, the display driver 200 can supply the variable initialization voltage VRTA to the dummy channel and use the ADC to sense the pixel SP, thereby correcting the offset voltage.

[0065] In display device 10, the sensing time and data voltage in the RT and OFF-RS intervals are different from each other; therefore, the reference voltage of the ADC can also be different from each other. Thus, since display device 10 uses a variable initialization voltage VRTA with different voltage levels in each of the RT and OFF-RS intervals, display device 10 can easily perform sensing in a relatively small RT interval with high frequency and high resolution, and an appropriate compensation value can be determined by ensuring a constant sensing value. Display device 10 can easily perform sensing in the RT interval even when reducing the data voltage Vdata by lowering the power supply voltage VDD to reduce power consumption.

[0066] The fourth switching element SW4 can electrically connect the sensing line SEL to the ADC based on the fourth switching signal SAM. When the fourth switching element SW4 is turned on, the sensing line SEL can supply the sensing signal to the ADC, which can convert the sensing signal into digital data to generate sensing data SD. The ADC can then supply the sensing data SD to the compensation circuit (not shown) of the timing controller 500.

[0067] The fourth switching element SW4 can electrically connect the sensing line SEL to the holding capacitor HC based on the fourth switching signal SAM. When the fourth switching element SW4 is turned on, the holding capacitor HC can maintain the potential difference between the sensing line SEL and the low-potential line VSL. Therefore, when the fourth switching element SW4 is turned on, the holding capacitor HC can maintain the voltage applied to the sensing line SEL.

[0068] The DAC can receive digital video data DATA, which reflects the sensed data SD, from the compensation circuit of the timing controller 500. The DAC can convert the digital video data DATA into analog data to generate a data voltage Vdata. The DAC can then supply the data voltage Vdata to the data line DL.

[0069] Figure 4This is a timing diagram showing the signals and voltages in a first RT region of a display device according to one embodiment. Figure 5 It shows according to Figure 4 The timing diagram in the image shows the circuit diagram of the driver and the operation of the pixels.

[0070] refer to Figure 4 and Figure 5 Multiple pixels SP can emit light during active periods. Pixels SP located in some rows can be sensed by the display driver 200 during the RT interval, and pixels SP located in other rows can maintain the brightness they had during previous active periods during idle periods. Therefore, the RT interval can be applied to pixels SP in some rows during idle periods. The display driver 200 can sense characteristics such as electron mobility or threshold voltage of the first transistor T1 of the pixel SP during the RT interval.

[0071] The RT interval may include a first RT interval RT1. The first RT interval RT1 may include a first time period t1, a second time period t2, and a third time period t3, which are performed sequentially.

[0072] Pixel SP can receive a high-level first scan signal SCAN (or gate turn-on voltage) and a high-level second scan signal SENSE in the first time period t1 and the second time period t2. The second transistor T2 can be turned on based on the first scan signal SCAN, and the third transistor T3 can be turned on based on the second scan signal SENSE.

[0073] Data line DL can supply a data voltage Vdata corresponding to the data used for sensing to pixel SP during a first time period t1 and a second time period t2. Second transistor T2 can be turned on during both time periods t1 and t2, supplying the data voltage Vdata to a first node N1, which serves as the gate of first transistor T1. First switching element SW1 can receive a high-level first switching signal RPRE during the first time period t1. First switching element SW1 can be turned on during the first time period t1, electrically connecting reference voltage line VRL and sensing line SEL to each other. Reference voltage line VRL can supply a reference voltage VREF to sensing line SEL during the first time period t1. Third transistor T3 can be turned on during both time periods t1 and t2, supplying the reference voltage VREF to a second node N2, which serves as the source of first transistor T1.

[0074] The gate-source voltage (Vgs = Vdata - VREF) of the first transistor T1 can be greater than the threshold voltage Vth of the first transistor T1 (Vgs > Vth) during the first time period t1 and the second time period t2, and the first transistor T1 can be turned on until the gate-source voltage Vgs of the first transistor T1 reaches the threshold voltage Vth. Therefore, the voltage of the second node N2, which is the source of the first transistor T1, can rise to "Vdata - Vth", and the threshold voltage Vth of the first transistor T1 can be sampled at the second node N2.

[0075] The fourth switching element SW4 can receive a high-level fourth switching signal SAM during the third time period t3. The fourth switching element SW4 can electrically connect the ADC to the sensing line SEL during the third time period t3. The sensing line SEL can have a sensing voltage VSEN. The sensing voltage VSEN can be sensed as a sensing signal through the sensing line SEL and the ADC.

[0076] Figure 6 This is a timing diagram showing the signals and voltages in the second RT region of a display device according to one embodiment. Figure 7 It shows according to Figure 6 The timing diagram in the image shows the circuit diagram of the driver and the operation of the pixels.

[0077] refer to Figure 6 and Figure 7 The RT interval may also include a second RT interval RT2. The second RT interval RT2 may include a first time period t1, a second time period t2, and a third time period t3, which are performed sequentially.

[0078] Pixel SP can receive a high-level first scan signal SCAN (or gate turn-on voltage) and a high-level second scan signal SENSE in the first time period t1 and the second time period t2. The second transistor T2 can be turned on based on the first scan signal SCAN, and the third transistor T3 can be turned on based on the second scan signal SENSE.

[0079] The data line DL can supply a data voltage Vdata corresponding to the data used for sensing to the pixel SP during the first time period t1 and the second time period t2. The second transistor T2 can be turned on during the first time period t1 and the second time period t2, and supply the data voltage Vdata to the first node N1, which serves as the gate of the first transistor T1. The third switching element SW3 can receive a high-level third switching signal RTPRE during the first time period t1. The third switching element SW3 can be turned on during the first time period t1, and can electrically connect the variable initialization line VRTL and the sensing line SEL to each other. The variable initialization line VRTL can supply a variable initialization voltage VRTA to the sensing line SEL during the first time period t1. The third transistor T3 can be turned on during the first time period t1 and the second time period t2, and can supply the variable initialization voltage VRTA to the second node N2, which serves as the source of the first transistor T1.

[0080] The gate-source voltage (Vgs = Vdata - VRTA) of the first transistor T1 can be greater than the threshold voltage Vth of the first transistor T1 (Vgs > Vth) during the first time period t1 and the second time period t2, and the first transistor T1 can be turned on until the gate-source voltage Vgs of the first transistor T1 reaches the threshold voltage Vth. Therefore, the voltage of the second node N2, which is the source of the first transistor T1, can rise to "Vdata - Vth", and the threshold voltage Vth of the first transistor T1 can be sampled at the second node N2.

[0081] The fourth switching element SW4 can receive a high-level fourth switching signal SAM during the third time period t3. The fourth switching element SW4 can electrically connect the ADC to the sensing line SEL during the third time period t3. The sensing line SEL can have a sensing voltage VSEN. The sensing voltage VSEN can be sensed as a sensing signal through the sensing line SEL and the ADC.

[0082] In the first RT interval RT1 and the second RT interval RT2, the voltage level of the variable initialization voltage VRTA can be greater than the voltage level of the reference voltage VREF. The sensing voltage VSEN can have the reference voltage VREF in the first time period t1 of the first RT interval RT1, and can gradually increase in the second time period t2 of the first RT interval RT1. The sensing voltage VSEN can have the variable initialization voltage VRTA in the first time period t1 of the second RT interval RT2, and can gradually increase in the second time period t2 of the second RT interval RT2. In the second time period t2 of each of the first RT interval RT1 and the second RT interval RT2, the change in the sensing voltage VSEN (dV / dt) can be substantially the same, but is not limited to this. The sensing voltage VSEN in the third time period t3 of the second RT interval RT2 can be greater than the sensing voltage VSEN in the third time period of the first RT interval RT1. In the display device 10, because the RT interval decreases with increasing frequency, the charging time of the sensing voltage VSEN may decrease, and it may be difficult to ensure a sufficient sensing voltage VSEN. Therefore, by supplying the variable initialization voltage VRTA in the second RT interval RT2, the display device 10 can ensure a sensing voltage VSEN with a sufficient value for a relatively short period of time. Here, a sufficient value for the sensing voltage VSEN can be a value set to precisely determine the data compensation value. The display device 10 can improve sensing sensitivity and determine an appropriate compensation value by ensuring that the sensing voltage VSEN has a sufficient value. The display device 10 can easily perform sensing within a relatively small RT range with high frequency and high resolution, and an appropriate compensation value can be determined by ensuring a constant sensing value. Even when reducing the data voltage Vdata by reducing the power supply voltage to reduce power consumption, the display device 10 can perform sensing within the RT range.

[0083] Figure 8 This is a timing diagram showing the signals and voltages in the OFF-RS region of a display device according to one embodiment. Figure 9 It shows according to Figure 8 The timing diagram in the image shows the circuit diagram of the driver and the operation of the pixels.

[0084] refer to Figure 8 and Figure 9 The OFF-RS interval can include the first time period t1, the second time period t2, the third time period t3, and the fourth time period t4, which are carried out sequentially.

[0085] Pixel SP can receive a high-level first scan signal SCAN (or gate turn-on voltage) during the first time period t1, the second time period t2, and the third time period t3, and can also receive a high-level second scan signal SENSE. Second transistor T2 can be turned on based on the first scan signal SCAN, and third transistor T3 can be turned on based on the second scan signal SENSE.

[0086] The data line DL can supply a data voltage Vdata corresponding to the data used for sensing to the pixel SP during the first time period t1, the second time period t2, and the third time period t3. The second transistor T2 can be turned on during the first time period t1, the second time period t2, and the third time period t3, and supply the data voltage Vdata to the first node N1, which serves as the gate of the first transistor T1. The second switching element SW2 can receive a high-level second switching signal SPRE during the first time period t1. The second switching element SW2 can be turned on during the first time period t1, and can electrically connect the low-potential line VSL and the sensing line SEL to each other. The low-potential line VSL can supply a low-potential voltage VSS to the sensing line SEL during the first time period t1. The third transistor T3 can be turned on during the first time period t1, the second time period t2, and the third time period t3, and can supply the low-potential voltage VSS to the second node N2, which serves as the source of the first transistor T1.

[0087] The gate-source voltage (Vgs = Vdata - VSS) of the first transistor T1 can be greater than the threshold voltage Vth of the first transistor T1 (Vgs > Vth) during the first time period t1, the second time period t2, and the third time period t3, and the first transistor T1 can be turned on until the gate-source voltage Vgs of the first transistor T1 reaches the threshold voltage Vth. Therefore, the voltage of the second node N2, which is the source of the first transistor T1, can rise to "Vdata - Vth", and the threshold voltage Vth of the first transistor T1 can be sampled at the second node N2.

[0088] The fourth switching element SW4 can receive a high-level fourth switching signal SAM in the fourth time period t4. The fourth switching element SW4 can electrically connect the ADC to the sensing line SEL in the fourth time period t4. The sensing line SEL can have a sensing voltage VSEN. The sensing voltage VSEN can be sensed as a sensing signal through the sensing line SEL and the ADC. The sensing voltage VSEN can have a low potential voltage VSS in the first time period t1 and can gradually rise in the second time period t2. The sensing voltage VSEN can have its maximum value in the third time period t3 and the fourth time period t4.

[0089] Figure 10This is a circuit diagram illustrating the connection relationships between a display driver, a power supply unit, and a timing controller in a display device according to one embodiment. In the following, configurations identical to those described above will be briefly described or omitted.

[0090] refer to Figure 10 The timing controller 500 can control the power supply unit 600 via the I2C protocol. The timing controller 500 can determine the operation of the power supply unit 600 by determining the second RT interval RT2 or the OFF-RS interval OFF-RS.

[0091] The power supply unit 600 can supply a reference voltage VREF and a variable initialization voltage VRTA to the display driver 200. The power supply unit 600 can also supply a reference voltage VREF to the first switching element SW1 via the reference voltage line VRL.

[0092] The power supply unit 600 can supply a variable initialization voltage VRTA to the third switching element SW3 and the dummy channel DCH via a variable initialization line VRTL. The variable initialization voltage VRTA can have different voltage levels in the RT and OFF-RS intervals. For example, the variable initialization voltage VRTA can have a first voltage level in the second RT interval and a second voltage level higher than the first voltage level in the OFF-RS interval. The variable initialization voltage VRTA can be used as an initialization voltage for sensing the pixel SP in the second RT interval. The variable initialization voltage VRTA can be used to correct the offset voltage of the display driver 200 in the OFF-RS interval. In the OFF-RS interval, the display driver 200 can supply the variable initialization voltage VRTA to the dummy channel DCH and use an ADC to sense the pixel SP, thereby correcting the offset voltage.

[0093] The dummy channel DCH can be set independently to correct the offset voltage of the display device 10. The dummy channel DCH can be electrically connected to the ADC of the display driver 200 without passing through the pixel SP. For example, a variable initialization voltage VRTA with a second voltage level can be transmitted to the ADC via the dummy channel DCH in the OFF-RS interval, and the ADC can convert the second voltage level into a digital value. Here, the second voltage level of the variable initialization voltage VRTA can be a preset value, making it easy to compare the digital conversion values ​​of the individual display drivers 200 among the plurality of display drivers 200. The timing controller 500 can compare the digital conversion values ​​of the variable initialization voltage VRTA relative to the individual display drivers 200 among the plurality of display drivers 200, and can adjust the gain of the ADC of each display driver 200 so that the digital conversion values ​​of the display drivers 200 are consistent with each other. Therefore, the display driver 200 can convert the variable initialization voltage VRTA into a constant digital value through offset voltage correction.

[0094] Therefore, the display device 10 can supply a variable initialization voltage VRTA of a first voltage level in the second RT interval RT2 and ensure a sufficient sensing voltage VSEN for a relatively short period of time, and can supply a variable initialization voltage VRTA of a second voltage level in the OFF-RS interval OFF-RS, thereby correcting the offset voltage of the plurality of display drivers 200.

[0095] Figure 11 This is a circuit diagram illustrating the connection relationship between a display driver, a power supply unit, and a timing controller in a display device according to another embodiment. Figure 11 The display driver 200 also includes a multiplexer (MUX) in the display driver 200, and Figure 11 The operation of the display driver 200 in the middle can be with Figure 10 The operation of the display driver 200 is basically the same. For example, Figure 11 The display driver 200 in the middle can receive Figure 4 , Figure 6 and Figure 8 The voltages and signals shown.

[0096] refer to Figure 11 The timing controller 500 can control the power supply unit 600 via the I2C protocol. The timing controller 500 can determine the operation of the power supply unit 600 by determining the second RT interval RT2 or the OFF-RS interval OFF-RS.

[0097] The power supply unit 600 can supply a reference voltage VREF and a variable initialization voltage VRTA to the display driver 200. The power supply unit 600 can supply the reference voltage VREF to the multiplexer MUX via the reference voltage line VRL. The power supply unit 600 can supply the variable initialization voltage VRTA to the multiplexer MUX and the dummy channel DCH via the variable initialization line VRTL.

[0098] The multiplexer MUX can be electrically connected to the sensing line SEL via the switching element SW. The multiplexer MUX can supply one of the following to the switching element SW: the reference voltage VREF, the low-level voltage VSS, and the variable initialization voltage VRTA.

[0099] The switching element SW can be turned on by receiving one of the first switching signal RPRE, the second switching signal SPRE, and the third switching signal RTPRE. The switching element SW can be turned on based on the first switching signal RPRE and supply the reference voltage VREF to the sensing line SEL. The switching element SW can be turned on based on the third switching signal RTPRE and supply the variable initialization voltage VRTA to the sensing line SEL.

[0100] Figure 12 This is a block diagram illustrating the driving module and sensing module of the display driver in a display device according to one embodiment.

[0101] refer to Figure 12 The display driver 200 may include a driver module 210 and a sensing module 220. The driver module 210 may include a digital logic unit 211, a shift register 212, a first latch 213, a second latch 214, a digital-to-analog converter 215, and a multi-channel output circuit 216.

[0102] Digital logic unit 211 can calculate the input signal and supply it to shift register 212, first latch 213 and second latch 214.

[0103] The first latch 213 can receive signals from the digital logic unit 211 and the shift register 212, and transmit the output value to the second latch 214.

[0104] The second latch 214 can receive signals from the digital logic unit 211 and the first latch 213, and transmit the output value to the DAC 215.

[0105] DAC 215 can receive input signals and signals from the second latch 214, and transmit the output value to the multi-channel output circuit 216.

[0106] The multi-channel output circuit 216 can receive input signals and signals from the DAC 215, and supply data voltages corresponding to the digital video data DATA.

[0107] The sensing module 220 may include a timing control logic unit 221, a sample downscaling circuit 222, a current integration circuit 223, and a multiplexer 224.

[0108] The timing control logic unit 221 can receive the first switch signal RPRE, the second switch signal SPRE, the third switch signal RTPRE, and the fourth switch signal SAM, and output appropriate signals according to the timing sequence. The timing control logic unit 221 can supply the fourth switch signal SAM to the downsampling circuit 222.

[0109] The current integrator circuit 223 can receive the sensing voltage VSEN stored in the sensing line SEL as a sensing signal. The current integrator circuit 223 can supply the sensing signal to the downsampling circuit 222. The sensing module 220 can convert the downsampled sensing signal in the downsampling circuit 222 into digital data and generate sensing data SD.

[0110] Multiplexer 224 can supply one of the reference voltage VREF, the low-level voltage VSS, and the variable initialization voltage VRTA to the sensing line SEL. Multiplexer 224 can supply the reference voltage VREF to the sensing line SEL based on a first switching signal RPRE. Multiplexer 224 can supply the low-level voltage VSS to the sensing line SEL based on a second switching signal SPRE. Multiplexer 224 can supply the variable initialization voltage VRTA to the sensing line SEL based on a third switching signal RTPRE.

[0111] The display device 10 according to various embodiments of the present disclosure can be described as follows.

[0112] One embodiment discloses a display device comprising: a display panel having pixels, each pixel including a light-emitting element configured to emit light and connected to a data line and a sensing line; and a display driver configured to receive sensing signals from the sensing line in a first RT interval, a second RT interval, and an OFF-RS interval, the display driver comprising: a first switching element configured to be turned on in the first RT interval based on a first switching signal and electrically connecting a reference voltage line to the sensing line; a second switching element configured to be turned on in the OFF-RS interval based on a second switching signal and electrically connecting a low-potential line to the sensing line; and a third switching element configured to be turned on in the second RT interval based on a third switching signal and electrically connecting a variable initialization line to the sensing line.

[0113] In the display device according to various embodiments, the display driver may further include: an analog-to-digital converter configured to output sensing data; and a fourth switching element configured to be turned on based on a fourth switching signal and electrically connecting the analog-to-digital converter to the sensing line.

[0114] In a display device according to various embodiments, a pixel may include: a first transistor disposed between a driving voltage line and a light-emitting element and configured to supply driving current to the light-emitting element; a second transistor configured to electrically connect a data line to the gate of the first transistor based on a first scan signal; and a third transistor configured to electrically connect a sensing line to the source of the first transistor based on a second scan signal.

[0115] In a display device according to various embodiments, a first RT interval may include a first time period to a third time period in sequence, each of a first transistor and a second transistor may be turned on during the first time period and the second time period of the first RT interval, a first switching element may be turned on during the first time period of the first RT interval, and a fourth switching element may be turned on during the third time period of the first RT interval.

[0116] In a display device according to various embodiments, the source of a first transistor can receive a reference voltage supplied from a reference voltage line during a first time period in a first RT interval.

[0117] In a display device according to various embodiments, the second RT interval may include a first time period to a third time period in sequence, each of the first transistor and the second transistor may be turned on during the first time period and the second time period of the second RT interval, a third switching element may be turned on during the first time period of the second RT interval, and a fourth switching element may be turned on during the third time period of the second RT interval.

[0118] In a display device according to various embodiments, the source of a first transistor can receive a variable initialization voltage supplied from a variable initialization line during a first time period in a second RT interval.

[0119] In the display device according to various embodiments, the voltage level of the variable initialization voltage can be greater than the voltage level of the reference voltage supplied from the reference voltage line.

[0120] In a display device according to various embodiments, the OFF-RS interval may include a first time period to a fourth time period in sequence, each of the first transistor and the second transistor may be turned on during the first time period to the third time period of the OFF-RS interval, a second switching element may be turned on during the first time period of the OFF-RS interval, and a fourth switching element may be turned on during the fourth time period of the OFF-RS interval.

[0121] In the display device according to various embodiments, the display driver may further include a dummy channel that can receive a variable initialization voltage supplied from a variable initialization line in an OFF-RS interval, and the variable initialization voltage can have a first voltage level in a second RT interval and a second voltage level higher than the first voltage level in the OFF-RS interval.

[0122] In the display device according to various embodiments, the display device may further include: a power supply unit configured to supply a reference voltage to a reference voltage line and a variable initialization voltage to a variable initialization line; and a timing controller configured to determine the operation of the power supply unit by determining a second RT interval or an OFF-RS interval.

[0123] Another embodiment discloses a display device comprising: a display panel having pixels, each pixel including a light-emitting element configured to emit light and connected to a data line and a sensing line; and a display driver configured to receive sensing signals from the sensing line in a first RT interval, a second RT interval, and an OFF-RS interval, the display driver further comprising: a multiplexer configured to receive a reference voltage from a reference voltage line, a low-potential voltage from a low-potential line, and a variable initialization voltage from a variable initialization line; and a switching element configured to be turned on based on one of a first to a third switching signal, and to supply one of the reference voltage, the low-potential voltage, and the variable initialization voltage to the sensing line.

[0124] In the display device according to various embodiments, the display driver may further include: an analog-to-digital converter configured to output sensing data; and a fourth switching element configured to be turned on based on a fourth switching signal and electrically connecting the analog-to-digital converter to the sensing line.

[0125] In a display device according to various embodiments, a pixel may include: a first transistor disposed between a driving voltage line and a light-emitting element and configured to supply driving current to the light-emitting element; a second transistor configured to electrically connect a data line to the gate of the first transistor based on a first scan signal; and a third transistor configured to electrically connect a sensing line to the source of the first transistor based on a second scan signal.

[0126] In a display device according to various embodiments, a first RT interval may include a first time period, a second time period, and a third time period, each of a first transistor and a second transistor may be turned on during the first and second time periods of the first RT interval, a switching element may be turned on during the first time period of the first RT interval based on a first switching signal and supply a reference voltage to a sensing line, and a fourth switching element may be turned on during the third time period of the first RT interval.

[0127] In a display device according to various embodiments, the second RT interval includes a first time period, a second time period, and a third time period that occur sequentially. Each of the first transistor and the second transistor can be turned on during the first and second time periods of the second RT interval. A switching element can be turned on during the first time period of the second RT interval based on a third switching signal and supply a variable initial voltage to the sensing line. A fourth switching element can be turned on during the third time period of the second RT interval.

[0128] In the display device according to various embodiments, the voltage level of the variable initialization voltage can be greater than the voltage level of the reference voltage.

[0129] In a display device according to various embodiments, the OFF-RS interval may include a first time period, a second time period, a third time period, and a fourth time period, each of the first transistor and the second transistor may be turned on during the first to third time periods of the OFF-RS interval, a switching element may be turned on during the first time period of the OFF-RS interval based on a second switching signal and supply a low potential voltage to the sensing line, and a fourth switching element may be turned on during the fourth time period of the OFF-RS interval.

[0130] In the display device according to various embodiments, the display driver may further include a dummy channel that can receive a variable initialization voltage supplied from a variable initialization line in an OFF-RS interval, and the variable initialization voltage can have a first voltage level in a second RT interval and a second voltage level higher than the first voltage level in the OFF-RS interval.

[0131] In the display device according to various embodiments, the display device may further include: a power supply unit configured to supply a reference voltage to a reference voltage line and a variable initialization voltage to a variable initialization line; and a timing controller configured to determine the operation of the power supply unit by determining a second RT interval or an OFF-RS interval.

[0132] Embodiments of this disclosure have been described with reference to the accompanying drawings. Those skilled in the art will recognize that this disclosure may be presented in other specific forms without departing from the spirit or essential characteristics of this disclosure. The described embodiments are to be considered illustrative in all respects only and not restrictive. Therefore, the scope of this disclosure is indicated by the appended claims rather than the foregoing description. All variations within the equivalent meaning and scope of the claims are included within the scope of this disclosure.

Claims

1. A display device, comprising: The display panel has pixels, each pixel including a light-emitting element configured to emit light and connected to a data line and a sensing line; as well as The display driver is configured to receive sensing signals from the sensing line in a first real-time sensing interval, namely a first RT interval, a second RT interval, and an off-state real-time sensing interval, namely an OFF-RS interval. The display driver includes: A first switching element is configured to be turned on based on a first switching signal in the first RT interval and to electrically connect a reference voltage line to the sensing line; A second switching element, configured to be turned on in the OFF-RS interval based on a second switching signal, and electrically connecting a low-potential line to the sensing line; and A third switching element is configured to be turned on in the second RT interval based on a third switching signal and to electrically connect a variable initialization line to the sensing line.

2. The display device according to claim 1, wherein, The display driver also includes: Analog-to-digital converter, the analog-to-digital converter being configured to output sensed data; and A fourth switching element is configured to be turned on based on a fourth switching signal and to electrically connect the analog-to-digital converter to the sensing line.

3. The display device according to claim 2, wherein, The pixels include: A first transistor is disposed between the driving voltage line and the light-emitting element and is configured to supply driving current to the light-emitting element; A second transistor, configured to electrically connect the data line to the gate of the first transistor based on a first scan signal; and A third transistor is configured to electrically connect the sensing line to the source of the first transistor based on a second scan signal.

4. The display device according to claim 3, wherein, The first RT interval includes a first time period, a second time period, and a third time period performed sequentially, and In this configuration, each of the first transistor and the second transistor is turned on during the first time period and the second time period of the first RT interval, the first switching element is turned on during the first time period of the first RT interval, and the fourth switching element is turned on during the third time period of the first RT interval.

5. The display device according to claim 4, wherein, The source of the first transistor receives a reference voltage supplied from the reference voltage line during the first time period of the first RT interval.

6. The display device according to claim 3, wherein, The second RT interval includes a first time period, a second time period, and a third time period performed sequentially, and In this configuration, each of the first transistor and the second transistor is turned on during the first and second time periods of the second RT interval, the third switching element is turned on during the first time period of the second RT interval, and the fourth switching element is turned on during the third time period of the second RT interval.

7. The display device according to claim 6, wherein, The source of the first transistor receives a variable initialization voltage supplied from the variable initialization line during the first time period of the second RT interval.

8. The display device according to claim 7, wherein, The voltage level of the variable initialization voltage is greater than the voltage level of the reference voltage supplied from the reference voltage line.

9. The display device according to claim 7, wherein, The OFF-RS interval includes a first time period, a second time period, a third time period, and a fourth time period, performed sequentially. In this configuration, each of the first transistor and the second transistor is turned on during the first to the third time period of the OFF-RS interval, the second switching element is turned on during the first time period of the OFF-RS interval, and the fourth switching element is turned on during the fourth time period of the OFF-RS interval.

10. The display device according to claim 9, wherein, The display driver also includes a dummy channel. The dummy channel receives a variable initialization voltage supplied from the variable initialization line in the OFF-RS interval, and The variable initialization voltage has a first voltage level in the second RT interval and a second voltage level higher than the first voltage level in the OFF-RS interval.

11. The display device according to claim 1, further comprising: A power supply unit configured to supply a reference voltage to the reference voltage line and a variable initialization voltage to the variable initialization line; as well as A timing controller configured to determine the operation of the power supply unit by determining the second RT interval or the OFF-RS interval.

12. A display device, comprising: The display panel has pixels, each pixel including a light-emitting element configured to emit light and connected to a data line and a sensing line; as well as The display driver is configured to receive sensing signals from the sensing line in a first real-time sensing interval, namely a first RT interval, a second RT interval, and an off-state real-time sensing interval, namely an OFF-RS interval. The display driver includes: A multiplexer configured to receive a reference voltage from a reference voltage line, a low-potential voltage from a low-potential line, and a variable initialization voltage from a variable initialization line; and A switching element configured to be turned on based on one of a first switching signal, a second switching signal, and a third switching signal, and to supply one of the reference voltage, the low potential voltage, and the variable initialization voltage to the sensing line.

13. The display device according to claim 12, wherein, The display driver also includes: Analog-to-digital converter, the analog-to-digital converter being configured to output sensed data; and A fourth switching element is configured to be turned on based on a fourth switching signal and to electrically connect the analog-to-digital converter to the sensing line.

14. The display device according to claim 13, wherein, The pixels include: A first transistor is disposed between the driving voltage line and the light-emitting element and is configured to supply driving current to the light-emitting element; A second transistor, configured to electrically connect the data line to the gate of the first transistor based on a first scan signal; and A third transistor is configured to electrically connect the sensing line to the source of the first transistor based on a second scan signal.

15. The display device according to claim 14, wherein, The first RT interval includes a first time period, a second time period, and a third time period performed sequentially, and In this configuration, each of the first transistor and the second transistor is turned on during the first and second time periods of the first RT interval, the switching element is turned on during the first time period of the first RT interval based on the first switching signal and supplies the reference voltage to the sensing line, and the fourth switching element is turned on during the third time period of the first RT interval.

16. The display device according to claim 14, wherein, The second RT interval includes a first time period, a second time period, and a third time period performed sequentially, and In this configuration, each of the first transistor and the second transistor is turned on during the first and second time periods of the second RT interval, the switching element is turned on during the first time period of the second RT interval based on the third switching signal and supplies the variable initialization voltage to the sensing line, and the fourth switching element is turned on during the third time period of the second RT interval.

17. The display device according to claim 16, wherein, The voltage level of the variable initialization voltage is greater than the voltage level of the reference voltage.

18. The display device according to claim 16, wherein, The OFF-RS interval includes a first time period, a second time period, a third time period, and a fourth time period, performed sequentially. In this configuration, each of the first transistor and the second transistor is turned on during the first to the third time period of the OFF-RS interval, the switching element is turned on during the first time period of the OFF-RS interval based on the second switching signal and supplies the low potential voltage to the sensing line, and the fourth switching element is turned on during the fourth time period of the OFF-RS interval.

19. The display device according to claim 18, wherein, The display driver also includes a dummy channel. The dummy channel receives the variable initialization voltage supplied from the variable initialization line in the OFF-RS interval, and The variable initialization voltage has a first voltage level in the second RT interval and a second voltage level higher than the first voltage level in the OFF-RS interval.

20. The display device according to claim 12, further comprising: A power supply unit configured to supply the reference voltage to the reference voltage line and the variable initialization voltage to the variable initialization line; as well as A timing controller configured to determine the operation of the power supply unit by determining the second RT interval or the OFF-RS interval.

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