IGBT hardware level overcurrent protection circuit based on DSP hardware TZ port

Abstract

The application discloses an IGBT hardware level overcurrent protection circuit based on a DSP hardware TZ port, which is characterized in that a current sampling position is connected in series between a bus capacitor negative electrode and an inverter unit negative electrode input end, a common mode voltage on the operational amplifier side at both ends of a sampling resistor is almost zero, physical and electrical isolation between bus high voltage sampling and low voltage control is realized, an open drain signal output by a light coupling secondary side is directly connected to a TZ fault pin of the DSP, a delay of a traditional software interruption is skipped, PWM fast blocking is realized, and redundancy and complementarity are formed with original output side overcurrent protection of most products. The application can be used alone to protect an IGBT module, and can also be used together with existing Desat protection and a Hall detection circuit to form more complete and comprehensive overcurrent protection.

Description

Technical Field

[0001] This invention relates to the field of inverter protection circuit technology, and in particular to an IGBT hardware-level overcurrent protection circuit based on the DSP hardware TZ port. Background Technology

[0002] In voltage source inverters, a short-circuit protection system needs to be installed on the DC bus side of the IGBT. When a serious fault such as an internal short circuit, inter-bridge short circuit, or ground short circuit occurs in the IGBT inverter bridge, the abnormal rise in bus current is quickly detected and all IGBT drive pulses are immediately blocked to prevent the IGBT from being damaged due to short-circuit overcurrent.

[0003] In current engineering practice, two common solutions and their problems are as follows: The first approach uses "Desaturation Protection (Desat)," which detects the voltage between the collector and emitter of the IGBT to determine if an overcurrent or short circuit has occurred. However, this approach has a detection blind zone. During the initial few microseconds of IGBT turn-on, the system must perform blanking detection to prevent false triggering. However, the short-circuit withstand time of an IGBT is typically only 5-10µs, so the blanking time design needs to be very careful. Furthermore, Desat protection will not function properly in scenarios where the load gradually increases and the current gradually rises. This approach also suffers from high material costs, requiring Desat protection systems for all IGBTs, significantly increasing material costs and occupying considerable space. This approach is unacceptable for low-power, low-cost models, which is why most products still use the second approach for detection and protection.

[0004] The second approach uses Hall effect sensors to detect bus current or phase-to-phase current, and the output voltage signal is sampled by the DSP's ADC to determine overcurrent. However, this approach suffers from a long signal link and a long detection time, requiring software-assisted calculation to shut down the drive signal. This timeframe is far longer than the IGBT's short-circuit tolerance time, making it unsuitable for IGBT internal short circuits. It can only handle inter-bridge short circuits or short circuits to ground. Summary of the Invention

[0005] Purpose of the invention: The purpose of this invention is to provide an IGBT hardware-level overcurrent protection circuit based on the TZ port of DSP hardware, which solves the problems of existing frequency converters having no sampling and no protection, or requiring the use of high-cost Desat protection systems or high-delay Hall sensors for signal conditioning, resulting in high system costs, complex power supply structures, and long signal links.

[0006] Technical solution: An IGBT hardware-level overcurrent protection circuit based on the DSP hardware TZ port: The positive and negative terminals of the bus power supply are connected to the DC input of the inverter unit. The bus capacitor is connected in parallel across the DC input of the inverter unit, and the negative terminal of the bus capacitor is connected to analog ground GND1. The sampling resistor R0 is connected in series with the negative bus of the inverter unit. The bus current flows downward through the sampling resistor R0, and a differential sampling voltage is generated across the sampling resistor R0. The upper end of the sampling resistor R0 closest to the negative terminal of the inverter unit is connected to the non-inverting input of the first-stage operational amplifier through resistor R1. The lower end of the sampling resistor R0 closest to the bus capacitor is connected to the inverting input of the first-stage operational amplifier through another identical resistor R1. The non-inverting input of the first-stage operational amplifier is pulled down to analog ground GND1 through resistor R2. The inverting input of the first-stage operational amplifier is connected to the output of the first-stage operational amplifier through another identical resistor R2, thus forming a differential amplifier circuit. The output signal of the first-stage op-amp is connected to the inverting input of the second-stage op-amp via isolation resistor R3. VCC1 is connected to the inverting input of the second-stage op-amp via voltage divider resistor R4. Hysteresis resistor R5 is connected between the output and non-inverting input of the second-stage op-amp to form a hysteresis comparator. The output of the second-stage op-amp is connected in series with current-limiting resistor R6. One end of resistor R7 is connected to the midpoint between current-limiting resistor R6 and the anode of the primary side of the optocoupler, and the other end is pulled down to analog ground GND1. The anode of the primary side of the optocoupler is connected to the midpoint between the current-limiting resistor R6 and the resistor R7. The cathode of the primary side of the optocoupler is connected to the analog ground GND1. The emitter of the secondary side of the optocoupler is connected to the digital ground GND2. One of the collectors of the secondary side of the optocoupler is connected to the lower end of the pull-up resistor R8. The other output of the collector is to the TZ fault pin of the DSP. The upper end of the pull-up resistor R8 is connected to the digital power supply. One of the digital power supplies power to the pull-up resistor R8 and the other pulls up the level of the TZ fault pin inside the DSP. The DSP outputs a drive signal through the PWM drive signal line, which is directly connected to the inverter unit to realize IGBT control. The fault level output by the optocoupler is sent to the TZ fault pin of the DSP.

[0007] Furthermore, the first-stage op-amp is powered by a 15V positive power supply and reference ground GND1; in the second-stage op-amp, VCC1 is 15V.

[0008] Furthermore, the digital power supply is 3.3V.

[0009] Furthermore, the inverter uses I=200A trigger protection, and selects R0=1mΩ, R1=1kΩ, R2=15kΩ, R3=2.5kΩ, R4=10kΩ, R5=200kΩ, R6=1.2kΩ, R7=10kΩ, and R8=4.7kΩ. The first stage operational amplifier is configured as a differential amplifier with a gain set to 15 times, using a TL082IDT. Its positive power supply is connected to +15V, taken from the positive output of the IGBT lower bridge drive power supply, and its negative power supply is connected to the lower bridge drive power supply ground GND1. The second stage operational amplifier is configured as a hysteresis comparator, with VCC1 at 15V and the digital power supply at 3.3V.

[0010] Beneficial Effects: The IGBT hardware-level overcurrent protection circuit based on the DSP hardware TZ port of this invention connects the current sampling point in series between the negative terminal of the bus capacitor and the negative input terminal of the inverter unit. Utilizing the near-zero common-mode voltage across the sampling resistor relative to the operational amplifier side, physical and electrical isolation is achieved between high-voltage bus sampling and low-voltage control. The open-drain signal output from the optocoupler secondary side is directly connected to the DSP's TZ fault pin, bypassing the delay of traditional software interrupts and achieving rapid PWM blocking. This provides redundancy and complementarity with the existing output-side overcurrent protection in most products. It can be used independently to protect IGBT modules, or combined with existing Desat protection and Hall effect detection circuits to form a more complete and comprehensive overcurrent protection system. Attached Figure Description

[0011] Figure 1 This is the overall logic block diagram of the circuit of the present invention. Detailed Implementation

[0012] The present invention will be further explained below with reference to the accompanying drawings and specific embodiments.

[0013] An IGBT hardware-level overcurrent protection circuit based on the TZ port of a DSP hardware is shown in the attached figure. Figure 1 As shown.

[0014] The positive and negative terminals of the bus power supply are connected to the DC input of the inverter unit. The bus capacitor is connected in parallel across the DC input of the inverter unit, with its negative terminal connected to analog ground GND1. A sampling resistor R0 is connected in series with the negative bus of the inverter unit. The bus current flows downward through the sampling resistor R0, generating a differential sampling voltage across it. The upper end of the sampling resistor R0 closest to the negative terminal of the inverter unit is connected to the non-inverting input of the first-stage operational amplifier via resistor R1. The lower end of the sampling resistor R0 closest to the bus capacitor / analog ground GND1 is connected to the inverting input of the first-stage operational amplifier via another resistor R1. The first-stage operational amplifier is powered by a positive 15V supply and reference ground GND1. The non-inverting input of the first-stage operational amplifier is pulled down to analog ground GND1 via resistor R2, and the inverting input is connected to the output of the first-stage operational amplifier via another resistor R2, forming a differential amplifier circuit. This is the DC bus power sampling circuit.

[0015] The output signal of the first-stage operational amplifier is connected to the inverting input of the second-stage operational amplifier via isolation resistor R3. The 15V VCC1 is connected to the inverting input of the second-stage operational amplifier via voltage divider resistor R4. A hysteresis resistor R5 is connected between the output and non-inverting input of the second-stage operational amplifier, forming a hysteresis comparator. A current-limiting resistor R6 is connected in series with the output of the second-stage operational amplifier. One end of resistor R7 is connected to the midpoint between the current-limiting resistor R6 and the anode of the primary side of the optocoupler, and the other end is pulled down to analog ground GND1. This is the two-stage threshold comparator circuit.

[0016] The anode of the primary side of the optocoupler is connected to the midpoint between the current-limiting resistor R6 and resistor R7. The cathode of the primary side is connected to analog ground GND1. The emitter of the secondary side is connected to digital ground GND2. The collector of the secondary side is split into two paths: one is connected to the lower end of the pull-up resistor R8, and the other outputs to the TZ fault pin of the DSP. The upper end of the pull-up resistor R8 is connected to the digital power supply (e.g., 3.3V). One path of the digital power supply powers the pull-up resistor R8, and the other path pulls up the TZ fault pin level inside the DSP. The above is the optocoupler strong and weak current isolation circuit.

[0017] The DSP outputs a drive signal via the PWM drive signal line, which is directly connected to the inverter unit to achieve IGBT control. The fault level output by the optocoupler is sent to the TZ fault pin of the DSP. The above describes the interconnection between digital control and power drive.

[0018] The signal flow in this overcurrent protection circuit is as follows: the DC bus current generates a small differential voltage through the sampling resistor R0. Two sets of resistors R1 send the differential voltage to the first-stage operational amplifier, and resistor R2 forms negative feedback to amplify the current signal. The amplified current and voltage are sent to the second-stage operational amplifier and compared with the overcurrent threshold level obtained by voltage division of 15V through the voltage divider resistor R4. If the bus current is normal, the second-stage operational amplifier outputs a low level, the primary side of the optocoupler is not conducting, the transistor on the secondary side of the optocoupler is cut off, the TZ fault pin is pulled up to a high level of 3.3V, and the DSP outputs the PWM drive signal normally. If the bus current is overcurrent, the second-stage operational amplifier outputs a high level, the primary side of the optocoupler conducts, and then drives the transistor on the secondary side of the optocoupler to conduct. The TZ fault pin is pulled up to a low level of analog ground GND2, and the DSP hardware blocks the PWM drive to protect the inverter unit.

[0019] This overcurrent protection circuit has the following characteristics: 1. The sampling resistor R0 is innovatively connected in series between the negative terminal of the bus capacitor and the negative input terminal of the inverter unit, instead of being placed in the positive circuit. Since the negative terminal of the inverter unit is also the common terminal of the emitter of the IGBT lower bridge and the reference ground of the lower bridge drive power supply, the common-mode voltage across the sampling resistor R0 to the op-amp side (drive ground) is almost zero.

[0020] 2. By using the IGBT lower bridge drive power supply (15V / GND1) operational amplifier in conjunction with a high-speed optocoupler, physical and electrical isolation is achieved between high-voltage sampling (bus) and low-voltage control (3.3V DSP).

[0021] 3. By directly connecting the open-drain signal output from the secondary side of the optocoupler to the TZ fault pin of the DSP, the delay of traditional software interrupt is bypassed, realizing "pure hardware pass-through" PWM fast blocking, and enabling microsecond-level TZ hardware linkage.

[0022] 4. The design of using the operational amplifier as a hysteresis comparator and combining it with the sampling resistor R0 for current shunting prevents high-frequency false triggering under critical conditions.

[0023] 5. The entire signal link of the circuit can be simplified as follows: sampling resistor → differential op-amp → comparator op-amp → optocoupler → TZ fault pin of DSP.

[0024] Example 1

[0025] Taking the protection triggering at I=200A in the frequency converter as an example, the following explanation is provided. Figure 1 The circuit shown is an IGBT hardware-level overcurrent protection circuit based on the TZ port of the DSP hardware.

[0026] 1. The selected resistors are R0=1mΩ, R1=1kΩ, R2=15kΩ, R3=2.5kΩ, R4=10kΩ, R5=200kΩ, R6=1.2kΩ, R7=10kΩ, and R8=4.7kΩ. 2. Sampling resistor The sampling resistor R0 (which can be several high-power small resistors connected in parallel, with an equivalent resistance of R0) adopts a four-wire Kelvin connection: the current flows through the two large pads through a large area of ​​copper foil, and the voltage sampling signal is led out from the inside of the resistor body through the two small pads to eliminate the influence of solder joint contact resistance and copper foil resistance on measurement accuracy.

[0027] The sampling resistor R0 is connected in series between the negative terminal of the bus capacitor (GND1) and the negative input terminal of the inverter unit.

[0028] When the bus current is I0 and the sampling resistor is R0, the voltage across the sampling resistor is U0 = I0 × R0.

[0029] 3. Differential Operational Amplifier System The first-stage operational amplifier is the TL082IDT, a dual-channel general-purpose operational amplifier with single / dual power supply and rail-to-rail output, offering excellent compatibility and cost-effectiveness. Its positive power supply terminal is connected to +15V, taken from the positive output of the IGBT lower bridge drive power supply; the negative power supply terminal is connected to the lower bridge drive power supply ground GND1.

[0030] The first-stage operational amplifier is configured as a differential amplifier, and all external resistors are 0805 packaged metal film chip resistors with 1% accuracy and 100ppm / °C temperature drift.

[0031] The differential amplifier gain is set to 15, A = R2 / R1 = 15, and the op-amp output voltage U OUT1 =A×U0=A×I0×R0.

[0032] 4. Comparator Op-Amplifier System The second-stage operational amplifier is used as a hysteresis comparator, with the negative input voltage U. REF =15V×R3 / (R3+R4)=3V.

[0033] Therefore, theoretically, when UOUT1 ≥U REF At that time, the op-amp output voltage is 13V, when U OUT1 <U REF At that time, the op-amp output voltage was 1.5V. After adding the hysteresis resistor R5, , , In fact, when the output voltage of the second-stage op-amp , U can be reduced by slightly decreasing the value of the isolation resistor R3. H Reduce to 3V, the corresponding current I under the current parameters 0H =U H / (A×R0) =206.6A、I 0L =U L / (A×R0) =199A.

[0034] 5. Optocoupler and TZ protection system The typical operating voltage U of an optocoupler OP =1.35V, the current flowing through resistor R7 in the on state is I7=U OP / R7=0.135mA.

[0035] Normal operation: When the bus current fluctuates within the rated range, i.e., I0 < 206.6A, the output voltage U of the second-stage operational amplifier is... OUT2 The voltage is 1.5V. If the circuit is turned on in this state, the current flowing through the current-limiting resistor R6 is I6 = (U... OUT2 -U OP ) / R6=0.125mA; Since I6<I7, the voltage on the optocoupler actually does not reach 1.35V, and the current is all diverted by resistor R7. Therefore, the optocoupler is not conducting at all, and the output is determined by the pull-up resistor R8 to be 3.3V.

[0036] Overcurrent fault: When an output phase-to-phase short circuit or a short circuit to ground occurs, the bus current rises sharply. When I0 ≥ 206.6A, the output voltage U of the second-stage operational amplifier increases. OUT2 The voltage is 13V, and the current flowing through the current-limiting resistor R6 is I6 = (U OUT2 -U OP R6 = 9.583mA. This current can turn on the optocoupler and pull the optocoupler output to ground. At this time, the TZ fault pin is pulled down.

[0037] When the TZ fault pin of the DSP detects a falling edge, a hardware interrupt is immediately triggered. The DSP forces the 6-channel PWM output to a high-impedance state, the IGBT drive signal disappears, preventing the IGBT from continuing to run. At the same time, the DSP program sets the fault flag bit and stores the operating parameters at the time of the fault for subsequent analysis.

[0038] 5. Protection response time estimation: (1) First stage op-amp amplification time: The gain-bandwidth product (GBW) of TL082 is 3MHz, and its typical settling time T1 is about 0.5μs; (2) Second stage op-amp signal switching time: The slew rate of the op-amp is 13V / μs. Since the second stage op-amp is used as a hysteresis comparator, when the hardware is triggered, the output needs to rise from the normal 1.5V to the 13V that switches to the fault alarm, which takes time T2 = (13~1.5) / 13 = 0.88μs. Considering the settling time of the internal differential stage of the op-amp and the slight overdrive delay caused by positive feedback (hysteresis), it usually needs to be added by about T3 = 0.5µs~1µs; (3) Optocoupler transmission time: The current flowing through the optocoupler is 9.5mA, and the transmission time under this current is T4 = 0.8μs; (4) DSP hardware interrupt response delay: T5 = 0.1 μs; (5) The total delay T = T1 + T2 + T3 + T4 is approximately 3.3 μs, which is much lower than the short-circuit withstand time of the IGBT module (usually 10 μs), ensuring timely and reliable protection.

[0039] As can be seen, the IGBT hardware-level overcurrent protection circuit based on the DSP hardware TZ port of the present invention has the following advantages: 1. Extremely simple power supply architecture. The op-amp power supply directly reuses the existing lower bridge drive power supply, without adding any additional power supply circuits and without changing the existing power supply architecture of the system.

[0040] 2. Rapid protection response. The bandwidth of ordinary operational amplifiers is much higher than that of traditional Hall sensors, and there are fewer signal link links. The total delay from the fault current exceeding the threshold to the DSP starting to execute the blocking command can be controlled at the microsecond level.

[0041] 3. Flexible and precise threshold setting. The protection threshold can be flexibly set by changing the resistor voltage division ratio or the op-amp gain resistor. When adapting to different power levels, only the resistance value needs to be adjusted.

[0042] 4. Strong resistance to false triggering. It adopts a dual operational amplifier circuit. The first-stage operational amplifier amplifies the sampling voltage and performs hysteresis comparison, outputting only high and low signals to ensure that the optocoupler is only in two states: non-conducting and fully conducting.

[0043] 5. Reliable high and low voltage isolation. The optocoupler provides electrical isolation between the operational amplifier side (drive ground) and the controller side (control ground), meeting the high and low voltage safety isolation requirements.

[0044] 6. Improved inverter protection strategy architecture. This invention constructs a hardware fast protection channel on the DC bus side of the inverter, independent of the output side current protection, forming redundancy and complementarity with the original output side overcurrent protection of most products. It can not only be used independently to protect IGBT modules, but also work with existing Desat protection and Hall effect detection circuits to form a more complete and comprehensive overcurrent protection.

Claims

1. An IGBT hardware-level overcurrent protection circuit based on the TZ port of a DSP hardware, characterized in that: The positive and negative terminals of the bus power supply are connected to the DC input of the inverter unit. The bus capacitor is connected in parallel across the DC input of the inverter unit, and the negative terminal of the bus capacitor is connected to analog ground GND1. The sampling resistor R0 is connected in series with the negative bus of the inverter unit. The bus current flows downward through the sampling resistor R0, and a differential sampling voltage is generated across the sampling resistor R0. The upper end of the sampling resistor R0 closest to the negative terminal of the inverter unit is connected to the non-inverting input of the first-stage operational amplifier through resistor R1. The lower end of the sampling resistor R0 closest to the bus capacitor is connected to the inverting input of the first-stage operational amplifier through another identical resistor R1. The non-inverting input of the first-stage operational amplifier is pulled down to analog ground GND1 through resistor R2. The inverting input of the first-stage operational amplifier is connected to the output of the first-stage operational amplifier through another identical resistor R2, thus forming a differential amplifier circuit. The output signal of the first-stage op-amp is connected to the inverting input of the second-stage op-amp via isolation resistor R3. VCC1 is connected to the inverting input of the second-stage op-amp via voltage divider resistor R4. Hysteresis resistor R5 is connected between the output and non-inverting input of the second-stage op-amp to form a hysteresis comparator. The output of the second-stage op-amp is connected in series with current-limiting resistor R6. One end of resistor R7 is connected to the midpoint between current-limiting resistor R6 and the anode of the primary side of the optocoupler, and the other end is pulled down to analog ground GND1. The anode of the primary side of the optocoupler is connected to the midpoint between the current-limiting resistor R6 and the resistor R7. The cathode of the primary side of the optocoupler is connected to the analog ground GND1. The emitter of the secondary side of the optocoupler is connected to the digital ground GND2. One of the collectors of the secondary side of the optocoupler is connected to the lower end of the pull-up resistor R8. The other output of the collector is to the TZ fault pin of the DSP. The upper end of the pull-up resistor R8 is connected to the digital power supply. One of the digital power supplies power to the pull-up resistor R8 and the other pulls up the level of the TZ fault pin inside the DSP. The DSP outputs a drive signal through the PWM drive signal line, which is directly connected to the inverter unit to realize IGBT control. The fault level output by the optocoupler is sent to the TZ fault pin of the DSP.

2. The IGBT hardware-level overcurrent protection circuit based on the DSP hardware TZ port according to claim 1, characterized in that: The first stage op-amp is powered by a 15V positive power supply and reference ground GND1; in the second stage op-amp, VCC1 is 15V.

3. The IGBT hardware-level overcurrent protection circuit based on the DSP hardware TZ port according to claim 1, characterized in that: The digital power supply is 3.3V.

4. The IGBT hardware-level overcurrent protection circuit based on the DSP hardware TZ port according to claim 1, characterized in that: In the frequency converter, protection is triggered by I=200A. The following components are selected: R0=1mΩ, R1=1kΩ, R2=15kΩ, R3=2.5kΩ, R4=10kΩ, R5=200kΩ, R6=1.2kΩ, R7=10kΩ, and R8=4.7kΩ. The first-stage operational amplifier is configured as a differential amplifier with a gain of 15 times. A TL082IDT is selected, with its positive power supply connected to +15V, taken from the positive output of the IGBT lower bridge drive power supply. Its negative power supply terminal is connected to the lower bridge drive power supply ground GND1. The second-stage operational amplifier is configured as a hysteresis comparator, with VCC1 at 15V and the digital power supply at 3.3V.

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