A unified power quality control method, device, equipment and readable storage medium
Patent Information
- Application Number
- CN202611352114.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-09-02
- Publication Date
- 2026-09-29
AI Technical Summary
但现有治理技术仍存在明显局限:传统电能质量治理采用碎片化分立方案,针对不同问题分别配置 STATCOM、有源电力滤波器(APF)、不平衡补偿装置等多套设备,各设备独立采样、独立控制,不仅设备数量多、综合成本高、运维难度大,且各设备的补偿输出易产生潮流交互干扰,不同治理目标间存在指令冲突,反而可能恶化局部电能质量;同时,现有治理装置的控制核心普遍采用 DSP 或 FPGA 等专用芯片,其编程环境封闭、通信接口适配性有限,难以与工业现场已有的 PLC 自动化系统、SCADA 能源管理系统实现数据共享与联动控制,治理装置形成信息孤岛,无法实现从设备级补偿到系统级协同治理的升级
[0017]本发明的有益效果是:仅需单套功率变换装置即可同步治理无功、谐波、三相不平衡、电压闪变多类电能质量问题,替代传统多台分立设备的拼凑方案,大幅减少设备数量与硬件冗余,降低系统建设成本与运维复杂度。通过动态权重分配与多目标优化指令合成,有效解决传统分立治理模式下各设备补偿指令相互干扰、多治理目标彼此冲突的问题,实现补偿容量的动态按需分配,提升电能质量综合治理效果与装置运行稳定性,避免过流、过调制等运行风险。全流程控制逻辑可在通用工业控制平台上落地实现,打破传统专用控制芯片的封闭性限制,便于与工业现场既有自动化系统、能源管理系统实现数据互通与联动控制,消除治理装置的信息孤岛,支撑从设备级补偿到系统级协同的升级。采用选择性打包的指令传输机制,剔除无治理价值的微小分量以压缩通信数据量,在保证补偿效果的前提下提升指令传输与处理效率,保障系统的动态响应速度。
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Abstract
Description
Technical Field
[0001] This invention relates to a unified power quality control method, apparatus, equipment, and readable storage medium, belonging to the field of power control technology. Background Technology
[0002] Static Synchronous Compensators (STATCOMs) are currently the core equipment for power quality management, boasting advantages such as fast response speed, wide reactive power regulation range, and stable output characteristics. However, existing management technologies still have significant limitations: traditional power quality management adopts a fragmented and discrete approach, configuring multiple sets of equipment such as STATCOMs, Active Power Filters (APFs), and imbalance compensation devices for different problems. Each device samples and controls independently, resulting in a large number of devices, high overall costs, and difficult operation and maintenance. Furthermore, the compensation outputs of each device are prone to power flow interference, and command conflicts exist between different management objectives, which may worsen local power quality. At the same time, the control core of existing management devices generally uses dedicated chips such as DSPs or FPGAs, whose programming environment is closed and communication interface compatibility is limited. This makes it difficult to achieve data sharing and linkage control with existing PLC automation systems and SCADA energy management systems in industrial sites, creating information silos and preventing the upgrade from device-level compensation to system-level collaborative management.
[0003] In summary, existing multi-objective governance of power quality adopts a fragmented architecture with discrete equipment and dedicated closed controllers. This makes it impossible to achieve collaborative optimization of multiple governance objectives and deep integration with industrial automation systems under a general industrial control platform, resulting in redundant governance equipment, conflicting control objectives, and low system integration. Summary of the Invention
[0004] This invention addresses the shortcomings of existing technologies by providing a unified power quality control method, apparatus, device, and readable storage medium, aiming to solve the above-mentioned problems.
[0005] The technical solution of this invention to solve the above-mentioned technical problems is as follows: A unified power quality control method, comprising the following steps: Read the data and perform a fast Fourier transform analysis, then calculate the power quality index based on the analysis results; Dynamic weights are assigned based on power quality indicators, and the optimal compensation current command is synthesized based on the dynamic weights. The compensation current command is selectively packaged and sent to the controller, and the composite compensation current is injected into the power grid under the control of the controller.
[0006] In a preferred embodiment of the present invention, the steps of reading data and performing fast Fourier transform analysis include: The original waveform data block is read through the high-speed bus, and the Fast Fourier Transform instruction in the mathematical function library is called to perform a 512-point radix-2 Fast Fourier Transform on the three-phase voltage and current respectively, so as to obtain the voltage or current spectrum of each phase.
[0007] In a preferred embodiment of the present invention, the step of calculating power quality indicators based on analysis results includes: Based on the analysis results, the following indicators were calculated sequentially: RMS values of each harmonic: k = 1~50 Let be the real part of the k-th harmonic voltage. Let k be the imaginary part of the voltage of the kth harmonic, where k is the harmonic order. Total Harmonic Distortion (THD): U is voltage. The effective value of the kth harmonic voltage. This represents the effective value of the fundamental frequency (50Hz power frequency) voltage. Fundamental power factor: ,in This represents the phase difference between the fundamental voltage and the current. Three-phase unbalance: Using the symmetrical component method, positive-sequence, negative-sequence, and zero-sequence components are extracted from the three-phase fundamental voltage or current to calculate the negative-sequence unbalance. and zero-order imbalance , This represents the effective value of the fundamental negative sequence voltage. This represents the effective value of the fundamental zero-sequence voltage. Flicker intensity factor: The moving variance of the effective voltage value calculated every 10 power frequency cycles. The root mean square value is taken as the flicker intensity factor F; N is the total number of samples involved in the moving variance calculation. Let be the effective voltage value at the i-th moment within the sliding window. is the average value of the effective voltage within the sliding window, and n is the upper limit of the sample index within the sliding window.
[0008] In a preferred embodiment of the present invention, the step of allocating dynamic weights based on power quality indicators includes: If THD > 8.0%, then the harmonic weighting reactive power weight unbalanced weights Flash weights
[0009] If 5.0% < THD ≤ 8.0%, then , , ,
[0010] If THD ≤ 5.0%, then , , , ; The weighting coefficients for reactive power compensation targets. The weighting coefficients for the harmonic suppression target. The weighting coefficients for the three-phase imbalance control objectives. The weighting coefficients for flicker suppression targets.
[0011] In a preferred embodiment of the present invention, the step of synthesizing the optimal compensation current command based on dynamic weights includes: Based on the determined weights, a weighted multi-objective optimization model is constructed and solved. The calculation steps are as follows: Q represents the current actual reactive power of the power grid. The amplitude of the fundamental frequency reactive power compensation command. Here, e represents the reference target value for total harmonic distortion control, and e represents the current actual three-phase imbalance. is the reference target value for three-phase imbalance control, and F is the current actual flicker intensity factor; The reference target value for flicker intensity factor control; The solution yields a set of reference values for each frequency component of the optimal compensation current: ; I1,ref is the instantaneous reference value of the overall optimal compensation current, and I1,ref is the amplitude of the fundamental reactive power compensation current. ϕ1 is the fundamental angular frequency of the power grid, and ϕ1 is the phase of the fundamental compensation current. Let the amplitude of the k-th harmonic compensation current be . This represents the phase corresponding to the k-th harmonic compensation current. This represents the amplitude of the negative sequence compensation current. The phase of the negative sequence compensation current is given by k, the harmonic order is given by t, and the instantaneous time is given by t.
[0012] In a preferred embodiment of the present invention, the step of injecting composite compensation current into the power grid under the control of the controller includes: After receiving instructions from the PLC, the static synchronous compensation controller uses a proportional resonant controller to set resonant points at the fundamental frequency and each harmonic frequency. Based on grid voltage feedforward, a carrier phase-shifted sinusoidal pulse width modulation is used to generate an insulated gate bipolar transistor drive signal, which is then filtered and injected into the grid with a composite compensation current.
[0013] In a preferred embodiment of the present invention, after the step of injecting composite compensation current into the power grid under the control of the controller, the method further includes: The PLC monitors the grid current after actual compensation by a static synchronous compensator across multiple power frequency cycles and calculates the compensation residual ΔI. The calculation steps are as follows: This represents the actual current measured on the grid side after compensation by the static synchronizing compensator. To compensate for the load current of the load itself before it is put into operation, This is the compensation current output by the static synchronous compensator; If the residual exceeds 2% of the rated current, the PLC will add a correction term in the next calculation cycle.
[0014] A unified power quality control device, comprising: The calculation module is used to read data and perform fast Fourier transform analysis, and calculate power quality indicators based on the analysis results; The current compensation module is used to allocate dynamic weights according to power quality indicators and synthesize the optimal compensation current command based on the dynamic weights. The current control module is used to selectively package compensation current commands and send them to the controller, which then injects composite compensation current into the power grid under the control of the controller.
[0015] In addition, to achieve the above objectives, the present invention also provides a unified power quality control device, the unified power quality control device including a processor, a memory, and a unified power quality control program stored in the memory and executable by the processor, wherein when the unified power quality control program is executed by the processor, it implements the steps of the unified power quality control method described above.
[0016] In addition, to achieve the above objectives, the present invention also provides a computer-readable storage medium storing a unified power quality control program, wherein when the unified power quality control program is executed by a processor, it implements the steps of the unified power quality control method as described above.
[0017] The beneficial effects of the present invention are: only one set of power conversion device is required to simultaneously govern multiple types of power quality problems including reactive power, harmonics, three-phase unbalance and voltage flicker, which replaces the traditional patchwork solution of multiple discrete devices, greatly reduces the number of devices and hardware redundancy, and lowers the system construction cost and operation and maintenance complexity. Through dynamic weight allocation and multi-objective optimization command synthesis, it effectively solves the problems of mutual interference between compensation commands of various devices and conflicts between multiple governance objectives in the traditional discrete governance mode, realizes dynamic on-demand allocation of compensation capacity, improves the comprehensive power quality governance effect and the operation stability of the device, and avoids operation risks such as overcurrent and over-modulation. The full-process control logic can be implemented on a general industrial control platform, breaks the closed limitation of traditional special-purpose control chips, facilitates data interconnection and linkage control with the existing automation system and energy management system at industrial sites, eliminates information islands of governance devices, and supports the upgrade from device-level compensation to system-level coordination. A selectively packaged command transmission mechanism is adopted to eliminate tiny components with no governance value to compress the communication data volume, which improves the command transmission and processing efficiency on the premise of ensuring the compensation effect, and guarantees the dynamic response speed of the system. Description of Drawings
[0018] Figure 1 is a schematic diagram of the hardware structure of the unified power quality control device involved in the present invention; Figure 2 is a schematic flow chart of the unified power quality control method involved in the present invention.
[0019] The implementation, functional features and advantages of the objectives of the present invention will be further described with reference to the embodiments and the accompanying drawings. Detailed Description of Embodiments
[0020] It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0021] The unified power quality control method according to the embodiments of the present invention is mainly applied to a unified power quality control device, and the unified power quality control device may be a device with display and processing functions such as a PC, a portable computer, or a mobile terminal.
[0022] Explanation of terms in the present invention: PLC: Programmable Logic Controller; CT: Current Transformer; PT: Potential Transformer; STATCOM: Static Synchronous Compensator; FFT: Fast Fourier Transform; EtherCAT: Industrial Ethernet; IGBT: Insulated Gate Bipolar Transistor; ADC: Analog-to-Digital Converter; SPI: Serial Peripheral Interface; DMA: Direct Memory Access; FPGA: Field Programmable Gate Array; THD: Total Harmonic Distortion; PR: Proportional Resonance; SPWM: Sinusoidal Pulse Width Modulation; CRC16: 16-bit Cyclic Redundancy Check; CPU: Central Processing Unit.
[0023] Reference Figure 1 , Figure 1 This is a schematic diagram of the hardware structure of the unified power quality control device involved in the embodiment of the present invention. In this embodiment, the unified power quality control device may include a processor 1001 (e.g., CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is used to realize communication between these components; the user interface 1003 may include a display screen or an input unit such as a keyboard; the network interface 1004 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface); the memory 1005 may be a high-speed RAM memory or a stable non-volatile memory, such as a disk storage device, and the memory 1005 may optionally be a storage device independent of the aforementioned processor 1001.
[0024] Those skilled in the art will understand that Figure 1 The hardware structure shown does not constitute a limitation on a unified power quality control device and may include more or fewer components than shown, or combine certain components, or have different component arrangements. See also... Figure 1 , Figure 1 The memory 1005, which is a computer-readable storage medium, may include an operating system, a network communication module, and a unified power quality control program.
[0025] exist Figure 1 In this embodiment, the network communication module is mainly used to connect to the server and communicate with the server for data; while the processor 1001 can call the unified power quality control program stored in the memory 1005 and execute the unified power quality control method provided in this embodiment of the invention.
[0026] Reference Figure 2 This invention provides a unified power quality control method, comprising the following steps: After powering on, the PLC reads local configuration parameters: grid rated voltage (e.g., 10kV / 380V), rated frequency (50Hz), CT / PT ratio, STATCOM rated capacity (e.g., ±2Mvar), and LCL filter parameters. The FFT analysis points are set to 512 (corresponding to a 51.2ms data window at a 10kHz sampling rate, frequency resolution of 19.5Hz, capable of resolving 2nd to 50th harmonics). Initial weights for compensation priorities are set (default: reactive power 30%, harmonics 30%, imbalance 25%, flicker 15%), which can be modified remotely via a host computer. The harmonic command sending threshold is set to 0.5% of the rated current. S10. Read the data and perform fast Fourier transform analysis, and calculate the power quality index based on the analysis results; In this embodiment, the original waveform data block is read through the high-speed bus, and the Fast Fourier Transform instruction in the mathematical function library is called to perform a 512-point radix-2 Fast Fourier Transform on the three-phase voltage and current respectively, so as to obtain the voltage or current spectrum of each phase.
[0027] The ADC sampling is triggered by the STATCOM's IGBT switching synchronization pulse (10kHz) to ensure strict synchronization between the sampling time and the power switching frequency. Each sampling cycle (0.1ms) acquires data from 6 channels (A / B / C three-phase voltage and A / B / C three-phase current), which is then sent to the FPGA preprocessing module via SPI / DMA. The FPGA buffers the raw data, triggering an interrupt to notify the PLC to read the data after buffering 512 sampling points (i.e., a 51.2ms data block). The sampling synchronization error requirement is <5μs. The PLC responds to the FPGA interrupt every 51.2ms (approximately 20 times / second), reading the 512-point × 6-channel raw waveform data block via the high-speed bus. The PLC calls the FFT instruction from the mathematical function library (such as Mitsubishi S.FFT or Siemens FFT library) to perform a 512-point radix-2 Fast Fourier Transform on the three-phase voltage and current, respectively, to obtain the voltage / current spectrum (amplitude + phase) of each phase. The FFT calculation should be completed within 1ms, and the total calculation time is much less than the 51.2ms data refresh cycle.
[0028] The steps for calculating power quality indicators based on the analysis results include: Based on the analysis results, the following indicators were calculated sequentially: RMS values of each harmonic: k = 1~50 Let be the real part of the k-th harmonic voltage. Let k be the imaginary part of the voltage of the kth harmonic, where k is the harmonic order. Total Harmonic Distortion (THD): U is voltage. The effective value of the kth harmonic voltage. This represents the effective value of the fundamental frequency (50Hz power frequency) voltage. Fundamental power factor: ,in This represents the phase difference between the fundamental voltage and the current. Three-phase unbalance: Using the symmetrical component method, positive-sequence, negative-sequence, and zero-sequence components are extracted from the three-phase fundamental voltage or current to calculate the negative-sequence unbalance. and zero-order imbalance , This represents the effective value of the fundamental negative sequence voltage. This represents the effective value of the fundamental zero-sequence voltage. Flicker intensity factor: The moving variance of the effective voltage value calculated every 10 power frequency cycles. The root mean square value is taken as the flicker intensity factor F; N is the total number of samples involved in the moving variance calculation. Let be the effective voltage value at the i-th moment within the sliding window. is the average value of the effective voltage within the sliding window, and n is the upper limit of the sample index within the sliding window.
[0029] S20. Assign dynamic weights according to power quality indicators, and synthesize the optimal compensation current command based on the dynamic weights. In this embodiment, the step of allocating dynamic weights based on power quality indicators includes: If THD > 8.0%, then the harmonic weighting reactive power weight unbalanced weights Flash weights
[0030] If 5.0% < THD ≤ 8.0%, then , , ,
[0031] If THD ≤ 5.0%, then , , , ; The weighting coefficients for reactive power compensation targets. The weighting coefficients for the harmonic suppression target. The weighting coefficients for the three-phase imbalance control objectives. The weighting coefficients for flicker suppression targets.
[0032] The steps for synthesizing the optimal compensation current command based on dynamic weights include: Based on the determined weights, a weighted multi-objective optimization model is constructed and solved. The calculation steps are as follows: Q represents the current actual reactive power of the power grid. The amplitude of the fundamental frequency reactive power compensation command. Here, e represents the reference target value for total harmonic distortion control, and e represents the current actual three-phase imbalance. is the reference target value for three-phase imbalance control, and F is the current actual flicker intensity factor; The reference target value for flicker intensity factor control; The solution yields a set of reference values for each frequency component of the optimal compensation current: ; I1,ref is the instantaneous reference value of the overall optimal compensation current, and I1,ref is the amplitude of the fundamental reactive power compensation current. ϕ1 is the fundamental angular frequency of the power grid, and ϕ1 is the phase of the fundamental compensation current. Let the amplitude of the k-th harmonic compensation current be . This represents the phase corresponding to the k-th harmonic compensation current. This represents the amplitude of the negative sequence compensation current. The phase of the negative sequence compensation current is given by k, the harmonic order is given by t, and the instantaneous time is given by t.
[0033] S30. Selectively package the compensation current command and send it to the controller. Under the control of the controller, inject composite compensation current into the power grid.
[0034] In this embodiment, the step of injecting composite compensation current into the power grid under the control of the controller includes: After receiving instructions from the PLC, the static synchronous compensation controller uses a proportional resonant controller to set resonant points at the fundamental frequency and each harmonic frequency. Based on grid voltage feedforward, a carrier phase-shifted sinusoidal pulse width modulation is used to generate an insulated gate bipolar transistor drive signal, which is then filtered and injected into the grid with a composite compensation current.
[0035] The PLC selectively packages the compensation instructions synthesized in step 6: only frequency components with amplitudes greater than 0.5% of the rated current are extracted (typically only the 5th to 15th major harmonics exceed the limit under industrial load), and packaged into data frames according to the communication protocol. The data frame format is: frame header (4 bytes 0xAA55 + instruction type) + version number (1 byte) + data length (2 bytes) + instructions for each frequency component (2 bytes for each component: order + amplitude offset) + CRC16 checksum (2 bytes). After packaging, the instructions are sent to the STATCOM controller via the EtherCAT high-speed bus (125μs cycle). After receiving the PLC instructions, the STATCOM controller uses a proportional resonant (PR) controller to set resonant points (bandwidth ±10Hz) at the fundamental and harmonic frequencies to achieve zero steady-state error tracking of each frequency component instruction. Based on grid voltage feedforward, carrier phase-shifted SPWM modulation (switching frequency 10kHz) is used to generate IGBT drive signals. After being filtered by an LCL filter, composite compensation current is injected into the grid, thereby achieving comprehensive management of reactive power, harmonics, imbalance and flicker.
[0036] Following the step of injecting composite compensation current into the power grid under the control of the controller, the method further includes: The PLC monitors the grid current after actual compensation by a static synchronous compensator across multiple power frequency cycles and calculates the compensation residual ΔI. The calculation steps are as follows: This represents the actual current measured on the grid side after compensation by the static synchronizing compensator. To compensate for the load current of the load itself before it is put into operation, This is the compensation current output by the static synchronous compensator; If the residual exceeds 2% of the rated current, the PLC will add a correction term in the next calculation cycle.
[0037] By performing Fast Fourier Transform analysis on grid voltage and current sampling data, the time-domain waveform signal is converted into frequency-domain spectrum data. Based on this, power quality indicators such as reactive power, harmonic distortion rate, three-phase imbalance, and flicker intensity are quantitatively calculated, accurately identifying the real-time power quality status of the grid and the severity of various problems. Based on the real-time values of various power quality indicators, the priority weights of different governance objectives are dynamically adjusted, a weighted multi-objective optimization model is constructed, and the optimal compensation current command is obtained. Under the constraint of the device's rated capacity, the compensation resource allocation of each governance objective is coordinated, the command conflicts between multiple objectives are resolved, and the overall compensation effect is optimized. The synthesized compensation current command is selectively packaged, and the effective frequency components with compensation value are screened out. This is then sent to the power conversion controller via a high-speed communication link. The controller drives the power conversion device to inject a composite compensation current containing the fundamental reactive power component, harmonic components, and sequence components into the grid, simultaneously realizing the integrated governance of multiple types of power quality problems. This method unifies the power quality detection and analysis, optimization decision-making, and command generation in the same control architecture, can be implemented using general industrial control carriers, and has good system compatibility.
[0038] This invention provides an implementation method for a complete implementation of a typical industrial load (frequency converter group + electric arc furnace).
[0039] This embodiment takes a 10kV power distribution system of a metallurgical enterprise as the application scenario. The power distribution network of this enterprise simultaneously contains a group of 6-pulse rectifier frequency converters (generating 5th, 7th, 11th and 13th harmonics) and an electric arc furnace load (causing reactive power impact, three-phase imbalance and voltage flicker). The rated capacity of the system is 2MVA and the target compensation capacity is ±2Mvar.
[0040] Step 1: System initialization and parameter configuration; The PLC (using a Mitsubishi iQ-R series R08P CPU, 1GHz clock speed, supporting floating-point operations) reads local configuration parameters after power-on. The specific parameter settings are as follows: Rated grid voltage: 10kV (line voltage) / 5.77kV (phase voltage); Rated frequency of power grid: 50Hz; CT ratio: 200A / 5A (40:1); PT ratio: 10kV / 100V (100:1); STATCOM rated capacity: ±2Mvar; STATCOM DC-side capacitors: Cdc = 4700μF × 6 groups in parallel; LCL filter parameters: L1 = 0.8mH, L2 = 0.3mH, Cf = 30μF; FFT analysis points: N = 512 points (corresponding to a 51.2ms data window at a 10kHz sampling rate, with a frequency resolution of approximately 19.5Hz, capable of resolving 2nd to 50th harmonics). Initial compensation weights: = 0.30, = 0.30, = 0.25, = 0.15; Harmonic command transmission threshold: 0.5% of rated current (i.e., 0.5% × 115.5A ≈ 0.58A); Sampling synchronization error tolerance: less than 5μs; Step 2: Synchronous high-speed sampling; The ADC sampling is triggered by the STATCOM IGBT switching synchronization pulse (10kHz) to ensure strict synchronization between the sampling time and the power switching frequency. A 16-bit successive approximation ADC (AD7606) is used in the high-speed data acquisition module, with 6 channels for synchronous sampling (3 voltage channels + 3 current channels) and a sampling rate of 10kHz per channel. The FPGA preprocessing module (Xilinx Spartan-6) buffers the raw data, triggering an interrupt every 512 sampling points (51.2ms data block) to notify the PLC to read the data via the high-speed bus. The measured sampling synchronization error is 2.3μs, meeting the requirement of less than 5μs.
[0041] Step 3: The PLC reads the data and performs FFT analysis; The PLC responds to FPGA interrupts every 51.2ms (approximately 20 times / second), reading a 512-point × 6-channel raw waveform data block via the EtherCAT high-speed bus (communication cycle 125μs). The PLC calls the FFT instruction from the mathematical function library to perform a 512-point radix-2 Fast Fourier Transform on the three-phase voltage and current, respectively, to obtain the voltage / current spectrum (amplitude + phase) of each phase. The measured FFT calculation time is 0.82ms, much smaller than the 51.2ms data refresh cycle, with a CPU utilization of approximately 4.7%.
[0042] Step 4: Real-time calculation of power quality indicators; Based on the FFT results, the PLC calculates the following indicators sequentially in floating-point operation mode: RMS values of each harmonic: k = 1~50; Total Harmonic Distortion (THD): ; Fundamental power factor: ,in This represents the phase difference between the fundamental voltage and the current. Three-phase unbalance: Using the symmetrical component method, positive-sequence, negative-sequence, and zero-sequence components are extracted from the three-phase fundamental voltage / current to calculate the negative-sequence unbalance. and zero-order imbalance ; Flicker intensity factor: The moving variance of the effective voltage value calculated every 10 power frequency cycles (0.2s). The root mean square value is taken as the flicker intensity factor F; Step 5: Dynamic weight allocation; The PLC executes a dynamic weight allocation strategy based on the real-time indicators calculated in step 4. In this embodiment, the measured THD = 9.6% (exceeding the standard), power factor PF = 0.72 (low), imbalance ε = 6.8% (exceeding the standard), and flicker factor F = 4.2% (slight). Based on the criterion of THD > 8.0%, the weight allocation is as follows: =0.50 (Harmonic weighting is the highest because THD is severely exceeded) =0.30 (Reactive power weight is the second highest) =0.15 (unbalanced weight) =0.05 (lowest flicker weight); Step 6: Synthesize the optimal compensation current command; Constructing and solving a weighted multi-objective optimization model using PLC: ; The reference values for each frequency component of the optimal compensation current are obtained by solving. Among them, the fundamental reactive power compensation command amplitude is... =128A (inductive), the main harmonic compensation commands are: 5th harmonic 34.2A, 7th harmonic 21.5A, 11th harmonic 12.8A, 13th harmonic 8.6A, negative sequence compensation command Ineg = 23.6A.
[0043] Step 7: Selective packaging and instruction issuance; The PLC selectively packages the compensation instructions synthesized in step 6: only frequency components with amplitudes greater than 0.5% of the rated current (i.e., 0.58A) are extracted. In this embodiment, there are a total of 9 excessive components (fundamental reactive power, 5th, 7th, 11th, 13th, 17th, 19th, 23rd, and 25th harmonics, and negative sequence components), and the total length of the packaged data frame is 26 bytes. The frame format is: frame header (0xAA55 + 0x01) + version number (0x01) + data length (2 bytes) + instructions for each frequency component (2 bytes per component) + CRC16 checksum (2 bytes). It is sent to the STATCOM controller via the EtherCAT high-speed bus (125μs cycle).
[0044] Step 8: STATCOM current inner loop tracking and output; After receiving commands from the PLC, the STATCOM controller uses a proportional resonant (PR) controller to set resonant points (bandwidth ±10Hz) at the fundamental frequency (50Hz) and each harmonic frequency. The controller parameters are designed using the closed-loop system root locus method: fundamental resonant gain Kr = 120, proportional gain Kp = 2.5; harmonic resonant gains decrease in increments of K{r,h} = Kr / h. Carrier phase-shifted SPWM modulation (switching frequency 10kHz, carrier phase shift angle 180° / N, where N is the number of cascaded modules) is used to generate the IGBT drive signal, which is then filtered by an LCL filter before being injected into the power grid with a composite compensation current.
[0045] Step 9: Outer loop residual correction and closed-loop feedback; The PLC monitors the grid current after actual compensation by STATCOM every 5 power frequency cycles (0.1s) and calculates the compensation residual. In this embodiment, the measured residual after the initial commissioning is ΔI = 3.8A (approximately 3.3% of the rated current of 115.5A, exceeding the 2% threshold). After the PLC adds a correction term in the second cycle, the residual drops to 1.2A (1.0%), and after the third cycle, it stabilizes within 0.6A (0.5%), forming a stable dual closed-loop architecture.
[0046] The system consists of: 1 STATCOM (±2Mvar, DSP controlled), 1 APF (200A, DSP controlled), 1 three-phase unbalanced compensation device, and 1 set of dynamic reactive power compensators (TSC).
[0047] Implementation steps: The three sets of devices sample independently (each device is equipped with its own CT / PT, and the sampling is not synchronized); STATCOM only detects the fundamental reactive power, APF only detects the harmonic current, and the unbalanced compensation device only detects the negative sequence / zero sequence components; each device calculates the compensation command independently and outputs it independently; there is no communication coordination between the devices, and the compensation commands may be superimposed or canceled out.
[0048] This invention provides a unified power quality control device, comprising: The calculation module is used to read data and perform fast Fourier transform analysis, and calculate power quality indicators based on the analysis results; The current compensation module is used to allocate dynamic weights according to power quality indicators and synthesize the optimal compensation current command based on the dynamic weights. The current control module is used to selectively package compensation current commands and send them to the controller, which then injects composite compensation current into the power grid under the control of the controller.
[0049] In addition, embodiments of the present invention also provide a computer-readable storage medium.
[0050] The present invention provides a computer-readable storage medium storing a unified power quality control program, wherein when the unified power quality control program is executed by a processor, it implements the steps of the unified power quality control method as described above.
[0051] The method implemented when the unified power quality control program is executed can be referred to in various embodiments of the unified power quality control method of the present invention, and will not be repeated here.
[0052] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.
[0053] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0054] This invention can be used in a wide variety of general-purpose or special-purpose computer system environments or configurations. Examples include: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, and distributed computing environments including any of the above systems or devices. This invention can be described in the general context of computer-executable instructions, such as program modules, that are executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform specific tasks or implement specific abstract data types. This invention can also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.
[0055] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of the present invention.
[0056] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are exhaustively listed. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0057] For those skilled in the art, various modifications and improvements can be made without departing from the concept of the present invention, and these modifications and improvements are all within the scope of protection of the present invention. The scope of protection of the present invention is defined by the appended claims.
Claims
1. A unified power quality control method, characterized in that, Includes the following steps: Read the data and perform a fast Fourier transform analysis, then calculate the power quality index based on the analysis results; Dynamic weights are assigned based on power quality indicators, and the optimal compensation current command is synthesized based on the dynamic weights. The compensation current command is selectively packaged and sent to the controller, and the composite compensation current is injected into the power grid under the control of the controller.
2. The unified power quality control method according to claim 1, characterized in that, The steps of reading data and performing Fast Fourier Transform analysis include: The original waveform data block is read through the high-speed bus, and the Fast Fourier Transform instruction in the mathematical function library is called to perform a 512-point radix-2 Fast Fourier Transform on the three-phase voltage and current respectively, so as to obtain the voltage or current spectrum of each phase.
3. The unified power quality control method according to claim 1, characterized in that, The steps for calculating power quality indicators based on the analysis results include: Based on the analysis results, the following indicators were calculated sequentially: RMS values of each harmonic: k = 1~50 Let be the real part of the k-th harmonic voltage. Let k be the imaginary part of the voltage of the kth harmonic, where k is the harmonic order. Total Harmonic Distortion (THD): U is voltage. The effective value of the kth harmonic voltage. This represents the effective value of the fundamental frequency (50Hz power frequency) voltage. Fundamental power factor: ,in This represents the phase difference between the fundamental voltage and the current. Three-phase unbalance: Using the symmetrical component method, positive-sequence, negative-sequence, and zero-sequence components are extracted from the three-phase fundamental voltage or current to calculate the negative-sequence unbalance. and zero-order imbalance , This represents the effective value of the fundamental negative sequence voltage. This represents the effective value of the fundamental zero-sequence voltage. Flicker intensity factor: The moving variance of the effective voltage value calculated every 10 power frequency cycles. The root mean square value is taken as the flicker intensity factor F; N is the total number of samples involved in the moving variance calculation. Let be the effective voltage value at the i-th moment within the sliding window. is the average value of the effective voltage within the sliding window, and n is the upper limit of the sample index within the sliding window.
4. The unified power quality control method according to claim 1, characterized in that, The step of allocating dynamic weights based on power quality indicators includes: If THD > 8.0%, then the harmonic weighting reactive power weight unbalanced weights Flash weights ; If 5.0% < THD ≤ 8.0%, then , , , ; If THD ≤ 5.0%, then , , , ; The weighting coefficients for reactive power compensation targets. The weighting coefficients for the harmonic suppression target. The weighting coefficients for the three-phase imbalance control objectives. The weighting coefficients for flicker suppression targets.
5. The unified power quality control method according to claim 4, characterized in that, The steps for synthesizing the optimal compensation current command based on dynamic weights include: Based on the determined weights, a weighted multi-objective optimization model is constructed and solved. The calculation steps are as follows: Q represents the current actual reactive power of the power grid. The amplitude of the fundamental frequency reactive power compensation command. Here, e represents the reference target value for total harmonic distortion control, and e represents the current actual three-phase imbalance. is the reference target value for three-phase imbalance control, and F is the current actual flicker intensity factor; The reference target value for flicker intensity factor control; The solution yields a set of reference values for each frequency component of the optimal compensation current: ; I1,ref is the instantaneous reference value of the overall optimal compensation current, and I1,ref is the amplitude of the fundamental reactive power compensation current. ϕ1 is the fundamental angular frequency of the power grid, and ϕ1 is the phase of the fundamental compensation current. Let the amplitude of the k-th harmonic compensation current be . This represents the phase corresponding to the k-th harmonic compensation current. This represents the amplitude of the negative sequence compensation current. The phase of the negative sequence compensation current is given by k, the harmonic order is given by t, and the instantaneous time is given by t.
6. The unified power quality control method according to claim 1, characterized in that, The step of injecting composite compensation current into the power grid under the control of the controller includes: After receiving instructions from the PLC, the static synchronous compensation controller uses a proportional resonant controller to set resonant points at the fundamental frequency and each harmonic frequency. Based on grid voltage feedforward, a carrier phase-shifted sinusoidal pulse width modulation is used to generate an insulated gate bipolar transistor drive signal, which is then filtered and injected into the grid with a composite compensation current.
7. The unified power quality control method according to claim 1, characterized in that, Following the step of injecting composite compensation current into the power grid under the control of the controller, the method further includes: The PLC monitors the grid current after actual compensation by a static synchronous compensator across multiple power frequency cycles and calculates the compensation residual ΔI. The calculation steps are as follows: This represents the actual current measured on the grid side after compensation by the static synchronizing compensator. To compensate for the load current of the load itself before it is put into operation, This is the compensation current output by the static synchronous compensator; If the residual exceeds 2% of the rated current, the PLC will add a correction term in the next calculation cycle.
8. A unified power quality control device, characterized in that, include: The calculation module is used to read data and perform fast Fourier transform analysis, and calculate power quality indicators based on the analysis results; The current compensation module is used to allocate dynamic weights according to power quality indicators and synthesize the optimal compensation current command based on the dynamic weights. The current control module is used to selectively package compensation current commands and send them to the controller, which then injects composite compensation current into the power grid under the control of the controller.
9. A unified power quality control device, characterized in that, It includes a processor, a memory, and a computer program stored in the memory and executable by the processor, wherein when the computer program is executed by the processor, it implements the steps of the unified power quality control method as described in any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, it implements the steps of the unified power quality control method as described in any one of claims 1 to 7.