Switching power converter circuit and method of controlling the same

Abstract

This invention discloses a switching power converter circuit and its control method. The switching power converter circuit includes a power stage circuit for generating an output voltage based on an input voltage; a control circuit for comparing a ramp signal with a first reference voltage to generate a control signal for controlling the power stage circuit; and a ramp signal generator coupled to the control circuit for generating the ramp signal and determining the ramp signal's slope according to a function; wherein the function includes multiple parameters, and the multiple parameters include the input voltage and a second reference voltage but do not include the output voltage.

Description

Technical Field

[0001] This invention relates to a switching power converter circuit and its control method, and more particularly to a switching power converter circuit and its control method that can improve system stability and optimize load transient response performance. Background Technology

[0002] Switching power converters are widely used in various electronic devices to convert input voltage into the desired output voltage. Among numerous control architectures, constant on-time (COT) control has attracted attention due to its simple structure and fast transient response.

[0003] Specifically, the COT control architecture of a switching power converter directly compares the output voltage with a reference voltage to generate a control signal. Its advantage lies in its extremely fast load transient response performance, as changes in the output voltage are directly and quickly reflected in the control signal. However, the COT control architecture lacks a proper frequency compensation mechanism, resulting in poor closed-loop stability and affecting the accuracy of the output voltage. This instability can cause oscillations in the system under certain operating conditions, impacting the reliability of the switching power converter. This issue is particularly important in low-power applications, which typically require power converters with high efficiency and fast transient response while maintaining a stable and accurate output voltage.

[0004] Therefore, ensuring good closed-loop stability and output voltage accuracy of the system while maintaining fast load transient response has become one of the goals pursued in this field. Summary of the Invention

[0005] Therefore, the main objective of this invention is to provide a switching power converter circuit and its control method to overcome the shortcomings of the prior art.

[0006] This invention provides a switching power converter circuit, comprising a power stage circuit for generating an output voltage based on an input voltage; a control circuit for comparing a ramp signal with a first reference voltage to generate a control signal for controlling the power stage circuit; and a ramp signal generator coupled to the control circuit for generating the ramp signal and determining the ramp signal's slope according to a function; wherein the function includes multiple parameters, and the multiple parameters include the input voltage and a second reference voltage but do not include the output voltage.

[0007] An embodiment of the present invention provides a control method for a switching power converter circuit, the switching power converter circuit being used to generate an output voltage based on an input voltage. The control method includes comparing a ramp signal with a first reference voltage to generate a control signal for controlling the switching power converter circuit; and generating the ramp signal according to a function; wherein the function includes a plurality of parameters, and the plurality of parameters include the input voltage and a second reference voltage but do not include the output voltage. Attached Figure Description

[0008] Figure 1 This is a functional block diagram of a switching power converter circuit according to Embodiment 1 of the present invention.

[0009] Figure 2 This is a schematic diagram of a switching power converter circuit according to Embodiment 1 of the present invention.

[0010] Figure 3 This is a schematic diagram of the ramp signal, the second reference voltage, and the output voltage according to an embodiment of the present invention.

[0011] Figure 4A This is a schematic diagram of the calibration circuit in Embodiment 1 of the present invention.

[0012] Figure 4B for Figure 4A A schematic diagram of the calibration circuit that adjusts the first transconductance parameter to change the output voltage.

[0013] Figure 5A This is a schematic diagram of the calibration circuit in Embodiment 1 of the present invention.

[0014] Figure 5B for Figure 5A A schematic diagram of the calibration circuit that adjusts the second transconductance parameter to change the output voltage.

[0015] Figure 6A This is a schematic diagram of the calibration circuit in Embodiment 1 of the present invention.

[0016] Figure 6B for Figure 6A A schematic diagram of the calibration circuit adjusting the second reference voltage to change the output voltage.

[0017] Figure 7 This is a schematic diagram of the control flow of Embodiment 1 of the present invention.

[0018] Figure 8 This is a schematic diagram of an existing switching power converter.

[0019] Figure labeling: 10 - Switching power converter circuit; 12 - Power stage circuit; 14 - Control circuit; 16 - Ramp signal generator; V IN - Input voltage; V OUT- Output voltage; CTRL- control signal; V RMP - Slope wave signal; V REF1 - First reference voltage; V REF2 - Second reference voltage; 18 - Calibration circuit; 20 - Switching power converter circuit; HS - High-side switch; LS - Low-side switch; L - Inductor; C OUT - Output capacitor; RL - Equivalent resistance; SD - Switching signal; SDB - Switching signal; NSW - Switching node; GND - Ground; 202 - Comparator circuit; 204 - On-time generation circuit; 206 - Resistor-capacitor circuit; 208 - First current source; 210 - First switch; 212 - Second current source; 214 - Second switch; gm1 - First transconductance parameter; gm2 - Second transconductance parameter; I1 - First current; I2 - Second current; R - Resistor; C - Capacitor; 40 - Calibration circuit; 402 - Comparator circuit; 404 - Up / down counter; 406 - Digital-to-analog converter; 408 - Operational transconductance amplifier; 50 - Calibration circuit; 502 - Comparator circuit; 504 - Up / down counter; 506 - Digital-to-analog converter; 508 - Operational transconductance amplifier; 60 - Calibration circuit; 602 - Comparator circuit; 604 - Up / down counter; 606 - Digital-to-analog converter; I BIAS1 - Analog signal; I BIAS2 - Analog signal; V SW - Amplitude; 70 - Control flow; 700~706 - Steps; 80 - Switching power converter. Detailed Implementation

[0020] Please refer to Figure 1 , Figure 1 This is a functional block diagram of a switching power converter circuit 10 according to an embodiment of the present invention. The switching power converter circuit 10 includes a power stage circuit 12, a control circuit 14, and a ramp signal generator 16. The power stage circuit 12 is controlled by a control signal CTRL, used to adjust the input voltage V. IN Generate an output voltage V OUT It can be a buck, boost, or buck-boost power converter. Control circuit 14 is used to compare a ramp signal V. RMP With a first reference voltage V REF1 To generate a control signal CTRL for controlling the power supply stage circuit 12; wherein, the first reference voltage V REF1 It can be designed with a temperature-independent fixed voltage value to improve system stability. The ramp signal generator 16 is coupled to the control circuit 14 to generate the ramp signal V. RMP Furthermore, the ramp signal V is determined by a function. RMPThe slope (rising and falling slopes) of the input voltage V, where the function contains multiple parameters, including the input voltage V. IN and a second reference voltage V REF2 And does not include the output voltage V OUT .

[0021] In the switching power converter circuit 10, the output voltage V OUT Parasitic resistance inevitably exists in the transmission path, which may cause instability in the operation of the control circuit 14, resulting in an unstable output voltage V. OUT The average value has a large error compared to the target value that is to be adjusted. To solve the above problem, the switching power converter circuit 10 uses a ramp signal generator 16 to generate a ramp signal V. RMP The control circuit 14 is configured to respond to the ramp signal V. RMP With the first reference voltage V REF1 This generates the control signal CTRL. Specifically, the ramp signal generator 16 generates the ramp signal V. RMP The slope depends on the input voltage V. IN and the second reference voltage V REF2 Excluding output voltage V OUT The function is determined by the function itself, and can be expressed as f(V) IN V REF2 Since the ramp signal generator 16 determines the ramp signal V... RMP The slope parameter does not include the output voltage V. OUT This can avoid output voltage V OUT Noise affects system performance through the feedback path, ensuring system stability and further improving load transient response. Furthermore, the switching power converter circuit 10 eliminates the need for an error amplifier, avoiding delays caused by resistor-capacitor compensation circuits and achieving faster load transient response. In one embodiment, the switching power converter circuit 10 is positioned before the control circuit 14 and is connected to the circuit that generates the ramp signal V. RMP An error amplifier is not required in the relevant circuitry (e.g., the ramp signal generator 16 or the circuitry used to control the ramp signal generator 16). In other words, the switching power converter circuit 10 does not need to generate the ramp signal V using an error amplifier. RMP .

[0022] It should be noted that ramp signal generator 16 is used to generate ramp signal V. RMP And based on the absence of output voltage V OUT The function determines the ramp signal V RMP The slope, i.e., the slope signal generator 16 determines the slope signal V. RMPWhen considering the slope, the output voltage V does not need to be taken into account. OUT However, depending on different system requirements or application areas, the ramp signal generator 16 generates a ramp signal V. RMP During the process, the output voltage V may still be used. OUT For other uses, such as as a ramp signal V RMP The reference potential or initial potential, etc., but this does not affect the fact that the present invention uses an input voltage V. IN and the second reference voltage V REF2 (instead of output voltage V) OUT The slope signal V is determined. RMP Characteristics of the slope. For example, in one embodiment, the switching power converter circuit 10 may further include a calibration circuit coupled to the power stage circuit 12 and the ramp signal generator 16, used to adjust the output voltage V. OUT and the second reference voltage V REF2 Adjust (the ramp signal generator 16 determines the ramp signal V) RMP At least one of the parameters of the slope function, such that the output voltage V OUT Approaching the target voltage. In other words, the calibration circuit can provide and adjust the parameters of the function used by the ramp signal generator 16 to ensure that the output voltage V approaches the target voltage. OUT The accuracy.

[0023] In short, the ramp signal V generated by ramp signal generator 16 RMP The slope is not affected by the output voltage V OUT This, along with the impact of noise, ensures system stability. Furthermore, as mentioned above, the switching power converter circuit 10 eliminates the need for an error amplifier, avoiding delays caused by compensation circuitry and achieving faster load transient response.

[0024] Figure 1 The power supply stage circuit 12, control circuit 14, and ramp signal generator 16 are used to represent the basic architecture of the switching power converter circuit 10. Those skilled in the art should appropriately design or adjust its circuit architecture according to system requirements, application areas, etc. For example, please refer to... Figure 2 , Figure 2 This is a schematic diagram of a switching power converter circuit 20 according to an embodiment of the present invention. The switching power converter circuit 20 is derived from the switching power converter circuit 10 and can also be considered as an implementation of the switching power converter circuit 10; therefore, the same symbols are used to represent the same circuits or signals. Specifically, in the switching power converter circuit 20, the power stage circuit 12 includes a high-side switch HS, a low-side switch LS, an inductor L, and an output capacitor C. OUT The high-side switch HS is coupled to the input voltage V. IN With a switching node NSW Between, the low-side switch LS is coupled to the switching node N. SW The inductor L is coupled to the switching node N between the ground terminal GND and the ground terminal GND. SW With output voltage V OUT Between, and the output capacitor C OUT Coupled to the output voltage V OUT Between the inductor L and ground (GND). The operating principle of power supply stage circuit 12 is well known in the art; in short, the high-side switch HS and the low-side switch LS are used to switch the inductor L and the input voltage V. IN Alternatively, the coupling path to ground (GND) accumulates or releases energy through inductor L, thereby converting the energy of inductor L into an appropriate output voltage V. OUT and supply to the load circuit (e.g.) Figure 2 The equivalent resistance RL is shown. Furthermore, in this architecture, it should be ensured that at any given time, only one switch between the high-side switch HS and the low-side switch LS can be turned on, to avoid a shoot-through phenomenon caused by both switches being turned on simultaneously, which could lead to a short circuit. Therefore, in Figure 2 In this circuit, the control signal CTRL is implemented by complementary switching signals S_D and S_DB, meaning that only one switching signal can be enabled at any given time. Specifically, the control circuit 14 of the switching power converter circuit 20 is a pulse width modulation (PWM) circuit, which includes a comparator circuit 202 and an on-time generation circuit 204. The positive input (+) of the comparator circuit 202 receives the first reference voltage V. REF1 And its negative input terminal (-) receives the ramp signal V. RMP Used to compare ramp signal V RMP With the first reference voltage V REF1 The conduction time generation circuit 204 generates complementary switching signals S_D and S_DB, and controls the duty ratio of each switching signal S_D and S_DB according to the comparison result of the comparator circuit 202. That is, if the duty ratio of the switching signal S_D is D, then the duty ratio of the switching signal S_DB is (1-D). The comparison result of the comparator circuit 202 can control the duty ratio D and (1-D) by changing the length of time that the switching signal S_D or S_DB is in the disabled state. This adjusts the turn-off time of the high-side switch HS and the low-side switch LS, thereby controlling the energy accumulated in the inductor L to generate an appropriate output voltage V. OUT .

[0025] In the switching power converter circuit 20, the ramp signal generator 16 includes a resistor-capacitor circuit 206, a first current source 208, a first switch 210, a second current source 212, and a second switch 214. A node N is formed between the negative input terminal of the comparator circuit 202 of the control circuit 14, the resistor-capacitor circuit 206, the first switch 210, and the second switch 214. RMP Node N RMP The signal above is the ramp signal V. RMP The resistor-capacitor circuit 206 includes a resistor R and a capacitor C connected in parallel, which are coupled to the comparator circuit 202 of the control circuit 14 and the output voltage V. OUT Between (i.e., coupled to node N) RMP With output voltage V OUT (between), so that the output voltage V OUT It can be directly coupled to the ramp signal V RMP Therefore, it can accelerate the response speed of load transients. The first current source 208 is used to generate a first current I1, and the first current I1 is related to the input voltage V. IN Second reference voltage V REF2 And a first transduction parameter gm1, i.e., I1 = gm1·(V IN -V REF2 One end of the first switch 210 is coupled to the first current source 208, and the other end is coupled to node N. RMP This is used to switch the conduction state at both ends according to the switching signal S_D. The second current source 212 is used to generate a second current I2, and the second current I2 is related to the second reference voltage V. REF2 And a second transduction parameter gm2, i.e., I2 = gm2·V REF2 One end of the second switch 214 is coupled to node N. RMP The other end is coupled to the second current source 212, which is used to switch the conduction status of both ends according to the switching signal S_DB.

[0026] Furthermore, the resistor-capacitor circuit 206 can be considered as an integrator, which, in conjunction with the first current source 208 and the second current source 212, generates a ramp signal V. RMP Specifically, when the switching signal S_D is enabled to turn on the first switch 210, and the switching signal S_DB is disabled to turn off the second switch 214, the first current I1 of the first current source 208 charges the capacitor C, causing the resistor-capacitor circuit 206 to generate a ramp signal V. RMP During the rising phase, when the switching signal S_D is in a disabled state to turn off the first switch 210, and the switching signal S_DB is in an enabled state to turn on the second switch 214, the second current source 212 draws the second current I2 from the capacitor C, causing the resistor-capacitor circuit 206 to generate a ramp signal V. RMPThe descent phase. Control circuit 14 compares the ramp signal V. RMP With the first reference voltage V REF1 Based on this, the working cycles of the switching signals S_D and S_DB are controlled, thereby controlling the ramp signal V. RMP Amplitude V SW (i.e., ramp signal V) RMP The voltage value and the ramp signal V during the transition from the rising phase to the falling phase RMP The difference between the lowest voltage values ​​is also related to node N. SW The switching of the voltage across (inductor L) thus regulates the output voltage V. OUT Maintain at a target voltage. Wherein, the ramp signal V... RMP It is (through resistor-capacitor circuit 206) superimposed on the output voltage V OUT Above, therefore the ramp signal V RMP Second reference voltage V REF2 and output voltage V OUT The relative relationship can Figure 3 express.

[0027] Through the above feedback control mechanism, the output voltage V can be ensured. OUT Maintain at the target voltage. It should be noted that... Figure 2 In the embodiment, the output voltage V OUT Coupled to the ramp signal V via resistor-capacitor circuit 206 RMP However, the output voltage V OUT Only affects the ramp signal V RMP The level, without affecting the ramp signal V RMP The slope of the rise or fall. Therefore, in one embodiment, the ground terminal GND can be used instead of the output voltage V. OUT Connected to resistor-capacitor circuit 206 (that is, resistor-capacitor circuit 206 is coupled to node N) RMP (between ground GND), in this case, the signal at ground GND is coupled to the ramp signal V through the resistor-capacitor circuit 206. RMP Alternatively, in another embodiment, the resistor-capacitor circuit 206 may further include a switching switch for switching with respect to the output voltage V. OUT Alternatively, the connection to ground (GND) can selectively determine the output voltage V. OUT Or the signal at ground GND is coupled to the ramp signal V RMP It should be noted that when the output voltage V... OUT Coupled to ramp signal V RMP At that time, the load transient response is better, while the signal at the local terminal GND is coupled to the ramp signal V. RMP At this time, the load transient response is poor, but it can still operate normally, depending on the designer's design choices.

[0028] In short, Figure 2 In the embodiment, the influence of the ramp signal V RMP The slope is mainly due to the input voltage V. IN and the second reference voltage V REF2 Additionally, in this embodiment, the first transduction parameter gm1 and the second transduction parameter gm2 can also be used to adjust the ramp signal V. RMP The slope.

[0029] Based on the above, the ramp signal V RMP The rising slope is determined by the first current I1 (I1 = gm1·(V)). IN -V REF2 The determination is made by the slope signal V. RM The slope of the decrease in P is determined by the second current I2 (I2=gm2·V). REF2 This is determined by ( ). Therefore, the ramp signal V RMP The rising slope is affected by the input voltage V IN and the second reference voltage V REF2 The influence of the ramp signal V RMP The rate of descent is affected by the second reference voltage V. REF2 The influence of the ramp signal V. RMP The function f(V) of the slope (both the rising and falling slopes) IN V REF2 This can be represented as:

[0030] f(V IN V REF2 )=gm1×(V IN -V REF2 )×D×T-gm2×V REF2 ×(1-D)×T

[0031] From the above, it can be seen that the ramp signal V RMP The slope is based on the input voltage V. IN and the second reference voltage V REF2 Excluding output voltage V OU It is determined by a function of T.

[0032] Regarding the ramp signal V RMP The slope influence factor can also be determined by the output voltage V. OUT The derivation process reveals the following. Specifically, when the switching power converter circuit 20 operates in continuous conduction mode (i.e., the current in inductor L does not drop to zero in each switching cycle), assuming the output voltage V... OUTGiven a fixed DC value, and assuming a switching period of T, a duty cycle of D for switching signal S_D, and a duty cycle of (1-D) for switching signal S_DB, and a ramp signal V... RMP The amplitude is V SW According to the principle of charge balance in capacitors, we can conclude that:

[0033]

[0034] During the period when the switching signal S_D is in the enabled state,

[0035]

[0036] From Equation 1, we can obtain

[0037] (Equation 3)V SW =2×D×gm1×(V IN -V REF2 )×R-2×(1-D)×gm2×V REF2 ×R-2×(V REF2 -V OUT );

[0038] From Equation 2, we can obtain

[0039]

[0040] Equation 4 can be rearranged to obtain:

[0041]

[0042] From equations 3 and 5, we can obtain

[0043]

[0044] Equation 6 can be simplified to obtain

[0045]

[0046] Therefore, as can be seen from the above, the input voltage V IN Second reference voltage V REF2 The first transduction parameter gm1 and the second transduction parameter gm2 will affect the ramp signal V. RMP The slope (e.g., affecting the ramp signal V) RMP The rise and / or fall slope), but the output voltage V OUT It will not affect the ramp signal V RMP The slope. Furthermore, according to Equation 7, the output voltage V... OUT It can be achieved by adjusting the second reference voltage V REF2 The output voltage V is achieved by using either the first transduction parameter gm1 or the second transduction parameter gm2. OUTThe accuracy specifications.

[0047] In this case, the switching power converter circuit 20 adds a calibration circuit 18, coupled to the power stage circuit 12 and the ramp signal generator 16, to adjust the output voltage V. OUT and the second reference voltage V REF2 The first transconductance parameter gm1, the second transconductance parameter gm2, and the second reference voltage V are determined. REF2 One or more of these factors cause the output voltage V to... OUT The voltage is approximated to the target voltage to achieve the required accuracy. In other words, the calibration circuit 18 is used to adjust the output voltage V based on the target voltage. OUT and the second reference voltage V REF2 Adjustment is used to determine the ramp signal V RMP At least one parameter in the function of slope makes the output voltage V OUT Approaching the target voltage.

[0048] The implementation of calibration circuit 18 is not limited to a specific architecture, as long as it can be based on the output voltage V. OUT and the second reference voltage V REF2 This determines the first transconductance parameter gm1, the second transconductance parameter gm2, and the second reference voltage V. REF2 One or more of them are acceptable. For example, please refer to... Figure 4A , Figure 4A This is a schematic diagram of a calibration circuit 40 according to an embodiment of the present invention. The calibration circuit 40 implements the calibration circuit 18 and determines the first transconductance parameter gm1, which is related to the first current I1 generated by the first current source 208. The calibration circuit 40 includes a comparator circuit 402, an up / down counter 404, a digital-to-analog converter 406, and an operational transconductance amplifier 408. The comparator circuit 402 is used to compare the output voltage V. OUT With the second reference voltage V REF2 The up-and-down counter 404 is coupled to the comparator circuit 402 and is used to generate a digital count value based on the comparison result of the comparator circuit 402. The digital-to-analog converter 406 is coupled to the up-and-down counter 404 and is used to generate an analog signal I based on the digital count value of the up-and-down counter 404. BIAS1 This serves as the bias current for the operational transconductance amplifier 408. The operational transconductance amplifier 408 is coupled to the first current source 208 of the digital-to-analog converter 406 and the ramp signal generator 16, and is used to supply current based on the input voltage V. IN and the second reference voltage V REF2A voltage difference generates an output current, which is then supplied to the first current source 208 as the first current I1. Furthermore, the operational transconductance amplifier 408 adjusts the analog signal I... BIAS1 The conversion ratio from the voltage difference to the output current is determined and used as the first transconductance parameter gm1.

[0049] When calibration circuit 40 is operating, comparator circuit 402 first compares the output voltage V. OU T and the second reference voltage V REF2 The magnitude of the output voltage V. OUT Greater than the second reference voltage V REF2 The comparator circuit 402 will output a high-level comparison result; conversely, if the output voltage V... OUT Less than the second reference voltage V REF2 The comparator circuit 402 outputs a low-level comparison result. The up / down counter 404 counts based on this comparison result, incrementing the count when the result is high and decrementing it when the result is low. The digital-to-analog converter 406 then generates a corresponding analog signal I based on this digital count value. BIAS1 And in this example, analog signal I BIAS1 It is in current form. Finally, the operational transconductance amplifier 408 is based on the analog signal I. BIAS1 Determine the input voltage V IN and the second reference voltage V REF2 The conversion ratio between the input voltage difference and the output current. Specifically, the main function of the operational transconductance amplifier 408 is to convert the input voltage difference into an output current. In this embodiment, the operational transconductance amplifier 408 receives the input voltage V. IN and the second reference voltage V REF2 As a differential input, this voltage difference is converted into an output current, and its conversion ratio (i.e., the first transconductance parameter gm1) is determined by the analog signal I. BIAS1 Determined by. When analog signal I BIAS1 When the input voltage difference increases, the first transconductance parameter gm1 also increases, allowing the same input voltage difference to produce a larger output current; conversely, when the analog signal I... BIAS1 When the input voltage difference decreases, the first transconductance parameter gm1 also decreases, resulting in a smaller output current for the same input voltage difference. By adjusting the first transconductance parameter gm1, the magnitude of the first current I1 generated by the first current source 208 is changed, ultimately affecting the ramp signal V. RMP Characteristics (e.g., ramp signal V) RMP The rising slope of the voltage makes the output voltage V OUT It can gradually approach the target voltage value. Through this feedback adjustment mechanism, the output voltage V can be adjusted. OUT It gradually approaches the target voltage value.

[0050] For example, please refer to Figure 4B , Figure 4B for Figure 4A The calibration circuit 40 adjusts the first transconductance parameter gm1 to change the output voltage V. OUT A schematic diagram. In Figure 4B In the diagram, curve 42 indicates that the calibration circuit 40 adjusts the first transconductance parameter gm1 to 0.5u, resulting in the output voltage V. OUT The value is 1.8149 volts; curve 44 indicates that the calibration circuit 40 adjusts the first transconductance parameter gm1 to 1u, resulting in the output voltage V. OUT The voltage is 1.7699 volts; curve 46 indicates that the calibration circuit 40 adjusts the first transconductance parameter gm1 to 1.5u, resulting in the output voltage V. OUT It is 1.7272 volts. Therefore, by Figure 4B It can be seen that by adjusting the first transconductance parameter gm1, the ramp signal V can be affected. RMP The characteristics of this cause the output voltage V OUT It can approach the target voltage value.

[0051] Please refer to Figure 5A , Figure 5A This is a schematic diagram of a calibration circuit 50 according to an embodiment of the present invention. The calibration circuit 50 implements the calibration circuit 18 and determines the second transconductance parameter gm2, which is related to the second current I2 generated by the second current source 212. The calibration circuit 50 includes a comparator circuit 502, an up / down counter 504, a digital-to-analog converter 506, and an operational transconductance amplifier 508. The comparator circuit 502 is used to compare the output voltage V. OUT With the second reference voltage V REF2 The up-and-down counter 504 is coupled to the comparator circuit 502 and is used to generate a digital count value based on the comparison result of the comparator circuit 502. The digital-to-analog converter 506 is coupled to the up-and-down counter 504 and is used to generate an analog signal I based on the digital count value of the up-and-down counter 504. BIAS2 This serves as the bias current for the operational transconductance amplifier 408. The operational transconductance amplifier 508 is coupled to the digital-to-analog converter 506, the second current source 212, and the second switch 214, and is used to supply the bias current based on the second reference voltage V. REF2 A voltage difference between the voltage and a ground voltage generates an output current, which is then supplied to the first current source 212 as the second current I2. Furthermore, the operational transconductance amplifier 508 adjusts the analog signal I... BIAS2 The conversion ratio from the voltage difference to the output current is determined and used as the second transconductance parameter gm2.

[0052] The operation mode and operating principle of calibration circuit 50 are similar to those of calibration circuit 40, which can be appropriately deduced from the foregoing description, and will not be repeated here.

[0053] Therefore, the calibration circuit 50 can adjust the characteristics of the second current source 212 (e.g., the ramp signal V). RMP (the descending slope), thereby adjusting the ramp signal V. RMP The characteristics of this cause the output voltage V OUT It can approach the target voltage. For example, please refer to... Figure 5B , Figure 5B for Figure 5A The calibration circuit 50 adjusts the second transconductance parameter gm2 to change the output voltage V. OUT A schematic diagram. In Figure 5B In the diagram, curve 52 indicates that the calibration circuit 50 adjusts the second transconductance parameter gm2 to 1.5u, resulting in the output voltage V. OUT The value is 1.8637 volts; curve 54 indicates that when calibration circuit 50 adjusts the second transconductance parameter gm2 to 1u, the output voltage V can be obtained. OUT The voltage is 1.8193 volts; curve 56 indicates that the calibration circuit 50 adjusts the second transconductance parameter gm2 to 0.5u, resulting in the output voltage V. OUT It is 1.7739 volts. Therefore, by Figure 5B It can be seen that by adjusting the second transconductance parameter gm2, the ramp signal V can be affected. RMP The characteristics of this cause the output voltage V OUT It can approach the target voltage value.

[0054] Please refer to Figure 6A , Figure 6A This is a schematic diagram of a calibration circuit 60 according to an embodiment of the present invention. In this embodiment, the calibration circuit 60 is used to implement the calibration circuit 18, and it is used to determine the second reference voltage V. REF2 This is a reference voltage related to the first current source 208 and the second current source 212, which serves as a parameter determining the first current I1 generated by the first current source 208 and the second current I2 generated by the second current source 212. Specifically, the calibration circuit 60 is a feedback circuit, which includes a comparator circuit 602, an up / down counter 604, and a digital-to-analog converter 606. The comparator circuit 602 is used to compare the output voltage V. OUT With the second reference voltage V REF2 A comparison result is generated. The up-and-down counter 604 is coupled to the comparator circuit 602 and is used to generate a digital count value based on the comparison result of the comparator circuit 602. A digital-to-analog converter 606 is coupled to the up-and-down counter 604 and is used to generate a second reference voltage V based on the digital count value of the up-and-down counter 604. REF2 The output is then fed back to the comparator circuit 602.

[0055] During operation, the calibration circuit 60 forms a complete feedback loop. First, the comparator circuit 602 compares the output voltage V. OUT With the second reference voltage V REF2 The magnitude of the output voltage V. OUT Greater than the second reference voltage V REF2 The comparator circuit 602 outputs a high-level comparison result; conversely, if the output voltage V... OUT Less than the second reference voltage V REF2 The comparator circuit 602 outputs a low-level comparison result. The up-down counter 604 adjusts its count value based on this comparison result, incrementing the count value when the comparison result is a high level, indicating that the second reference voltage V needs to be increased. REF2 When the comparison result is low, the count value is decremented, indicating that the second reference voltage V needs to be reduced. REF2 The digital-to-analog converter 606 then converts this digital count value into a new second reference voltage V. REF2 This data is then fed back to the comparator circuit 602 to form a new round of comparison. Under this architecture, the digital-to-analog converter 606 can be a resistor-network-based digital-to-analog converter, such as using a ladder network composed of single and double resistance values ​​or using a series of equivalent resistors to form a voltage divider, but is not limited to these.

[0056] Due to the second reference voltage V REF2 Simultaneously serving as the reference voltage for both the first current source 208 and the second current source 212, a change in its value will simultaneously affect the magnitudes of these two currents, thereby altering the ramp signal V. RMP This characteristic allows the system to adjust the second reference voltage V through such a feedback adjustment mechanism. REF2 The value of V makes the output voltage V OUT To achieve the desired target voltage value.

[0057] Therefore, the calibration circuit 60 can adjust the reference voltages of the first current source 208 and the second current source 212, thereby adjusting the ramp signal V. RMP The characteristics of this cause the output voltage V OUT It can approach the target voltage. For example, please refer to... Figure 6B , Figure 6B for Figure 6A The calibration circuit 60 adjusts the second reference voltage V REF2 And change the output voltage V OUT A schematic diagram. In Figure 6B In the diagram, curve 62 indicates that the calibration circuit 60 applies the second reference voltage V. REF2 Adjusting it to 1.81 volts yields the output voltage V. OUT It is 1.7976 volts; curve 64 indicates that the calibration circuit 60 applies the second reference voltage V. REF2Adjusting it to 1.8 volts yields the output voltage V. OUT It is 1.7876 volts; curve 66 indicates that the calibration circuit 60 applies the second reference voltage V. REF2 Adjusting it to 1.79 volts yields the output voltage V. OUT It is 1.7777 volts. Therefore, by Figure 6B It can be seen that by adjusting the second reference voltage V REF2 It can affect the ramp signal V RMP The characteristics of this cause the output voltage V OUT It can approach the target voltage value.

[0058] It should be noted that calibration circuits 40, 50, and 60 can all adjust the ramp signal V. RMP The purpose of this characteristic is to make the output voltage V OUT It can approach the target voltage. In practical applications, one implementation method can be selected according to the circuit design requirements, or multiple implementation methods can be combined, or an appropriate circuit architecture can be selected. Furthermore, calibration circuits 40, 50, and 60 are used to implement calibration circuit 18, and their operation timing can be flexibly configured according to system requirements to further improve the performance and efficiency of switching power converter circuits 10 or 20. For example, in one embodiment, calibration circuits 18, 40, 50, and 60 can operate when the system is powered on, dynamically adjusting the first transconductance parameter gm1, the second transconductance parameter gm2, or the second reference voltage V through an initialization calibration process. REF2 Ensure output voltage V OUT It rapidly converges to the target voltage while compensating for manufacturing variations or environmental conditions. Furthermore, calibration circuits 18, 40, 50, and 60 can also operate periodically after power-on, for example, at regular intervals or when a load or input voltage V is detected. IN Triggered by significant changes, the output voltage V is maintained through timed calibration. OUT Stability and accuracy.

[0059] According to one embodiment, the switching power converter circuit 10 or 20 may not include the calibration circuit 18. In this embodiment, the second reference voltage V REF2 Each of the first transduction parameter gm1 and the second transduction parameter gm2 can be determined based on the output voltage V. OUT The target voltage is preset to a fixed value, or it can be based on the output voltage V. OUT The target voltage is preset with a second reference voltage V. REF2 The first transduction parameter gm1 and the second transduction parameter gm2 are each within their preset ranges, and when the switching power converter circuit 10 or 20 is operating, the second reference voltage V is adjusted according to manufacturing variations or environmental conditions. REF2Each of the first transduction parameter gm1 and the second transduction parameter gm2 is set to a value within a corresponding preset range.

[0060] Overall, Figure 1 Switching power converter circuit 10 or Figure 2 The switching power converter circuit 20 generates a ramp signal V through the ramp signal generator 16. RMP Its slope is determined by the input voltage V IN and the second reference voltage V REF2 The decision is not affected by the output voltage V. OUT This architecture improves system stability and optimizes load transient response performance. Under this architecture, the switching power converter circuits 10 and 20 do not require an error amplifier, avoiding compensation circuit delays and achieving a faster response speed. Furthermore, the switching power converter circuits 10 and 20 can be appropriately configured with calibration circuits to dynamically adjust the first transconductance parameter gm1, the second transconductance parameter gm2, or the second reference voltage V. REF2 Ensure output voltage V OUT Precisely approximating the target voltage further enhances the closed-loop stability of the system and the output voltage V. OUT Accuracy.

[0061] Furthermore, the switching power converter circuits 10 and 20 and their calibration mechanism of the present invention are applicable to various applications, such as mobile devices, Internet of Things (IoT) devices, server power management, and industrial control systems. Particularly in low-power applications, the error-free amplifier design of the present invention avoids the delay of the compensation circuit, improving system efficiency and response speed. Simultaneously, the dynamic adjustment of the calibration circuit ensures output voltage stability, meeting high reliability requirements.

[0062] The operation of the switching power converter circuits 10 and 20 can be summarized as a control flow 70, such as... Figure 7 As shown. Control flow 70 can be implemented using a switching power converter circuit 10 or 20 and includes the following steps:

[0063] Step 700: Begin.

[0064] Step 702: Compare the ramp signal V RMP With the first reference voltage V REF1 This generates a control signal CTRL for controlling the switching power converter circuit 10.

[0065] Step 704: Generate a ramp signal V according to a function. RMP The function contains multiple parameters, including the input voltage V. IN and the second reference voltage V REF2 And does not include the output voltage V OUT.

[0066] Step 706: End.

[0067] For detailed operation or derivative variations of control process 70, please refer to the foregoing description, which will not be repeated here.

[0068] In existing technologies, COT control architecture switching power converters lack appropriate frequency compensation mechanisms, resulting in poor closed-loop stability and impacting reliability. For example, please refer to... Figure 8 , Figure 8 This is a schematic diagram of a conventional switching power converter 80. The switching power converter 80 employs a COT control architecture, where its control circuit directly compares the output voltage with a reference voltage to generate a control signal. The advantage of this architecture is its extremely fast load transient response performance, as changes in the output voltage are directly and quickly reflected in the control signal. However, due to the lack of a suitable frequency compensation mechanism, the switching power converter 80 suffers from poor closed-loop stability, and the accuracy of the output voltage is also affected. This instability may cause oscillations in the system under certain operating conditions, affecting the reliability of the switching power converter 80. In contrast, the switching power converter circuit 10 or 20 of this embodiment generates a ramp signal V using a ramp signal generator 16. RMP Its slope is determined by the input voltage V IN and the second reference voltage V REF2 The decision is not affected by the output voltage V. OUT This can improve system stability and optimize load transient response performance.

[0069] Existing technology provides an improved architecture that introduces a ramp signal generation circuit based on the functional relationship between input and output voltages into the switching power converter 80 to increase the system's noise margin. This design improves the stability of the closed loop and enhances the accuracy of the output voltage. However, this improvement comes at the cost of increased circuit complexity, requiring an error amplifier before the ramp signal generation circuit, which in turn requires additional compensation circuitry to ensure system stability. These additional circuits inevitably increase signal transmission delay. When the output voltage experiences load transient changes, the signal needs to be processed by the error amplifier and then transmitted through the ramp circuit before it is reflected in the control signal, resulting in a slower load transient response. In contrast, the switching power converter circuits 10 and 20 of this embodiment do not require an error amplifier, avoiding compensation circuit delays and achieving a faster response speed.

[0070] In summary, the switching power converter circuit of the present invention generates a ramp signal through a ramp signal generator, and its slope is not affected by the output voltage. This can improve system stability and optimize load transient response performance. Furthermore, it eliminates the need for an error amplifier, avoids compensation circuit delay, and achieves a faster response speed.

[0071] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.

Claims

1. A switching power converter circuit, characterized in that, Include: A power supply stage circuit used to generate an output voltage based on an input voltage; A control circuit is used to compare a ramp signal with a first reference voltage to generate a control signal for controlling the power stage circuit. as well as A ramp signal generator, coupled to the control circuit, is used to generate the ramp signal and determine the slope of the ramp signal according to a function. The function contains multiple parameters, including the input voltage and a second reference voltage but excluding the output voltage.

2. The switching power converter circuit as described in claim 1, characterized in that, The ramp signal generator includes: A resistor-capacitor circuit is coupled between the control circuit and the output voltage or a ground terminal; A first current source is used to generate a first current, which is related to the input voltage, the second reference voltage and a first transconductance parameter; A first switch includes a first terminal coupled to the first current source and a second terminal coupled to the control circuit, used to switch the conduction state of the first terminal to the second terminal according to the control signal. A second current source is used to generate a second current, which is related to the second reference voltage and a second transconductance parameter; as well as A second switch includes a first terminal coupled to the second current source and a second terminal coupled to the control circuit, used to switch the conduction state of the first terminal to the second terminal according to the control signal. The multiple parameters of the function also include the first transduction parameter and the second transduction parameter.

3. The switching power converter circuit as described in claim 2, characterized in that, The resistor-capacitor circuit also includes a toggle switch for switching the connection to the output voltage or the ground terminal.

4. The switching power converter circuit as described in claim 2, characterized in that, Also includes: A calibration circuit, coupled to the power stage circuit and the ramp signal generator, is used to determine one or more of the first transduction parameter, the second transduction parameter, and the second reference voltage based on the output voltage and the second reference voltage, so that the output voltage approaches a target voltage.

5. The switching power converter circuit as described in claim 1, characterized in that, The switching power converter circuit does not generate the ramp signal through an error amplifier.

6. The switching power converter circuit as described in claim 1, characterized in that, The first reference voltage has a fixed voltage value that is not temperature-dependent.

7. A control method for a switching power converter circuit, the switching power converter circuit being used to generate an output voltage based on an input voltage, characterized in that, This control method includes: A ramp signal is compared with a first reference voltage to generate a control signal for controlling the switching power converter circuit; and The ramp signal is generated according to a function; The function contains multiple parameters, including the input voltage and a second reference voltage but excluding the output voltage.

8. The control method as described in claim 7, characterized in that, The steps for generating the ramp signal according to this function include: A first current is generated, which is related to the input voltage, the second reference voltage and a first transconductance parameter; A second current is generated, which is related to the second reference voltage and a second transconductance parameter; as well as According to the control signal, the charging and discharging of the first current and the second current on a resistor-capacitor circuit are controlled to generate the ramp signal. The multiple parameters of the function also include the first transduction parameter and the second transduction parameter.

9. The control method as described in claim 8, characterized in that, Also includes: Based on the output voltage and the second reference voltage, one or more of the first transduction parameter, the second transduction parameter, and the second reference voltage are determined to make the output voltage approach a target voltage.

10. The control method as described in claim 8, characterized in that, Also includes: Switch the connection between the resistor-capacitor circuit and the output voltage or a ground terminal.

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