High efficiency buck circuit
Patent Information
- Application Number
- CN202610955426.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-30
- Publication Date
- 2026-09-29
AI Technical Summary
但在实际应用中,不同的BUCK电路参数和输入输出电压,最佳的延迟时间也是不一样的,,因此延迟时间必须可设定、可配置以适配不同应用工况;并且传统电路 FB 电压越过 ZCD 阈值后,短时间内即到达谷底开通最佳时刻,留给控制电路延时处理的时序余量极小,控制电路一般是单片机或带时钟的数字电路,在收到触发信号后,需要一段时间来做处理,无法精准匹配最优延时,难以实现稳定的 ZVS 谷底开通
本发明采用单一检测引脚分时复用实现输出电压检测与过零检测,输出电压检测期间过零提前触发支路自动断开,无信号干扰,检测精度高、电路拓扑简洁、占用控制器引脚少;通过增设过零提前触发支路,在辅助绕组电压下降初始阶段即可主动下拉 FB 电位,提前输出 ZCD 触发信号,给控制电路预留充足延时处理余量,无需设计极小量级最小延迟时间,规避了极小延时实现难度大、器件要求高、成本不经济的弊端,可灵活配置不同延迟时间,适配不同输入输出电压、电感参数、MOS 寄生电容、负载及 PCB 寄生参数的应用场景,精准对准 SW 电压谷底时刻开通 MOS 管,实现稳定 ZVS 谷底开通,大幅降低 MOS 管开通损耗,提升整机转换效率。
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Figure CN122844642A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of switching power supply buck topologies, and more specifically, to a high-efficiency BUCK circuit. Background Technology
[0002] Buck converter circuits are widely used in various switching power supplies, adapters, industrial power supplies, and automotive power supplies. Reducing the switching losses of power MOSFETs is the core method to improve the overall conversion efficiency of buck circuits, and the use of ZVS (Zero-Valve-Side) turn-on mode for MOSFETs can significantly reduce MOSFET turn-on losses.
[0003] Existing traditional BUCK circuits use a BUCK main inductor and a coupling detection auxiliary winding. The auxiliary winding, after voltage division, forms the FB feedback signal. The same FB pin simultaneously performs output voltage sampling and detection as well as ZCD (zero current valley) detection. For example... Figure 1 As shown, in the BUCK circuit, the main inductor current rises during the conduction of MOSFET Q1; after MOSFET Q1 turns off, the freewheeling diode turns on, and the main inductor current decreases; when the main inductor current drops to zero, the freewheeling diode turns off, and the voltage at point SW of the BUCK switch begins to resonate and rise. When the voltage at point SW approaches the output voltage, the falling edge of the voltage at pin FB crosses the threshold, triggering ZCD, and the control circuit drives the MOSFET to turn on. Since the voltage at point FB also needs to be used for output voltage detection, in order to distinguish between these two voltage values, the zero-crossing detection threshold voltage of FB is much lower than the voltage used for output voltage detection, generally a few tenths of a volt. Because Vout is much lower than Vin, the disadvantage of this method is that when MOSFET Q1 is turned on, the voltage at point SW has not yet risen to Vin or is close to Vin, that is, when MOSFET Q1 is turned on, the voltage across its terminals is still relatively high, resulting in a relatively large turn-on loss.
[0004] To optimize the performance of the aforementioned circuit, the industry standard approach is to delay the MOSFET turn-on after detecting the ZCD signal, turning on Q1 when the voltage at point SW is closer to Vin, i.e., valley turn-on. However, in practical applications, the optimal delay time varies depending on the different BUCK circuit parameters and input / output voltages. Therefore, the delay time must be settable and configurable to adapt to different application conditions. Furthermore, in traditional circuits, once the FB voltage crosses the ZCD threshold, the optimal valley turn-on time is reached very quickly, leaving minimal timing margin for the control circuit to process the delay. The control circuit is typically a microcontroller or a clocked digital circuit, which requires a period of time to process the trigger signal, making it difficult to accurately match the optimal delay and achieve stable ZVS valley turn-on.
[0005] Therefore, there is an urgent need to propose a new type of high-efficiency BUCK circuit that can generate ZCD trigger signals in advance, reserve sufficient delay margin for the control circuit, adapt to configurable delay requirements under multiple operating conditions, avoid the problems of difficulty and high cost in achieving extremely small delays, reduce switching losses, and improve the overall efficiency of the circuit. Summary of the Invention
[0006] The problem solved by this invention is how to provide a high-efficiency BUCK circuit that achieves early zero-crossing triggering, configurable delay for precise valley turn-on, reduces MOSFET turn-on losses, and improves power conversion efficiency.
[0007] To address the aforementioned problems, this invention provides a high-efficiency BUCK circuit, comprising: a control circuit, a main BUCK loop, and a feedback loop; the main BUCK loop includes a first MOSFET and a BUCK inductor, the gate of the first MOSFET is connected to the control circuit, the drain is connected to the voltage input terminal, and the source is connected to the voltage output terminal via the BUCK inductor; the feedback loop includes a voltage divider circuit, a zero-crossing early trigger circuit, a feedback output pin, and an auxiliary winding coupled to the BUCK inductor, the auxiliary winding being connected to the feedback output pin via the voltage divider circuit, the input terminal of the control circuit being connected to the feedback output pin to detect the BUCK output voltage and acquire the zero-crossing signal, the input terminal of the zero-crossing early trigger circuit being connected to the auxiliary winding, during the period when the first MOSFET is off, when the BUCK inductor current drops to zero, the zero-crossing early trigger circuit detects the voltage drop in the auxiliary winding and quickly pulls down the voltage of the feedback output pin, sending a zero-crossing signal to the control circuit in advance so that the control circuit has sufficient time for delay processing.
[0008] Furthermore, the main BUCK circuit also includes a first diode and a first capacitor. The first end of the first diode is connected to the source of the first MOSFET, and the second end is grounded. The first end of the first capacitor is connected to the voltage output terminal, and the second end is grounded.
[0009] Furthermore, the voltage divider circuit includes a first resistor and a second resistor. The first end of the first resistor is connected to the auxiliary winding, and the second end is connected to the feedback output pin. The first end of the second resistor is connected to the second end of the first resistor, and the second end is grounded.
[0010] Furthermore, the zero-crossing early trigger circuit includes a first transistor, a second capacitor, a second diode, a third resistor, and a fourth resistor. The first terminal of the second capacitor is connected to the first terminal of the auxiliary winding, and the second terminal is connected to the anode of the second diode. The cathode of the second diode is connected to the first terminal of the third resistor, and the second terminal of the third resistor is connected to the second terminal of the auxiliary winding. The collector of the first transistor is connected to the feedback output pin, the emitter is connected to the first terminal of the third resistor, and the base is connected to the second terminal of the third resistor via the fourth resistor. During the freewheeling phase of the main BUCK circuit, when the first diode is turned on, the auxiliary winding charges the second capacitor. After the first diode is turned off, the voltage of the auxiliary winding continues to decrease. When the voltage drop exceeds the breakdown voltage of the second diode, current flows through the third resistor, generating a voltage difference across the third resistor and providing base bias for the first transistor. When the base-emitter voltage of the first transistor reaches the conduction threshold, the first transistor turns on, rapidly pulling down the voltage at the feedback output pin.
[0011] Furthermore, the control circuit distinguishes between the BUCK output voltage signal and the zero-crossing signal by relying on different threshold ranges, thereby realizing time-division multiplexing of a single pin.
[0012] Furthermore, the threshold of the zero-crossing signal is much lower than that of the BUCK output voltage signal.
[0013] Furthermore, when the BUCK output voltage is detected, the zero-crossing early trigger circuit is in the off state, which does not affect the detection of the BUCK output voltage.
[0014] Compared with the prior art, the beneficial effects of the present invention are: This invention employs a single detection pin for time-division multiplexing to achieve output voltage detection and zero-crossing detection. During output voltage detection, the zero-crossing early trigger branch automatically disconnects, eliminating signal interference, resulting in high detection accuracy, a simple circuit topology, and fewer controller pins required. By adding a zero-crossing early trigger branch, the FB potential can be actively pulled down in the initial stage of the auxiliary winding voltage drop, outputting the ZCD trigger signal in advance. This provides sufficient delay margin for the control circuit, eliminating the need to design an extremely small minimum delay time. This avoids the drawbacks of high difficulty, high component requirements, and uneconomical cost associated with achieving extremely small delays. Different delay times can be flexibly configured to adapt to different input and output voltages, inductance parameters, MOS parasitic capacitance, load, and PCB parasitic parameters. It precisely targets the MOS transistor to turn on at the SW voltage valley moment, achieving stable ZVS valley turn-on, significantly reducing MOS transistor turn-on losses, and improving overall conversion efficiency. Attached Figure Description
[0015] Figure 1This is a schematic diagram of the principle structure of a traditional BUCK circuit in the background art of this invention; Figure 2 This is a schematic diagram of the overall principle structure of an embodiment of the present invention. Detailed Implementation
[0016] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0017] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0018] In the description of this specification, references to terms such as "embodiment," "one embodiment," and "one implementation" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or implementation is included in at least one embodiment or illustrative implementation of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or implementation. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or implementations.
[0019] like Figure 2 As shown, the present invention provides a high-efficiency BUCK circuit, including: a control circuit, a main BUCK loop, and a feedback loop.
[0020] The control circuit can use a general-purpose microcontroller chip, such as the STC51 series. It can capture the pre-output ZCD signal through external interrupts, configure different delay levels with the built-in timer, and output PWM to drive the MOS transistor after the delay ends; the ADC collects the FB voltage to complete the voltage regulation closed loop.
[0021] The main BUCK circuit includes a first MOSFET Q1, a BUCK inductor L1-1, a first diode D1, and a first capacitor C1. The first MOSFET Q1 is driven by a PWM signal from the control circuit. When the first MOSFET Q1 is turned on, the BUCK inductor L1-1 is charged. When the first MOSFET Q1 is turned off, the freewheeling phase begins.
[0022] The feedback loop includes a voltage divider circuit, a zero-crossing early trigger circuit, a feedback output pin FB, and an auxiliary winding L1-2 coupled to the BUCK inductor. In the voltage divider circuit, the first resistor R1 and the second resistor R2 form a feedback voltage divider network. The induced voltage of the auxiliary winding L1-2 always passes through the feedback voltage divider network composed of R1 and R2 to generate the FB point voltage. The control circuit internally distinguishes the signal application through two different thresholds. The detection range of the output voltage is generally a few volts, such as 1V-2.5V. The zero-crossing detection threshold voltage of FB is much lower than the voltage used for output voltage detection, generally a few tenths of a volt. During the conduction phase of the first MOSFET Q1, the feedback voltage divider network samples the output voltage normally; the zero-crossing early trigger circuit has no conduction condition and is in a high blocking open state, which does not affect voltage sampling.
[0023] The zero-crossing early trigger circuit includes a first transistor Q2, a second capacitor C2, a second diode D3, a third resistor R3, and a fourth resistor R4. During the freewheeling phase, when the first diode D1 is turned on, the BUCK inductor L1-1 releases energy by forming a loop through the freewheeling diode D1, the current of the BUCK inductor L1-1 decreases, the auxiliary winding L1-2 maintains a positive stable voltage, the zero-crossing early trigger branch remains open, the second capacitor C2 is charged, and the voltage across the second capacitor C2 is approximately equal to the voltage of the auxiliary winding L1-2. When the current of the BUCK inductor L1-1 winding drops to zero and the first diode D1 begins to turn off, the voltage at point SW rises, and the voltage of the auxiliary winding L1-2 decreases. When the voltage drop of the auxiliary winding L1-2 is greater than the breakdown voltage of the second diode D3, current begins to flow through the third resistor R3. The current path is: R3->D3->C2->winding L1-2. As the voltage across the auxiliary winding L1-2 continues to decrease, the voltage across the third resistor R3 increases, and the base of the first transistor Q2 turns on. The current path is: R4 -> Q2's BE -> D3 -> C2 -> winding L1-2. The first transistor Q2 quickly pulls down the voltage at point FB. Due to the conduction of the first transistor Q2, the voltage at point FB drops past the threshold point earlier than in the old scheme, thus providing a zero-crossing trigger signal earlier, giving the control circuit enough time for delay processing. After this stage, the control circuit waits for the voltage at SW to reach the resonant valley according to the preset delay before driving the first MOSFET Q1 to turn on, entering the next cycle.
[0024] While the disclosure is as stated above, its scope of protection is not limited thereto. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of this disclosure, and all such changes and modifications will fall within the protection scope of this invention.
Claims
1. A high-efficiency BUCK circuit, characterized in that, include: Control circuit, main BUCK loop, and feedback loop; The main BUCK circuit includes a first MOSFET and a BUCK inductor. The gate of the first MOSFET is connected to the control circuit, the drain is connected to the voltage input terminal, and the source is connected to the voltage output terminal via the BUCK inductor. The feedback loop includes a voltage divider circuit, a zero-crossing early trigger circuit, a feedback output pin, and an auxiliary winding coupled to the BUCK inductor. The auxiliary winding is connected to the feedback output pin via the voltage divider circuit. The input terminal of the control circuit is connected to the feedback output pin to detect the BUCK output voltage and obtain the zero-crossing signal. The input terminal of the zero-crossing early trigger circuit is connected to the auxiliary winding. When the BUCK inductor current drops to zero during the first MOSFET's off period, the zero-crossing early trigger circuit detects the voltage drop in the auxiliary winding and quickly pulls down the voltage of the feedback output pin to send a zero-crossing signal to the control circuit in advance, so that the control circuit has enough time for delay processing.
2. The high-efficiency BUCK circuit according to claim 1, characterized in that, The main BUCK circuit also includes a first diode and a first capacitor. The first end of the first diode is connected to the source of the first MOSFET, and the second end is grounded. The first end of the first capacitor is connected to the voltage output terminal, and the second end is grounded.
3. The high-efficiency BUCK circuit according to claim 2, characterized in that, The voltage divider circuit includes a first resistor and a second resistor. The first end of the first resistor is connected to the auxiliary winding, and the second end is connected to the feedback output pin. The first end of the second resistor is connected to the second end of the first resistor, and the second end is grounded.
4. The high-efficiency BUCK circuit according to claim 2, characterized in that, The zero-crossing early trigger circuit includes a first transistor, a second capacitor, a second diode, a third resistor, and a fourth resistor; The first terminal of the second capacitor is connected to the first terminal of the auxiliary winding, the second terminal is connected to the anode of the second diode, the cathode of the second diode is connected to the first terminal of the third resistor, the second terminal of the third resistor is connected to the second terminal of the auxiliary winding, the collector of the first transistor is connected to the feedback output pin, the emitter is connected to the first terminal of the third resistor, and the base is connected to the second terminal of the third resistor via the fourth resistor. During the freewheeling phase of the main BUCK circuit, when the first diode is turned on, the auxiliary winding charges the second capacitor. After the first diode is turned off, the voltage of the auxiliary winding continues to drop. When the voltage drop exceeds the breakdown voltage of the second diode, current flows through the third resistor. A voltage difference is generated across the third resistor and provides base bias for the first transistor. When the base-emitter voltage of the first transistor reaches the turn-on threshold, the first transistor turns on, rapidly pulling down the voltage at the feedback output pin.
5. The high-efficiency BUCK circuit according to claim 1, characterized in that, The control circuit distinguishes between the BUCK output voltage signal and the zero-crossing signal by relying on different threshold ranges, thereby realizing time-division multiplexing of a single pin.
6. The high-efficiency BUCK circuit according to claim 5, characterized in that, The threshold of the zero-crossing signal is much lower than that of the BUCK output voltage signal.
7. The high-efficiency BUCK circuit according to claim 5, characterized in that, When the BUCK output voltage is being detected, the zero-crossing early trigger circuit is in the off state, so it does not affect the detection of the BUCK output voltage.