High frequency rectifier usable for adaptive regulation and static bias

Abstract

The application provides a high-frequency rectifier capable of adaptive adjustment and static biasing, and belongs to the technical field of high-frequency rectifiers. The high-frequency rectifier comprises at least one rectifying unit, a control loop, a first biasing circuit, a second biasing circuit and a static biasing module. The rectifying unit comprises a first conductive type switch tube and a second conductive type switch tube. The first biasing circuit and the second biasing circuit are respectively biased by an adaptive adjustment module of the control loop and the static biasing module; and the static biasing module presets a second gate-source biasing voltage as a fixed value. The control loop samples a direct current output port voltage and dynamically adjusts a first gate-source biasing voltage, so that the output voltage is maintained at a maximum value. The application realizes the cooperative control of the adaptive adjustment of the first conductive type switch tube and the static biasing of the second conductive type switch tube, effectively improves the energy conversion efficiency in a wide input voltage range, and can be applied to the fields of an isolated energy conversion system and an implantable chip wireless energy transmission.

Description

Technical Field

[0001] This invention belongs to the field of high-frequency rectifier technology, and specifically relates to a high-frequency rectifier that can be used for adaptive adjustment and static bias. Background Technology

[0002] High-frequency AC / RF power conversion has wide applications in isolated power conversion systems, wireless power transmission systems with embedded chips, and various RF power harvesting systems. Traditional high-frequency AC / RF power conversion mainly uses diode-connected rectifiers and cross-connected rectifiers.

[0003] A rectifier operating in diode mode shorts the gate and drain of a transistor, making it equivalent to a diode. This circuit structure is simple, but under low input voltage conditions, the conduction loss increases significantly due to the transistor's threshold voltage limitation, making it difficult to achieve high-efficiency energy conversion.

[0004] Cross-coupled rectifiers achieve high energy conversion efficiency at low input voltages by cross-connecting the transistor gates to the opposite AC input terminals. This allows the transistors to obtain a larger gate-source drive voltage when turned on. However, cross-coupled rectifiers maintain high energy conversion efficiency over a narrow input voltage range. As the input voltage increases, the transistor gate-source voltage also increases, leading to a significant increase in reverse conduction and short-circuit current, resulting in a sharp drop in energy conversion efficiency.

[0005] Existing technologies propose adaptive adjustment of the gate-source voltage of the N-type switch in a cross-coupled high-frequency rectifier. Under high input voltage, this is achieved by dynamically adjusting the DC bias voltage of the N-type switch's gate-source, reducing reverse conduction and short-circuit current, thereby improving energy conversion efficiency over a wide input voltage range. This approach considers the time-consuming process of simultaneously performing a two-dimensional optimal search for the bias voltages of both the N-type and P-type switches, and the fact that the N-type switch has a smaller parasitic capacitance than the P-type switch. Therefore, adaptive adjustment is only performed on the N-type switch, saving chip area while improving energy conversion efficiency over a wide input voltage range. However, this approach does not optimize the bias state of the P-type switch, which always operates in a non-optimal bias state, limiting further improvements in energy conversion efficiency. Summary of the Invention

[0006] In view of the above, the main objective of this invention is to provide a high-frequency rectifier and system that can be used for adaptive adjustment and static bias, so as to solve the above-mentioned technical problems.

[0007] This invention proposes a high-frequency rectifier that can be used for adaptive adjustment and static bias, comprising at least one rectifier unit, a control loop, a first bias circuit, a second bias circuit, and a static bias module, wherein: The rectifier unit includes at least one first conductivity type switch and at least one second conductivity type switch, and has an AC input port for receiving AC input signals and a DC output port for providing DC output signals; The first bias circuit is coupled to the gate and source of the first conductivity type switch and is regulated by the adaptive adjustment module to carry and transmit the first gate-source bias voltage to the gate and source of the first conductivity type switch. The second bias circuit is coupled to the gate and source of the second conductivity type switch and is biased by the static bias module. It is used to carry and transmit the second gate-source bias voltage to the gate and source of the second conductivity type switch. The static bias module is used to preset the second gate-source bias voltage to a fixed value; The control loop includes: The sampling and comparison module has its input terminal connected to the DC output port and is used to sample the voltage of the DC output port and generate a status control signal. The state machine has its input connected to the output of the sampling and comparison module and its output connected to the control terminal of the adaptive adjustment module. It is used to control the working state of the adaptive adjustment module according to the state control signal. The adaptive adjustment module, controlled by a state machine, is used to dynamically adjust the first gate-source bias voltage to maintain the voltage at the DC output port at its maximum value.

[0008] Compared with the prior art, the beneficial effects of the present invention are as follows: (1) The high-frequency rectifier structure provided by the present invention establishes a hybrid control method combining the closed-loop adaptive regulation of the N-type transistor and the fixed optimal bias of the P-type transistor by setting a dynamically adjustable first gate-source bias voltage on the N-type switching transistor and a static second gate-source bias voltage preset to a fixed value on the P-type switching transistor. By coordinating the setting of the two bias voltages, the rectifier can achieve maximum power output at a certain DC operating point and simultaneously achieve the highest energy conversion efficiency.

[0009] (2) Compared with traditional cross-coupled high-frequency rectifiers, this invention adds a resistor-capacitor bias network to both the N-type and P-type switching transistors. By appropriately adjusting the DC voltage value of the bias capacitor in the bias network, the energy conversion efficiency of the rectifier can be greatly improved, thereby increasing its maximum output power and achieving optimal efficiency over a wide voltage input range.

[0010] (3) Compared with the existing scheme that only adaptively adjusts the N-type switch, the present invention adds the optimal static bias setting for the P-type switch. By presetting the bias voltage of the P-type switch to the optimal operating point corresponding to the peak energy conversion efficiency, the overall energy conversion efficiency of the rectifier is further improved, making the efficiency curve close to the ideal state of simultaneously adaptively adjusting the N-type and P-type switches, while avoiding the complexity and area overhead of two-dimensional adaptive search.

[0011] (4) The rectifier structure provided by the present invention supports the cascading of multiple basic units. The cascading method and number of stages can be flexibly configured according to application requirements to meet different output voltage and power requirements. It is suitable for various application scenarios such as isolated energy conversion system, wireless energy transmission of embedded chip and IoT radio frequency energy harvesting.

[0012] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by means of embodiments of the invention. Attached Figure Description

[0013] Figure 1 This is a circuit diagram of the first basic unit of the present invention; Figure 2 This is a circuit diagram of the second basic unit of the present invention; Figure 3 The graph shows the relationship between rectification efficiency and bias voltages VBNi-VINi and VBPi-VOUTi. Figure 4 The graph shows the energy conversion efficiency of rectifiers with cross-coupled connection, diode connection, adjustment of only VBNi, and adjustment of both VBNi and VBPi as a function of input voltage. Figure 5 This is a schematic diagram of the cascaded loop of the high-frequency rectifier that can be used for adaptive adjustment and static bias according to the present invention; Figure 6 This is a schematic diagram of a cascaded rectifier loop for the application of the high-frequency rectifier of the present invention, which can be used for adaptive adjustment and static bias, to medium and low frequencies. Figure 7 This is a schematic diagram of a cascaded rectifier loop for high-frequency applications of the high-frequency rectifier of the present invention, which can be used for adaptive adjustment and static bias. Figure 8 This is a cascaded circuit diagram of the i-th, i+1-th, and i+2-th stages in a rectifier composed of the first basic unit; Figure 9 This is a cascaded circuit diagram of the i-th and i+1-th stages in a rectifier composed of the second basic unit. Detailed Implementation

[0014] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0015] These and other aspects of the embodiments of the present invention will become clear from the following description and accompanying drawings. In these descriptions and drawings, some specific embodiments of the present invention are specifically disclosed to illustrate some ways of implementing the principles of the embodiments of the present invention; however, it should be understood that the scope of the embodiments of the present invention is not limited thereto.

[0016] This embodiment provides a high-frequency rectifier that can be used for adaptive adjustment and static bias, including at least one rectifier unit, a control loop, a first bias circuit, a second bias circuit, and a static bias module, wherein: The rectifier unit includes at least one first conductivity type switch and at least one second conductivity type switch, and has an AC input port for receiving AC input signals and a DC output port for providing DC output signals; The first bias circuit is connected between the gate and source of the first conductivity type switch and is adjusted by the adaptive adjustment module to carry and transmit the first gate-source bias voltage to the gate and source of the first conductivity type switch. The second bias circuit is connected between the gate and source of the second conductivity type switch and is biased by the static bias module. It is used to carry and transmit the second gate-source bias voltage to the gate and source of the second conductivity type switch. The static bias module is used to preset the second gate-source bias voltage to a fixed value; The control loop includes: The sampling and comparison module has its input terminal connected to the DC output port, and is used to sample the voltage of the DC output port and generate a status control signal; The state machine has its input connected to the output of the sampling and comparison module and its output connected to the control terminal of the adaptive adjustment module. It is used to control the working state of the adaptive adjustment module according to the state control signal. The adaptive adjustment module, controlled by a state machine, is used to dynamically adjust the first gate-source bias voltage to maintain the voltage at the DC output port at its maximum value.

[0017] It should be noted that the first and second bias circuits do not actively generate bias voltage; rather, they serve as the carriers and transmission mediums of the bias voltage. The "appliers" of the bias voltage are the adaptive adjustment module and the static bias module, while the first and second bias circuits are the biased acceptors.

[0018] The specific structure and working method of each basic unit are described in detail below with reference to the accompanying drawings.

[0019] Depend on Figure 1 As shown, the first basic unit of this embodiment includes: a first conductivity type switch M1 (N-type switch), a second conductivity type switch M2 (P-type switch), a first coupling capacitor C1, a second coupling capacitor C2, a fourth coupling capacitor C4, a third bias capacitor C3, a fifth bias capacitor C5, an output sixth filter capacitor C6, a first bias resistor R1, and a second bias resistor R2. The input power signal is a differential input, and the proposed structure is a symmetrical structure.

[0020] In the connection relationship of the first basic unit: The source of the first type of switching transistor M1 is connected to the DC input terminal VINi, and its drain is connected to the drain of the second type of switching transistor M2. One end of the first coupling capacitor C1 is connected to the first terminal RF+ of the AC input port, and the other end is connected to the common node of the drains of the first type of switching transistor M1 and the second type of switching transistor M2. The source of the second type of switching transistor M2 is connected to the DC output port VOUTi.

[0021] The gate of the first type of switching transistor M1 is connected to the second terminal RF- of the AC input port through the second coupling capacitor C2. The second coupling capacitor C2 is used to couple the AC input signal to the gate of M1 to control the switching action of the first type of switching transistor M1. The gate of the second type of switching transistor M2 is connected to the second terminal RF- of the AC input port through the fourth coupling capacitor C4. The fourth coupling capacitor C4 is used to couple the AC input signal to the gate of M2 to control the switching action of the second type of switching transistor M2.

[0022] One end of the sixth output filter capacitor C6 is connected to the DC output port VOUTi, and the other end is grounded.

[0023] Regarding capacitor parameter requirements: The first coupling capacitor C1 is mainly used for AC coupling of the input signal and requires a high Q value and a large capacitance value to ensure that the AC voltage across the capacitor does not experience significant attenuation or power loss. The second coupling capacitor C2 is similar to the fourth coupling capacitor C4, primarily used for signal coupling. The value of the second coupling capacitor C2 depends on the operating frequency, the gate-end parasitic capacitance of the first conductivity type switch M1 connected to its upper plate, and the first bias resistor R1. The value of the fourth coupling capacitor C4 depends on the gate-end parasitic capacitance of the second conductivity type switch M2 connected to its upper plate and the second bias resistor R2, ultimately ensuring that the voltage difference between the upper and lower plates of the second coupling capacitor C2 and the fourth coupling capacitor C4 is minimal. The first bias resistor R1 and the second bias resistor R2 have large resistance values, resulting in low AC power consumption.

[0024] The structure of the first bias circuit is now described. The first terminal of the third bias capacitor C3 is connected to the source (i.e., the DC input terminal VINi) of the first conductivity type switch M1, and its second terminal is connected to the gate of the first conductivity type switch M1 through the first bias resistor R1. This connection point forms the first DC bias node VBNi. The adaptive adjustment module in the control loop is connected to this first DC bias node VBNi and is used to dynamically adjust the DC voltage difference across the third bias capacitor C3, thereby adjusting the first gate-source bias voltage of the first conductivity type switch M1.

[0025] In actual operation, the dynamic adaptive adjustment module charges or discharges the third bias capacitor C3 through an internal switched capacitor charge pump, thereby directly adjusting the DC voltage across the third bias capacitor C3. After the circuit enters DC steady state, since no continuous DC current flows through the first bias resistor R1, the DC voltage difference across the third bias capacitor C3 is applied directly between the gate and source of the first conductivity type switch M1 without loss through the first bias resistor R1, thus regulating its gate-source bias voltage. Specifically, the DC voltage value of the lower plate of the third bias capacitor C3 is the source-side DC voltage value of the first conductivity type switch M1. By adjusting the DC voltage difference across the third bias capacitor C3, the DC voltage value from the gate to the source of the first conductivity type switch M1 can be adjusted. By adaptively adjusting the gate-source voltage value to a suitable value, the output power / output voltage / power conversion efficiency is maximized.

[0026] The structure of the second bias circuit is now described. The first terminal of the fifth bias capacitor C5 is connected to the source (i.e., the DC output port VOUTi) of the second conductivity type switch M2, and its second terminal is connected to the gate of the second conductivity type switch M2 through the second bias resistor R2. This connection point provides the second DC bias node VBPi. The DC voltage difference across the fifth bias capacitor C5 is preset to a fixed value, providing a static second gate-source bias voltage for the second conductivity type switch M2.

[0027] Specifically, the DC voltage value of the lower plate of the fifth bias capacitor C5 is the source DC voltage value of the second conductivity type switch M2. By adjusting the DC voltage difference across the fifth bias capacitor C5, the DC voltage value from the gate to the source of the second conductivity type switch M2 can be adjusted. By selecting a suitable static bias point, the output power / output voltage / power conversion efficiency can be maximized.

[0028] It should be noted that the resistor-capacitor network formed by the first bias resistor R1, the third bias capacitor C3, the second bias resistor R2, and the fifth bias capacitor C5 respectively transmits the DC components of the voltage VBNi on the upper plate of the third bias capacitor C3 and the voltage VBPi on the upper plate of the fifth bias capacitor C5 to the gate terminals of the first conductivity type switch M1 and the second conductivity type switch M2 through the bias resistors. The gate terminal voltages of the first conductivity type switch M1 and the second conductivity type switch M2 have both AC and DC components during stable operation. The sixth output filter capacitor C6 is used for filtering, ensuring that its upper plate maintains a DC voltage state, allowing the first basic unit circuit to output a DC voltage.

[0029] Combination Figure 1 The operating mode of the first basic unit will now be explained in detail. The input signal VIN is determined by V(RF+) - V(RF-).

[0030] The rectifier consists of an even number of first basic units, and the AC input ports of adjacent first basic units are connected with opposite polarities.

[0031] When the first terminal RF+ of the AC input port is positive and the second terminal RF- of the AC input port is negative, the positive AC signal of the first terminal RF+ of the AC input port is considered to be completely coupled to the lower plate of the first coupling capacitor C1 through the coupling of the first coupling capacitor C1. At the same time, the negative AC signal of the second terminal RF- of the AC input port is coupled to the gate terminals of the first conductivity type switch M1 and the second conductivity type switch M2 through the second coupling capacitor C2 and the fourth coupling capacitor C4, respectively. The first conductivity type switch M1 is turned off and the second conductivity type switch M2 is turned on.

[0032] When the first terminal RF+ of the AC input port is negative and the second terminal RF- of the AC input port is positive, the negative AC signal of the first terminal RF+ of the AC input port is considered to be completely coupled to the lower plate of the first coupling capacitor C1 through the coupling of the first coupling capacitor C1. At the same time, the positive AC signal of the second terminal RF- of the AC input port is coupled to the gate terminals of the first conductivity type switch M1 and the second conductivity type switch M2 through the second coupling capacitor C2 and the fourth coupling capacitor C4, respectively. The first conductivity type switch M1 is turned on and the second conductivity type switch M2 is turned off.

[0033] It should be noted that the first basic unit mentioned above is not limited to single-level use. Depending on actual needs, multiple identical basic units can be cascaded (an even number). Figure 8A schematic diagram of a circuit structure with multiple cascaded first basic units is shown. In the cascaded state of multiple first basic units, when the first terminal RF+ of the AC input port is positive and the second terminal RF- of the AC input port is negative, the second-type switch M2 of the i-th stage and the first-type switch M1 of the (i+1)-th stage are turned on. Current flows from the first terminal RF+ of the AC input port through the first coupling capacitor C1 and the second-type switch M2 of the i-th stage to the first-type switch M1 and the first coupling capacitor C1 of the (i+1)-th stage, and then into the second terminal RF- of the AC input port. When the first terminal RF+ of the AC input port is negative and the second terminal RF- of the AC input port is positive, the second-type switch M2 of the (i+1)-th stage and the first-type switch M1 of the (i+2)-th stage are turned on. Current flows from the second terminal RF- of the AC input port through the first coupling capacitor C1 and the second-type switch M2 of the (i+1)-th stage to the first-type switch M1 and the first coupling capacitor C1 of the (i+2)-th stage, and then into the first terminal RF+ of the AC input port.

[0034] The second basic unit of this embodiment is composed of Figure 2 As shown, the second basic unit includes: two first-conductivity type switching transistors M3 and M4 (N-type switching transistors), two second-conductivity type switching transistors M5 and M6 (P-type switching transistors), a seventh coupling capacitor C7, a tenth coupling capacitor C10, an eighth coupling capacitor C8, a ninth coupling capacitor C9, an eleventh coupling capacitor C11, a twelfth coupling capacitor C12, a thirteenth bias capacitor C13, a fourteenth bias capacitor C14, a fifteenth output filter capacitor C15, and a third bias resistor R3, a fourth bias resistor R4, a fifth bias resistor R5, and a sixth bias resistor R6. The input power signal is a differential input.

[0035] It should be noted that the first basic unit is essentially an equivalent structure obtained by halving the second basic unit, and the parameters of the corresponding devices satisfy the following relationship: Regarding the size of the switching transistors, the dimensions of the two first-conductivity type switching transistors M3 and M4 in the second basic unit are each half the size of the first-conductivity type switching transistor M1 in the first basic unit, and the dimensions of the two second-conductivity type switching transistors M5 and M6 are each half the size of the second-conductivity type switching transistor M2 in the first basic unit; that is, the area of ​​the first-conductivity type switching transistor M1 is equal to the sum of the areas of M3 and M4, and the area of ​​the second-conductivity type switching transistor M2 is equal to the sum of the areas of M5 and M6.

[0036] Regarding the bias resistors, the values ​​of the third bias resistor R3 and the fourth bias resistor R4 in the second basic unit are equal, and each is twice the value of the first bias resistor R1 in the first basic unit; the values ​​of the fifth bias resistor R5 and the sixth bias resistor R6 are equal, and each is twice the value of the second bias resistor R2 in the first basic unit.

[0037] Regarding the coupling capacitors, the value of the first coupling capacitor C1 in the first basic unit is equal to the sum of the values ​​of the seventh coupling capacitor C7 and the tenth coupling capacitor C10 in the second basic unit; the value of the second coupling capacitor C2 is equal to the sum of the values ​​of the eighth coupling capacitor C8 and the ninth coupling capacitor C9; and the value of the fourth coupling capacitor C4 is equal to the sum of the values ​​of the eleventh coupling capacitor C11 and the twelfth coupling capacitor C12. Combining the fact that the values ​​of C7 and C10 are equal, the values ​​of C8 and C9 are equal, and the values ​​of C11 and C12 are equal, it can be seen that the value of each coupling capacitor in the second basic unit is half of the value of the corresponding coupling capacitor in the first basic unit.

[0038] In the connection relationship of the second basic unit: The sources of the two first-conductivity type switches M3 and M4 are connected to the DC input terminal VINi. The drain of the first-conductivity type switch M3 is connected to the drain of the second-conductivity type switch M5, and both are connected to the node corresponding to the lower end of the seventh coupling capacitor C7, forming the first common node in the upper half; the drain of the first-conductivity type switch M4 is connected to the drain of the second-conductivity type switch M6, and both are connected to the node corresponding to the upper end of the tenth coupling capacitor C10, forming the second common node in the lower half.

[0039] One end of the seventh coupling capacitor C7 is connected to the first terminal RF+ of the AC input port, and the other end is connected to the first common node; one end of the tenth coupling capacitor C10 is connected to the second terminal RF- of the AC input port, and the other end is connected to the second common node.

[0040] The gate of the first type of switching transistor M3 is connected to the second terminal RF- of the AC input port through the ninth coupling capacitor C9, and the gate of the first type of switching transistor M4 is connected to the first terminal RF+ of the AC input port through the eighth coupling capacitor C8, so as to achieve cross-coupling of the gates of the two first type of switching transistors.

[0041] The gate of the second type of switch M5 is connected to the second terminal RF- of the AC input port through the twelfth coupling capacitor C12, and the gate of the second type of switch M6 is connected to the first terminal RF+ of the AC input port through the eleventh coupling capacitor C11, so as to achieve cross-coupling of the gates of the two second type of switches.

[0042] One end of the fifteenth output filter capacitor C15 is connected to the DC output port VOUTi, and the other end is grounded.

[0043] Regarding the parameter requirements for capacitors: The seventh coupling capacitor C7 is the same as the tenth coupling capacitor C10. It is mainly used for AC coupling of input signals and requires a high Q value and a large capacitance value so that the AC voltage across the capacitor does not have a large attenuation and power loss. The eighth coupling capacitor C8, the ninth coupling capacitor C9, the eleventh coupling capacitor C11, and the twelfth coupling capacitor C12 are identical and mainly used for signal coupling. The values ​​of the eighth coupling capacitor C8 and the ninth coupling capacitor C9 are related to the operating frequency, the gate parasitic capacitance of the first conductivity type switching transistors M4 and M3 connected to the lower plate of the eighth coupling capacitor C8 and the upper plate of the ninth coupling capacitor C9, and the fourth bias resistor R4 and the third bias resistor R3, respectively. The values ​​of the eleventh coupling capacitor C11 and the twelfth coupling capacitor C12 are related to the operating frequency, the gate parasitic capacitance of the second conductivity type switching transistors M6 and M5 connected to the lower plate of the eleventh coupling capacitor C11 and the upper plate of the twelfth coupling capacitor C12, and the sixth bias resistor R6 and the fifth bias resistor R5, respectively. Ultimately, this makes the voltage difference between the upper and lower plates of the eighth coupling capacitor C8 and the ninth coupling capacitor C9, and between the eleventh coupling capacitor C11 and the twelfth coupling capacitor C12, extremely small. The third bias resistor R3, the fourth bias resistor R4, the fifth bias resistor R5, and the sixth bias resistor R6 have large resistance values, which makes their AC power consumption relatively small.

[0044] The structure of the first biased circuit is now described. The first terminal of the thirteenth bias capacitor C13 is connected to the sources (i.e., DC input terminals VINi) of the two first-conductivity type switches M3 and M4. Its second terminal is connected to the gate of the first-conductivity type switch M3 through a third bias resistor R3 and to the gate of the first-conductivity type switch M4 through a fourth bias resistor R4. This connection point forms the first DC bias node VBNi. The adaptive adjustment module in the control loop is connected to this first DC bias node VBNi and is used to dynamically adjust the DC voltage difference across the thirteenth bias capacitor C13, thereby simultaneously adjusting the first gate-source bias voltages of the first-conductivity type switches M3 and M4. Similar to the first basic unit, the dynamic adaptive adjustment module adjusts the DC voltage value across the thirteenth bias capacitor C13 by charging or discharging it.

[0045] Under steady-state DC conditions, this voltage difference is directly applied between the gate and source terminals of the first conductivity type switching transistors M3 and M4 through the third bias resistor R3 and the fourth bias resistor R4, achieving dynamic correction of the first gate-source bias voltage. Specifically, the DC voltage value VINi of the lower plate of the thirteenth bias capacitor C13 is the source-terminal DC voltage value of the first conductivity type switching transistors M3 and M4. By adjusting the DC voltage difference across the thirteenth bias capacitor C13, the DC voltage value from the gate terminal to the source terminal of the first conductivity type switching transistors M3 and M4 can be adjusted. By adaptively adjusting the gate-source voltage value to a suitable value, the output power / output voltage / power conversion efficiency is maximized.

[0046] The structure of the second bias circuit is now described. The first terminal of the fourteenth bias capacitor C14 is connected to the source (i.e., DC output port VOUTi) of the two second-conductivity type switches M5 and M6. Its second terminal is connected to the gate of the second-conductivity type switch M5 through the fifth bias resistor R5 and to the gate of the second-conductivity type switch M6 through the sixth bias resistor R6. This connection point provides the second DC bias node VBPi. The DC voltage difference across the fourteenth bias capacitor C14 is preset to a fixed value, providing a static second gate-source bias voltage for M5 and M6. Specifically, the DC voltage value VOUTi of the lower plate of the fourteenth bias capacitor C14 is the source-terminal DC voltage value of the second-conductivity type switches M5 and M6. By adjusting the DC voltage difference across the fourteenth bias capacitor C14, the DC voltage value from the gate to the source of the second-conductivity type switches M5 and M6 can be adjusted. By selecting a suitable static bias point, the output power / output voltage / power conversion efficiency can be maximized.

[0047] It should be noted that the resistor-capacitor network formed by the third bias resistor R3, the fourth bias resistor R4, the thirteenth bias capacitor C13, the fifth bias resistor R5, the sixth bias resistor R6, and the fourteenth bias capacitor C14 respectively transmits the voltage of the lower plate of the thirteenth bias capacitor C13 and the upper plate of the fourteenth bias capacitor C14 through the bias resistors, retaining its DC component to the gate terminals of the first conductivity type switches M3 and M4 and the second conductivity type switches M5 and M6. The gate terminal voltage values ​​of the first conductivity type switches M3 and M4 and the second conductivity type switches M5 and M6 simultaneously possess both AC and DC components during stable operation. The fifteenth output filter capacitor C15 is used for filtering, ensuring that its upper plate maintains a DC voltage state, allowing the second basic unit circuit to output a DC voltage.

[0048] Combination Figure 2 and Figure 9 The operating mode of the second basic unit will now be explained in detail. The input signal VIN is determined by V(RF+) - V(RF-).

[0049] When the first terminal RF+ of the AC input port is positive and the second terminal RF- of the AC input port is negative, the positive AC signal of the first terminal RF+ of the AC input port can be considered to be completely coupled to the lower plate of the seventh coupling capacitor C7 and the gate terminals of the first type of conduction switch M4 and the second type of conduction switch M6 through the coupling of the seventh coupling capacitor C7, the eighth coupling capacitor C8, and the eleventh coupling capacitor C11. The negative AC signal of the second terminal RF- of the AC input port can be considered to be completely coupled to the upper plate of the tenth coupling capacitor C10 and the gate terminals of the first type of conduction switch M3 and the second type of conduction switch M5 through the coupling capacitor C10, the ninth coupling capacitor C9, and the twelfth coupling capacitor C12. At this time, the first type of conduction switch M3 and the second type of conduction switch M6 are closed, and the first type of conduction switch M4 and the second type of conduction switch M5 are open.

[0050] When the first terminal RF+ of the AC input port is negative and the second terminal RF- of the AC input port is positive, the negative AC signal of the first terminal RF+ of the AC input port can be considered to be completely coupled to the lower plate of the seventh coupling capacitor C7 and the gate terminals of the first type of conductivity switch M4 and the second type of conductivity switch M6 through the coupling of the seventh coupling capacitor C7, the eighth coupling capacitor C8, and the eleventh coupling capacitor C11. The positive AC signal of the second terminal RF- of the AC input port can be considered to be completely coupled to the upper plate of the tenth coupling capacitor C10 and the gate terminals of the first type of conductivity switch M3 and the second type of conductivity switch M5 through the coupling capacitor C10, the ninth coupling capacitor C9, and the twelfth coupling capacitor C12. At this time, the first type of conductivity switch M3 and the second type of conductivity switch M6 are turned on, and the first type of conductivity switch M4 and the second type of conductivity switch M5 are turned off.

[0051] It should be noted that the second basic unit mentioned above is not limited to single-level use. Multiple identical basic units can be cascaded according to actual needs. Figure 9A schematic diagram of a circuit structure with multiple cascaded second basic units is shown. In the cascaded state of multiple second basic units, when the first terminal RF+ of the AC input port is positive and the second terminal RF- of the AC input port is negative, the first conductivity type switch M4 and the second conductivity type switch M5 of the i-th stage are turned on, and the first conductivity type switch M4 and the second conductivity type switch M5 of the (i+1)-th stage are also turned on. Current flows from the first terminal RF+ of the AC input port through the seventh coupling capacitor C7 and the second conductivity type switch M5 of the i-th stage to the first conductivity type switch M4 and the tenth coupling capacitor C10 of the (i+1)-th stage, and then flows back into the AC input port. When the first terminal RF+ of the AC input port is negative and the second terminal RF- of the AC input port is positive, the first conductivity type switch M3 and the second conductivity type switch M6 of the i-th stage are turned on, and the first conductivity type switch M3 and the second conductivity type switch M6 of the (i+1)-th stage are also turned on. The current flows from the second terminal RF- of the AC input port through the tenth coupling capacitor C10 and the second conductivity type switch M6 of the i-th stage to the first conductivity type switch M3 and the seventh coupling capacitor C7 of the (i+1)-th stage, and then flows into the first terminal RF+ of the AC input port.

[0052] Now combined Figure 5 The specific operation of the control loop of this invention is described in detail below. The control loop includes a sampling and comparison module, a state machine, and an adaptive adjustment module. The output voltage generates UP and DN signals through the sampling and comparison module, which are input to the state machine. When the output voltage increases, the state machine controls the adaptive adjustment VBNi module to maintain its state, i.e., to continue charging or discharging the bias capacitor of the rectifier basic unit. When the output voltage decreases, the state machine controls the adaptive adjustment VBNi module to change its state, i.e., to change the charging and discharging state of the bias capacitor of the rectifier basic unit from charging to discharging or from discharging to charging, thereby adjusting the loop to always maintain the output voltage at its maximum. The static VBPi bias module biases VBPi at the optimal P-type switch bias voltage at the PCE peak point.

[0053] Therefore, the adaptive adjustment module continuously adjusts the first gate-source bias voltage by dynamically charging or discharging the third bias capacitor C3 or the thirteenth bias capacitor C13 to track the maximum output power point of the DC output port, while fixing the second gate-source bias voltage at the optimal static operating point corresponding to the peak energy conversion efficiency.

[0054] Figure 1 and Figure 2 The rectifier shown is related to the rectification efficiency with the bias voltages VBNi - VINi and VBPi - VOUTi as follows: Figure 3 As shown.

[0055] The adaptive bias VBNi and static bias VBPi proposed in this invention, through the... Figure 1 and Figure 2 After optimizing VBNi-VINi and VBPi-VOUTi in the circuit shown, the bias voltage is biased near its optimal value, which significantly improves the energy conversion efficiency over a wide input range, bringing the conversion efficiency close to its optimal state. The PCE curves of the four rectifiers at input voltages from 0.3V to 1.8V are shown below. Figure 4 As shown, the purple curve represents the efficiency curve when only the bias voltage of the N-type switch is adaptively biased, while the blue curve represents the efficiency curve when the bias voltages of both the N-type and P-type switches are adaptively biased simultaneously. This invention achieves a high-efficiency rectifier over a wide input voltage range by adaptively biasing the N-type switch and statically biasing the P-type switch, making the efficiency curve approach the ideal blue curve.

[0056] The high-frequency rectifier proposed in this invention, which can be used for adaptive adjustment and static bias, adds a capacitor-resistor filter network compared to the traditional structure. By adjusting the DC voltage value on the resistor-capacitor network, the DC voltage value at the gate of the associated switching transistor can be indirectly adjusted. Compared to existing solutions that only adaptively adjust the N-type transistor, this invention adds an optimal static bias for the P-type switching transistor. By reasonably adjusting the two bias values, the high-frequency rectifier can ultimately achieve the maximum output power, maximum voltage, and maximum PCE value.

[0057] Based on the proposed structure, the required units can be cascaded to meet various output voltage / power requirements according to application needs. For example... Figure 5 As shown, the input terminal of the first stage is grounded, and the last stage (i.e. Figure 5 The output terminal of the nth stage of the rectifier is connected to the output resistor, and the DC output of the previous stage of the rectifier is connected to the DC input of the next stage.

[0058] It should be noted that if a suitable structure is selected according to the operating frequency, when applied to the low-to-medium frequency band (hundreds of MHz and below), the rectifier can be constructed by cascading an even number of first basic units and then cascading an odd or even number of second basic units; when applied to the high-frequency band (GHz and above), the rectifier is constructed by cascading an even number of first basic units.

[0059] like Figure 6 The diagram shows a rectifier loop cascade configuration suitable for low-to-medium frequency bands. The first 2k stages are cascaded from the first basic unit, ensuring a stable output voltage for even-numbered stages. The subsequent n-2k stages are cascaded from the second basic unit, which can be either even or odd-numbered. This second basic unit is a differential stage, which can reduce output voltage ripple.

[0060] like Figure 7The diagram shows a rectifier loop cascade configuration suitable for high-frequency bands. n must be an even number, and the rectifier is formed by cascading the first basic unit.

[0061] The input signal includes a sine wave, as well as a composite waveform of a sine wave and other high-frequency components. The input signal / waveform originates from a coil, antenna, or antenna with impedance matching circuitry. The first conductivity type switches M1, M3, and M4, and the second conductivity type switches M2, M5, and M6 can be discrete or integrated power semiconductor devices such as MOSFETs, IGBTs, and GaN FETs.

[0062] It should be noted that in practical applications, the final stage DC output port VOUTn is usually also used to connect the load capacitor CL and the load resistor RL. The load capacitor CL can be the aforementioned sixth output filter capacitor C6 or fifteenth output filter capacitor C15 itself, or it can be an external additional filter capacitor; the load resistor RL represents the subsequent circuit or the actual load. When the load resistor RL is connected, the DC component of the rectifier output current flows through the load resistor RL, while the AC ripple component is mainly bypassed through the charging and discharging of the load capacitor CL, suppressing output voltage fluctuations and ultimately obtaining a relatively stable DC voltage at the load end.

[0063] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A high-frequency rectifier that can be used for adaptive adjustment and static bias, characterized in that, It includes at least one rectifier unit, a control loop, a first bias circuit, a second bias circuit, and a static bias module, wherein: The rectifier unit includes at least one first conductivity type switch and at least one second conductivity type switch, and has an AC input port for receiving AC input signals and a DC output port for providing DC output signals; The first bias circuit is coupled to the gate and source of the first conductivity type switch and is regulated by the adaptive adjustment module to carry and transmit the first gate-source bias voltage to the gate and source of the first conductivity type switch. The second bias circuit is coupled to the gate and source of the second conductivity type switch and is biased by the static bias module. It is used to carry and transmit the second gate-source bias voltage to the gate and source of the second conductivity type switch. The static bias module is used to preset the second gate-source bias voltage to a fixed value; The control loop includes: The sampling and comparison module has its input terminal connected to the DC output port, and is used to sample the voltage of the DC output port and generate a status control signal; The state machine has its input connected to the output of the sampling and comparison module and its output connected to the control terminal of the adaptive adjustment module. It is used to control the working state of the adaptive adjustment module according to the state control signal. The adaptive adjustment module, controlled by a state machine, is used to dynamically adjust the first gate-source bias voltage to maintain the voltage at the DC output port at its maximum value.

2. The high-frequency rectifier that can be used for adaptive adjustment and static bias according to claim 1, characterized in that, The rectifier unit is the first basic unit, specifically including: A first-conductivity type switch and a second-conductivity type switch; The source of the first type of switching transistor is connected to the DC input terminal, and the drain is connected to the first terminal of the AC input port through the first coupling capacitor. The source of the second type of switching transistor is connected to the DC output port, and the drain is connected to the same drain as the first type of switching transistor. The gate of the first type of switching transistor is connected to the second terminal of the AC input port through the second coupling capacitor; The gate of the second type of switching transistor is connected to the second terminal of the AC input port through a fourth coupling capacitor.

3. The high-frequency rectifier that can be used for adaptive adjustment and static bias according to claim 1, characterized in that, The rectifier unit is the second basic unit, and specifically includes: Two first-conductivity type switching transistors and two second-conductivity type switching transistors; The sources of the two first-conductivity type switches are connected to the DC input terminal, and their drains are connected to the corresponding second-conductivity type switches to form two independent common nodes. One common node is connected to the first terminal of the AC input port through the seventh coupling capacitor, and the other common node is connected to the second terminal of the AC input port through the tenth coupling capacitor. The sources of the two second-conductivity type switching transistors are connected to the DC output port. The gates of the two first-conductivity type switching transistors are cross-coupled to the two ends of the AC input port through coupling capacitors; The gates of the two second-conductivity type switching transistors are cross-coupled to the two ends of the AC input port through coupling capacitors.

4. The high-frequency rectifier that can be used for adaptive adjustment and static bias according to claim 2, characterized in that, The first biased circuit includes: The third bias capacitor has its first terminal connected to the source of the first conductivity type switch, and its second terminal connected to the gate of the first conductivity type switch through the first bias resistor, forming the first DC bias node. The adaptive adjustment module is connected to the first DC bias node and is used to dynamically adjust the DC voltage difference across the third bias capacitor, thereby adjusting the first gate-source bias voltage. After the circuit enters DC steady state, the DC voltage difference across the third bias capacitor is directly applied to the gate and source of the first conductivity type switch through the first bias resistor.

5. The high-frequency rectifier that can be used for adaptive adjustment and static bias according to claim 4, characterized in that, The second biased circuit includes: The fifth bias capacitor has its first terminal connected to the source of the second type of switching transistor, and its second terminal connected to the gate of the second type of switching transistor through the second bias resistor, and provides the second DC bias node. The DC voltage difference across the fifth bias capacitor is preset to a fixed value to provide a static second gate-source bias voltage; After the circuit enters DC steady state, the DC voltage difference across the fifth bias capacitor is directly applied to the gate and source of the second conductivity type switch through the second bias resistor.

6. The high-frequency rectifier that can be used for adaptive adjustment and static bias according to claim 3, characterized in that, The first bias circuit includes a thirteenth bias capacitor. The first terminal of the thirteenth bias capacitor is connected to the DC input terminal. The second terminal of the thirteenth bias capacitor is connected to the gate of one of the first conductivity type switching transistors through a third bias resistor and to the gate of another first conductivity type switching transistor through a fourth bias resistor, thus forming a first DC bias node. The adaptive adjustment module is connected to the first DC bias node and is used to dynamically adjust the DC voltage difference across the thirteenth bias capacitor, thereby simultaneously adjusting the first gate-source bias voltage of the two first conductivity type switching transistors. After the circuit enters DC steady state, the DC voltage difference across the thirteenth bias capacitor is directly applied to the gate and source terminals of the two first-conductivity type switching transistors through the third and fourth bias resistors, respectively.

7. The high-frequency rectifier for adaptive adjustment and static bias according to claim 6, characterized in that, The second bias circuit includes a fourteenth bias capacitor. The first terminal of the fourteenth bias capacitor is connected to the DC output port. The second terminal of the fourteenth bias capacitor is connected to the gate of one of the second conductivity type switches through a fifth bias resistor and to the gate of another second conductivity type switch through a sixth bias resistor, and provides a second DC bias node. The DC voltage difference across the fourteenth bias capacitor is preset to a fixed value to provide a static second gate-source bias voltage for the two second conductivity type switches. After the circuit enters DC steady state, the DC voltage difference across the fourteenth bias capacitor is directly applied to the gate and source terminals of the two second-conductivity type switching transistors through the fifth and sixth bias resistors, respectively.

8. The high-frequency rectifier for adaptive adjustment and static bias according to any one of claims 1 to 7, characterized in that, The adaptive adjustment module dynamically charges or discharges the bias capacitor in the first bias circuit through an internal switched capacitor charge pump, continuously adjusting the first gate-source bias voltage to track the maximum output power point of the DC output port, while fixing the second gate-source bias voltage at the optimal static operating point corresponding to the peak energy conversion efficiency.

9. The high-frequency rectifier that can be used for adaptive adjustment and static bias according to claim 8, characterized in that, It includes multiple cascaded rectifier units, with the DC output port of the previous rectifier unit connected to the DC input port of the next rectifier unit to form a multi-stage rectifier.

10. The high-frequency rectifier for adaptive adjustment and static bias according to claim 9, characterized in that, A multistage rectifier is composed of an even number of cascaded first basic units, followed by at least one cascaded second basic unit; or, a multistage rectifier is composed entirely of an even number of cascaded first basic units.

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