Oscillator, evaluation method of oscillator, and manufacturing method of oscillator

Abstract

The present application provides an oscillator, an evaluation method of the oscillator, and a manufacturing method of the oscillator, which take into account appropriate switching of the operation mode and higher-precision evaluation. The oscillator (1) includes an oscillation circuit (10) that oscillates a vibrator (3), an output circuit (20) that outputs a clock signal based on an oscillation signal of the oscillation circuit (10), a processing circuit (30), an interface circuit (40) that communicates with an external device, a clock terminal (TCK), a first terminal (T1), and a second terminal (T2). The processing circuit (30) switches between a first mode (M1), a second mode (M2), and a third mode (M3), in the first mode (M1), the clock terminal (TCK) outputs a clock signal based on an input signal, i.e., a first input signal (SG1), input to the first terminal (T1), in the second mode (M2), the interface circuit (40) communicates with the external device via the clock terminal (TCK), and in the third mode (M3), the interface circuit (40) communicates with the external device via the second terminal (T2).

Description

Technical Field

[0001] This invention relates to oscillators, methods for evaluating oscillators, and methods for manufacturing oscillators. Background Technology

[0002] Previously, oscillators operating in multiple operating modes were known. Patent Document 1 disclosed a method in which an oscillation signal output in normal operating mode and a serial clock signal supplied in test mode share the same terminal.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2021-118443

[0004] When the function of the terminal is changed during normal operation and testing, the connection method between the terminal and the external device may also change. However, the method disclosed in Patent Document 1 does not take into account the connection with the external device used to measure the oscillation signal with higher precision during testing. Summary of the Invention

[0005] One aspect of this disclosure relates to an oscillator comprising: an oscillation circuit that causes an oscillator to oscillate; an output circuit that outputs a clock signal based on an oscillation signal from the oscillation circuit; a processing circuit; an interface circuit for communicating with an external device; a clock terminal; a first terminal; and a second terminal, wherein the processing circuit switches between a first mode, a second mode, and a third mode based on an input signal input to the first terminal, wherein in the first mode the clock terminal outputs the clock signal, in the second mode the interface circuit communicates with the external device via the clock terminal, and in the third mode the interface circuit communicates with the external device via the second terminal.

[0006] Another aspect of this disclosure relates to the above-described oscillator evaluation method, wherein the oscillator is set to the third mode, and operation setting data is written to the register contained in the oscillator via the second terminal and the interface circuit to perform the operation setting of the oscillator, and the oscillator is evaluated based on the clock signal output by the clock terminal in the first mode.

[0007] Another aspect of this disclosure relates to a method of manufacturing the aforementioned oscillator, wherein the oscillator is set to the second mode, and manufacturing write data is written to the non-volatile memory contained in the oscillator via the clock terminal and the interface circuit. Attached Figure Description

[0008] Figure 1 This is a diagram illustrating an example of the structure of an oscillator.

[0009] Figure 2This is a diagram illustrating the functions of the terminals connected to the solder pads of the circuit device.

[0010] Figure 3 This diagram illustrates the difference in connection between the pads on the circuit device side and the terminals on the package side.

[0011] Figure 4 This is a diagram illustrating the effects of this embodiment.

[0012] Figure 5 This is a diagram illustrating an example of an evaluation method for oscillators.

[0013] Figure 6 This is a diagram illustrating an example of how an oscillator is manufactured.

[0014] Figure 7 This is a diagram illustrating an example of the state transitions of an oscillator.

[0015] Figure 8 This is a diagram illustrating the structure of the processing circuit and the interface circuit.

[0016] Figure 9 This is a diagram illustrating an example of a waveform switching to the second mode.

[0017] Figure 10 This is a diagram illustrating an example of a waveform switching to the third mode.

[0018] Figure 11 This is a diagram illustrating another structural example of an oscillator.

[0019] Figure 12 This is a diagram illustrating another structural example of the processing circuit and interface circuit.

[0020] Figure 13 This is a diagram illustrating another waveform example of switching to the second mode.

[0021] Figure 14 This is a diagram illustrating another waveform example of switching to the third mode.

[0022] Label Explanation

[0023] 1…Oscillator, 3…Reverberant, 10…Oscillator Circuit, 20…Output Circuit, 30…Processing Circuit, 32…Detection Circuit, 34…Sequencer, 36…Flip-flop Circuit, 40…Interface Circuit, 42, 110…Selection Circuit, 44…Serial Interface Circuit, 50…Register, 60…Non-volatile Memory, 100…Communication Control Device, 120…Terminal Control Circuit, 130…Serial Communication Control Circuit, 200…Evaluation Device 300… Manufacturing apparatus, CK… Clock signal, CKX… Inverted clock signal, CS1, CS2, CS3… Control signals, M1… First mode, M2… Second mode, M3… Third mode, P1, P2, PCK, PCKX, PGD, PVC, PX1, PX2… Pads, SG1… First input signal, SG2… Second input signal, t1, t2, t11, t12, t21, t22, t31, t32… Time, T1… First terminal, T2… Second terminal, T11, T12… Connection terminals, TCK… Clock terminal, TCKX… Inverted clock terminal, TGD… Ground terminal, TVC… Power terminal. Detailed Implementation

[0024] The preferred embodiments of this disclosure will now be described in detail. Furthermore, the embodiments described below are not intended to unduly limit the scope of the claims, and the structures described in these embodiments are not necessarily all essential components.

[0025] Figure 1 This diagram illustrates an example of the structure of the oscillator 1 according to this embodiment. The oscillator 1 of this embodiment includes: an oscillation circuit 10 that oscillates the oscillator 3; an output circuit 20 that outputs a clock signal CK based on the oscillation signal of the oscillation circuit 10; a processing circuit 30; an interface circuit 40 that communicates with an external device; a clock terminal TCK; a first terminal T1; and a second terminal T2. More specifically, the oscillator 1 includes the oscillator 3 and the circuit arrangement shown in A1. The circuit arrangement shown in A1 is more specifically, for example, an IC (Integrated Circuit) chip manufactured using semiconductor technology. That is, in the circuit arrangement shown in A1, transistors and other components, wiring, etc., are formed using semiconductor technology in a manner that includes the oscillation circuit 10, the output circuit 20, the processing circuit 30, and the interface circuit 40. Furthermore, although a specific package structure is not shown, the chip of this circuit arrangement is mounted in a predetermined package and can operate as the oscillator 1. In addition, for example, if the oscillator 1 is a temperature-compensated type, it can be a temperature-compensated quartz oscillator (TCXO) without a constant temperature bath, or it can be a constant temperature bath type quartz oscillator (OCXO) with a constant temperature bath.

[0026] In addition, for ease of explanation, Figure 1 The circuit diagram shown in A1 includes pads P1, P2, PCK, PCKX, PGD, PVC, PX1, and PX2. In this embodiment, the connection area formed on the IC chip is called a "pad," and the connection terminals formed on the external connection pads of the package for connection with external devices are called "terminals." Hereinafter, the package of the method in this embodiment is a 6-terminal package consisting of 6 terminals, but the package used for the oscillator 1 is also known to be a 4-terminal package consisting of 4 terminals, for example, as will be described later.

[0027] Furthermore, in this embodiment, "connection" refers to an electrical connection. An electrical connection is a connection that enables the transmission of electrical signals, and is a connection capable of transmitting information based on electrical signals. Additionally, for example, in... Figure 1 The diagram illustrates the connection between the first terminal T1 (described later) and pad P1, but it is simplified to show the connection between pad P1 and the first terminal T1 via bonding wires, internal package connection pads, package substrate wiring, and external connection pads. The connections between the second terminal T2 and pad P2 (described later), the clock terminal TCK and pad PCK (described later), the inverting clock terminal TCKX and pad PCKX (described later), the power terminal TVC and pad PVC (described later), and the ground terminal TGD and pad PGD (described later) are also similar.

[0028] Furthermore, in subsequent figures, illustrations of structures that have already appeared but are not used for explanation will be appropriately omitted. For example, those described later... Figure 3 The oscillator 1 shown only illustrates the pads and terminals, but this is only because it is not used for... Figure 3 The explanation was omitted. Figure 1 The diagrams of the circuits described herein. Regarding what follows... Figure 5 , Figure 6 For the same reason, the diagram of the oscillator 1 shown is omitted as it is not part of the illustration.

[0029] Pads PX1 and PX2 are connected to oscillator 3. Figure 1The diagram briefly illustrates the connection of pads PX1 and PX2 to electrode pads formed on the base of the oscillator 3, for example, via a conductive adhesive. The oscillator 3 is a component that generates mechanical vibration through an electrical signal. The oscillator 3 can be implemented, for example, using a vibrating plate such as a quartz resonator. For example, the oscillator 3 can be implemented using a quartz resonator that performs thickness shear vibration with an AT cut or SC cut, a tuning fork type quartz resonator, or a double tuning fork type quartz resonator. For example, the oscillator 3 can be an oscillator built into a temperature-compensated quartz oscillator (TCXO) or an oscillator built into a constant temperature bath type quartz oscillator (OCXO). In addition, the oscillator 3 of this embodiment can also be implemented using various vibrating plates, such as those other than thickness shear vibration type, tuning fork type, or double tuning fork type, or piezoelectric resonator made of materials other than quartz. For example, as oscillator 3, it can also be a SAW (Surface Acoustic Wave) resonator, or a MEMS (Micro Electro Mechanical Systems) oscillator made of silicon using a silicon substrate.

[0030] The oscillation circuit 10 is a circuit that causes the oscillator 3 to oscillate. For example, the oscillation circuit 10 outputs an oscillation clock signal by causing the oscillator 3 to oscillate. For example, the oscillation circuit 10 can be implemented using passive components such as an oscillation drive circuit, a capacitor, and a resistor electrically connected to one end and the other end of the oscillator 3. The drive circuit can be implemented, for example, using a CMOS inverter circuit or a bipolar transistor. The drive circuit is the core circuit of the oscillation circuit 10, and it drives the oscillator 3 with voltage or current, thereby causing the oscillator 3 to oscillate. As the oscillation circuit 10, various types of oscillation circuits, such as inverter type, Pierce type, Colpitts type, or Hartley type, can be used. In addition, the oscillation circuit 10 may also include a variable capacitor circuit, for example, and the oscillation frequency can be adjusted by adjusting the capacitance of the variable capacitor circuit. The variable capacitor circuit can be implemented, for example, using a variable capacitor element such as a varactor diode. For example, the variable capacitor circuit can be implemented using a variable capacitor element that controls the capacitance based on a temperature-compensated voltage. Alternatively, the variable capacitor circuit can also be implemented using a capacitor array and a switch array connected to the capacitor array.

[0031] The output circuit 20, based on the oscillation clock signal from the oscillation circuit 10, outputs a clock signal CK and an inverted clock signal CKX constituting a differential clock signal. For example, the output circuit 20 buffers the oscillation clock signal from the oscillation circuit 10, outputs the clock signal CK to pad PCK, and outputs the inverted clock signal CKX to pad PCKX. Additionally, in Figure 1The diagram illustrates an example of the output circuit 20 outputting a differential clock signal. However, the output circuit 20 can also output the clock signal CK to the pad PCK in single-ended signal form, as will be described later.

[0032] In this embodiment, for ease of explanation, the clock signal output from the output circuit 20 for operation of the oscillator 1 is referred to as the "clock signal CK," and as described later, the clock signal output from the interface circuit 40 for serial communication is referred to as the "serial clock signal." The serial clock signal is generated by setting the oscillation clock signal from the oscillation circuit 10 to a desired frequency via a frequency divider circuit (not shown).

[0033] The processing circuit 30 controls various parts of the circuit device. The processing circuit 30 can be a logic circuit that can be automatically configured and routed using a gate array or similar means, but it can also be implemented using a processor or similar means. For example, the processing circuit 30 controls the switching of the operating mode of the oscillator 1 based on the input of the first input signal SG1 and the second input signal SG2, which will be described later. Specifically, the operating modes include, for example, the first mode M1, the second mode M2, and the third mode M3, etc., as detailed later.

[0034] Interface circuit 40 communicates with external devices. Specifically, external devices include, for example, the communication control device 100 and manufacturing apparatus 300, which will be described later. More specifically, interface circuit 40 communicates with external devices via a serial interface during the testing and manufacturing of oscillator 1. For example, interface circuit 40 communicates via a serial interface using serial data input / output from the serial data signal input terminal, synchronized with the serial clock signal input / output from the serial communication serial clock signal input terminal. In this embodiment, an example is shown where the external device is the master device and oscillator 1 is the slave device, inputting a serial clock signal to interface circuit 40 via the serial clock signal input terminal. Furthermore, in this embodiment, which terminal is assigned to the serial communication serial clock signal input terminal varies depending on the operating mode, as will be described later. Similarly, which terminal is assigned to the serial communication data signal input terminal varies depending on the operating mode.

[0035] Furthermore, the testing in this embodiment refers to testing the operation of the manufactured oscillator 1, also known as inspection. In addition, the evaluation in this embodiment includes evaluating the characteristics of the clock signal by measuring clock signals such as CK, which are related to the operation of the oscillator 1; the evaluation process is included in the testing process. For example, as described later, by evaluating the oscillator 1 while changing the data written to register 50 during testing, various measurement data can be obtained. Furthermore, as described later, in the manufacturing process of the oscillator 1, appropriate parameters are set at the factory based on the obtained measurement data, and data based on the set parameters is written to the non-volatile memory 60, thereby shipping the oscillator 1.

[0036] Furthermore, the oscillator 1 in this embodiment may also include Figure 1 The power supply circuit shown in A2 is included in the circuit arrangement shown in A1. It receives power supply voltage via power terminal TVC and pad PVC, and ground voltage via ground terminal TGD and pad PGD, etc. Furthermore, although the supply path is omitted from the diagram, the power supply circuit supplies regulated voltages to each circuit of the circuit arrangement after adjusting the power supply voltage.

[0037] In addition, although Figure 1 Not shown in the image, but Figure 1 The oscillator 1 may also include other structures. Other structures include, for example, Figure 5 Register 50, which will be discussed later Figure 6 The non-volatile memory 60 described later may also include, for example, a temperature sensor for temperature compensation.

[0038] use Figure 2 and Figure 3 The relationship between the terminals connected to the pads and the operating mode of the oscillator 1 in this embodiment will be explained. Furthermore, pads PX1 and PX2 are not directly related to the method of this embodiment, and therefore their description and illustrations are omitted below.

[0039] Figure 2 This diagram shows the combination of the function of the terminals connected to each pad in this embodiment with the operating mode and the number of terminals in the package. Regardless of the operating mode or the number of terminals in the package, the PVC pad is connected to the connection terminal connected to the external power supply. In other words, in this embodiment, the PVC pad is connected to the power supply terminal TVC regardless of the operating mode or the number of terminals in the package. The PGD pad is connected to the connection terminal connected to the ground node regardless of the operating mode or the number of terminals in the package. In other words, in this embodiment, the PGD pad is connected to the ground terminal TGD regardless of the operating mode or the number of terminals in the package. The description of the PVC pad and the PGD pad will be omitted below.

[0040] In addition, according to Figure 2 When oscillator 1 operates in the first mode M1, pad PCK is connected to the output terminal of clock signal CK regardless of the number of terminals in the package. That is, when oscillator 1 operates in the first mode M1, pad PCK is connected to the clock terminal TCK regardless of the number of terminals in the package. Furthermore, when oscillator 1 operates in the first mode M1, pad P1 is connected to the input terminal that receives the output enable signal regardless of the number of terminals in the package. The output enable signal is a signal that sets the clock signal CK to be enabled or disabled. Thus, for example, when the output enable signal input to the first terminal T1 is at an active level (high level), the clock signal CK is output from the clock terminal TCK. On the other hand, when the output enable signal input to the first terminal T1 is at an inactive level (low level), the clock signal CK is not output, and the voltage level of the clock terminal TCK is set to a fixed voltage level. Furthermore, according to... Figure 1 Pad P1 is connected to the first terminal T1. Therefore, when the oscillator 1 operates in the first mode M1, pad P1 is connected to the first terminal T1, which is the input terminal for the output enable signal of the input clock signal CK, regardless of the number of terminals in the package. That is, the first terminal T1 is the output enable terminal for the output enable signal of the input clock signal CK in the first mode M1. Thus, for example, when the output enable signal input to the first terminal T1 is at an active level (high level), the clock signal CK is output from the clock terminal TCK. On the other hand, when the output enable signal input to the first terminal T1 is at an inactive level (low level), the clock signal CK is not output, and the voltage level of the clock terminal TCK is set to a fixed voltage level.

[0041] Furthermore, when the oscillator 1 package has 4 terminals and the oscillator 1 operates in the first mode M1, pad PCKX becomes an unused pad. This is because there are no terminals on the package side that can connect to pad PCKX. For the same reason, when the oscillator 1 package has 4 terminals and the oscillator 1 operates in the first mode M1, pad P2 becomes an unused pad. Additionally, in Figure 2 The marking NC (Non Connect) will not be used. Furthermore, when the oscillator 1 package has 6 terminals and the oscillator 1 operates in the first mode M1, the pad PCKX is connected to the output terminal of the inverted clock signal CKX. That is, when the oscillator 1 package has 6 terminals and the oscillator 1 operates in the first mode M1, the pad PCKX is connected to the inverted clock terminal TCKX.

[0042] In addition, according to Figure 2When oscillator 1 operates in the second mode M2, pad PCK is connected to the output terminal of the serial clock signal regardless of the number of terminals in the package. That is, when oscillator 1 operates in the second mode M2, the clock terminal TCK operates as the output terminal of the serial clock signal. Furthermore, when oscillator 1 operates in the second mode M2, pad P1 is connected to the output terminal of the serial data signal regardless of the number of terminals in the package. That is, when oscillator 1 operates in the second mode M2, the first terminal T1 operates as the output terminal of the serial data signal. In other words, the processing circuit 30 operates by switching the function of the first terminal T1 between the first mode M1 and the second mode M2. Thus, by switching oscillator 1 to the second mode M2, serial communication with an external device can be performed via the interface circuit 40. Furthermore, according to... Figure 2 When oscillator 1 operates in the second mode M2, pads PCKX and P2 become unused pads regardless of the number of terminals in the package. That is, the second mode M2 ​​is one operating mode used when testing oscillator 1, and it is a mode where the number of terminals in the package is only four. Furthermore, the second mode M2 ​​is not limited to testing; for example, it can also be used during the manufacturing of oscillator 1, as detailed later.

[0043] By connecting the pads and terminals in this way, as follows: Figure 3 As shown, two types of oscillators 1 can be constructed by mounting the same IC chip in packages with different numbers of terminals, and can make testing and other operations universal. Figure 3 B10 schematically illustrates the connection relationship between the pads of the IC chip shown in B11 and the terminals of the package shown in B12. Figure 3 B20 schematically illustrates the connection relationship between the pads of the IC chip shown in B21 and the terminals of the package shown in B22. The IC chip shown in B11 is the same as the IC chip shown in B21. The package shown in B12 contains... Figure 1 The package of the aforementioned six terminals: first terminal T1, second terminal T2, power terminal TVC, ground terminal TGD, clock terminal TCK, and inverting clock terminal TCKX. Figure 3 The connection relationship between each terminal and each pad shown in B10 is as follows: Figure 1 As described above. On the other hand, compared to the package shown in B12, the package shown in B22 is a 4-terminal package excluding the second terminal T2 and the inverting clock terminal TCKX. In this case, pads P2 and PCKX become unused pads, as shown in... Figure 2 As described in [the text].

[0044] For example, such as Figure 3As shown in B20, if the package is 4-terminal, the output circuit 20 is configured to output either a single-ended clock signal CK or a differential clock signal. Therefore, by inputting the output enable signal of the clock signal CK, the oscillator 1, which outputs the single-ended clock signal CK, can operate. On the other hand, as... Figure 3 As shown in B10, if the package has 6 terminals, the output circuit 20 is configured to output a differential clock signal. Therefore, by inputting the clock signal CK and enabling the output, the oscillator 1 can operate as an output differential clock signal. That is, the first mode M1 is the operating mode when the oscillator 1 is assembled into a specified device for operation. The specified device refers to various electronic devices, but it can also be other devices.

[0045] Furthermore, in cases such as testing the oscillator 1, as described later, it is necessary to connect the oscillator 1 used for testing to the communication control device 100, but by forming it as Figure 3 The terminal arrangement of the packages shown in B10 and B20 allows for the standardization of connection interfaces for testers, etc. For example, by manufacturing a connection interface that connects to the terminals of the package shown in B10, when testing the package shown in B10, the connection terminal connected to the second terminal T2 and the connection terminal connected to the inverting clock terminal TCKX can be left unused in this connection interface. In the testing environment described above, the oscillator 1 is set to the second mode M2. Therefore, the testing environment can be standardized in both 4-terminal and 6-terminal packages, improving the convenience of testing the oscillator 1.

[0046] Furthermore, while the oscillator 1 in this embodiment is limited to a package with 6 terminals, it can also be set to the third mode M3. The third mode M3, like the second mode M2, is one type of operating mode used during testing. Return Figure 2When oscillator 1 operates in the third mode M3, pad PCK is connected to the output terminal of the clock signal CK, just as it is when oscillator 1 operates in the first mode M1. Similarly, pad PCKX is connected to the output terminal of the inverted clock signal CKX, just as it is when oscillator 1 operates in the first mode M1. That is, when oscillator 1 operates in the third mode M3, the clock terminal TCK and the inverted clock terminal TCKX perform the same functions as when operating in the first mode M1. Furthermore, when oscillator 1 operates in the third mode M3, pad P1 is connected to the output terminal of the serial data signal, just as it is when oscillator 1 operates in the second mode M2. That is, the function of the first terminal T1 is the same in both the second mode M2 ​​and the third mode M3. Additionally, when oscillator 1 operates in the third mode M3, pad P2 is connected to the input terminal of the serial clock signal. In other words, the processing circuit 30 switches the operating mode so that the function of the clock terminal TCK in the second mode M2 ​​is assumed by the second terminal T2 in the third mode M3.

[0047] use Figure 4 The effects of the method described in this embodiment will be explained. Furthermore, unless otherwise specified, illustrations and explanations of the pads included in the circuit arrangement of the oscillator 1 will be omitted from this description. Figure 4 C10 is a schematic diagram showing the connection relationship of each terminal of oscillator 1 during testing, when oscillator 1 can switch between the first mode M1 and the second mode M2. Additionally, Figure 4 This is a schematic diagram; illustrations of structures and other details irrelevant to the explanation have been omitted. Furthermore, Figure 4 The layout of the terminals of the oscillator 1 shown in the figure is similar to... Figure 3 The terminal layout of the package shown in B12 is the same.

[0048] In addition, for ease of explanation, Figure 4 C10 omits the connections to the second terminal T2, power terminal TVC, ground terminal TGD, and signal lines. Similarly, for ease of explanation, Figure 4 C20 omits the connections of the power supply terminal TVC and the ground terminal TGD to signal lines, etc. That is, the power supply terminal TVC is connected to a power source (not shown), and the ground terminal TGD is connected to a grounding node (not shown). Additionally, the second terminal T2 can also be... Figure 4 The connection shown in C10 is connected to the communication control device 100 via a signal line, as detailed later.

[0049] For example, in the test, oscillator 1 is connected to communication control device 100 and evaluation device 200. Communication control device 100 communicates serially with oscillator 1, sending operation setting data (described later) to oscillator 1. Evaluation device 200 receives the differential clock signal output by oscillator 1 based on the received operation setting data, and evaluates the characteristics of the differential clock signal. Furthermore, in Figure 4 The communication control device 100 and the evaluation device 200 are shown separately, but the device that integrates the communication control device 100 and the evaluation device 200 can also be connected to the oscillator 1.

[0050] Figure 4 C10 shows a connection example tested using the second mode, M2. For example... Figure 2 , Figure 3 In the test, the first terminal T1 and the clock terminal TCK of oscillator 1 are connected to the communication control device 100. First, the operating mode of oscillator 1 is switched to the second mode M2. The communication control device 100 sets the operation of oscillator 1 via the first terminal T1 and the clock terminal TCK. Then, in order to output the differential clock signal that is to be evaluated, the operating mode is switched back to the first mode M1, and therefore the clock terminal TCK and the inverting clock terminal TCKX are connected to the evaluation device 200. That is, when testing oscillator 1, which can switch between the first mode M1 and the second mode M2, the function of the clock terminal TCK needs to be switched in order to evaluate the differential clock signal. Specifically, for example, by using the switch shown in C11, the connection between the clock terminal TCK and the communication control device 100 and the connection between the clock terminal TCK and the evaluation device 200 can be switched.

[0051] Figure 4 C20 illustrates a connection example tested using the third mode M3. In this case, the oscillator 1 of this embodiment is switched to the third mode M3. Therefore, the connection relationship of the terminals of the oscillator 1 under evaluation can also be as follows: Figure 4 As shown in C20. (As in...) Figure 2 As described above, in the third mode M3, the first terminal T1 becomes the input terminal for the serial data signal, and the second terminal T2 becomes the input terminal for the serial clock signal. On the other hand, in the third mode M3, the clock terminal TCK becomes the output terminal for the clock signal CK, and the inverting clock terminal TCKX becomes the output terminal for the inverting clock signal CKX. Therefore, the connection relationship of the terminals of oscillator 1 when oscillator 1 is switched to the third mode M3 is as follows: Figure 4 As shown in C20.

[0052] For example, in evaluating oscillator 1, such as Figure 4As shown in C20, oscillator 1 is connected to communication control device 100 and evaluation device 200, and oscillator 1 is connected to an external power supply (not shown). Furthermore, after supplying power voltage to oscillator 1, the operating mode of oscillator 1 is switched to third mode M3 based on control data input from communication control device 100. Communication control device 100 sets the operation of oscillator 1 via first terminal T1 and second terminal T2. Then, in order to output the differential clock signal to be evaluated, the operating mode is switched to first mode M1. In this case, when evaluating the differential clock signal, it is not necessary to switch the function of the clock terminal TCK. Thus, by using the third mode M3 for testing... Figure 4 The connection shown in C20 allows for the evaluation of oscillator 1 without using the switch shown in C11. Therefore, it is compatible with the second mode M2. Figure 4 Compared to the connection shown in C10, it is possible to eliminate the propagation of noise via the switch to the signal line that connects the clock terminal TCK to the evaluation device 200.

[0053] In oscillator 1, the input signal SG1 from communication control device 100 is received via the first terminal T1. That is, Figure 1 The processing circuit 30 receives the first input signal SG1 via the first terminal T1, thereby changing the operating mode of the oscillator 1 to the third mode M3. Additionally, in Figure 4 In the connection shown in C10, the processing circuit 30 also receives the first input signal SG1 via the first terminal T1, thereby controlling the operating mode of the oscillator 1 to either the first mode M1 or the second mode M2. Details regarding the switching to each operating mode will be described later; for example, switching to the first mode M1 when the first input signal SG1 does not contain a specified type signal, and switching to the second mode M2 ​​or the third mode M3 when the first input signal SG1 contains a specified type signal.

[0054] Based on the above, the oscillator 1 of this embodiment includes: an oscillation circuit 10 that causes the oscillator 3 to oscillate; an output circuit 20 that outputs a clock signal based on the oscillation signal of the oscillation circuit 10; a processing circuit 30; an interface circuit 40 that communicates with an external device; a clock terminal TCK; a first terminal T1; and a second terminal T2. The processing circuit 30 switches between a first mode M1, a second mode M2, and a third mode M3. In the first mode M1, the clock terminal TCK outputs a clock signal based on the input signal input to the first terminal T1, i.e., the first input signal SG1. In the second mode M2, the interface circuit 40 communicates with an external device via the clock terminal TCK. In the third mode M3, the interface circuit 40 communicates with an external device via the second terminal T2.

[0055] Thus, the oscillator 1 of this embodiment includes an oscillation circuit 10 and an output circuit 20, and therefore can operate as an oscillator 1. Furthermore, since it also includes an interface circuit 40, it can communicate with external devices and perform tests, etc. Moreover, by including a first terminal T1 and a processing circuit 30, the oscillator 1 can be switched to multiple operating modes based on the first input signal SG1. Furthermore, it can switch between a first mode M1 and a second mode M2, thus allowing switching between operating modes such as operating as an oscillator 1 and performing tests. Furthermore, the oscillator 1 of this embodiment can also operate in a third mode M3, therefore, the clock terminal TCK can be connected to the evaluation device 200 without including a switch.

[0056] Evaluation of oscillator 1 can include, for example, measuring the phase noise of the clock signal CK and the inverted clock signal CKX. However, when the switch shown in C11 is connected to the clock terminal TCK, noise may propagate through the switch to the signal line connected to the clock terminal TCK. As a result, the intersection point of the waveforms of the clock signal CK and the inverted clock signal CKX fluctuates, and the characteristics of the differential clock signal may be degraded. In this regard, this embodiment can switch the operating mode of oscillator 1 to the third mode M3. Therefore, the clock terminal TCK can be connected to the evaluation device 200 without the switch, thus improving the evaluation accuracy of oscillator 1. Thus, both appropriate switching of the operating mode of oscillator 1 and improved evaluation accuracy of oscillator 1 can be achieved.

[0057] Furthermore, the interface circuit 40 can also communicate with external devices via the first terminal T1 and the clock terminal TCK in the second mode M2, and via the first terminal T1 and the second terminal T2 in the third mode M3. Thus, when using the second mode M2, various oscillators 1 with different numbers of packaged terminals can be evaluated using a common external device, and when using the third mode M3, the evaluation accuracy of the 6-terminal oscillator 1 can be improved.

[0058] Furthermore, the first terminal T1 can also be the output enable terminal for the clock signal CK input in the first mode M1. Thus, an oscillator 1 can be constructed that allows the clock signal CK to be enabled or disabled in the first mode M1.

[0059] Furthermore, the oscillator 1 in this embodiment may also include: a power supply terminal TVC; a ground terminal TGD; and an inverting clock terminal TCKX, which outputs the inverted clock signal CKX, which constitutes the differential clock signal CK and the inverted clock signal CKX. Thus, an oscillator 1 that outputs a differential clock signal by turning on the power supply can be constructed.

[0060] Alternatively, the second terminal T2 can also be a terminal that is not used in the first mode M1. Thus, an oscillator 1 can be constructed such that, in the first mode M1 which operates as an oscillator 1, the second terminal T2 is not used, and, when performing tests or the like, it can be used as the second terminal T2 in the third mode M3.

[0061] Furthermore, the method of this embodiment can also be implemented as an evaluation method for oscillator 1. Using Figure 5 The evaluation method for the oscillator 1 described above will be explained. Figure 5 Is Figure 4 The connection shown in C20 illustrates the communication control device 100 and the oscillator 1 in more detail. Figure 5 More specifically, the oscillator 1 also includes a register 50, which is connected to the interface circuit 40. Thus, during serial communication between the oscillator 1 and the communication control device 100, data received from the communication control device 100 can be written to the register 50. Therefore, the user operating the communication control device 100 can test the oscillator 1 under desired conditions.

[0062] More specifically, the communication control device 100 includes, for example, a connection terminal T11, a connection terminal T12, a selection circuit 110, a terminal control circuit 120, and a serial communication control circuit 130. The selection circuit 110 selects either the output signal from the terminal control circuit 120 or the output signal from the serial communication control circuit 130 based on a control signal CS1, and outputs the selected signal to the connection terminals T11 and T12. For example, when the control signal CS1 is high, the output signal from the terminal control circuit 120 is selected; when the control signal CS1 is low, the output signal from the serial communication control circuit 130 is selected. Furthermore, the connection terminal T11 of the communication control device 100 is connected to the first terminal T1 of the oscillator 1, and the connection terminal T12 of the communication control device 100 is connected to the second terminal T2 of the oscillator 1.

[0063] For example, when it is desired to set the operating mode of oscillator 1 to the third mode M3, a high-level control signal CS1 is input to the selection circuit 110 in the communication control device 100. As a result, a first input signal SG1 is sent from the terminal control circuit 120 to the first terminal T1 via the connection terminal T11, and a second input signal SG2 is sent from the terminal control circuit 120 to the second terminal T2 via the connection terminal T12. Thus, by the method described later, the operating mode of oscillator 1 is set to the third mode M3. Afterwards, a low-level control signal CS1 is input to the selection circuit 110. As a result, a serial data signal is input from the serial communication control circuit 130 to the interface circuit 40 via the connection terminal T11 and the first terminal T1, and a serial clock signal is input to the interface circuit 40 via the connection terminal T12 and the second terminal T2. Thus, the desired operation setting data can be written to the register 50 via the interface circuit 40. The operation setting data may be, for example, data that sets the oscillation frequency, but may also include other data, such as data related to temperature compensation. Thus, after setting the oscillator 1 to the third mode M3 and configuring its operation, the differential clock signal can be evaluated starting from the switch of the oscillator 1's operation mode to the first mode M1. The detailed method for switching the oscillator 1 to the first mode M1 will be described later.

[0064] Thus, this embodiment relates to the evaluation method for the oscillator 1 described above. In the evaluation method for the oscillator 1 of this embodiment, the oscillator 1 is set to the third mode M3, and operation setting data is written to the register 50 included in the oscillator 1 via the second terminal T2 and the interface circuit 40, thereby setting the operation of the oscillator 1. Furthermore, the evaluation method for the oscillator 1 of this embodiment evaluates the oscillator 1 based on the clock signal CK output from the clock terminal TCK in the first mode M1. Therefore, it is possible to construct a method for evaluating the oscillator 1 by separating the path of writing to the register 50 from the path of evaluating the oscillator 1, thereby improving the measurement accuracy of the output clock signal of the oscillator 1.

[0065] Furthermore, the method of this embodiment can also be implemented as a manufacturing method for oscillator 1. Figure 6 The manufacturing method of the oscillator 1 described above will be explained. For example, as... Figure 6As shown, the oscillator 1 includes a non-volatile memory 60, which is connected to the interface circuit 40. The non-volatile memory 60 is a storage device for storing various information used in the oscillator 1. The non-volatile memory 60 can be implemented, for example, by an EEPROM such as a FAMOS (Floating Gate Avalanche Injection MOS) memory or a MONOS (Metal-Oxide-Nitride-Oxide-Silicon) memory, but is not limited to these; it can also be an OTP (One Time Programmable) memory or a fuse-type ROM, etc.

[0066] For example, in the manufacturing process of oscillator 1, such as Figure 6 As shown, the process includes the following steps: connecting the oscillator 1 to the manufacturing apparatus 300 and writing manufacturing-time write data to the non-volatile memory 60. The manufacturing apparatus 300 is a device for writing manufacturing-time write data to the non-volatile memory 60, but the communication control device 100 described above can also operate as the manufacturing apparatus 300. In this step, by setting the oscillator 1 to the second mode M2, the oscillator 1 uses the first terminal T1 and the clock terminal TCK to perform serial communication with the manufacturing apparatus 300. That is, although in Figure 6 Although not shown in the figure, the terminals of oscillator 1 are connected to manufacturing apparatus 300 in a manner that allows oscillator 1 to be set to the second mode M2, and manufacturing apparatus 300 is configured to be able to communicate serially with oscillator 1. Thus, writing data during manufacturing is written to non-volatile memory 60 based on serial data output from manufacturing apparatus 300.

[0067] When mass-producing oscillator 1, from the viewpoint of manufacturing efficiency, it is preferable to be able to share manufacturing conditions with multiple types of oscillator 1. As described above, the second mode M2 ​​is a mode that can be used in both oscillator 1 with 4 terminals per package and oscillator 1 with 6 terminals per package. Therefore, conveniently, in manufacturing processes that are not for testing, by operating the oscillator 1 in the second mode M2, serial communication with the manufacturing apparatus 300 can be achieved.

[0068] Thus, this embodiment relates to the manufacturing method of the oscillator 1 described above. In the manufacturing method of the oscillator 1 in this embodiment, the oscillator 1 is set to the second mode M2, and the write data during manufacturing is written to the non-volatile memory 60 included in the oscillator 1 via the clock terminal TCK and the interface circuit 40. As a result, the oscillator 1 can be evaluated with high accuracy, and the manufacturing efficiency of the oscillator 1 can be improved.

[0069] use Figure 7 , Figure 8 , Figure 9 , Figure 10 The switching of the operating mode of oscillator 1 will be explained in more detail. Figure 7 This is a diagram showing the state transitions of oscillator 1. Figure 7 The "power on" state refers to the state when an external power supply (not shown) provides power to the oscillator 1. When the voltage at the power terminal TVC exceeds a certain value, it transitions to the "initialization" state. During "initialization," for example, various information stored in the non-volatile memory 60 is transferred to the register 50, and the operation of each circuit begins based on the information transferred to the register 50. If a certain period of time elapses after the transition to "initialization" and the first terminal T1 does not receive the specified mode signal (described later), the oscillator 1 transitions from "initialization" to the first mode M1, which is the operating mode. Thus, for example, when the oscillator 1 is assembled into an electronic device, the assembled oscillator 1 operates in the first mode M1 by connecting the desired power supply voltage to the electronic device. On the other hand, if the first terminal T1 receives a specified type signal (described later) before a certain period has elapsed, the oscillator 1 transitions from "initialization" to any mode between the second mode M2 ​​and the third mode M3, as detailed later. Furthermore, by satisfying specified conditions, it transitions from the second mode M2 ​​or the third mode M3 to the first mode M1. The specified conditions are that a pre-set period has elapsed or the interface circuit 40 receives a pre-determined instruction, etc.

[0070] Figure 8 This diagram illustrates a more detailed structural example of the processing circuit 30 and the interface circuit 40. The processing circuit 30 includes a detection circuit 32, a sequencer 34, and a trigger circuit 36. The interface circuit 40 includes a selection circuit 42 and a serial interface circuit 44. A first input signal SG1, input to the first terminal T1, is sent to the D terminals of the detection circuit 32 and the trigger circuit 36, as well as the serial interface circuit 44. Additionally, in the second mode M2 ​​and the third mode M3, a serial data signal is input to the first terminal T1, thereby being input to the serial interface circuit 44. The detection circuit 32 sends a control signal based on the received first input signal SG1 to the sequencer 34. The sequencer 34, based on the control signal received from the detection circuit 32, sends a control signal CS2 to the CK terminal of the trigger circuit 36 ​​and the serial interface circuit 44. The trigger circuit 36 ​​outputs a control signal CS3 from the Q terminal based on the input first input signal SG1 and the control signal CS2.

[0071] Based on the received control signal CS3, selection circuit 42 selects either the serial clock signal input to the second terminal T2 as the second input signal SG2 or the serial clock signal input to the clock terminal TCK, and outputs it to serial interface circuit 44. For example, when control signal CS3 is high, the serial clock signal from the second terminal T2 is output to serial interface circuit 44; when control signal CS3 is low, the serial clock signal from the clock terminal TCK is output to serial interface circuit 44. Serial interface circuit 44 can be implemented, for example, using a circuit conforming to a communication standard such as I2C (Inter-Integrated Circuit).

[0072] Figure 9 Examples of the voltage waveforms at the power supply terminal TVC, the first input signal SG1 input to the first terminal T1, the second input signal SG2 input to the second terminal T2, and the control signal CS2 output from the sequencer 34 are shown sequentially from the top of the paper. After the oscillator 1 transitions to the initialization state at time t1, the first terminal T1 receives the signal shown in E1. The signal shown in E1 is a pre-defined type signal used to switch to the second mode M2 ​​or the third mode M3, also known as an entry signal, etc.

[0073] Then, the detection circuit 32 sends a specified control signal, indicating that the signal shown in E1 has been received, to the sequencer 34. Upon receiving this specified control signal, the sequencer 34 changes the output control signal CS2 from low to high at time t2. Consequently, the trigger circuit 36 ​​changes the control signal CS2 from low to high at time t2, thereby latching the low-level second input signal SG2 and outputting a low-level control signal CS3. Thus, the selection circuit 42 selects the serial clock signal input to the clock terminal TCK based on the low-level control signal CS3. Therefore, the serial interface circuit 44 selects the operating mode, i.e., the second mode M2, for serial communication using the first terminal T1 and the clock terminal TCK. Therefore, in Figure 9 After time t2, it switches to the second mode M2.

[0074] Figure 10 Here are examples of voltage waveforms when switching from the initial state to the third mode M3. After oscillator 1 transitions to the initial state at time t11, the first terminal T1 receives the signal shown in E11. The signal shown in E11 is... Figure 9The input signal is the same as the specified mode signal of E1. Furthermore, the voltage of the second input signal SG2, input to the second terminal T2, changes from low to high. This voltage can change from low to high at any time, as long as it becomes high before time t12. Then, the detection circuit 32 sends a specified control signal indicating that the signal shown in E11 has been received to the sequencer 34. The sequencer 34, upon receiving this specified control signal, causes the output control signal CS2 to change from low to high at time t12. Consequently, the trigger circuit 36 ​​changes the control signal CS2 from low to high at time t12, thereby latching the high-level second input signal SG2 and outputting a high-level control signal CS3. Therefore, the selection circuit 42, based on the high-level control signal CS3, selects the serial clock signal that is the input to the second input signal SG2 and outputs it to the serial interface circuit 44. Thus, the serial interface circuit 44 selects the operating mode, i.e., the third mode M3, for serial communication using the first terminal T1 and the second terminal T2. Therefore, in Figure 10 After time t12, it switches to the third mode M3.

[0075] Thus, in the oscillator 1 of this embodiment, the interface circuit 40 includes a selection circuit 42 and a serial interface circuit 44. Therefore, it is possible to construct an oscillator 1 that can switch between serial communication based on the second mode M2 ​​and serial communication based on the third mode M3.

[0076] Alternatively, for example, the second mode M2 ​​or the third mode M3 can be set based on the logic level of the first input signal SG1. In this case, by, for example, Figure 11 This configuration forms oscillator 1, which can set either the second mode M2 ​​or the third mode M3 based on the logic level of the first input signal SG1. Furthermore, more specifically, for example, by means of... Figure 12 The processing circuit 30 and the interface circuit 40 are configured in this way, and the setting of the second mode M2 ​​or the third mode M3 can be realized based on the logic level of the first input signal SG1.

[0077] Compare Figure 1 and Figure 11 , Figure 11 Examples and Figure 1 The difference in this example is that there is no signal line connecting pad P2 to processing circuit 30; otherwise, they are the same. More specifically, compare... Figure 12 and Figure 8 ,exist Figure 12 In the example, at the point where the first input signal SG1 from the first terminal T1 is input to the D terminal of the flip-flop circuit 36, it is similar to... Figure 8 The examples are different, but everything else is the same.

[0078] Figure 13 The following is an example, shown from the top of the page, in sequence: the voltage waveform of the power supply terminal TVC, the voltage waveform of the first input signal SG1 input to the first terminal T1, and the voltage waveform of the control signal CS2 output from the sequencer 34. After oscillator 1 transitions to the initialization state at time t21, the first terminal T1 receives the signal shown in E21. The signal shown in E21 is... Figure 9 The input signal shown in E1 is the same. Additionally, after the signal shown in E21 is input to the first terminal T1, a low-level first input signal SG1 is input.

[0079] Then, the detection circuit 32 sends a control signal indicating that the signal shown in E21 has been received to the sequencer 34. Upon receiving this specified control signal, the sequencer 34 changes the output control signal CS2 from low to high at time t22. Consequently, the trigger circuit 36 ​​changes the control signal CS2 from low to high at time t22, thereby latching the low-level first input signal SG1 and outputting a low-level control signal CS3. Thus, the selection circuit 42 selects the serial clock signal input to the clock terminal TCK based on the low-level control signal CS3. Therefore, the serial interface circuit 44 selects the operating mode, i.e., the second mode M2, for serial communication using the first terminal T1 and the clock terminal TCK. Therefore, in Figure 13 After time t22, it switches to the second mode M2.

[0080] Additionally, in cases where you want to switch from the initial state to the third mode M3, such as Figure 14 The waveform shown indicates that oscillator 1 should be activated. After oscillator 1 transitions to the initialization state at time t31, the first terminal T1 receives the signal shown in E31. The signal shown in E31 is... Figure 9 The input signal shown in E1 is the same. Additionally, after the signal shown in E31 is input to the first terminal T1, a high-level first input signal SG1 is input to the first terminal T1. Then, the detection circuit 32 sends a control signal indicating that the signal shown in E31 has been received to the sequencer 34. The sequencer 34, by receiving this specified control signal, changes the output control signal CS2 from low to high at time t32. Consequently, the trigger circuit 36 ​​changes the control signal CS2 from low to high at time t32, thereby latching the high-level first input signal SG1 and outputting a high-level control signal CS3. Therefore, the selection circuit 42 selects the serial clock signal input as the second input signal SG2 based on the high-level control signal CS3, and outputs the second input signal SG2 to the serial interface circuit 44. Thus, the operating mode of the serial interface circuit 44 for serial communication using the first terminal T1 and the second terminal T2, i.e., the third mode M3, is selected. Therefore, in Figure 14After time t32, it switches to the third mode M3.

[0081] Based on the above, in the oscillator 1 of this embodiment, the processing circuit 30 determines whether a predetermined type of signal has been input as the first input signal SG1. After determining that a predetermined type of signal has been input, it selects either the second mode M2 ​​or the third mode M3 based on the logic level of the first input signal SG1 or the second input signal SG2, which is an input signal to the second terminal T2. Thus, an oscillator 1 can be constructed that switches to a desired operating mode based on the control of the logic level of the first input signal SG1 or the second input signal SG2 and the input of the predetermined mode signal.

[0082] As described above, the oscillator of this embodiment includes: an oscillation circuit that causes an oscillator to oscillate; an output circuit that outputs a clock signal based on the oscillation signal of the oscillation circuit; a processing circuit; an interface circuit that communicates with an external device; a clock terminal; a first terminal; and a second terminal. The processing circuit switches between a first mode, a second mode, and a third mode based on an input signal input to the first terminal, i.e., a first input signal. In the first mode, the clock terminal outputs a clock signal; in the second mode, the interface circuit communicates with the external device via the clock terminal; and in the third mode, the interface circuit communicates with the external device via the second terminal.

[0083] Thus, the oscillator of this embodiment can operate in the third mode. Therefore, there is no switch between the clock terminal and the external device, and thus no noise propagation via this switch, thereby improving the accuracy of phase noise measurement. Consequently, the evaluation accuracy of the oscillator's output clock signal can be improved.

[0084] Alternatively, the processing circuit may determine whether a specified type of signal has been input as the first input signal. After determining that a specified type of signal has been input, the processing circuit selects a second mode or a third mode based on the logic level of the first input signal or the input signal input to the second terminal, i.e., the second input signal.

[0085] Therefore, it is possible to construct an oscillator that switches to the desired operating mode based on the logic level control of the first or second input signal and the input of a specified mode signal.

[0086] Alternatively, in the second mode, the interface circuit communicates with the external device via the first terminal and the clock terminal; in the third mode, the interface circuit communicates with the external device via the first terminal and the second terminal.

[0087] Therefore, in the second mode, various oscillators with different numbers of terminals in the package can be evaluated using a common external device, and in the third mode, the evaluation accuracy of 6-terminal oscillators can be improved.

[0088] Alternatively, the first terminal can also be the output enable terminal of the output clock signal input in the first mode.

[0089] Therefore, it is possible to construct an oscillator that can set the clock signal to be enabled or disabled in the first mode.

[0090] In addition, the oscillator in this embodiment may also include: a power supply terminal; a ground terminal; and an inverting clock terminal, the output of which constitutes a clock signal of a differential clock signal and an inverting clock signal of the inverting clock signal.

[0091] Therefore, it is possible to construct an oscillator that outputs a differential clock signal by turning on the power.

[0092] Alternatively, the second terminal may be a terminal that is not used in the first mode.

[0093] Therefore, it is possible to construct an oscillator that, in the first mode of operation as an oscillator, uses the second terminal as an unused terminal, and in the case of testing, switches to the third mode to use the second terminal.

[0094] In addition, the interface circuit may also include a selection circuit and a serial interface circuit.

[0095] Therefore, it is possible to construct an oscillator that can switch between serial communication based on the second mode and serial communication based on the third mode.

[0096] Furthermore, this embodiment relates to the above-described oscillator evaluation method. In the oscillator evaluation method of this embodiment, the oscillator is set to a third mode, and operation setting data is written to a register included in the oscillator via a second terminal and an interface circuit, thereby setting the operation of the oscillator. Furthermore, in the oscillator evaluation method of this embodiment, the oscillator is evaluated based on the clock signal output from the clock terminal in the first mode.

[0097] Therefore, it is possible to construct a method for evaluating oscillators by separating the path for writing to the register from the path for evaluating the oscillator, thereby improving the measurement accuracy of the oscillator's output clock signal.

[0098] Furthermore, this embodiment relates to the above-described method for manufacturing an oscillator. In the method for manufacturing an oscillator in this embodiment, the oscillator is set to a second mode, and manufacturing data is written to the non-volatile memory contained in the oscillator via a clock terminal and an interface circuit.

[0099] Therefore, it is possible to evaluate oscillators with high precision and to establish manufacturing methods for oscillators that improve manufacturing efficiency.

[0100] Furthermore, while this embodiment has been described in detail above, those skilled in the art will readily understand that various modifications can be made without substantially departing from the new aspects and effects of this disclosure. Therefore, all such modifications are included within the scope of this disclosure. For example, a term described at least once in the specification or drawings along with a different, broader, or synonymous term can be replaced with that different term anywhere in the specification or drawings. Moreover, all combinations of this embodiment and its modifications are also included within the scope of this disclosure. Furthermore, the structure and operation of the oscillator, the oscillator evaluation method, and the oscillator manufacturing method are not limited to those described in this embodiment, and various modifications can be implemented.

Claims

1. An oscillator, characterized in that, The oscillator comprises: An oscillating circuit that causes the oscillator to oscillate; An output circuit that outputs a clock signal based on the oscillation signal of the oscillation circuit; Processing circuitry; Interface circuit, which communicates with external devices; Clock terminal; First terminal; and Second terminal, The processing circuit switches between a first mode, a second mode, and a third mode based on the input signal (i.e., the first input signal) input to the first terminal. In the first mode, the clock terminal outputs the clock signal. In the second mode, the interface circuit communicates with the external device via the clock terminal. In the third mode, the interface circuit communicates with the external device via the second terminal.

2. The oscillator according to claim 1, characterized in that, The processing circuit determines whether a signal of a specified type has been input as the first input signal. After determining that the specified type of signal has been input, the processing circuit selects the second mode or the third mode based on the logic level of the first input signal or the logic level of the input signal input to the second terminal, i.e., the second input signal.

3. The oscillator according to claim 1, characterized in that, In the second mode, the interface circuit communicates with the external device via the first terminal and the clock terminal. In the third mode, the interface circuit communicates with the external device via the first terminal and the second terminal.

4. The oscillator according to claim 1, characterized in that, The first terminal is the output enable terminal of the clock signal input in the first mode.

5. The oscillator according to claim 1, characterized in that, The oscillator comprises: Power terminals; Grounding terminal; and The inverting clock terminal outputs the clock signal that constitutes the differential clock signal and the inverting clock signal.

6. The oscillator according to claim 1, characterized in that, The second terminal is the terminal that is not used in the first mode.

7. The oscillator according to claim 1, characterized in that, The interface circuit includes: Select circuit; and Serial interface circuit.

8. A method for evaluating an oscillator, characterized in that, The evaluation method for the oscillator is the evaluation method for the oscillator according to any one of claims 1 to 7. Set the oscillator to the third mode. The operation setting data is written to the register contained in the oscillator via the second terminal and the interface circuit, thereby setting the operation of the oscillator. The oscillator is evaluated based on the clock signal output from the clock terminal in the first mode.

9. A method for manufacturing an oscillator, characterized in that, The method for manufacturing the oscillator is as described in any one of claims 1 to 7. Set the oscillator to the second mode. Manufacturing data is written to the non-volatile memory contained in the oscillator via the clock terminal and the interface circuit.

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