An operational amplifier and a tail current control method thereof

Abstract

This invention relates to the field of operational amplifier technology and discloses an operational amplifier and its tail current control method. The operational amplifier includes a differential input circuit, an amplification circuit, a push-pull output circuit, a differential voltage detection circuit, a transient voltage detection circuit, a first tail current generation circuit, a second tail current generation circuit, and a third tail current generation circuit. In use, the tail current of the operational amplifier is provided by the first tail current generation circuit, the second tail current generation circuit, and the third tail current generation circuit. This is equivalent to adopting a three-way parallel architecture with one basic tail current plus two independently controlled tail currents, giving the operational amplifier three adjustable tail current levels. It can adaptively adjust the tail current magnitude according to the input signal amplitude and the output voltage change rate, thereby dynamically matching the operating conditions.

Description

Technical Field

[0001] This invention relates to the field of operational amplifier technology, and more specifically to an operational amplifier and its tail current control method. Background Technology

[0002] In analog circuits, operational amplifiers are commonly used for signal amplification, level shifting, reference voltage regulation, and driving and power buffering. An operational amplifier includes two differential inputs, with the output based on the voltage difference between these two inputs. The other two differential inputs are the gates of two NMOS transistors. The sources of these two NMOS transistors are connected to a tail current generation circuit, which generates a fixed tail current.

[0003] For existing operational amplifiers, since the tail current is fixed, the following problems exist when using them: When the operational amplifier is in a static state, the excess tail current continuously consumes power, resulting in a large static current and high standby power consumption. This makes it unsuitable for applications with strict requirements for battery life, such as battery-powered portable devices and low-power IoT data acquisition terminals.

[0004] Furthermore, when there is a large differential voltage between the two differential input terminals, or when the output of the operational amplifier drives a capacitive heavy load and a rapid voltage jump occurs, the supply capability of the fixed tail current reaches a bottleneck. The transconductance of the differential pair of the NMOS transistor cannot be dynamically increased, which directly limits the slew rate and transient response speed of the operational amplifier. The output waveform is prone to problems such as slow rise time and edge distortion, making it difficult to meet the requirements of high-speed pulse signal amplification and high-power capacitive load driving. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the present invention provides an operational amplifier and a tail current control method thereof. The technical problem to be solved is that the existing operational amplifiers cannot adjust the magnitude of their tail current based on the voltage changes at the two differential input terminals and the voltage changes at the output terminal, which limits the application of the operational amplifiers.

[0006] To solve the above technical problems, in a first aspect, the present invention provides the following technical solution: an operational amplifier, comprising a differential input circuit, an amplification circuit, a push-pull output circuit, a differential voltage detection circuit, a transient voltage detection circuit, a first tail current generation circuit, a second tail current generation circuit, and a third tail current generation circuit; The differential input circuit is used to convert the two input differential voltages into a voltage output signal and generate a differential current signal based on the voltage difference between the two input differential voltages. The amplifier circuit is electrically connected to the output node of the differential input circuit and is used to amplify the voltage output signal to generate an amplified signal. The amplifier circuit is also electrically connected to the differential input circuit and is used to amplify the differential current signal to generate an amplified signal. The push-pull output circuit is electrically connected to the amplified signal output terminal of the amplifier circuit, and is used to amplify the power of the amplified signal and output it. The first tail current generating circuit is electrically connected to the differential input circuit and is used to provide the first tail current to the differential input circuit; The differential voltage detection circuit is electrically connected to the output node of the differential input circuit. It is used to generate a first driving signal input to the second tail current generation circuit when the voltage difference between the two differential voltages input to the differential input circuit is greater than a set threshold. The second tail current generation circuit provides a second tail current to the differential input circuit based on the first driving signal. The transient voltage detection circuit is electrically connected to the output terminal of the push-pull output circuit, and is used to generate a second driving signal input to the third tail current generation circuit when the output voltage of the push-pull output circuit undergoes a transient jump. The third tail current generation circuit provides a third tail current to the differential input circuit based on the second driving signal.

[0007] In one embodiment of the first aspect, the differential input circuit includes MOSFET Q1, MOSFET Q2, and resistor R1; The gates of MOSFET Q1 and MOSFET Q2 are used to input two differential voltages. The drain of MOSFET Q1 is electrically connected to one end of resistor R1; the other end of resistor R1 is electrically connected to the drain of MOSFET Q2 and the positive power supply terminal, respectively. The source terminals of MOSFET Q1 and MOSFET Q2 are electrically connected to form the tail current connection terminal of the differential input circuit. The tail current connection terminal is electrically connected to the first tail current generation circuit, the second tail current generation circuit, and the third tail current generation circuit, respectively.

[0008] In one embodiment of the first aspect, the amplifier circuit includes a transistor Q5, a resistor R4, a resistor R5, and a capacitor C1; The base of transistor Q5 is electrically connected to the differential input circuit and is connected to one end of resistor R4 through capacitor C1. The other end of resistor R4 is electrically connected to one end of resistor R5 and the positive power supply terminal, respectively. The other end of resistor R5 is electrically connected to the emitter of transistor Q5. The collector of transistor Q5 is used to output the amplified signal.

[0009] In one embodiment of the first aspect, the push-pull output circuit includes diode D1, transistor Q6, transistor Q7, resistor R7, and resistor R8; The anode of diode D1 is electrically connected to both the amplified signal output terminal and the base of transistor Q6. The cathode of diode D1 is electrically connected to the base of transistor Q7. The collector of transistor Q6 is electrically connected to the positive power supply terminal. The emitter of transistor Q6 is electrically connected to one end of resistor R7. The other end of resistor R7 is electrically connected to one end of resistor R8, which is the output terminal of the push-pull output circuit. The other end of resistor R8 is electrically connected to the emitter of transistor Q7. The collector of transistor Q7 is electrically connected to the negative power supply terminal.

[0010] In one embodiment of the first aspect, the first tail current is constant; the first tail current generating circuit includes transistor Q3, transistor Q4, resistor R2, resistor R3, resistor R6 and diode D2; The collector of transistor Q3 is electrically connected to the differential input circuit. The base of transistor Q3 is electrically connected to one end of resistor R3, the anode of diode D2, and the base of transistor Q4. The other end of resistor R3 is electrically connected to the positive power supply terminal. The emitter of transistor Q3 is electrically connected to one end of resistor R2. The emitter of transistor Q4 is electrically connected to one end of resistor R6. The other end of resistor R2 is electrically connected to the cathode of diode D2, the other end of resistor R6, and the negative power supply terminal. The collector of transistor Q4 is electrically connected to the base of transistor Q7.

[0011] In one embodiment of the first aspect, the first driving signal is positively correlated with the voltage difference between the two differential voltages input to the differential input circuit; the second tail current is positively correlated with the first driving signal.

[0012] In one embodiment of the first aspect, the differential voltage detection circuit includes resistors R9, R17, and R18, transistor Q8, diode D5, resistor R10, and capacitor C8. One end of resistor R9 is electrically connected to one end of resistor R17 and the positive power supply terminal. The other end of resistor R9 is electrically connected to the emitter of transistor Q8. The other end of resistor R17 is electrically connected to the base of transistor Q8 and one end of resistor R18. The other end of resistor R18 is electrically connected to the differential input circuit. The collector of transistor Q8 is electrically connected to the anode of diode D5. The cathode of diode D5 is electrically connected to one end of resistor R10 and one end of capacitor C8, which is used to output the first drive signal. The other ends of resistor R10 and capacitor C8 are electrically connected to the negative power supply terminal. The second tail current generating circuit includes transistor Q12, diode D3 and resistor R14; The base of transistor Q12 is electrically connected to the cathode of diode D3 to input the first drive signal. The anode of diode D3 is electrically connected to one end of resistor R14 and the emitter of transistor Q12. The other end of resistor R14 is electrically connected to the negative power supply terminal. The collector of transistor Q12 is electrically connected to the differential input circuit to provide the second tail current for the differential input circuit.

[0013] In one embodiment of the first aspect, the transient voltage detection circuit includes a rising edge detection circuit and a falling edge detection circuit; The rising edge detection circuit is electrically connected to the output terminal of the push-pull output circuit, and increases the second driving signal when the voltage output by the push-pull output circuit jumps upward. The falling edge detection circuit is electrically connected to the output terminal of the push-pull output circuit, and increases the second driving signal when the voltage output by the push-pull output circuit jumps downward. The magnitude of the third tail current is positively correlated with the voltage magnitude of the second driving signal.

[0014] In one embodiment of the first aspect, the rising edge detection circuit includes a capacitor C6, a resistor R11, and a transistor Q9; One end of capacitor C6 is electrically connected to the output terminal of the push-pull output circuit. The other end of capacitor C6 is electrically connected to one end of resistor R11 and the base of transistor Q9. The other end of resistor R11 is electrically connected to the negative power supply terminal. The collector of transistor Q9 is electrically connected to the positive power supply terminal. The falling edge detection circuit includes capacitor C9, resistor R12 and transistor Q10; One end of capacitor C9 is electrically connected to the output terminal of the push-pull output circuit, and the other end of capacitor C9 is electrically connected to one end of resistor R12 and the base of transistor Q10. The other end of resistor R12 and the collector of transistor Q10 are both electrically connected to the positive power supply terminal. The collector of transistor Q10 and the emitter of transistor Q9 are electrically connected to provide a second drive signal to the third tail current generation circuit. The third tail current generating circuit includes transistor Q13, diode D4, resistor R15 and resistor R13; The base of transistor Q13 is electrically connected to the cathode of diode D4 and one end of resistor R13, respectively, for inputting the second drive signal. The anode of diode D4 is electrically connected to one end of resistor R15 and the emitter of transistor Q13, respectively. The other ends of resistor R15 and resistor R13 are both electrically connected to the negative power supply terminal. The collector of transistor Q13 is electrically connected to the differential input circuit, providing the third tail current for the differential input circuit.

[0015] Secondly, the present invention also provides a method for controlling the tail current of an operational amplifier, the method being as follows: The voltage difference between the two differential voltages input to the operational amplifier and the rate of change of the output voltage of the operational amplifier are detected. After the voltage difference exceeds the threshold voltage, an additional second tail current is provided to the operational amplifier, and the second tail current is positively correlated with the voltage difference; An additional third tail current is provided to the operational amplifier based on the rate of change of its output voltage. This third tail current is positively correlated with the absolute value of the rate of change of the output voltage.

[0016] The beneficial effects of this invention compared to the prior art are: Firstly, the tail current of the operational amplifier is provided by the first tail current generation circuit, the second tail current generation circuit, and the third tail current generation circuit. This is equivalent to adopting a three-way parallel architecture with one basic tail current plus two independent controlled tail currents, which enables the operational amplifier to have three-level adjustable tail current performance. It can adaptively adjust the tail current size according to the input signal amplitude and the output voltage change rate, thereby dynamically matching the operating conditions. Secondly, this invention provides static current under static power consumption through the first tail current generation circuit, provides intermediate current under medium signal amplification scenarios through the first tail current generation circuit and the second tail current generation circuit, and provides large current under high-speed heavy load mode through the first tail current generation circuit, the second tail current generation circuit and the third tail current generation circuit, so that the operational amplifier can maintain the lowest power consumption under static conditions and automatically improve performance under transient conditions, achieving dynamic optimal balance under all operating conditions, while being compatible with low power consumption and high performance. Finally, this invention can cover a wide range of application scenarios, from low-power standby to high-speed heavy-load drive, and has stronger circuit adaptability. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the operational amplifier in Embodiment 1; Figure 2 The circuit diagram shows the differential input circuit, amplifier circuit, push-pull output circuit, and first tail current generation circuit in Embodiment 1. Figure 3 This is a circuit diagram of the differential voltage detection circuit and the second tail current generation circuit in Embodiment 1. Figure 4 This is a circuit diagram of the transient voltage detection circuit and the third tail current generation circuit in Example 1. Detailed Implementation

[0018] The illustrative embodiments of this application include, but are not limited to, an operational amplifier and a tail current control method thereof.

[0019] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0020] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items. Words such as “comprising” or “including” mean that the element or object preceding “comprising” or “including” covers the element or object listed following “comprising” or “including” and its equivalents, and does not exclude other elements or objects. Words such as “connected” or “linked” are not limited to physical or mechanical connections and can include electrical connections, whether direct or indirect.

[0021] Example 1 For existing operational amplifiers, because their tail current is fixed, the tail current remains constant regardless of whether the operational amplifier is in static standby, small-signal input, or no-load output state. This situation often leads to the operational amplifier continuously consuming power due to excess tail current under static conditions, resulting in high overall static current and high standby power consumption. This makes it difficult to adapt to battery-powered portable devices and low-power IoT data acquisition terminals, which have strict requirements for battery life.

[0022] In addition, when the input differential voltage increases significantly or the output terminal drives a heavy capacitive load and a rapid voltage jump occurs, the supply capability of the fixed tail current reaches a bottleneck. The transconductance of the NMOS differential pair cannot be dynamically increased, which directly limits the slew rate and transient response speed of the op-amp. The output waveform is prone to problems such as slow rise time and edge distortion, making it difficult to meet the requirements of high-speed pulse signal amplification and high-power capacitive load driving.

[0023] Based on the above two points, existing operational amplifiers cannot dynamically adjust the tail current according to the load condition, cannot simultaneously achieve low power consumption and high performance, have a narrow applicable operating range, and cannot adapt to application scenarios with a wide range of load variations.

[0024] To address the problems existing in current operational amplifiers, such as Figure 1As shown, this embodiment provides an operational amplifier, including a differential input circuit 1, an amplification circuit 3, a push-pull output circuit 4, a differential voltage detection circuit 5, a transient voltage detection circuit 7, a first tail current generation circuit 2, a second tail current generation circuit 6, and a third tail current generation circuit 8. Differential input circuit 1 is used to convert the two input differential voltages into voltage output signals; Amplifier circuit 3 is electrically connected to the output node of differential input circuit 1, and is used to amplify the voltage output signal to generate an amplified signal; The push-pull output circuit 4 is electrically connected to the amplified signal output terminal of the amplifier circuit 3, and is used to amplify the power of the amplified signal and output it. The first tail current generating circuit 2 is electrically connected to the differential input circuit 1 to provide the first tail current to the differential input circuit 1; The differential voltage detection circuit 5 is electrically connected to the output node of the differential input circuit 1. It is used to generate a first driving signal to the second tail current generation circuit 6 when the voltage difference between the two differential voltages input to the differential input circuit 1 is greater than a set threshold. The second tail current generation circuit 6 provides a second tail current to the differential input circuit based on the first driving signal. The transient voltage detection circuit 7 is electrically connected to the output terminal of the push-pull output circuit 4. It is used to generate a second driving signal that is input to the third tail current generation circuit 8 when the output voltage of the push-pull output circuit undergoes a transient jump. The third tail current generation circuit 8 provides a third tail current to the differential input circuit 1 based on the second driving signal.

[0025] for Figure 1 The operational amplifier shown has the following advantages in use compared to existing operational amplifiers: Firstly, the tail current of the operational amplifier is provided by the first tail current generation circuit 2, the second tail current generation circuit 6, and the third tail current generation circuit 8. This is equivalent to adopting a three-way parallel architecture with one basic tail current plus two independent controlled tail currents, which enables the operational amplifier to have three adjustable tail current levels. It can adaptively adjust the tail current size according to the input signal amplitude and the rate of change of the output voltage, thereby dynamically matching the operating conditions. Secondly, this invention provides static current under static power consumption through the first tail current generation circuit 2, provides intermediate current under medium signal amplification scenarios through the first tail current generation circuit 2 and the second tail current generation circuit 6, and provides large current under high-speed heavy load mode through the first tail current generation circuit 2, the second tail current generation circuit 6 and the third tail current generation circuit 8. This enables the operational amplifier to maintain the lowest power consumption under static conditions and automatically improve performance under transient conditions, achieving dynamic optimal balance under all operating conditions, while being compatible with low power consumption and high performance. Finally, this invention can cover a wide range of application scenarios, from low-power standby to high-speed heavy-load drive, and has stronger circuit adaptability.

[0026] Specifically, in this embodiment, the circuit diagrams of the differential input circuit 1, the amplifier circuit 3, the push-pull output circuit 4, and the first tail current generating circuit 2 are as follows: Figure 2 As shown, in Figure 2 In the differential input circuit 1, there are MOSFETs Q1 and Q2 and resistor R1; Q1 and Q2 are both NMOS transistors. The gates of MOSFET Q1 and MOSFET Q2 are used to input two differential voltages. The drain of MOSFET Q1 is electrically connected to one end of resistor R1. The other end of resistor R1 is electrically connected to the drain of MOSFET Q2 and the positive power supply terminal V+, respectively. The source of MOSFET Q1 and the source of MOSFET Q2 are electrically connected to form the tail current connection terminal of the differential input circuit. The tail current connection terminal is electrically connected to the first tail current generating circuit 2, the second tail current generating circuit 6, and the third tail current generating circuit 8, respectively.

[0027] exist Figure 2 In the amplifier circuit 3, there are transistor Q5, resistor R4, resistor R5 and capacitor C1; transistor Q5 is a PNP transistor. The base of transistor Q5 is electrically connected to differential input circuit 1, and is electrically connected to one end of resistor R4 through capacitor C1. The other end of resistor R4 is electrically connected to one end of resistor R5 and the positive power supply terminal V+. The other end of resistor R5 is electrically connected to the emitter of transistor Q5. The collector of transistor Q5 is used to output amplified signals.

[0028] exist Figure 2 In the push-pull output circuit 4, diode D1, transistor Q6, transistor Q7, resistor R7, and resistor R8 are included; transistor Q6 is an NPN transistor, and transistor Q7 is a PNP transistor. The anode of diode D1 is electrically connected to both the amplified signal output terminal and the base of transistor Q6. The cathode of diode D1 is electrically connected to the base of transistor Q7. The collector of transistor Q6 is electrically connected to the positive power supply terminal V+. The emitter of transistor Q6 is electrically connected to one end of resistor R7. The other end of resistor R7 is electrically connected to one end of resistor R8, which is the output terminal of push-pull output circuit 4. The other end of resistor R8 is electrically connected to the emitter of transistor Q7. The collector of transistor Q7 is electrically connected to the negative power supply terminal V-.

[0029] exist Figure 2 In the circuit, the first tail current generating circuit 2 includes transistor Q3, transistor Q4, resistor R2, resistor R3 and diode D2; transistors Q3 and Q4 are both NPN transistors; The collector of transistor Q3 is electrically connected to the differential input circuit 1, which is also electrically connected to the source of MOSFET Q1. The base of transistor Q3 is electrically connected to one end of resistor R3, the anode of diode D2, and the base of transistor Q4. The other end of resistor R3 is electrically connected to the positive power supply terminal V+. The emitter of transistor Q3 is electrically connected to one end of resistor R2. The emitter of transistor Q4 is electrically connected to one end of resistor R6. The other end of resistor R2 is electrically connected to the cathode of diode D2, the other end of resistor R6, and the negative power supply terminal V-. The collector of transistor Q4 is electrically connected to the base of transistor Q7.

[0030] for Figure 2 The circuit shown below operates as follows: Two differential voltages are input to the gates of MOSFETs Q1 and Q2, respectively. MOSFETs Q1 and Q2 convert the voltage difference into differential current signals. A mirror current source composed of resistor R3, diode D2, transistors Q3 and Q4 provides a stable first tail current. The first tail current is unaffected by changes in the amplitude of the two differential signals and the output load, and remains constant. In practical applications, the power consumption of the operational amplifier in static power mode can be set by adjusting the magnitude of the first tail current, thus enabling the operational amplifier to meet low power consumption requirements. The differential current signal is output from the drain of MOSFET Q1 to the base of transistor Q5, where transistor Q5 performs a first-stage voltage amplification. The amplified signal is output from the collector of transistor Q5, i.e., the collector output voltage of transistor Q5. One path is sent to the base of transistor Q6 to drive the upper half-bridge output transistor, and the other path is sent to the base of transistor Q7 after being level-shifted by diode D1 to drive the lower half-bridge output transistor. Finally, the signal is amplified a second time by a complementary push-pull stage composed of transistor Q6, resistor R7, resistor R8, and transistor Q7, and then output from TP3.

[0031] During operation, diode D1 compensates for the crossover dead zone of the complementary transistor, diode D2 and the mirror current source structure ensure the stability of the static operating point, capacitor C1 suppresses high-frequency self-oscillation, and capacitors C2 to C5 complete power supply filtering.

[0032] Specifically, in this embodiment, the first driving signal is positively correlated with the voltage difference between the two differential voltages input to the differential input circuit 1; the second tail current is positively correlated with the first driving signal.

[0033] Specifically, in this embodiment, the circuits of the differential voltage detection circuit 5 and the second tail current generation circuit 6 are as follows: Figure 3 As shown, in Figure 3 In the differential voltage detection circuit 5, resistors R9, R17, and R18 are included, along with transistor Q8, diode D5, resistor R10, and capacitor C8. One end of resistor R9 is connected to one end of resistor R17 and the positive power supply terminal V+. The other end of resistor R9 is connected to the emitter of transistor Q8. The other end of resistor R17 is connected to the base of transistor Q8 and one end of resistor R18. The other end of resistor R18 is connected to differential input circuit 1, i.e., to the drain of transistor Q1. The collector of transistor Q8 is connected to the anode of diode D5. The cathode of diode D5 is connected to one end of resistor R10 and one end of capacitor C8, used to output the first drive signal. The other ends of resistor R10 and capacitor C8 are connected to the negative power supply terminal V-. exist Figure 3 In the middle, the second tail current generating circuit 6 includes transistor Q12, diode D3 and resistor R14; The base of transistor Q12 is electrically connected to the cathode of diode D3 to input the first drive signal. The anode of diode D3 is electrically connected to one end of resistor R14 and the emitter of transistor Q12. The other end of resistor R14 is electrically connected to the negative power supply terminal V-. The collector of transistor Q12 is electrically connected to differential input circuit 1 to provide the second tail current for differential input circuit 1.

[0034] In this embodiment, taking the positive power supply terminal V+ connected to a positive 15V voltage as an example and the negative power supply terminal V- input to a negative 15V voltage as an example, in... Figure 3 In the static state, resistors R17 and R18 form a voltage divider network, raising the static potential of the base of transistor Q8 to approximately 14.49V, the static potential of the emitter of transistor Q8 to approximately 15V, and the static voltage difference between the emitter and base to approximately 0.51V, which is less than the 0.7V turn-on threshold of the PNP silicon transistor, so transistor Q8 is reliably turned off in static state. When the input differential voltage increases, the drain potential of MOSFET Q1 decreases, and the base potential of transistor Q8 decreases synchronously. When the voltage difference exceeds 0.7V, transistor Q8 turns on. The upper end of resistor R9 is connected to the positive power supply terminal V+, and the lower end is connected to the emitter of transistor Q8, which sets the operating current for differential voltage detection circuit 5; in addition, a unidirectional signal transmission path is formed through diode D5 to prevent backflow of current in the subsequent stage. Resistor R10 and capacitor C8 are connected in parallel to form a base pull-down bias and high-frequency filter network, which pulls the base potential of transistor Q12 to -15V under static conditions to ensure reliable cutoff of transistor Q12. Resistor R14 is the emitter negative feedback resistor, used to set the amplitude of the second tail current, while improving the current temperature stability and suppressing temperature drift. Diode D3 is connected in reverse parallel between the base and emitter of transistor Q12 to clamp the reverse voltage between the base and emitter, preventing reverse breakdown of the transistor's emitter junction caused by power fluctuations or negative voltage surges. Diode D5 is connected in series between the collector of transistor Q8 and the base of transistor Q12 to achieve unidirectional conduction isolation, prevent the control current of transient voltage detection circuit 7 from flowing back to differential voltage detection circuit 5, and avoid crosstalk between the two control signals.

[0035] Based on the above, Figure 3 The signal flow of the circuit shown is as follows: the amplitude of the input differential voltage changes, the drain potential of transistor Q1 changes accordingly, the voltage is transmitted to the base of transistor Q8 through the voltage divider network, the bias state of the emitter junction of transistor Q8 changes, transistor Q8 is turned on / off, and the base potential of transistor Q12 changes synchronously, thereby realizing the switching control of the second tail current.

[0036] Specifically, in this embodiment, as Figure 4 As shown, the transient voltage detection circuit 7 includes a rising edge detection circuit 71 and a falling edge detection circuit 70; The rising edge detection circuit 71 is electrically connected to the output terminal of the push-pull output circuit 4, and increases the second drive signal when the voltage output by the push-pull output circuit 4 jumps upward. The falling edge detection circuit 70 is electrically connected to the output terminal of the push-pull output circuit 4, and increases the second drive signal when the voltage output by the push-pull output circuit 4 jumps downward. The magnitude of the third tail current is positively correlated with the magnitude of the voltage of the second driving signal.

[0037] Furthermore, in this embodiment, the rising edge detection circuit 71 includes a capacitor C6, a resistor R11, and a transistor Q9; the transistor Q9 is an NPN transistor. One end of capacitor C6 is electrically connected to the output terminal of push-pull output circuit 4. The other end of capacitor C6 is electrically connected to one end of resistor R11 and the base of transistor Q9. The other end of resistor R11 is electrically connected to the negative power supply terminal V-. The collector of transistor Q9 is electrically connected to the positive power supply terminal V+. The falling edge detection circuit 70 includes capacitor C9, resistor R12, and transistor Q10; transistor Q10 is a PNP transistor. One end of capacitor C9 is electrically connected to the output terminal of push-pull output circuit 4, and the other end of capacitor C9 is electrically connected to one end of resistor R12 and the base of transistor Q10. The other end of resistor R12 and the collector of transistor Q10 are both electrically connected to the positive power supply terminal V+. The collector of transistor Q10 and the emitter of transistor Q9 are electrically connected to provide a second drive signal to the third tail current generating circuit 8. The third tail current generating circuit 8 includes transistor Q13, diode D4, resistor R15 and resistor R13; The base of transistor Q13 is electrically connected to the cathode of diode D4 and one end of resistor R13, respectively, for inputting the second drive signal. The anode of diode D4 is electrically connected to one end of resistor R15 and the emitter of transistor Q13, respectively. The other ends of resistor R15 and resistor R13 are both electrically connected to the negative power supply terminal V-. The collector of transistor Q13 is electrically connected to differential input circuit 1, for providing the third tail current to differential input circuit 1.

[0038] exist Figure 4 In the diagram, resistor R11 provides static pull-down bias for transistor Q9; resistor R12 provides static pull-up bias for transistor Q10; resistor R13 provides static pull-down bias for transistor Q13 to ensure reliable cutoff under static conditions; resistor R15 is the emitter negative feedback resistor, used to set the amplitude of the third tail current, while improving current temperature stability and suppressing temperature drift; and diode D4 provides emitter junction reverse protection for transistor Q13.

[0039] for Figure 4 The signal flow of the circuit shown is as follows: The output voltage of push-pull output circuit 4 rises and jumps - the differential coupling of capacitor C6 causes the base potential of transistor Q9 to rise instantaneously - transistor Q9 turns on - pulling up the base potential of transistor Q13; The output voltage of push-pull output circuit 4 drops and jumps - the differential coupling of capacitor C9 causes the base potential of transistor Q10 to drop instantaneously - transistor Q10 turns on - current injection pulls up the base potential of transistor Q13; Pulling up the base potential of transistor Q13 can trigger the third tail current to turn on.

[0040] Combination Figure 2 , Figure 3 and Figure 4 In this invention, the total tail current flows from node B into the collectors of transistors Q3, Q12, and Q13 respectively, and after passing through their respective emitters and resistors connected to the emitters, it converges into the negative power supply terminal V-. The amplitude of the total tail current is the sum of the three tail currents, namely the first tail current, the second tail current, and the third tail current.

[0041] In summary, this invention uses differential voltage detection circuit 5 and transient voltage detection circuit 7 to identify the circuit's operating conditions in real time, and accordingly controls the on / off state of the two controlled tail currents. This allows the total tail current to automatically switch in stages according to the operating conditions, forming a three-level adaptive operating mode. The three adaptive operating modes are static standby mode, medium signal amplification mode, and high-speed transient drive mode. The specific working principle is as follows: First is the static standby mode, where the operational amplifier's input differential voltage approaches zero and the output voltage remains stable. Resistors R17 and R18 raise the potential of the detection node by a voltage divider. The static potential of the base of transistor Q8 is maintained at about 14.49V, and the potential of the emitter of transistor Q8 is about 15V. The voltage difference between the emitter and the base is only 0.51V, which is less than the conduction threshold of 0.7V for silicon PNP transistors. Transistor Q8 is in a reliable cutoff state. The base of transistor Q12 is pulled down to near -15V by resistor R10. The emitter junction is zero biased, and transistor Q12 is reliably cut off. The second tail current branch is closed.

[0042] Meanwhile, there is no voltage jump at the output terminal of push-pull output circuit 4, no coupling current in capacitors C6 and C9, the base of transistor Q9 is pulled down to -15V by resistor R11, and transistor Q9 is cut off; the base of transistor Q10 is pulled up to +15V by resistor R12, and transistor Q10 is cut off; the base of transistor Q13 is pulled down to -15V by resistor R13, and transistor Q13 is reliably cut off, and the third tail current branch is closed.

[0043] At this time, only the original basic tail current transistor, namely transistor Q3, provides a fixed tail current to the differential input circuit 1, resulting in the lowest static current and the lowest standby power consumption of the whole machine, which is suitable for low power consumption scenarios such as no-load standby and small signal static holding.

[0044] Secondly, in the medium signal amplification mode, the input differential voltage increases to the set trigger threshold. The drain current of transistor Q1 increases with the increase of the input differential voltage, and the drain potential decreases accordingly. The emitter junction of transistor Q8 is forward biased and conducts. The current is injected into the base of transistor Q12 through resistor R9, transistor Q8, and diode D5, which increases the base potential of transistor Q12, forward biases the emitter junction, turns on transistor Q12, and the first tail current is turned on.

[0045] At this point, the total tail current is the sum of the original base current of transistor Q3 and the controlled current of transistor Q12. The tail current amplitude of the differential input circuit is increased, the transconductance of the differential pair of MOSFETs Q1 and Q2 is increased accordingly, and the amplification bandwidth and linear drive capability of the operational amplifier are enhanced. In this mode, the power consumption is moderately increased, balancing signal amplification performance and power consumption level, and is suitable for AC signal amplification scenarios with normal amplitude.

[0046] If the input differential voltage falls below the threshold, the drain potential of MOSFET Q1 rises, transistor Q8 returns to cutoff, transistor Q12 turns off, and the circuit automatically returns to static standby mode.

[0047] Finally, there is the high-speed transient drive mode, where the input differential voltage is large and the output voltage changes rapidly. The input differential voltage is maintained above the threshold, the transistor Q12 remains on, and the second tail current continues to accumulate. The rising edge of the output voltage is differentially coupled through capacitor C6, causing the base potential of transistor Q9 to rise instantaneously. The emitter junction of transistor Q9 is forward biased and conducts, pulling up the base potential of transistor Q13 in emitter follower mode. Alternatively, the falling edge of the output voltage is differentially coupled through capacitor C9, causing the base potential of transistor Q10 to drop instantaneously. The emitter junction of transistor Q10 is forward biased and conducts, and current is directly injected into the base of transistor Q13. Both transition directions cause the emitter junction of transistor Q13 to be forward biased and conduct, opening the second controlled tail current branch.

[0048] At this point, the total tail current is the sum of the base current of transistor Q3, the control current of transistor Q12, and the controlled current of transistor Q13. The tail current amplitude reaches its maximum value, and the current supply capability and transconductance of the differential pair of MOSFETs Q1 and Q2 reach their highest levels. The slew rate and transient response speed of the operational amplifier are significantly improved, which can effectively drive capacitive heavy loads and high-speed pulse signals and avoid distortion at the edges of the output waveform.

[0049] When the output voltage jump ends and returns to stability, the differential coupling effect of capacitors C6 and C9 disappears, transistors Q9 and Q10 return to cutoff, transistor Q13 turns off, and the circuit automatically returns to medium signal amplification mode or static standby mode.

[0050] It should be noted that, for Figure 2 , Figure 3 and Figure 4 The circuit shown is entirely analog, without the involvement of control chips such as MCUs, resulting in low manufacturing costs and facilitating mass production.

[0051] In a certain operational amplifier application scenario, when an MCU control chip is involved, a voltage divider circuit composed of resistors can be set up to detect the drain voltage of transistor Q1 and the output voltage of push-pull output circuit 4 respectively. The voltage divided by the voltage divider circuit is input to the MCU. The MCU makes a judgment based on the input voltage divided by the voltage, thereby generating the first drive signal and the second drive signal input to the second tail current generation circuit 6 and the third tail current generation circuit, so as to generate the required second tail current and third tail current.

[0052] In practical use, when the MCU control chip has its own ADC, the voltage divider is input to the ADC input pin of the MCU; when the MCU control chip does not have an ADC, the MCU control chip uses an external ADC circuit to perform analog-to-digital conversion to obtain the voltage divider magnitude.

[0053] Example 2 This embodiment provides a method for controlling the tail current of an operational amplifier, the method being as follows: The voltage difference between the two differential voltages input to the operational amplifier and the rate of change of the output voltage of the operational amplifier are detected. After the voltage difference exceeds the threshold voltage, an additional second tail current is provided to the operational amplifier. This second tail current is positively correlated with the voltage difference. An additional third tail current is provided to the operational amplifier based on the rate of change of its output voltage. This third tail current is positively correlated with the absolute value of the rate of change of the output voltage.

[0054] Specifically, in this embodiment, the operational amplifier generates a differential current signal based on two differential input voltages. The greater the voltage difference between the two differential input voltages, the greater the differential current signal. The differential current signal flows through the resistor to generate a corresponding voltage drop, thereby generating a voltage output signal. The change in this voltage drop can generate the required first driving signal, and the magnitude of the first driving signal can generate the required second tail current.

[0055] Based on the above description, those skilled in the art can make various changes and modifications without departing from the technical concept of this invention. The technical scope of this invention is not limited to the contents of the specification, but must be determined according to the scope of the claims.

Claims

1. An operational amplifier, characterized in that, It includes a differential input circuit, an amplifier circuit, a push-pull output circuit, a differential voltage detection circuit, a transient voltage detection circuit, a first tail current generation circuit, a second tail current generation circuit, and a third tail current generation circuit. The differential input circuit is used to convert the two input differential voltages into a voltage output signal and generate a differential current signal based on the voltage difference between the two input differential voltages. The amplifier circuit is electrically connected to the output node of the differential input circuit and is used to amplify the voltage output signal to generate an amplified signal. The amplifier circuit is also electrically connected to the differential input circuit and is used to amplify the differential current signal to generate an amplified signal. The push-pull output circuit is electrically connected to the amplified signal output terminal of the amplifier circuit, and is used to amplify the power of the amplified signal and output it. The first tail current generating circuit is electrically connected to the differential input circuit and is used to provide the first tail current to the differential input circuit; The differential voltage detection circuit is electrically connected to the differential input circuit and is used to generate a first driving signal input to the second tail current generation circuit when the voltage difference between the two differential voltages input to the differential input circuit is greater than a set threshold. The second tail current generation circuit provides a second tail current to the differential input circuit based on the first driving signal. The transient voltage detection circuit is electrically connected to the output terminal of the push-pull output circuit, and is used to generate a second driving signal input to the third tail current generation circuit when the output voltage of the push-pull output circuit undergoes a transient jump. The third tail current generation circuit provides a third tail current to the differential input circuit based on the second driving signal.

2. An operational amplifier according to claim 1, characterized in that, The differential input circuit includes MOSFET Q1, MOSFET Q2 and resistor R1; The gates of MOSFET Q1 and MOSFET Q2 are used to input two differential voltages. The drain of MOSFET Q1 is electrically connected to one end of resistor R1; the other end of resistor R1 is electrically connected to the drain of MOSFET Q2 and the positive power supply terminal, respectively. The source terminals of MOSFET Q1 and MOSFET Q2 are electrically connected to form the tail current connection terminal of the differential input circuit. The tail current connection terminal is electrically connected to the first tail current generation circuit, the second tail current generation circuit, and the third tail current generation circuit, respectively.

3. An operational amplifier according to claim 1, characterized in that, The amplifier circuit includes transistor Q5, resistor R4, resistor R5 and capacitor C1; The base of transistor Q5 is electrically connected to the differential input circuit and is connected to one end of resistor R4 through capacitor C1. The other end of resistor R4 is electrically connected to one end of resistor R5 and the positive power supply terminal, respectively. The other end of resistor R5 is electrically connected to the emitter of transistor Q5. The collector of transistor Q5 is used to output the amplified signal.

4. An operational amplifier according to claim 1, characterized in that, The push-pull output circuit includes diode D1, transistor Q6, transistor Q7, resistor R7, and resistor R8; The anode of diode D1 is electrically connected to both the amplified signal output terminal and the base of transistor Q6. The cathode of diode D1 is electrically connected to the base of transistor Q7. The collector of transistor Q6 is electrically connected to the positive power supply terminal. The emitter of transistor Q6 is electrically connected to one end of resistor R7. The other end of resistor R7 is electrically connected to one end of resistor R8, which is the output terminal of the push-pull output circuit. The other end of resistor R8 is electrically connected to the emitter of transistor Q7. The collector of transistor Q7 is electrically connected to the negative power supply terminal.

5. An operational amplifier according to claim 4, characterized in that, The first tail current is constant; the first tail current generating circuit includes transistor Q3, transistor Q4, resistor R2, resistor R3, resistor R6 and diode D2; The collector of transistor Q3 is electrically connected to the differential input circuit. The base of transistor Q3 is electrically connected to one end of resistor R3, the anode of diode D2, and the base of transistor Q4. The other end of resistor R3 is electrically connected to the positive power supply terminal. The emitter of transistor Q3 is electrically connected to one end of resistor R2. The emitter of transistor Q4 is electrically connected to one end of resistor R6. The other end of resistor R2 is electrically connected to the cathode of diode D2, the other end of resistor R6, and the negative power supply terminal. The collector of transistor Q4 is electrically connected to the base of transistor Q7.

6. An operational amplifier according to any one of claims 1-5, characterized in that, The first driving signal is positively correlated with the voltage difference between the two differential voltages input to the differential input circuit; the second tail current is positively correlated with the first driving signal.

7. An operational amplifier according to claim 6, characterized in that, The differential voltage detection circuit includes resistors R9, R17, and R18, transistor Q8, diode D5, resistor R10, and capacitor C8. One end of resistor R9 is electrically connected to one end of resistor R17 and the positive power supply terminal. The other end of resistor R9 is electrically connected to the emitter of transistor Q8. The other end of resistor R17 is electrically connected to the base of transistor Q8 and one end of resistor R18. The other end of resistor R18 is electrically connected to the differential input circuit. The collector of transistor Q8 is electrically connected to the anode of diode D5. The cathode of diode D5 is electrically connected to one end of resistor R10 and one end of capacitor C8, which is used to output the first drive signal. The other ends of resistor R10 and capacitor C8 are electrically connected to the negative power supply terminal. The second tail current generating circuit includes transistor Q12, diode D3 and resistor R14; The base of transistor Q12 is electrically connected to the cathode of diode D3 to input the first drive signal. The anode of diode D3 is electrically connected to one end of resistor R14 and the emitter of transistor Q12. The other end of resistor R14 is electrically connected to the negative power supply terminal. The collector of transistor Q12 is electrically connected to the differential input circuit to provide the second tail current for the differential input circuit.

8. An operational amplifier according to any one of claims 1-5, characterized in that, The transient voltage detection circuit includes a rising edge detection circuit and a falling edge detection circuit; The rising edge detection circuit is electrically connected to the output terminal of the push-pull output circuit, and increases the second driving signal when the voltage output by the push-pull output circuit jumps upward. The falling edge detection circuit is electrically connected to the output terminal of the push-pull output circuit, and increases the second driving signal when the voltage output by the push-pull output circuit jumps downward. The magnitude of the third tail current is positively correlated with the voltage magnitude of the second driving signal.

9. An operational amplifier according to claim 8, characterized in that, The rising edge detection circuit includes a capacitor C6, a resistor R11, and a transistor Q9; One end of capacitor C6 is electrically connected to the output terminal of the push-pull output circuit. The other end of capacitor C6 is electrically connected to one end of resistor R11 and the base of transistor Q9. The other end of resistor R11 is electrically connected to the negative power supply terminal. The collector of transistor Q9 is electrically connected to the positive power supply terminal. The falling edge detection circuit includes capacitor C9, resistor R12 and transistor Q10; One end of capacitor C9 is electrically connected to the output terminal of the push-pull output circuit, and the other end of capacitor C9 is electrically connected to one end of resistor R12 and the base of transistor Q10. The other end of resistor R12 and the collector of transistor Q10 are both electrically connected to the positive power supply terminal. The collector of transistor Q10 and the emitter of transistor Q9 are electrically connected to provide a second drive signal to the third tail current generation circuit. The third tail current generating circuit includes transistor Q13, diode D4, resistor R15 and resistor R13; The base of transistor Q13 is electrically connected to the cathode of diode D4 and one end of resistor R13, respectively, for inputting the second drive signal. The anode of diode D4 is electrically connected to one end of resistor R15 and the emitter of transistor Q13, respectively. The other ends of resistor R15 and resistor R13 are both electrically connected to the negative power supply terminal. The collector of transistor Q13 is electrically connected to the differential input circuit, providing the third tail current for the differential input circuit.

10. A tail current control method for an operational amplifier, applied to the operational amplifier according to any one of claims 1 to 9, characterized in that, include: The voltage difference between the two differential voltages input to the operational amplifier and the rate of change of the output voltage of the operational amplifier are detected. After the voltage difference exceeds the threshold voltage, an additional second tail current is provided to the operational amplifier, and the second tail current is positively correlated with the voltage difference; An additional third tail current is provided to the operational amplifier based on the rate of change of its output voltage. This third tail current is positively correlated with the absolute value of the rate of change of the output voltage.

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