A method and apparatus for reading a hybrid pixel detector

Abstract

The application provides a reading method and device of a hybrid pixel detector, the reading method comprising: comparing an input signal with a first threshold value and a second threshold value on a trigger pixel front-end analog output node in parallel. When the input signal is greater than the first threshold value, a first reading mode is triggered: a first inhibition signal is sent to a neighborhood, and a counting path of an adjacent pixel is temporarily disabled within a first time window. When the input signal is greater than the second threshold value and a confirmation condition is met, a second reading mode is triggered: a second inhibition signal is sent by injecting a pulse signal into a local transmission network, and a counting and data output path of an adjacent pixel is disabled within a second time window. Based on equivalent resistance-capacitance delay characteristics, the closer the adjacent pixel is to the trigger pixel, the stronger the pulse intensity received by the adjacent pixel and the longer the disable duration. After the time window ends, the path is automatically restored. The application realizes hierarchical physical intervention, eliminates repeated counting and blocks local data flooding, and improves the stability and authenticity of the reading process.

Description

Technical Field

[0001] This invention relates to the field of sensor reading, and more particularly to a reading method and apparatus for a hybrid pixel detector. Background Technology

[0002] Hybrid pixel detectors, with their superior spatial resolution, play a crucial role in cutting-edge fields such as radiation imaging, high-energy physics, and industrial non-destructive testing. In these detectors, the front-end pixel readout circuitry forms the core hub connecting the physical sensor layer and the back-end digital processing system. It is primarily responsible for accurately converting the weak charges deposited by incident particles or photons on the sensing layer into recordable digital counting pulses. The response quality, disturbance rejection capability, and readout accuracy of the front-end analog circuitry to various incident events directly determine the signal integrity and final detection efficiency of the entire detection system.

[0003] However, in actual physical detection operations, the front-end readout circuit of the detector always faces the difficult problem of balancing crosstalk and redundancy. On the one hand, a normal single physical incident event is prone to charge sharing between adjacent sensing units, causing the same physical event to be repeatedly and incorrectly counted by multiple adjacent pixels. On the other hand, abnormal high-energy deposition events or local transient strong disturbances can force the front-end analog circuit of the central pixel into deep saturation, thereby causing severe electrical crosstalk in a large surrounding area and generating a massive flood of local redundant data in a very short time. Existing solutions usually have inherent defects: some solutions rely on preset static bad pixel shielding, but this inevitably creates a permanent physical blind zone in the detection array, wasting valuable effective sensing area; while other solutions that rely purely on back-end algorithm filtering have serious lag, causing invalid crosstalk data to occupy a large amount of the detector's limited bus readout bandwidth before being removed by the software, and even causing system overload.

[0004] Therefore, how to simultaneously eliminate duplicate counts of regular physical events and effectively isolate the data deluge caused by abnormal disturbances has become a pressing technical problem to be solved in this field. Summary of the Invention

[0005] In order to overcome the above-mentioned technical defects, the purpose of this invention is to provide a reading method and device for a hybrid pixel detector.

[0006] This invention discloses a readout method for a hybrid pixel detector, comprising: At the analog output node of the trigger pixel front end of the hybrid pixel detector, the input signal is acquired in parallel and compared with the first threshold and the second threshold respectively, wherein the second threshold is higher than the first threshold. When the input signal is greater than the first threshold, the first reading mode is triggered: the first suppression signal is sent to the neighborhood of the trigger pixel within a preset range through the local transmission network in the hybrid pixel detector, so as to temporarily disable the counting path of the neighboring pixels of the trigger pixel within the first time window, and retain the single counting result of the trigger pixel. When the input signal further exceeds the second threshold and the confirmation condition is met, a second reading mode is triggered: by injecting a pulse signal into the local transmission network, a second suppression signal is sent to the neighborhood of the trigger pixel within a preset range, so as to disable the counting path and data output path of the neighboring pixels of the trigger pixel within a second time window, wherein the duration of the second time window is longer than that of the first time window; the second suppression signal is a pulse signal; and, based on the equivalent resistance-capacitance delay characteristics of the local transmission network, the pulse signal intensity received by the neighboring pixels closer to the trigger pixel is greater, and the corresponding duration of the second time window is longer; the pulse signal intensity received by the neighboring pixels farther from the trigger pixel is smaller, and the corresponding duration of the second time window is shorter. After the first or second time window ends, automatically restore the counting paths and / or data output paths of adjacent pixels that were temporarily disabled.

[0007] Preferably, the second read mode further includes: temporarily disabling the time measurement path and / or analog recovery path of the adjacent pixels of the trigger pixel.

[0008] Preferably, the confirmation conditions include: the input signal is greater than the second threshold and continues for a preset number of time periods.

[0009] Preferably, the reading method further includes: when multiple trigger pixels in the preset neighborhood trigger the second reading mode simultaneously or within a preset time window, the corresponding second time window is determined only based on the trigger pixel with the largest input signal; The duration for which adjacent pixels are temporarily disabled depends on the maximum duration of the second time window corresponding to the multiple second suppression signals they receive.

[0010] Preferably, when sending the first suppression signal or the second suppression signal, the reading method further includes: The distributed signal is hysteresis-shaped using the Schmitt trigger mechanism to prevent metastability or logic errors during signal propagation and suppression of actions.

[0011] Preferably, the reading method further includes: When outputting data, the current threshold comparison result of the pixel and the event detection status will be compiled into an anomaly flag of a specific bit. Anomaly markers are embedded in the output data packets of trigger pixels for streaming output to support backend data classification or priority scheduling of bus bandwidth.

[0012] Preferably, the reading method further includes: If, before the end of the previous second time window, an input signal greater than the second threshold is detected again and the confirmation condition is met, a new second time window is generated. The total second time window is configured as follows: Immediately end the previous second time window and use a new second time window as the overall second time window; Alternatively, take the maximum value between the previous second time window and the new second time window as the total second time window; Alternatively, multiply the previous second time window by a preset ratio and add it to the new second time window to obtain the total second time window.

[0013] Preferably, the neighborhood of the preset range is a 3×3 range, a 5×5 range, or a region extending outward in a cross shape for 3, 4, or 5 pixels, centered on the trigger pixel.

[0014] The second aspect of this application provides a readout device for a hybrid pixel detector, the readout device being used to perform a readout method for a hybrid pixel detector as described in any of the foregoing, including a pixel array, a local transmission network, and a comparator module; The comparator module includes a first threshold comparator and a second threshold comparator that are configured in parallel.

[0015] Compared with existing technologies, the above technical solution has the following advantages: 1. In the physical operation of hybrid pixel detectors, a single incident event often leads to repeated counting by adjacent pixels due to charge sharing, while abnormally high-energy events can cause saturation of the front-end circuit and generate local data flooding. This application achieves hierarchical physical intervention for different levels of disturbance by setting a first threshold and a second threshold comparator in parallel on the analog output node of the trigger pixel. When the input signal is greater than the first threshold, the detector temporarily disables the counting path of adjacent pixels within a first time window, eliminating repeated counting of regular events at the source. When the input signal further exceeds the second threshold and the confirmation condition is met, the trigger pixel injects a pulse signal into the local transmission network, completely shielding the counting and data output paths of adjacent pixels within a longer second time window. In particular, this scheme utilizes the inherent equivalent RC delay characteristics of the local transmission network, so that adjacent pixels closer to the trigger pixel receive a larger pulse intensity and a longer disable time. This analog delay distribution based on hardware characteristics forms a decreasing time hierarchy from near to far, achieving strong isolation of the central region of large events and weak isolation of the peripheral region, reducing the impact of blind periods on the surrounding normal detection area while blocking crosstalk. After the corresponding time window ends, the temporarily disabled path is automatically restored, which avoids the detector from having a permanent dead zone and maintains an effective detection area while reducing false counts. 2. To ensure the accuracy and low-level anti-disturbance capability of the detection system under extreme conditions, the method provided in this application introduces a multi-dimensional filtering and protection mechanism based on time and depth, in addition to level determination. In the trigger confirmation stage, the input signal is required to be greater than a second threshold and remain above a preset time period. This requires abnormal signals to have a certain amount of energy accumulation, thereby filtering out brief glitches and ensuring that the isolation mechanism is only activated for truly high-energy events. Once in the high-event isolation state, the hardware control not only shuts down the regular counting but also temporarily disables the time measurement path and / or analog recovery path of adjacent pixels to prevent interference with surrounding timestamp records and baseline recovery. Furthermore, when the local network sends a suppression signal, the system uses a Schmitt trigger mechanism for hysteresis shaping, absorbing minor fluctuations in the input signal and restoring a stable digital level. This eliminates metastability or logic errors during signal propagation and action execution, ensuring the high speed and reliability of the distributed disabling network. 3. In terms of spatial distribution and multi-event coordination, reasonable coverage of suppression signals and anti-collision logic are key to blocking data floods. The detector injects pulse signals into the local transmission network, utilizing the network's inherent equivalent RC delay characteristics to ensure that adjacent pixels closer to the trigger pixel receive stronger pulses and have longer disable times. This hardware-based analog delay distribution, combined with suitable neighborhood geometry topologies such as crosses or polygons, forms a decreasing time hierarchy from near to far, achieving strong isolation in the central area and weak isolation in the periphery. When multiple trigger pixels occur concurrently within a preset neighborhood under high-throughput conditions, the system initiates a merging rule based on the maximum value, determining the time window only based on the trigger pixel with the largest input signal. The disable time of adjacent pixels depends on the maximum duration of the multiple suppression signals they receive, avoiding signal race conditions and isolation failures under dense triggering. 4. To achieve a seamless closed loop between front-end hardware processing and back-end algorithms, and to cope with continuous abnormal charge injection, this solution constructs a data tagging and dynamic time window update mechanism. During the data output phase, the current threshold comparison result and event detection status of the trigger pixel are compiled into a specific bit-based anomaly marker and embedded in the output data packet for streaming output. This allows the back-end system to accurately identify major event centers based on this marker, efficiently performing data classification and bus bandwidth priority scheduling. Simultaneously, for continuous and dense disturbances, if the high-energy triggering condition is met again before the end of the previous second time window, the total time window will be retriggered and superimposed according to rules such as immediate update, taking the maximum value, or adding according to a preset ratio. This dynamic refresh mechanism allows the disable duration to adaptively extend as the actual energy of the abnormal event accumulates, ensuring that the detector maintains a consistent isolation state under continuous strong interference, thus improving the overall data throughput efficiency of the device. Attached Figure Description

[0016] Figure 1 A schematic flowchart of the readout method for the hybrid pixel detector provided in this application; Figure 2 A schematic diagram of the architecture of the readout method for the hybrid pixel detector provided in this application; Figure 3 A schematic diagram of the trigger pixel and its neighborhood in the readout method of the hybrid pixel detector provided in this application; Figure 4 A timing diagram illustrating the readout method of the hybrid pixel detector provided in this application. Detailed Implementation

[0017] The advantages of the present invention will be further illustrated below with reference to the accompanying drawings and specific embodiments.

[0018] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0019] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The singular forms “a,” “the,” and “the” as used in this disclosure and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0020] It should be understood that although the terms first, second, third, etc., may be used in this disclosure to describe various information, such information should not be limited to these terms. These terms are used only to distinguish information of the same type from one another. For example, without departing from the scope of this disclosure, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to determination."

[0021] In the description of this invention, it should be understood that the terms "longitudinal", "lateral", "up", "down", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0022] In the description of this invention, unless otherwise specified and limited, it should be noted that the terms "installation", "connection" and "linking" should be interpreted broadly. For example, they can refer to mechanical or electrical connections, or internal connections between two components. They can be direct connections or indirect connections through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms according to the specific circumstances.

[0023] In the following description, suffixes such as "module," "part," or "unit" used to denote elements are used only for the convenience of the description of the invention and have no specific meaning in themselves. Therefore, "module" and "part" can be used interchangeably.

[0024] Please see Figures 1-4 , Figure 1 A schematic flowchart of the readout method for the hybrid pixel detector provided in this application; Figure 2 A schematic diagram of the architecture of the readout method for the hybrid pixel detector provided in this application; Figure 3 A schematic diagram of the trigger pixel and its neighborhood in the readout method of the hybrid pixel detector provided in this application; Figure 4 A timing diagram illustrating the readout method of the hybrid pixel detector provided in this application.

[0025] like Figures 1-4 As shown, this invention discloses a readout method for a hybrid pixel detector, comprising: At the analog output node of the trigger pixel front end of the hybrid pixel detector, the input signal is acquired in parallel and compared with the first threshold and the second threshold respectively, wherein the second threshold is higher than the first threshold. When the input signal is greater than the first threshold, the first reading mode is triggered: the first suppression signal is sent to the neighborhood of the trigger pixel within a preset range through the local transmission network in the hybrid pixel detector, so as to temporarily disable the counting path of the neighboring pixels of the trigger pixel within the first time window, and retain the single counting result of the trigger pixel. When the input signal is further greater than the second threshold and the confirmation condition is met, the second reading mode is triggered: a second suppression signal is sent to the neighborhood of the trigger pixel within a preset range through the local transmission network to disable the counting path and data output path of the neighboring pixels of the trigger pixel within the second time window, wherein the duration of the second time window is longer than that of the first time window. After the first or second time window ends, automatically restore the counting paths and / or data output paths of adjacent pixels that were temporarily disabled.

[0026] This can be understood as follows: in a semiconductor radiation detector, the physical boundary of the front-end analog-to-digital circuit conversion is the optimal location for handling crosstalk. The readout method of the hybrid pixel detector provided in this application achieves hierarchical operation by connecting low-threshold and high-threshold comparators in parallel at the trigger pixel front-end node. For normal events, the charge sharing generated when a particle hits the pixel edge causes weak signals to be generated by surrounding pixels. When the signal exceeds the first threshold, the system triggers a short-term deduplication in the first time window, only blocking the counting path of neighboring pixels to ensure that a single physical event is not recorded repeatedly. However, when encountering abnormally large events such as extremely high energy injection, the signal rises above the second threshold. At this time, the front-end of the central pixel becomes saturated, which can easily cause large-scale crosstalk or even data flooding in the surrounding area. The system then enters a second readout mode, releases a charge pulse to the local transmission network, and triggers a long-term deduplication in the second time window. Furthermore, it not only blocks the counting path of adjacent pixels but also disables the data output path, thereby limiting the crosstalk caused by abnormal events to a minimum spatiotemporal range.

[0027] Furthermore, this scheme does not rely on complex pure digital addressing logic, but instead utilizes the inherent RC equivalent network within the pixel array. As the pulse signal spreads outwards, due to the attenuation characteristics of analog signals, adjacent pixels closer to the trigger pixel accumulate a larger amount of charge, resulting in a longer discharge delay time; pixels farther away are less affected, leading to shorter delay times. This ripple-like layered suppression mechanism achieves dynamic protection with extremely low hardware overhead, where the closer to the fault point, the longer the blocking time. After the interference attenuates and the timing ends, the suppressed pixels automatically resume normal operation, thus ensuring that the detector does not generate a static shielding dead zone.

[0028] Those skilled in the art will understand that the specific implementation architecture of the readout method for the hybrid pixel detector provided in this application is not limited. In one possible implementation, such as... Figure 2 As shown, the implementation architecture may include a sensor layer 101, a pixel array 102, a readout circuit 103, a back-end processing module 104 electrically connected to the readout circuit, and a configuration interface 105. This application does not impose any limitations herein.

[0029] The above is an explanation of the basic concept of this application. The specific implementation methods of each step will be explained below.

[0030] First, those skilled in the art will understand that the specific implementation of the second reading mode is not limited.

[0031] In one possible implementation, the second read mode also includes: temporarily disabling the time measurement path and / or analog recovery path of the adjacent pixels of the trigger pixel.

[0032] Those skilled in the art will understand that this step aims to implement deeper hardware-level isolation for large events. Hybrid pixel detectors typically record not only particle counts but also precise timestamps and energy information in modes such as Time of Arrival (ToA) or Time to Threshold (ToT). When a large event occurs, strong electromagnetic crosstalk or ground bounce can severely disrupt the analog baseline of surrounding pixels. Without isolation, adjacent pixels will not only miscount but also record completely incorrect time and energy data. When entering the second readout mode, the time measurement path and / or analog recovery path of the adjacent pixels of the triggering pixel are further temporarily disabled. This hardware-level isolation mechanism prevents abnormally large events from interfering with the timestamp recording of surrounding pixels and the baseline recovery process of the front-end analog circuitry. By completely cutting off the underlying readout link of the disturbed pixel, this scheme avoids invalid redundant data occupying bus resources and improves the data integrity and disturbance resistance of the hybrid pixel detector under extreme conditions.

[0033] Furthermore, this application also provides a solution when multiple trigger pixels simultaneously trigger the second reading mode.

[0034] In one possible implementation, the reading method further includes: when multiple trigger pixels in the preset neighborhood trigger the second reading mode simultaneously or within a preset time window, the corresponding second time window is determined only based on the trigger pixel with the largest input signal; The duration for which adjacent pixels are temporarily disabled depends on the maximum duration of the second time window corresponding to the multiple second suppression signals they receive.

[0035] This can be understood as follows: in scenarios with extremely high particle flux or dense cluster events, several adjacent pixels may be hit simultaneously, each needing to send out suppression signals. To resolve logical conflicts, the underlying hardware of this application employs an OR (Order) logic and a maximum value arbitration mechanism (Winner takes all). For adjacent pixels located in heavily overlapping areas and simultaneously receiving multiple suppression commands, it avoids logical deadlock, automatically identifying and executing the control signal requiring the longest disable time. This arbitration mechanism ensures that even under chaotic high-flux injection conditions, the system can still maintain a stable and reliable isolation state dominated by the most severe anomaly source.

[0036] The above method solves the problem of multiple trigger pixels triggering the second reading mode simultaneously within the same time period. In another possible case, there may also be a problem of the second reading mode being triggered consecutively within a second time window.

[0037] Therefore, in one possible implementation, the read method also includes: If, before the end of the previous second time window, an input signal greater than the second threshold is detected again and the confirmation condition is met, a new second time window is generated. The total second time window is configured as follows: Immediately end the previous second time window and use a new second time window as the overall second time window; Alternatively, take the maximum value between the previous second time window and the new second time window as the total second time window; Alternatively, multiply the previous second time window by a preset ratio and add it to the new second time window to obtain the total second time window.

[0038] This can be understood as providing multiple modes for refreshing the total second time window. For example, in the extreme case of continuous particle stacking (pile-up), the second time window caused by the first anomalous large event may not have expired before the detector is subjected to a second wave of high-energy impacts. To address this situation, this application provides three methods: time window refresh, maximum value replacement, or a proportional accumulation mechanism. This allows the detector to adaptively extend the silence period of the disturbed pixels, preventing the isolation window from ending prematurely under continuous background radiation bombardment, which could lead to the readout circuit being overwhelmed by subsequent energy. Those skilled in the art can choose which method to use based on their needs and application scenarios; this application makes no restrictions on this choice.

[0039] Those skilled in the art will understand that the specific implementation of the neighborhood of the preset range described herein is also not limited.

[0040] like Figure 3As shown, in one possible implementation, the neighborhood of the preset range is a 3×3 range, a 5×5 range, or a region extending outward in a cross shape for 3, 4, or 5 pixels centered on the trigger pixel.

[0041] This can be understood as follows: different detection application scenarios use sensor materials with varying thicknesses, and the types and energy distributions of incident rays also differ, directly determining the physical range of charge diffusion and crosstalk. By setting the neighborhood to configurable geometries such as 3×3, 5×5, or cross-shaped, the detector can flexibly adapt to different hardware structures. For example, in detectors with small pixel sizes and limited coupling ranges, a 3×3 neighborhood can be used to reduce the sacrifice of effective area, while in thick-layer sensors with severe diffusion, the neighborhood is extended to 5×5, achieving a good balance between suppression accuracy and detection efficiency. Clear area division allows the suppression signal to cover areas susceptible to charge sharing or parasitic crosstalk, meeting the physical detection requirements from conventional deduplication to high-energy cluster isolation while maintaining controllable wiring complexity. Those skilled in the art can design according to their needs, and this application makes no restrictions.

[0042] Secondly, the specific triggering conditions for the second reading mode are also not limited.

[0043] In one possible implementation, the confirmation conditions include: the input signal is greater than a second threshold and lasts for a preset number of time periods.

[0044] This can be understood as follows: During operation, the detector's front-end node is prone to picking up transient noise or high-frequency glitches in the environment. If large-scale peripheral isolation is triggered simply by the voltage amplitude momentarily exceeding the second threshold, the detector will frequently enter the blind zone due to noise, reducing effective detection efficiency. By introducing a combinational logic judgment of a continuously preset number of counting cycles, the system performs time-dimensional filtering and confirmation of the high-level state. Truly significant abnormal events (such as high-energy particle accumulation) will saturate the front-end circuit, and the high-level state will be maintained for a relatively long time. Only when this duration condition is met will the system actually issue the second suppression signal. This filters out brief glitches, ensuring that the second readout mode is activated for truly significant high-energy events, thereby improving the accuracy of the overall logic action and system stability.

[0045] Furthermore, the manner in which the first suppression signal and / or the second suppression signal are emitted is also unrestricted.

[0046] In one possible implementation, when sending the first suppression signal or the second suppression signal, the reading method further includes: The distributed signal is hysteresis-shaped using the Schmitt trigger mechanism to prevent metastability or logic errors during signal propagation and suppression of actions.

[0047] During the distribution of analog signals, the attenuation characteristics of the RC network cause the edges of the pulse signal received by distant pixels to become gradual. Directly using this gradually changing analog signal to drive digital gating circuits can easily cause transistors to reach their switching critical points, leading to metastability or latch-up. Therefore, a Schmitt trigger with hysteresis is introduced at the receiving end of adjacent pixels for signal shaping. Regardless of the attenuation and distortion of the input analog pulse, the Schmitt trigger mechanism can reformat it into steep, clear high and low digital levels, eliminating metastability or logic errors generated during signal propagation and suppression, thus ensuring the reliability of the distributed disable control network under high-speed operation.

[0048] Finally, there are no restrictions on the output method for the reading results of the trigger pixel.

[0049] In one possible implementation, the read method also includes: When outputting data, the current threshold comparison result of the pixel and the event detection status will be compiled into an anomaly flag of a specific bit. Anomaly markers are embedded in the output data packets of trigger pixels for streaming output to support backend data classification or priority scheduling of bus bandwidth.

[0050] This can be understood as follows: the front-end hardware isolation is not a completely isolated black box from the back-end. During the suppression process, the trigger pixel itself, as the source of the fault, is not shielded. The chip's underlying logic directly packages the current comparator's trigger state (e.g., through specific 3 bits) into the counter output data packet of that pixel. When the back-end data processing system parses the streaming data, as long as it reads the abnormal marker in these bits, it can immediately know that the pixel has experienced a major event and that its surrounding area has been cleared. This allows for more accurate cluster reconstruction, energy spectrum correction, or adjustment of readout bandwidth priority, achieving a seamless closed loop between front-end hardware intervention and back-end software algorithms.

[0051] The second aspect of this application provides a readout device for a hybrid pixel detector, the readout device being used to perform any of the aforementioned readout methods for a hybrid pixel detector, including a pixel array, a local transmission network, and a comparator module; The comparator module includes a first threshold comparator and a second threshold comparator that are configured in parallel.

[0052] By constructing a readout device comprising a pixel array, a local transmission network, and a comparator module, and by setting the first and second threshold comparators in parallel, a readout method involving signal detection, window generation, and network distribution can be implemented at the hardware level. This readout device directly performs dual-threshold dynamic region suppression through its underlying circuit architecture, and can be directly integrated into various radiation imaging and industrial inspection scenarios, improving the data throughput efficiency and stability of hybrid pixel detector systems.

[0053] It should be noted that the embodiments of the present invention have better implementability and are not intended to limit the present invention in any way. Any person skilled in the art may use the above-disclosed technical content to change or modify it into equivalent effective embodiments. However, any modifications or equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall still fall within the scope of the technical solution of the present invention.

Claims

1. A readout method for a hybrid pixel detector, characterized in that, The reading method includes: At the analog output node of the trigger pixel front end of the hybrid pixel detector, input signals are acquired in parallel, and the input signals are compared with a first threshold and a second threshold respectively, wherein the second threshold is higher than the first threshold. When the input signal is greater than the first threshold, the first reading mode is triggered: a first suppression signal is sent to the neighborhood of the trigger pixel within a preset range through the local transmission network in the hybrid pixel detector, so as to temporarily disable the counting path of the neighboring pixels of the trigger pixel within the first time window, and retain the single counting result of the trigger pixel. When the input signal further exceeds the second threshold and the confirmation condition is met, a second reading mode is triggered: by injecting a pulse signal into the local transmission network, a second suppression signal is sent to the neighborhood of the trigger pixel within a preset range to disable the counting path and data output path of the neighboring pixels of the trigger pixel within a second time window, wherein the duration of the second time window is longer than the first time window; the second suppression signal is a pulse signal; and, based on the equivalent resistance-capacitance delay characteristics of the local transmission network, the neighboring pixels closer to the trigger pixel receive a stronger pulse signal, and the corresponding second time window is longer; the neighboring pixels farther from the trigger pixel receive a weaker pulse signal, and the corresponding second time window is shorter. After the first time window or the second time window ends, the counting path and / or data output path of the adjacent pixels that were temporarily disabled are automatically restored.

2. The readout method of the hybrid pixel detector as described in claim 1, characterized in that, The second read mode also includes: temporarily disabling the time measurement path and / or analog recovery path of the adjacent pixels of the trigger pixel.

3. The readout method of the hybrid pixel detector as described in claim 1, characterized in that, The confirmation conditions include: the input signal is greater than the second threshold and continues for a preset number of time periods.

4. The readout method of the hybrid pixel detector as described in claim 1, characterized in that, The reading method further includes: when multiple trigger pixels in the preset neighborhood trigger the second reading mode simultaneously or within a preset time window, the corresponding second time window is determined only based on the trigger pixel with the largest input signal; The duration for which the adjacent pixel is temporarily disabled depends on the maximum duration of the second time window corresponding to the multiple second suppression signals it receives.

5. The readout method of the hybrid pixel detector as described in claim 1, characterized in that, When sending the first suppression signal or the second suppression signal, the reading method further includes: The distributed signal is hysteresis-shaped using the Schmitt trigger mechanism to prevent metastability or logic errors during signal propagation and suppression of actions.

6. The readout method of the hybrid pixel detector as described in claim 1, characterized in that, The reading method also includes: When outputting data, the current threshold comparison result of the trigger pixel and the event detection status are compiled into an anomaly flag with specific bits; The anomaly marker is embedded in the output data packet of the trigger pixel for streaming output to support backend execution of data classification or priority scheduling of bus bandwidth.

7. The readout method of the hybrid pixel detector as described in claim 1, characterized in that, The reading method also includes: If, before the end of the previous second time window, the input signal is detected again to be greater than the second threshold and the confirmation condition is met, a new second time window is generated, and the total second time window is configured as follows: Immediately end the previous second time window and use a new second time window as the total second time window; Alternatively, take the maximum value between the previous second time window and the new second time window as the total second time window; Alternatively, the previous second time window can be multiplied by a preset ratio and added to the new second time window to obtain the total second time window.

8. The readout method of the hybrid pixel detector as described in claim 1, characterized in that, The neighborhood of the preset range is a 3×3 or 5×5 area centered on the trigger pixel, or an area extending outward in a cross shape for 3, 4, or 5 pixels.

9. A readout device for a hybrid pixel detector, characterized in that, The reading device is used to perform the reading method of the hybrid pixel detector as described in any one of claims 1-8, including a pixel array, a local transmission network, and a comparator module; The comparator module includes a first threshold comparator and a second threshold comparator configured in parallel.

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