Image sensor, method of operating the same, and imaging apparatus including the same

Abstract

An image sensor, an operating method thereof, and an imaging apparatus including the image sensor are provided. The image sensor includes a pixel array including groups of pixels in a first direction and in a second direction intersecting the first direction, and a peripheral circuit driving the pixel array. Each group of pixels can include a plurality of pixels arranged in a 2M×M form (where M is an even number equal to or greater than 2), and each pixel includes a photodiode arranged in an N×N form (where N is an odd number equal to or greater than 3). The peripheral circuit obtains a first average value of a left image signal and a second average value of a right image signal in a first group of pixels, the left image signal corresponding to charges generated in a pixel region of the first group, and the right image signal corresponding to charges generated in a pixel region of a second group different from the first group, and calculates a disparity of an object based on the first average value and the second average value.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2025-0038159, filed on March 25, 2025, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] Some example embodiments relate to image sensors, methods of operating them, and imaging apparatuses that include image sensors. Background Technology

[0003] An image sensor is a semiconductor-based sensor that receives light and generates electrical signals, and includes a pixel array with multiple pixels. To improve image quality of external objects, image sensors can support autofocus (AF) functionality. Among autofocus methods, phase detection autofocus (PDAF) determines whether a subject is in focus by comparing the phase difference of a pair of separate light rays passing through a pair of autofocus pixels. PDAF allows the camera to focus on the object in a relatively short time. Summary of the Invention

[0004] Example embodiments of this disclosure provide an image sensor, a method of operating thereof, and an imaging apparatus including the image sensor, which uses pixels composed of an odd number of pixel regions to perform phase detection autofocus.

[0005] An image sensor according to some example embodiments of this disclosure may include: a pixel array comprising a plurality of pixel groups in a first direction and in a second direction intersecting the first direction; and peripheral circuitry configured to drive the pixel array. Each of the plurality of pixel groups may include a plurality of pixels in the form of 2M×M (where M is an even number equal to or greater than 2), and each of the plurality of pixels may include a photodiode in the form of N×N (where N is an odd number equal to or greater than 3). The peripheral circuitry may be configured to: use a first pixel group among the plurality of pixel groups to obtain a first average value of a left image signal and a second average value of a right image signal, and to calculate the disparity of an object based on the first and second average values, wherein the left image signal corresponds to a charge generated in a pixel region of the first group, and the right image signal corresponds to a charge generated in a pixel region of a second group different from the first group. In the first pixel group, the first group may be to the left of the second group in the first direction, and the number of pixel regions included in the first group and the number of pixel regions included in the second group may be equal to each other.

[0006] An operation method of an image sensor according to some example embodiments of the present disclosure may include: obtaining a first image signal and a second image signal, the first image signal corresponding to a charge generated in a first group of pixel regions arranged in an N×N configuration within a pixel, and the second image signal corresponding to a charge generated in a second group of pixel regions different from the first group; using the first image signal and the second image signal to generate a left image signal and a right image signal for a pixel group, in which pixels are arranged in a 2M×M configuration; calculating a first average value of the left image signal and a second average value of the right image signal; and using the first average value and the second average value to calculate the disparity of an object.

[0007] An imaging apparatus according to some example embodiments of this disclosure may include: an optical unit including a lens unit and a lens driver, the lens unit including a plurality of lenses, the lens driver being configured to adjust the position of the plurality of lenses; an image sensor configured to: focus light passing through the lens unit and convert the light into a digital signal, and output a control signal for adjusting the position of at least one of the plurality of lenses of the lens unit; and a processor configured to control the lens driver to adjust the position of the at least one of the plurality of lenses based on the control signal. The image sensor may include: a pixel array including a plurality of pixel groups in a first direction and a second direction intersecting the first direction; and peripheral circuitry configured to drive the pixel array. Each of the plurality of pixel groups may include a plurality of pixels in the form of 2M×M (where M is an even number of 2 or greater), and each of the plurality of pixels may include a photodiode in the form of N×N (where N is an odd number of 3 or greater). The peripheral circuitry can obtain a first average value of the left image signal and a second average value of the right image signal in a first pixel group among the plurality of pixel groups, and can calculate the disparity of the object based on the first and second average values. The left image signal corresponds to the charge generated in the pixel region of the first group, and the right image signal corresponds to the charge generated in the pixel region of a second group different from the first group. In the first pixel group, the first group may be to the left of the second group in a first direction, and the number of pixel regions included in the first group and the number of pixel regions included in the second group may be equal to each other.

[0008] According to some example embodiments of this disclosure, left and right image signals can be obtained based on pixel signals transmitted from pixels consisting of an odd number of pixel regions, and phase signal pairs can be obtained based on the average value of the left and right image signals. Focusing can be achieved by calculating the disparity of the object based on the phase signal pairs. Thus, the angle of light incident on the pixel array can be identified with improved resolution, and autofocus can be performed at a relatively high speed while maintaining relatively high resolution.

[0009] The advantages and effects of the exemplary embodiments are not limited to the foregoing and can be more easily understood in the process of describing the exemplary embodiments of this disclosure. Attached Figure Description

[0010] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings.

[0011] Figure 1 This is a block diagram of an imaging apparatus according to some exemplary embodiments of the present disclosure.

[0012] Figure 2 This is simply a block diagram illustrating an image sensor according to some example embodiments of the present disclosure.

[0013] Figure 3 This is simply a plan view illustrating the pixel arrangement of a pixel array according to some example embodiments of the present disclosure.

[0014] Figure 4 and Figure 5 This is a plan view of the structure of a pixel group according to some example embodiments of the present disclosure.

[0015] Figure 6 This is an example circuit diagram of the pixels of an image sensor according to some example embodiments of the present disclosure.

[0016] Figure 7 This is a timing diagram of the readout operation of pixels according to some example embodiments of the present disclosure.

[0017] Figure 8A , Figure 8B and Figure 8C This is a diagram illustrating the movement of charge during a readout operation according to some example embodiments of the present disclosure.

[0018] Figure 9A , Figure 9B and Figure 9C as well as Figure 10A , Figure 10B and Figure 10C It is a plan view of image signals according to some example embodiments of the present disclosure.

[0019] Figure 11 , Figure 12 and Figure 13 This is a flowchart of the operation of an image sensor according to some example embodiments of the present disclosure.

[0020] Figure 14A and Figure 14B This is a timing diagram of the readout operation of pixels according to some example embodiments of the present disclosure.

[0021] Figure 15A, Figure 15B , Figure 15C and Figure 15D This is a diagram illustrating the movement of charge during a readout operation according to some example embodiments of the present disclosure.

[0022] Figure 16A and Figure 16B It is a plan view of image signals according to some example embodiments of the present disclosure.

[0023] Figure 17 and Figure 18 This is a flowchart of the operation of an image sensor according to some example embodiments of the present disclosure.

[0024] Figure 19 This is an example circuit diagram of the pixels of an image sensor according to some example embodiments of the present disclosure.

[0025] Figure 20 This is a timing diagram of the readout operation of a sub-pixel group according to some example embodiments of the present disclosure.

[0026] Figure 21A and Figure 21B It is a plan view of image signals according to some example embodiments of the present disclosure.

[0027] Figure 22 , Figure 23 and Figure 24 This is a flowchart of the operation of an image sensor according to some example embodiments of the present disclosure.

[0028] Figure 25 , Figure 26A and Figure 26B This is a plan view of the structure of a pixel group according to some example embodiments of the present disclosure.

[0029] Figure 27A , Figure 27B , Figure 27C and Figure 27D This is a plan view of the operation of pixel groups according to some example embodiments of this disclosure.

[0030] Figure 28 This is a plan view of the structure of a pixel group according to some example embodiments of the present disclosure.

[0031] Figure 29A , Figure 29B , Figure 29C and Figure 29D This is a plan view of the operation of pixel groups according to some example embodiments of this disclosure.

[0032] Figure 30 This is a plan view of the structure of a pixel group according to some example embodiments of the present disclosure.

[0033] Figure 31A , Figure 31B , Figure 31C and Figure 31D This is a plan view of the operation of pixel groups according to some example embodiments of this disclosure.

[0034] Figure 32 and Figure 33 This is a plan view of the structure of a pixel group according to some example embodiments of the present disclosure.

[0035] Figure 34 This is a block diagram illustrating an electronic device employing an imaging apparatus according to some example embodiments of the present disclosure. Detailed Implementation

[0036] In the following description, exemplary embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0037] Figure 1 This is a block diagram of an imaging apparatus according to some exemplary embodiments of the present disclosure.

[0038] Reference Figure 1 Imaging apparatus 10 according to some example embodiments of the present disclosure may include an optical unit 100, an image sensor 200, and a processor 300. Imaging apparatus 10 may have an autofocus (AF) function.

[0039] Optical unit 100 may be a component configured to receive light and is an optical light-collecting device using mirrors and lenses. For example, optical unit 100 may use optical properties (such as light scattering or light refraction) to change the path of light reflected by an object. Optical unit 100 may include lens unit 110 and lens driver 120. Optical unit 100 may also include a mirror, an aperture, and an aperture driver. Lens unit 110 may consist of multiple lenses (or a system of lenses).

[0040] The lens driver 120 can receive information about focus detection from the processor 300 and can adjust the position of at least one of the lenses included in the lens unit 110 according to control signals (or adjustment signals) provided from the processor 300. For example, the lens driver 120 can move the lens in a direction that increases or decreases the distance from the object. Depending on the operation of the lens unit 110, the object can be focused or blurred, and when multiple objects are present, the focused object can vary.

[0041] Image sensor 200 may be a complementary metal-oxide-semiconductor (CIS) image sensor that converts optical signals into electrical signals. Image sensor 200 can convert incident light into image data. Image sensor 200 may include pixel array 210 and image signal processor 220. The optical signal corresponding to the light transmitted through lens unit 110 can reach the light receiving surface of pixel array 210 and can form an image of the object.

[0042] The pixel array 210 may include a plurality of pixels arranged in a matrix, and each of the plurality of pixels may include at least one photoelectric conversion element. Microlenses, color filters, etc., may be disposed in the path through which the light signal is incident on the photoelectric conversion element.

[0043] Image signal processor 220 can process multiple raw data output from pixel array 210 to generate image data. Image data can be generated in frames. Image signal processor 220 can perform image post-processing operations on the raw data (such as digital merging, noise reduction, gain adjustment, waveform normalization, interpolation, white balance, gamma adjustment, and edge enhancement). In addition, image signal processor 220 can generate control signals for adjusting the focus of imaging device 10.

[0044] In some example embodiments, the image signal processor 220 can obtain the position of the focus, the direction of the focus, and / or the distance between the object and the image sensor 200 by performing phase difference arithmetic operations based on phase signal pairs obtained from one pixel or two or more neighboring pixels. Image data and control signals obtained by the image signal processor 220 can be provided to the processor 300. According to some example embodiments, the image signal processor 220 may include the phase signal pairs in the image data and may directly provide the image data to the processor 300.

[0045] Processor 300 can control the operation of each component of imaging apparatus 10 and can provide control signals to them. Processor 300 can receive image data and control signals (e.g., control signal CTRL) from image signal processor 220. Processor 300 can store image data in external memory or display image data on a display device, etc. According to some example embodiments, processor 300 can perform additional image post-processing operations (e.g., adjusting image parameters of image data (e.g., brightness, contrast, and illuminance)). Processor 300 can adjust the focus with respect to an object (e.g., controlling lens driver 120 such that lens driver 120 moves the position of lens unit 110 based on control signal CTRL received from image signal processor 220). According to some example embodiments, processor 300 can receive phase signal pairs from image signal processor 220, can perform phase difference arithmetic operations, and can adjust the focus with respect to the object OBJECT based on the result of the phase difference arithmetic operations.

[0046] Figure 2 This is a block diagram illustrating an image sensor according to some example embodiments of the present disclosure.

[0047] Reference Figure 2 The image sensor 200 according to some example embodiments of the present disclosure may include a pixel array 210, peripheral circuitry 211, and an image signal processor 220. The peripheral circuitry 211 may include a row driver 230, control logic 240, readout circuitry 250, and data output circuitry 260.

[0048] The image sensor 200 can convert the light signal incident on the object through the lens unit 110 into an electrical signal, and can obtain image data IDAT based on the converted electrical signal.

[0049] Pixel array 210 may include multiple row lines, multiple column lines, and multiple pixels PX connected to the row lines and column lines and arranged in a matrix. Row lines may extend in a first direction, and control signals output from row driver 230 to devices (e.g., transistors) disposed in the pixels PX may be transmitted via the row lines. Column lines may extend in a second direction intersecting the first direction and may be connected to pixels PX arranged along the second direction. Pixel signals VOUT output from pixels PX may be transmitted to readout circuitry 250 via the column lines.

[0050] Each pixel PX may include at least one photoelectric conversion element. The photoelectric conversion element may generate an electrical signal in response to incident light. For example, the photoelectric conversion element may include a photodiode, a phototransistor, a photogate, or a pinned photodiode. For ease of explanation, the following description of the structure of the pixel PX assumes that the photoelectric conversion element is a photodiode, but this disclosure is not limited thereto.

[0051] Pixel PX can convert the charge generated by the photoelectric conversion element in response to light into an electrical signal, and can output an electrical signal. The pixel signal VOUT, which is the electrical signal output from pixel PX, can be sent to readout circuit 250 via column lines.

[0052] Microlenses and color filters can be positioned in the path through which light is incident on the pixel PX. The color filter can transmit light of a specific color (i.e., wavelength of a specific color region) of the light incident through the microlens, and the color that can be detected by the photoelectric conversion element of the pixel PX can be determined based on the color filter positioned in the pixel PX.

[0053] In some example embodiments, each of the plurality of pixels PX can be classified as a red pixel, a green pixel, and a blue pixel, depending on the color of the color filter. However, the type of pixel PX according to some example embodiments of this disclosure is not limited thereto. For example, the plurality of pixels PX may also include cyan pixels, yellow pixels, and / or magenta pixels.

[0054] The row driver 230 can generate control signals for driving the pixel array 210 in response to control of the control logic 240, and can provide the control signals to multiple pixels PX of the pixel array 210 via multiple row lines. In some example embodiments, the row driver 230 can control the pixels PX to detect incident light on a row-line basis by providing transmission signals. Furthermore, the row driver 230 can output transmission signals, selection signals, reset signals, etc., via the row lines.

[0055] The control logic 240 may be implemented as processing circuitry (such as hardware including logic circuitry) or as a combination of hardware and software (such as a processor running software that performs compression operations). The control logic 240 may include a timing controller 241, a ramp signal generator 242, and a clock signal generator 243.

[0056] Timing controller 241 can generate control signals to control the operating timing of each component included in image sensor 200. For example, timing controller 241 can provide a line control signal to line driver 230, and can allow line driver 230 to drive multiple pixels PX in line units in response to the line control signal. As another example, timing controller 241 can provide a ramp control signal to ramp signal generator 242 to control ramp signal RAMP, and ramp signal generator 242 can generate ramp signal RAMP for operation of comparator circuit 251 in response to the ramp control signal.

[0057] The ramp signal generator 242 can provide a ramp signal RAMP with a predetermined (or given or desired) ramp angle that gradually increases or decreases to the readout circuit 250. For example, the ramp signal RAMP may have a waveform that maintains a constant voltage, decreases at a determined ramp angle, and then returns to a constant voltage.

[0058] Clock signal generator 243 provides a counting clock signal CCLK to counter circuit 252. The timing and frequency of acquiring the counting clock signal CCLK can be controlled by timing controller 241. For example, clock signal generator 243 can be implemented as a Gray code generator to obtain Gray code, which is a binary code whose code values ​​increase sequentially. Clock signal generator 243 can generate multiple code values ​​with a resolution based on a set number of bits as the counting clock signal CCLK.

[0059] Under the control of control logic 240, readout circuit 250 can read the pixel signal output by the pixel PX connected to the selected row line among a plurality of pixels PX, and can convert the pixel signal into a digital signal. Readout circuit 250 may include comparator circuit 251 and counter circuit 252.

[0060] Comparison circuit 251 may include multiple comparators COMP. In some example embodiments, the comparators COMP may be implemented using one or more amplifiers (e.g., operational transconductance amplifiers (OTA)). Each of the comparators COMP may compare a reset voltage and a signal voltage output through connected column lines (e.g., the voltage of each pixel signal VOUT) with the voltage of a ramp signal RAMP.

[0061] The counter circuit 252 may include multiple counters CNTR. Each counter CNTR may count the comparison signal output from the corresponding comparator COMP based on the counting clock signal CCLK obtained from the clock signal generator 243.

[0062] The data output circuit 260 can temporarily store the counting signal output from the readout circuit 250, amplify the counting signal, and output the counting signal (e.g., the amplified counting signal) as the raw data RDAT. The data output circuit 260 may include a column decoder 262 and a buffer circuit 261.

[0063] Buffer circuit 261 may include multiple memories MEM. The multiple memories MEM can temporarily store counting signals output from corresponding counters CNTR. Buffer circuit 261 can output the counting signals as raw data RDAT via control signals received from column decoder 262. In some example embodiments, raw data RDAT may include information about the color of the object and information about the phase of the object. According to some example embodiments, the raw data may include a reset image signal, a first image signal, a second image signal, a summation image signal, and / or a column image signal.

[0064] The column decoder 262 can control the output timing of the counting signals stored in multiple memories MEM under the control of the timing controller 241. For example, the multiple memories MEM can output the counting signals sequentially under the control of the column decoder 262. According to some example embodiments, the raw data RDAT can be output to the image signal processor 220 or to an external location of the image sensor 200.

[0065] Image signal processor 220 can perform various signal processing on raw data RDAT received from data output circuit 260. Image signal processor 220 can obtain (or calculate) phase signal pairs based on information about the phase of an object included in the raw data RDAT. According to some example embodiments, image signal processor 220 may be arranged in an external processor (e.g., processor 300) or may be arranged inside control logic 240.

[0066] In some example embodiments, the image sensor 200 may support autofocus (AF) functionality, and may perform autofocus using phase detection autofocus (PDAF). PDAF may be a method of calculating the disparity between the phases of the images formed on the image sensor 200 and focusing on the object. Here, disparity may represent the difference in coordinates between the left and right image data obtained for the object being imaged.

[0067] For example, processor 300 can calculate the parallax of an object by performing phase difference arithmetic operations on multiple phase signal pairs obtained from image signal processor 220. Processor 300 can generate a control signal (or adjustment signal) for adjusting focus based on the calculated parallax and provide the control signal (or adjustment signal) to lens driver 120. Lens driver 120 can adjust the position of at least one of the lenses included in lens unit 110 based on the control signal (or adjustment signal). According to some example embodiments, image signal processor 220 can include phase signal pairs in image data IDAT and can send the phase signal pairs to processor 300. Optionally, phase difference arithmetic operations on phase signal pairs and adjustments to lens unit 110 based on the phase difference arithmetic operations on phase signal pairs can be performed in image signal processor 220.

[0068] Figure 3 This is a plan view illustrating the pixel arrangement of a pixel array 210 according to some example embodiments of the present disclosure.

[0069] Reference Figure 3 Pixel array 210 according to some example embodiments of this disclosure may include a plurality of pixels PX. For example, the plurality of pixels PX may include a plurality of red pixels (R), green pixels (G), and blue pixels (B). In pixel array 210, a plurality of pixel groups PG may be repeatedly arranged according to a specific (or given or desired) pattern. The number of pixels PX included in pixel array 210 may be determined according to the resolution of pixel array 210.

[0070] In some example embodiments, multiple pixels PX included in each of multiple pixel groups PG can be arranged in a 2M×M form (or arrangement) (where M is a natural number equal to or greater than 2), and the multiple pixels PX can be arranged in a Bayer pattern. For example, in Figure 3 In some example embodiments shown, eight pixels PX may be arranged in a 4×2 configuration (or arrangement) in each of a plurality of pixel groups PG. In the following disclosure, for ease of explanation, it is assumed that each of the plurality of pixel groups PG consists of eight pixels PX arranged in a 4×2 configuration (or arrangement), but the arrangement of the pixels PX is not limited thereto.

[0071] Figure 4 and Figure 5 This is a plan view of the structure of a pixel group according to some example embodiments of the present disclosure. Figure 5 Is included Figure 4 The image shows an enlarged view of one of the pixels PX1 to PX8 in pixel group PG.

[0072] Reference Figure 4According to some exemplary embodiments of this disclosure, a pixel group PG may include eight pixels PX1 to PX8 arranged in a 4×2 configuration. Each of pixels PX1 to PX8 may include a microlens ML and a plurality of pixel regions SPX arranged in an N×N configuration (where N is an odd number of 3 or greater). Photodiodes may be disposed in each of the plurality of pixel regions SPX, so that the number of photodiodes included in each of pixels PX1 to PX8 may be equal to or greater than the number of the plurality of pixel regions SPX included in each of pixels PX1 to PX8.

[0073] exist Figure 4 In some example embodiments shown, it is assumed that each of pixels PX1 to PX8 includes a plurality of pixel regions SPX arranged in a 3×3 configuration, but this disclosure is not limited thereto. For ease of explanation, it is assumed below that each of pixels PX1 to PX8 includes a plurality of pixel regions SPX arranged in a 3×3 configuration, and that the pixel regions SPX within a pixel share a microlens ML, and this will be described in more detail, but the construction of pixels PX1 to PX8 and pixel regions SPX is not limited thereto. For example, each of pixels PX1 to PX8 may include a plurality of pixel regions arranged in a 5×5 or 7×7 configuration.

[0074] Reference Figure 5 A pixel PX may include multiple pixel regions SPX1 to SPX9 arranged in a 3×3 configuration, and the multiple pixel regions SPX1 to SPX9 may share a microlens ML. Each of the pixel regions SPX1 to SPX9 may include a photodiode PD. The pixel regions SPX1 to SPX9 included in a pixel PX may share one or more floating diffusion regions.

[0075] In some example embodiments, pixel regions SPX1 to SPX9 included in a pixel PX may share a floating diffusion region. In this case, the output of pixel regions SPX1 to SPX9 included in a pixel PX can be output through a column line. In another example embodiment, in a pixel PX, each of pixel regions SPX1 to SPX3, SPX4 to SPX6, and SPX7 to SPX9, arranged at the same position in a first direction and arranged along a second direction, may form a sub-pixel group sharing a floating diffusion region. In this case, the pixel signal generated by the charge generated by the three photodiodes included in each sub-pixel group can be output through a column line.

[0076] Figure 6 This is an example circuit diagram of the pixels of an image sensor according to some example embodiments of the present disclosure.

[0077] Reference Figure 6The pixel PX, comprising multiple pixel regions SPX1 to SPX9 in some example embodiments according to this disclosure, may share a single floating diffusion region FD. A single pixel PX may also include multiple photodiodes PD1 to PD9, a reset transistor RX, a drive transistor DX, and a select transistor SX. The pixel PX may be provided with a power supply voltage VPIX. The power supply voltage VPIX may be connected to one of the terminals of the reset transistor RX and the drive transistor DX (e.g., the drain terminal). Each of the multiple pixel regions SPX1 to SPX9 included in a single pixel PX may be defined as including a single photodiode (PD1, PD2, ..., or PD9) and a single transmission gate for receiving a transmission signal (TG1, TG2, ..., or TG9). For example, the first to ninth transmission transistors may be transistors connected to the corresponding first to ninth photodiodes PD1 to PD9 and receiving the corresponding first to ninth transmission signals TG1 to TG9. According to some example embodiments, the number of at least one of the reset transistor RX, drive transistor DX, and select transistor SX included in a single pixel PX may be two or more.

[0078] The reset transistor RX can be turned on by the reset signal RG to remove charge from the floating diffusion region FD. The floating diffusion region FD can accumulate charge obtained from at least one of photodiodes PD1 to PD9. The drive transistor DX can amplify the voltage determined by the charge accumulated in the floating diffusion region FD to generate the pixel signal VOUT. The select transistor SX can be driven by the select signal SG to output the pixel signal VOUT to the readout circuit via the column line COL.

[0079] The transfer transistors can be turned on by transfer signals TG1 to TG9 to send the charge obtained by photodiodes PD1 to PD9 to the floating diffusion region FD. For example, when the first transfer transistor is turned on by the first transfer signal TG1 received from the row driver 230, the charge obtained from the first photodiode PD1 can be accumulated by moving to the floating diffusion region FD. The second to ninth transfer transistors can also operate in a similar manner, such that the charge obtained from the corresponding photodiodes PD2 to PD9 is movable and can be accumulated in the floating diffusion region FD.

[0080] Figure 7 This is a timing diagram of the readout operation of pixels according to some example embodiments of the present disclosure. Figure 7 It is a reference Figure 6 The timing diagram describes the readout operation of pixel PX.

[0081] The reset level of a pixel can vary from device to device due to process variations or the timing of the reset operation. Therefore, each pixel may first output a reset voltage RST, followed by signal voltages SIG1 and SIGS. The pixel signal can be determined by the difference between the reset voltage RST and the signal voltages SIG1 and SIGS. For example, the pixel signal can be determined by subtracting the count of times the voltage of the ramp signal RAMP is greater than the time the voltage of ...

[0082] Reference Figure 7 According to some example embodiments of the present disclosure, an image sensor can read pixel signals based on a reset-signal-signal (RSS) readout method. For example, the image sensor can output a first image signal based on the difference between the result of counting a reset voltage RST and the result of counting a first signal voltage SIG1, and can output a summed image signal based on the difference between the result of counting a reset voltage RST and the result of counting a summed signal voltage SIGS.

[0083] The ramp signal RAMP can be generated by a ramp signal generator and provided to the comparator in the readout circuit when a readout operation is performed. The waveform of the ramp signal RAMP can be determined based on the type of the pixel signal VOUT output from the pixel array when the readout operation is performed. The level of the ramp signal RAMP can decrease at a predetermined slope, and the level of the comparison signal can change when the level of the ramp signal RAMP is lower than the level of the pixel signal VOUT. The comparator connected to the column line can compare the ramp signal RAMP with the pixel signal VOUT and output the comparison result as a comparison signal.

[0084] The comparison signal output from the comparator can be sent to a counter. The counter can count the comparison signal based on the counting clock signal CCLK. In some example embodiments, the counter can count the number of times the counting clock signal CCLK is counted from the time point when the level of the ramp signal RAMP begins to decrease to the time point when the level of the comparison signal transitions (i.e., the time point when the level of the ramp signal RAMP equals the level of the pixel signal).

[0085] Refer to together Figure 6 and Figure 7During the reset interval, a reset operation can be performed, in which the reset transistor RX and all transfer transistors are turned on to remove charge from the floating diffusion region FD and all photodiodes PD1 to PD9. Then, the reset transistor RX and all transfer transistors can be turned off to allow the exposure interval to begin. During the exposure interval, pixel PX can be exposed to light. Charge can be generated in the photodiodes PD1 to PD9 included in pixel PX by the incident light. Pixel PX can output the reset voltage RST of the floating diffusion region FD to the column line COL.

[0086] In the first readout interval, the comparator compares the reset voltage RST, output from pixel PX to column line COL, with the voltage of the ramp signal RAMP. Figure 7 In some example embodiments shown, the counter can count the time during which the reset voltage RST is lower than the voltage of the ramp signal RAMP. The reset count value obtained by counting the reset voltage RST can be stored in the memory of a latch or buffer circuit inside the counter.

[0087] Prior to the second readout operation, the first transmission signal group TGG1 may be converted to a voltage corresponding to a logic high. The first transmission signal group TGG1 may include transmission signals input to transmission transistors included in a portion of the plurality of pixel regions SPX1 to SPX9. For example, the first transmission signal group TGG1 may include first transmission signals TG1 to third transmission signals TG3, or first transmission signals TG1 to sixth transmission signals TG6. Optionally, the first transmission signal group TGG1 may include seventh transmission signals TG7 to ninth transmission signals TG9, or fourth transmission signals TG4 to ninth transmission signals TG9.

[0088] The transmission transistor can be turned on by a transmission signal included in the first transmission signal group TGG1, such that the charge of the photodiode connected to the turned transmission transistor can be moved to the floating diffusion region FD. Pixel PX can output a first signal voltage SIG1 corresponding to the charge accumulated in the floating diffusion region FD to the column line COL.

[0089] In the second readout interval, the comparator compares the first signal voltage SIG1 output from pixel PX to column line COL with the voltage of the ramp signal RAMP. Figure 7 In some example embodiments shown, the counter can count the time during which the first signal voltage SIG1 is lower than the voltage of the ramp signal RAMP. The first count value obtained by counting the first signal voltage SIG1 can be stored in the memory of a latch or buffer circuit within the counter.

[0090] Before the third read operation, the second transmission signal group TGG2 can be converted to a voltage corresponding to a logic high. The second transmission signal group TGG2 may include any remaining transmission signals from transmission signals TG1 to TG9 that are not included in the first transmission signal group TGG1. For example, when the first transmission signal group TGG1 is the first transmission signal TG1 to the third transmission signal TG3, the second transmission signal group TGG2 may be the fourth transmission signal TG4 to the ninth transmission signal TG9. As another example, when the first transmission signal group TGG1 is the first transmission signal TG1 to the sixth transmission signal TG6, the second transmission signal group TGG2 may be the seventh transmission signal TG7 to the ninth transmission signal TG9. As another example, when the first transmission signal group TGG1 is the seventh transmission signal TG7 to the ninth transmission signal TG9, the second transmission signal group TGG2 may be the first transmission signal TG1 to the sixth transmission signal TG6. In yet another example, when the first transmission signal group TGG1 is the fourth transmission signal TG4 to the ninth transmission signal TG9, the second transmission signal group TGG2 may be the first transmission signal TG1 to the third transmission signal TG3.

[0091] The transmission transistor can be turned on by a transmission signal included in the second transmission signal group TGG2, allowing the charge in the photodiode connected to the turned transmission transistor to move to the floating diffusion region FD. Pixel PX can output a summed signal voltage SIGS corresponding to the charge accumulated in the floating diffusion region FD to the column line COL.

[0092] In the third readout interval, the comparator compares the summed signal voltage SIGS output from pixel PX to column line COL with the voltage of the ramp signal RAMP. Figure 7 In some example embodiments shown, the counter can count the time when the summation signal voltage SIGS is lower than the voltage of the ramp signal RAMP. The summation count value, which is the count value of the summation signal voltage SIGS, can be stored in the memory of a latch or buffer circuit inside the counter.

[0093] Simultaneously, the first signal voltage SIG1 can be obtained from a portion of the entire pixel region, and the summation signal voltage SIGS can be obtained from the entire pixel region, making the signal range of the summation signal voltage SIGS wider than the signal range of the first signal voltage SIG1. In other words, the range of code values ​​provided as the counting clock signal CCLK in the third readout interval (i.e., the number of clock cycles switched) can be wider than the range of code values ​​provided as the counting clock signal CCLK in the second readout interval.

[0094] Figures 8A to 8C This is a diagram illustrating the movement of charge during a readout operation according to some example embodiments of the present disclosure. Figures 8A to 8CThe diagram schematically illustrates the energy levels of a floating diffusion region and multiple photodiodes within a pixel. Figures 8A to 8C It can be compared with the above references respectively. Figure 7 The energy level correspondences of pixels in the first, second, and third readout operations of the described pixel PX are given. For ease of explanation, in... Figures 8A to 8C In some example embodiments shown, it is assumed that the first transmission signal group includes the first transmission signal to the sixth transmission signal, but this disclosure is not limited thereto.

[0095] Reference Figure 8A During the exposure interval, each photodiode PD1 to PD9 can generate a charge in response to light. During the exposure interval, the floating diffusion region FD can be in a reset state and therefore can have a potential corresponding to the reset voltage RST. During the first readout interval, the pixel can output the reset voltage RST corresponding to the potential of the floating diffusion region FD.

[0096] Reference Figure 8B Before the second readout interval, the first to sixth transmission transistors can be turned on by the first to sixth transmission signals included in the first transmission signal group. Therefore, the charge generated by the first photodiode PD1 to the sixth photodiode PD6 can move to the floating diffusion region FD. The floating diffusion region FD can have a potential corresponding to the first signal voltage SIG1. During the second readout interval, the pixel can output the first signal voltage SIG1 corresponding to the potential of the floating diffusion region FD.

[0097] Reference Figure 8C Before the third readout interval, the seventh to ninth transmission transistors can be turned on by the seventh to ninth transmission signals included in a second transmission signal group different from the first transmission signal group. Therefore, the charge generated in the seventh photodiode PD7 to the ninth photodiode PD9 can move to the floating diffusion region FD. (Refer to...) Figure 8C Before the start of the third readout interval, the charge generated in all photodiodes PD1 to PD9 can be accumulated in the floating diffusion region FD. The floating diffusion region FD can have a potential corresponding to the summation signal voltage SIGS. During the third readout interval, the pixel can output the summation signal voltage SIGS corresponding to the potential of the floating diffusion region FD.

[0098] Comparator (e.g., Figure 2The comparator COMP in the circuit sequentially compares the reset voltage RST, the first signal voltage SIG1, and the summation signal voltage SIGS with the voltage of the ramp signal RAMP. The counter counts the time during which each of the reset voltage RST, the first signal voltage SIG1, and the summation signal voltage SIGS exceeds the voltage of the ramp signal RAMP. The peripheral circuit 211 calculates the difference between the reset count value obtained by counting the reset voltage RST and the first count value obtained by counting the first signal voltage SIG1, and generates a first image signal corresponding to the charge generated by the first photodiode PD1 to the sixth photodiode PD6. Furthermore, the peripheral circuit 211 calculates the difference between the reset count value obtained by counting the reset voltage RST and the summation count value obtained by counting the summation signal voltage SIGS, and generates a summation image signal corresponding to the charge generated by all photodiodes PD1 to PD9.

[0099] The peripheral circuit 211 generates a second image signal corresponding to the charge generated by the seventh photodiode PD7 to the ninth photodiode PD9 by subtracting the first image signal from the summed image signal. The peripheral circuit 211 generates a phase signal pair corresponding to the phase information about the object by using the average value of the first image signal relative to the left-hand pixel region and the average value of the second image signal relative to the right-hand pixel region within a pixel. The peripheral circuit 211 can calculate the parallax based on the phase signal pair and can use the parallax to perform an autofocus function.

[0100] Figures 9A to 9C and Figures 10A to 10C It is a plan view of image signals according to some example embodiments of the present disclosure.

[0101] Figures 9A to 9C and Figures 10A to 10C The operation of a group of pixels in a pixel array included in an image sensor is illustrated according to some example embodiments of the present disclosure. (Refer to...) Figures 9A to 9C and Figures 10A to 10C In some example embodiments described, a pixel group PG may include eight pixels PX1 to PX8 arranged in a 4×2 array. Furthermore, each of pixels PX1 to PX8 may include nine pixel regions SPX1 to SPX9 sharing a microlens. Similar to the explanation above, each pixel region SPX1 to SPX9 may include a photodiode and a transmission transistor.

[0102] Figure 9A This shows the pixel region in pixel group PG that generates the charge corresponding to the first image signal. (Refer to...) Figure 9AThe first image signal can be output from the first pixel region SPX1 to the sixth pixel region SPX6 in each of the first pixel PX1, the second pixel PX2, the seventh pixel PX7, and the eighth pixel PX8, and the first pixel region SPX1 to the third pixel region SPX3 in each of the third pixel PX3 to the sixth pixel PX6. In other words, the first image signal can correspond to the charge generated in the first pixel region SPX1 to the sixth pixel region SPX6 in each of the first pixel PX1, the second pixel PX2, the seventh pixel PX7, and the eighth pixel PX8, and the charge generated in the first pixel region SPX1 to the third pixel region SPX3 in each of the third pixel PX3 to the sixth pixel PX6. Among the 72 pixel regions included in the pixel group PG, the 36 pixel regions that generate the charge corresponding to the first image signal can be defined as the pixel regions of the first group.

[0103] Figure 9B This shows the pixel region in pixel group PG corresponding to the charge of the generated and summed image signal. (Refer to...) Figure 9B The summed image signal can correspond to the charge generated in pixel regions SPX1 to SPX9 in each of all pixels PX1 to PX8 included in pixel group PG.

[0104] Figure 9C The diagram illustrates pixel regions within a pixel group PG that generate charges corresponding to a second image signal. The second image signal may correspond to charges generated in the seventh pixel region SPX7 to the ninth pixel region SPX9, included in each of the first pixel PX1, second pixel PX2, seventh pixel PX7, and eighth pixel PX8, and in the fourth pixel region SPX4 to the ninth pixel region SPX9, included in each of the third pixel PX3 to sixth pixel PX6. Of the 72 pixel regions included in pixel group PG, 36 pixel regions that generate charges corresponding to the second image signal can be defined as the pixel regions of a second group.

[0105] Figure 10A This shows the pixel region in pixel group PG that generates the charge corresponding to the first image signal. (Refer to...) Figure 10AThe first image signal can be output from the first pixel region SPX1 to the sixth pixel region SPX6 in each of the first pixel PX1 and the second pixel PX2, the seventh pixel region SPX7 to the ninth pixel region SPX9 in each of the third pixel PX3 and the fourth pixel PX4, the fourth pixel region SPX4 to the ninth pixel region SPX9 in each of the fifth pixel PX5 and the sixth pixel PX6, and the first pixel region SPX1 to the third pixel region SPX3 in each of the seventh pixel PX7 and the eighth pixel PX8. Among the 72 pixel regions included in the pixel group PG, the pixel region that generates the charge corresponding to the first image signal can be defined as the pixel region of the first group.

[0106] Figure 10B This shows the pixel region in pixel group PG corresponding to the charge of the generated and summed image signal. (Refer to...) Figure 10B The summed image signal can correspond to the charge generated in pixel regions SPX1 to SPX9 in each of all pixels PX1 to PX8 included in pixel group PG.

[0107] Figure 10C The diagram illustrates pixel regions within a pixel group PG that generate charges corresponding to a second image signal. The second image signal may correspond to charges generated in the seventh pixel region SPX7 to the ninth pixel region SPX9 in each of the first pixels PX1 and the second pixels PX2, charges generated in the first pixel region SPX1 to the sixth pixel region SPX6 in each of the third pixels PX3 and the fourth pixels PX4, charges generated in the first pixel region SPX1 to the third pixel region SPX3 in each of the fifth pixels PX5 and the sixth pixels PX6, and charges generated in the fourth pixel region SPX4 to the ninth pixel region SPX9 in each of the seventh pixels PX7 and the eighth pixels PX8. Among the 72 pixel regions included in the pixel group PG, the pixel regions that generate charges corresponding to the second image signal can be defined as the pixel regions of a second group.

[0108] exist Figures 9A to 9C and Figures 10A to 10C In some example embodiments shown, the number of pixel regions in the first group may be equal to the number of pixel regions in the second group, and may be 36. For example, peripheral circuit 211 may obtain each of the first image signal and the summed image signal of pixel group PG, and may subtract the first image signal from the summed image signal to obtain the second image signal of pixel group PG.

[0109] In some exemplary embodiments of this disclosure, the left and right image signals required to achieve the autofocus function can be obtained using a first image signal and a second image signal. For example, in Figures 9A to 9C In some example embodiments shown, the left image signal may correspond to the first image signal, and the right image signal may correspond to the second image signal. For example, the left image signal may correspond to the charge generated in the first pixel region SPX1 to the sixth pixel region SPX6 included in each of the first pixel PX1, the second pixel PX2, the seventh pixel PX7, and the eighth pixel PX8, and the charge generated in the first pixel region SPX1 to the third pixel region SPX3 included in each of the third pixel PX3 to the sixth pixel PX6. The right image signal may correspond to the charge generated in the seventh pixel region SPX7 to the ninth pixel region SPX9 included in each of the first pixel PX1, the second pixel PX2, the seventh pixel PX7, and the eighth pixel PX8, and the charge generated in the fourth pixel region SPX4 to the ninth pixel region SPX9 included in each of the third pixel PX3 to the sixth pixel PX6.

[0110] At the same time, Figures 10A to 10C In some example embodiments shown, a portion of each of the left and right image signals may be included in the first image signal, and other portions of each of the left and right image signals may be included in the second image signal. Figures 10A to 10C In some example embodiments shown, the left image signal may correspond to the charge generated in the first pixel region SPX1 to the sixth pixel region SPX6 included in each of the first pixels PX1 to the fourth pixels PX4, and the charge generated in the first pixel region SPX1 to the third pixel region SPX3 included in each of the fifth pixels PX5 to the eighth pixels PX8. The right image signal may correspond to the charge generated in the seventh pixel region SPX7 to the ninth pixel region SPX9 included in each of the first pixels PX1 to the fourth pixels PX4, and the charge generated in the fourth pixel region SPX4 to the ninth pixel region SPX9 included in each of the fifth pixels PX5 to the eighth pixels PX8.

[0111] The peripheral circuit 211 or image signal processor 220 can drive pixel groups PG as individual units and can calculate the average value of the left image signal and the average value of the right image signal. (See reference...) Figures 9A to 9C and Figures 10A to 10CWithin a pixel group PG, for each color, the number of pixel regions generating charges corresponding to the left image signal can be equal to the number of pixel regions generating charges corresponding to the right image signal. That is, for each of the red pixels (PX2 and PX6) and blue pixels (PX3 and PX7), nine pixel regions can be included (i.e., the total number of pixel regions generating charges corresponding to the left image signal and the total number of pixel regions generating charges corresponding to the right image signal are both 9). Furthermore, for the green pixels (PX1, PX4, PX5, and PX8), 18 pixel regions can be included (i.e., the total number of pixel regions generating charges corresponding to the left image signal and the total number of pixel regions generating charges corresponding to the right image signal are both 18).

[0112] The peripheral circuit 211 or the image signal processor 220 can obtain a pair of phase signals corresponding to the phase information about the object based on the average value of the left image signal and the average value of the right image signal. The image signal processor can use the pair of phase signals to calculate the disparity of the object. For example, the two phase signals output for the same object may have different coordinates, and the disparity corresponding to the difference in coordinates can be calculated.

[0113] Image signal processor 220 can generate control signals for implementing autofocus functionality based on calculated parallax. In some example embodiments, the lens driver can adjust the position of at least one of the lenses included in the lens unit based on the control signals to adjust the focus with respect to the object. According to some example embodiments, the processor can control the lens driver in response to the received control signals to adjust the focus with respect to the object. In this way, PDAF operation can be performed using pixels comprising an odd number of pixel regions. This allows for more accurate identification of the angle of light incident on the pixel array while maintaining high resolution, thereby improving autofocus functionality.

[0114] Figures 11 to 13 This is a flowchart of the operation of an image sensor according to some example embodiments of the present disclosure. Figures 11 to 13 This illustrates that when pixels are referenced according to some example embodiments of this disclosure Figure 6 The flowchart describes an example operation when describing pixels. It should be understood that additional operations may be performed. Figures 11 to 13 The operations described below are provided before, during, and after the process, and for additional embodiments of the method, some of the operations described below may be replaced or excluded. The order of operations / processes may be interchangeable, or two or more operations may be performed simultaneously.

[0115] The image signal processor can determine a portion of the entire area of ​​the image being captured as the focus region (S100). For example, the image signal processor can determine the focus region from user input, or it can determine the focus region based on object information in the image. As another example, the image signal processor can identify objects included in the image based on image data provided from a pixel array. When a specific region (e.g., a face) of an object included in the image is identified, the image signal processor can determine the region including the specific region (e.g., a face) as the focus region. However, the method of determining the focus region is not limited to this, and according to some example embodiments, the focus region can be determined by the processor.

[0116] The image signal processor may receive raw data output from the pixel array (S200). In some example embodiments, the raw data may include a first image signal and a summed image signal, or it may include a first image signal and a second image signal. The image signal processor may calculate the disparity of an object based on the raw data (S300). For example, the image signal processor may calculate the disparity corresponding to the raw data output from multiple pixel groups corresponding to the focus region. As another example, the image signal processor may calculate the disparity corresponding to all the raw data received from the pixel array.

[0117] The image signal processor can generate a control signal based on parallax (S400). The control signal can be a signal used to adjust the focus on the object. In some example embodiments, the lens driver can adjust the distance between the lens and the object based on the control signal. According to some example embodiments, the processor can control the lens driver to adjust the position of the lens based on the control signal, thereby adjusting the distance between the lens and the object.

[0118] Figure 12 Show reference Figure 11 Operation S200 is described in the operation phase. Figure 11 This is a flowchart illustrating the process of reading pixel signals using an image sensor based on an RSS readout method according to some example embodiments of the present disclosure.

[0119] The reset transistor RX and all transfer transistors are turned on (S201), and a reset operation is performed, in which the charge in the floating diffusion region FD and the charge in all photodiodes PD1 to PD9 are removed or otherwise reduced. Then, the reset transistor RX and all transfer transistors are turned off to initiate an exposure interval. During the exposure interval, light can be exposed to the pixel (S202). Charge can be generated in the photodiodes included in the pixel. The pixel can output a reset voltage as a pixel signal to the column line (S203).

[0120] In the first readout interval, the comparator compares the reset voltage output from the pixel to the column line with the voltage of the ramp signal. The reset count value obtained by counting the reset voltage can be stored in the memory of a latch or buffer circuit inside the counter.

[0121] Before the second readout operation, the first transmission signal group can be converted into a voltage corresponding to a logic high. The first transmission transistor group can be turned on by the transmission signal included in the first transmission signal group (S204), so that the charge of the photodiode connected to the turned transmission transistor can be moved to the floating diffusion region. The pixel can output a first signal voltage corresponding to the charge accumulated in the floating diffusion region to the column line (S205).

[0122] In the second readout interval, the comparator compares the first signal voltage output from pixel PX to the column line with the voltage of the ramp signal RAMP. The first count value obtained by counting the first signal voltage can be stored in the memory of a latch or buffer circuit inside the counter. The peripheral circuit can calculate the first image signal based on the reset count value and the first count value (S206).

[0123] Before the third readout operation, the second transmission signal group can be converted to a voltage corresponding to a logic high. The second transmission transistor group can be turned on by the transmission signal included in the second transmission signal group (S207). The charge of the photodiode connected to the turned transmission transistor can be moved to the floating diffusion region. The pixel can output a summed signal voltage corresponding to the charge accumulated in the floating diffusion region to the column line (S208).

[0124] In the third readout interval, the comparator compares the summation signal voltage output from the pixel to the column line with the voltage of the ramp signal RAMP. The summation count value obtained by counting the summation signal voltage can be stored in the memory of the latch or buffer circuit inside the counter. The peripheral circuit 211 can calculate the summation image signal based on the reset count value and the summation count value (S209).

[0125] Figure 13 Show reference Figure 11 Operation S300 is described in the operation phase. Figure 13 This refers to operation S200 as described above. Figures 8A to 8C A flowchart illustrating the execution of the RSS readout operation.

[0126] The second image signal can be calculated using the first image signal and the summed image signal (S301). In some example embodiments, the peripheral circuitry can calculate the second image signal by subtracting the first image signal from the summed image signal.

[0127] The left and right image signals, which are included in the pixel signals of the first and second image signals, can be identified or distinguished from each other, and the average value of the left and right image signals can be calculated (S302). In some example embodiments, the average value of the image signals can be calculated by a binning operation on the left and right image signals.

[0128] The left phase signal can be obtained based on the average value of the left image signal, and the right phase signal can be obtained based on the average value of the right image signal (S303). The peripheral circuit can use the average value of a first image signal relative to a pixel region on the left and the average value of a second image signal relative to a pixel region on the right to calculate a pair of phase signals (e.g., a left phase signal and a right phase signal) corresponding to phase information about the object. The left phase signal can correspond to left phase information, and the right phase signal can correspond to right phase information.

[0129] The disparity of the object can be calculated based on the left and right phase signals (S304). The peripheral circuitry can calculate the disparity based on the phase signal pair and can use the disparity to perform an autofocus function.

[0130] Image sensors according to some example embodiments of this disclosure can use pixels comprising an odd number of pixel regions to perform PDAF operations. Therefore, when performing autofocus, the angle of light incident on the pixel array can be identified with relatively high accuracy while maintaining relatively high resolution, and the autofocus function can be improved.

[0131] Figure 14A and Figure 14B This is a timing diagram of the readout operation of pixels according to some example embodiments of the present disclosure. Figure 14A and Figure 14B It is a reference Figure 6 The timing diagram describes the readout operation of pixel PX.

[0132] Reference Figure 14A and Figure 14B , with reference to the above Figure 7 Unlike some of the example embodiments described, the image sensor according to some example embodiments of this disclosure can measure pixel signals based on a reset-signal-reset-signal (RSRS) readout method. For example, the image sensor can measure a reset voltage RST and a first signal voltage SIG1, and then output a first image signal based on the difference between the reset voltage RST and the first signal voltage SIG1; and it can measure a reset voltage RST and a second signal voltage SIG2, and then output a second image signal based on the difference between the reset voltage RST and the second signal voltage SIG2.

[0133] Figure 14A This is a timing diagram for the case where the number of pixel regions outputting the pixel signal corresponding to the first signal voltage SIG1 is greater than the number of pixel regions outputting the pixel signal corresponding to the second signal voltage SIG2. For example, the difference between the level of the first signal voltage SIG1 and the level of the reset voltage RST can be greater than the difference between the level of the second signal voltage SIG2 and the level of the reset voltage RST. Figure 14B This is a timing diagram for the case where the number of pixel regions outputting the pixel signal corresponding to the second signal voltage SIG2 is greater than the number of pixel regions outputting the pixel signal corresponding to the first signal voltage SIG1. In this case, the difference between the level of the first signal voltage SIG1 and the level of the reset voltage RST can be less than the difference between the level of the second signal voltage SIG2 and the level of the reset voltage RST.

[0134] Refer to together Figure 6 , Figure 14A and Figure 14B A reset operation can be performed to remove the charge from the floating diffusion region FD and all photodiodes PD1 to PD9. During the reset operation, the reset transistor RX and all transfer transistors are turned on. Then, the reset transistor RX and all transfer transistors can be turned off to allow the exposure interval to begin. During the exposure interval, pixel PX can be exposed to light. Photodiodes PD1 to PD9, included in the light-receiving pixel PX, can generate and accumulate a charge proportional to the incident light.

[0135] In the first readout interval, the comparator compares the reset voltage RST, output from pixel PX to column line COL, with the voltage of the ramp signal RAMP. Figure 14A and Figure 14B In some example embodiments shown, the counter can count the time during which the reset voltage RST is lower than the voltage of the ramp signal RAMP. The reset count value obtained by counting the reset voltage RST can be stored in the memory of a latch or buffer circuit inside the counter.

[0136] Prior to the second readout operation, the first transfer signal group TGG1 may be converted to a voltage corresponding to a logic high. The first transfer signal group TGG1 may include transfer signals input to transfer transistors included in a portion of the plurality of pixel regions SPX1 to SPX9. For example, refer to... Figure 14A The first transmission signal group TGG1 may include first transmission signal TG1 to third transmission signal TG3, or fourth transmission signal TG4 to ninth transmission signal TG9. Optionally, refer to Figure 14B The first transmission signal group TGG1 may include the seventh transmission signal TG7 to the ninth transmission signal TG9, or the first transmission signal TG1 to the sixth transmission signal TG6.

[0137] The transmission transistor can be turned on by a transmission signal included in the first transmission signal group TGG1, and the charge of the photodiode connected to the turned-on transmission transistor can be moved to the floating diffusion region FD. Pixel PX can output a first signal voltage SIG1 corresponding to the charge accumulated in the floating diffusion region FD to the column line COL.

[0138] In the second readout interval, the comparator compares the first signal voltage SIG1 output from pixel PX to column line COL with the voltage of the ramp signal RAMP. Figure 14A and Figure 14B In some example embodiments shown, the counter can count the time during which the first signal voltage SIG1 is lower than the voltage of the ramp signal RAMP. The first count value obtained by counting the first signal voltage SIG1 can be stored in the memory of a latch or buffer circuit within the counter.

[0139] Before the third readout interval, the reset signal RG can be converted to a voltage corresponding to a logic high. Therefore, the reset transistor RX can be turned on to perform a reset operation, in which the charge in the floating diffusion region FD is removed or otherwise reduced. Pixel PX can output the reset voltage RST of the floating diffusion region FD to the column line COL.

[0140] In the third readout interval, similar to the first readout interval, the comparator compares the reset voltage RST output from pixel PX to column line COL with the voltage of the ramp signal RAMP. Figure 14A and Figure 14B In some example embodiments shown, the counter can count the time during which the reset voltage RST is lower than the voltage of the ramp signal RAMP.

[0141] Before the fourth read operation, the second transmission signal group TGG2 can be converted to a voltage corresponding to a logic high. The second transmission signal group TGG2 may include the remaining transmission signals from transmission signals TG1 to TG9 that were not included in the first transmission signal group TGG1. (See reference...) Figure 14A For example, when the first transmission signal group TGG1 consists of the first transmission signal TG1 to the sixth transmission signal TG6, the second transmission signal group TGG2 can be the seventh transmission signal TG7 to the ninth transmission signal TG9. As another example, when the first transmission signal group TGG1 consists of the fourth transmission signal TG4 to the ninth transmission signal TG9, the second transmission signal group TGG2 can be the first transmission signal TG1 to the third transmission signal TG3. (See reference...) Figure 14BFor example, when the first transmission signal group TGG1 consists of the first transmission signal TG1 to the third transmission signal TG3, the second transmission signal group TGG2 can be the fourth transmission signal TG4 to the ninth transmission signal TG9. As another example, when the first transmission signal group TGG1 consists of the seventh transmission signal TG7 to the ninth transmission signal TG9, the second transmission signal group TGG2 can be the first transmission signal TG1 to the sixth transmission signal TG6.

[0142] The transmission transistor can be turned on by a transmission signal included in the second transmission signal group TGG2, allowing the charge in the photodiode connected to the turned-on transmission transistor to move to the floating diffusion region FD. Pixel PX can output a second signal voltage SIG2 corresponding to the charge accumulated in the floating diffusion region FD to the column line COL.

[0143] In the fourth readout interval, the comparator compares the second signal voltage SIG2, output from pixel PX to column line COL, with the voltage of the ramp signal RAMP. Figure 14A and Figure 14B In some example embodiments shown, the counter can count the time during which the second signal voltage SIG2 is lower than the voltage of the ramp signal RAMP. The second count value obtained by counting the second signal voltage SIG2 can be stored in the memory of a latch or buffer circuit within the counter.

[0144] Meanwhile, the signal range of the first signal voltage SIG1 and the signal range of the second signal voltage SIG2 can be different from each other. That is, the range of code values ​​provided as the counting clock signal CCLK in the second readout interval (i.e., the number of clocks switched) can be different from the range of code values ​​provided as the counting clock signal CCLK in the fourth readout interval.

[0145] Figures 15A to 15D This is a diagram illustrating the movement of charge during a readout operation according to some example embodiments of the present disclosure. Figures 15A to 15D It can be a rough diagram showing the energy levels of the floating diffusion region and multiple photodiodes included in a pixel. Figure 15A , Figure 15B , Figure 15C and Figure 15D It can be compared with the above references respectively. Figure 14A The energy level correspondences of pixels in the first, second, third, and fourth readout operations of the described pixel PX are given. For ease of explanation, in... Figures 15A to 15D In some example embodiments shown, it is assumed that the first transmission signal group includes according to Figure 14A The first to sixth transmission signals are shown in some example embodiments, but this disclosure is not limited thereto.

[0146] Reference Figure 15A During the exposure interval, each of photodiodes PD1 to PD9 can generate a charge in response to light. During the exposure interval, the floating diffusion region FD can be in a reset state and therefore can have a potential corresponding to the reset voltage RST. During the first readout interval, the pixel can output the reset voltage RST corresponding to the potential of the floating diffusion region FD.

[0147] Reference Figure 15B Before the second readout interval, the first to sixth transmission transistors can be turned on by the first to sixth transmission signals included in the first transmission signal group. Therefore, the charge generated in the first photodiodes PD1 to PD6 can move to the floating diffusion region FD. The floating diffusion region FD can have a potential corresponding to the first signal voltage SIG1. During the second readout interval, the pixel can output the first signal voltage SIG1 corresponding to the potential of the floating diffusion region FD.

[0148] Reference Figure 15C The floating diffusion region FD can be in a reset state, and therefore can have a potential corresponding to the reset voltage RST. During the third readout interval, the pixel can output the reset voltage RST corresponding to the potential of the floating diffusion region FD.

[0149] Reference Figure 15D Before the fourth readout interval, the seventh to ninth transmission transistors can be turned on by the seventh to ninth transmission signals included in a second transmission signal group different from the first transmission signal group. Therefore, the charge generated in the seventh photodiode PD7 to the ninth photodiode PD9 can move to the floating diffusion region FD. (Refer to...) Figure 15D Before the start of the fourth readout interval, the charge generated in the seventh photodiode PD7 to the ninth photodiode PD9 can be accumulated in the floating diffusion region FD. The floating diffusion region FD can have a potential corresponding to the second signal voltage SIG2. During the fourth readout interval, the pixel can output the second signal voltage SIG2 corresponding to the potential of the floating diffusion region FD.

[0150] The comparator sequentially compares the reset voltage RST, the first signal voltage SIG1, the second signal voltage SIG2, and the voltage of the ramp signal RAMP. The counter counts the time for each of the reset voltage RST, the first signal voltage SIG1, and the second signal voltage SIG2 to be higher than the voltage of the ramp signal RAMP. The peripheral circuitry calculates the difference between the reset count value obtained by counting the reset voltage RST and the first count value obtained by counting the first signal voltage SIG1, and generates a first image signal corresponding to the charge generated by the first photodiode PD1 to the sixth photodiode PD6. Furthermore, the peripheral circuitry calculates the difference between the reset count value obtained by counting the reset voltage RST and the second count value obtained by counting the second signal voltage SIG2, and generates a second image signal corresponding to the charge generated by the seventh photodiode PD7 to the ninth photodiode PD9.

[0151] The peripheral circuitry can use the average value of a first image signal relative to a pixel region on the left and the average value of a second image signal relative to a pixel region on the right within a single pixel, and can calculate a phase signal pair corresponding to phase information about the object. The peripheral circuitry can calculate parallax based on the phase signal pair and can use the parallax to perform an autofocus function.

[0152] Figure 16A and Figure 16B It is a plan view of image signals according to some example embodiments of the present disclosure.

[0153] Figure 16A and Figure 16B The operation of a group of pixels in a pixel array included in an image sensor is illustrated according to some example embodiments of the present disclosure. (Refer to...) Figure 16A and Figure 16B In some of the example embodiments described, a pixel group PG may include eight pixels PX1 to PX8 arranged in a 4×2 configuration. Furthermore, each of pixels PX1 to PX8 may include nine pixel regions SPX1 to SPX9 sharing a microlens, and each of the nine pixel regions SPX1 to SPX9 may include a photodiode.

[0154] Figure 16A This shows the pixel region in pixel group PG that generates the charge corresponding to the first image signal. (Refer to...) Figure 16AThe first image signal can be output from the first pixel region SPX1 to the sixth pixel region SPX6 in each of the first pixel PX1, the second pixel PX2, the seventh pixel PX7, and the eighth pixel PX8, and the first pixel region SPX1 to the third pixel region SPX3 in each of the third pixel PX3 to the sixth pixel PX6. In other words, the first image signal can correspond to the charge generated in the first pixel region SPX1 to the sixth pixel region SPX6 in each of the first pixel PX1, the second pixel PX2, the seventh pixel PX7, and the eighth pixel PX8, and the charge generated in the first pixel region SPX1 to the third pixel region SPX3 in each of the third pixel PX3 to the sixth pixel PX6. Among the 72 pixel regions included in the pixel group PG, the pixel region that generates the charge corresponding to the first image signal can be defined as the pixel region of the first group.

[0155] Figure 16B The diagram illustrates pixel regions within a pixel group PG that generate charges corresponding to a second image signal. The second image signal may correspond to charges generated in the seventh pixel region SPX7 to the ninth pixel region SPX9, included in each of the first pixel PX1, second pixel PX2, seventh pixel PX7, and eighth pixel PX8, and in the fourth pixel region SPX4 to the ninth pixel region SPX9, included in each of the third pixel PX3 to sixth pixel PX6. Among the 72 pixel regions included in pixel group PG, the pixel regions generating charges corresponding to the second image signal can be defined as the pixel regions of a second group.

[0156] exist Figure 16A and Figure 16B In some example embodiments shown, the number of pixel regions in the first group may be equal to the number of pixel regions in the second group, and may be 36. For example, peripheral circuitry 211 may obtain each of the first and second image signals of pixel group PG.

[0157] In some exemplary embodiments of this disclosure, the left and right image signals required to achieve the autofocus function can be obtained using a first image signal and a second image signal. For example, in Figure 16A and Figure 16BIn some example embodiments shown, the left image signal may correspond to the first image signal, and the right image signal may correspond to the second image signal. That is, the left image signal may correspond to the charge generated in the first pixel region SPX1 to the sixth pixel region SPX6 included in each of the first pixel PX1, second pixel PX2, seventh pixel PX7, and eighth pixel PX8, and the charge generated in the first pixel region SPX1 to the third pixel region SPX3 included in each of the third pixel PX3 to the sixth pixel PX6. The right image signal may correspond to the charge generated in the seventh pixel region SPX7 to the ninth pixel region SPX9 included in each of the first pixel PX1, second pixel PX2, seventh pixel PX7, and eighth pixel PX8, and the charge generated in the fourth pixel region SPX4 to the ninth pixel region SPX9 included in each of the third pixel PX3 to the sixth pixel PX6.

[0158] The peripheral circuit 211 or image signal processor 220 can drive pixel groups PG as individual units and can calculate the average value of the left image signal and the average value of the right image signal. (See reference...) Figure 16A and Figure 16B Within a pixel group PG, for each color, the number of pixel regions generating charges corresponding to the left image signal can be equal to the number of pixel regions generating charges corresponding to the right image signal. For example, nine pixel regions can be included for each of the red pixels (PX2 and PX6) and blue pixels (PX3 and PX7). Furthermore, 18 pixel regions can be included for the green pixels (PX1, PX4, PX5, and PX8).

[0159] The peripheral circuit 211 or the image signal processor 220 can obtain a pair of phase signals corresponding to the phase information about the object based on the average values ​​of the left and right image signals. The image signal processor can use the pair of phase signals to calculate the disparity of the object. For example, two phase signals output for the same object may have different coordinates, and the disparity corresponding to the difference in coordinates can be calculated.

[0160] Image signal processor 220 can generate control signals for implementing autofocus functionality based on calculated parallax. In some example embodiments, the lens driver can adjust the position of at least one of the lenses included in the lens unit based on the control signals to adjust the focus on the object. According to some example embodiments, the processor can control the lens driver in response to the received control signals to adjust the focus on the object. In this way, PDAF operation can be performed using pixels comprising an odd number of pixel regions. Thus, autofocus functionality can be improved by further identifying the angle of light incident on the pixel array while maintaining relatively high resolution.

[0161] Figure 17 and Figure 18 This is a flowchart of the operation of an image sensor according to some example embodiments of the present disclosure. Figure 17 and Figure 18 This illustrates that when pixels are referenced according to some example embodiments of this disclosure Figure 6 The flowchart describes an example operation when describing pixels. It should be understood that additional operations may be performed. Figure 17 and Figure 18 The operations described below are provided before, during, and after the process, and for additional embodiments of the method, some of the operations described below may be replaced or excluded. The order of operations / processes may be interchangeable, or two or more operations may be performed simultaneously.

[0162] Figure 17 Show reference Figure 11 Operation S200 is described in the operation phase. Figure 17 This is a flowchart illustrating the process of reading pixel signals using an image sensor based on an RSRS readout method according to some example embodiments of the present disclosure.

[0163] A reset operation can be performed, in which the reset transistor and all transfer transistors are turned on (S211), and the charge in the floating diffusion region FD and the charge in all photodiodes PD1 to PD9 are removed or otherwise reduced. Then, the reset transistor and all transfer transistors can be turned off to initiate an exposure interval. During the exposure interval, light can be exposed to the pixels (S212). Photodiodes included in the light-receiving pixels can generate and accumulate a charge proportional to the incident light. The pixel can output a reset voltage as a pixel signal to the column line (S213).

[0164] In the first readout interval, the comparator compares the reset voltage output from the pixel to the column line with the voltage of the ramp signal. The reset count value obtained by counting the reset voltage can be stored in the memory of a latch or buffer circuit inside the counter.

[0165] Before the second readout operation, the first transmission signal group TGG1 can be converted to a voltage corresponding to logic high. The first transmission transistor group can be turned on by a transmission signal connected to the first transmission signal group TGG1 (S214). The charge of the photodiode connected to the turned transmission transistor can be moved to the floating diffusion region FD. The pixel can output a first signal voltage corresponding to the charge accumulated in the floating diffusion region to the column line (S215).

[0166] In the second readout interval, the comparator compares the first signal voltage output from pixel PX to the column line with the voltage of the ramp signal. The first count value obtained by counting the first signal voltage can be stored in the memory of a latch or buffer circuit inside the counter. The peripheral circuit 211 can generate a first image signal based on the reset count value and the first count value (S216).

[0167] Before the third readout interval, the reset signal can be converted into a voltage corresponding to logic high, thus turning on the reset transistor (S217) and performing a reset operation, in which the charge in the floating diffusion region FD is removed or otherwise reduced. The pixel can output the reset voltage of the floating diffusion region to the column line (S218).

[0168] Before the fourth readout operation, the second transmission signal group TGG2 can be converted to a voltage corresponding to logic high. The second transmission transistor group can be turned on by the transmission signal included in the second transmission signal group TGG2 (S219). The charge of the photodiode connected to the turned transmission transistor can be moved to the floating diffusion region FD. The pixel can output a second signal voltage corresponding to the charge accumulated in the floating diffusion region to the column line (S220).

[0169] In the fourth readout interval, the comparator COMP compares the second signal voltage output from the pixel to the column line with the voltage of the ramp signal. The second count value obtained by counting the second signal voltage can be stored in the memory of the latch or buffer circuit inside the counter. The peripheral circuit can generate a second image signal based on the reset count value and the second count value (S221).

[0170] Figure 18 It is a reference Figure 11 The flowchart of operation S300 in the described operation phase. Figure 18 This refers to operation S200 as a reference. Figure 17 A flowchart illustrating the execution of the RSRS readout operation. Figure 18 The series of operations can be referenced above. Figure 12 The described series of operations are similar. It should be understood that additional operations may be performed... Figure 18 The operations described below are provided before, during, and after the process, and for additional embodiments of the method, some of the operations described below may be replaced or excluded. The order of operations / processes may be interchangeable, or two or more operations may be performed simultaneously. In some example embodiments, the operation of obtaining the second image signal (S301) may be omitted.

[0171] Among the pixel signals included in the first image signal and the second image signal, the left image signal and the right image signal can be identified or distinguished from each other, and the average value of the left image signal and the average value of the right image signal can be calculated (S311).

[0172] The left phase signal can be obtained based on the average value of the left image signal, and the right phase signal can be obtained based on the average value of the right image signal (S312). The peripheral circuit can use the average value of a first image signal relative to a pixel region on the left and the average value of a second image signal relative to a pixel region on the right within a pixel to calculate a phase signal pair corresponding to the phase information about the object. The left phase signal can correspond to the left phase information, and the right phase signal can correspond to the right phase information.

[0173] The disparity of the object can be calculated based on the left and right phase signals (S313). The peripheral circuitry can calculate the disparity based on the phase signal pair and can use the disparity to perform an autofocus function.

[0174] Image sensors according to some example embodiments of this disclosure may use pixels comprising an odd number of pixel regions to perform phase detection autofocus (PDAF) operation. Therefore, when performing autofocus, the angle of light incident on the pixel array can be identified more accurately while maintaining high resolution, thus improving autofocus functionality.

[0175] Figure 19 This is an example circuit diagram of a pixel PX' of an image sensor according to some example embodiments of the present disclosure.

[0176] Reference Figure 19 According to some example embodiments of this disclosure, pixel PX' may be included in a first direction (e.g., Figure 19A pixel PX' may include multiple sub-pixel groups SPG1 to SPG3 arranged in a horizontal direction. Sub-pixel groups SPG1 to SPG3 may include multiple pixel regions arranged in a second direction orthogonal to the first direction. Pixel regions SPX1 to SPX3 may share a floating diffusion region FD1, pixel regions SPX4 to SPX6 may share a floating diffusion region FD2, and pixel regions SPX7 to SPX9 may share a floating diffusion region FD3. A pixel PX' may include multiple photodiodes PD1 to PD9, reset transistors RX1 to RX3, drive transistors DX1 to DX3, and select transistors SX1 to SX3. Multiple pixel regions SPX1 to SPX9 included in a pixel PX' may include corresponding photodiodes PD1 to PD9 and corresponding transmission transistors. According to some example embodiments, one or more of the sub-pixel groups SPG1 to SPG3 in a pixel PX' may include two or more reset transistors, two or more drive transistors, and two or more select transistors.

[0177] Reset transistors RX1 to RX3 can be turned on by a reset signal RG to remove or otherwise reduce the charge in floating diffusion regions FD1, FD2, and FD3. Charge obtained from at least one of the connected photodiodes PD1 to PD9 can be moved and accumulated in the corresponding floating diffusion regions FD1 to FD3. Drive transistors DX1 to DX3 can generate corresponding pixel signals VOUT1 to VOUT3 by amplifying the voltage determined by the charge accumulated in the corresponding floating diffusion regions FD1 to FD3. Select transistors SX1 to SX3 can be driven by a select signal SG to output pixel signals VOUT1 to VOUT3 to the readout circuit via corresponding column lines COL1 to COL3. Pixel PX' can be provided with a power supply voltage VPIX. The power supply voltage VPIX can be connected to a terminal of each reset transistor RX1 to RX3 and one of the terminals of each drive transistor DX1 to DX3 (e.g., the drain terminal).

[0178] The transmission transistors can be turned on via transmission signals TG1 to TG3 to send the charge generated by photodiodes PD1 to PD9 to the floating diffusion regions FD1 to FD3. The first column line COL1 allows the charge generated from the first pixel region SPX1 to the third pixel region SPX3 to move to the first floating diffusion region FD1 and outputs this charge as the first pixel signal VOUT1. The second column line COL2 allows the charge generated from the fourth pixel region SPX4 to the sixth pixel region SPX6 to move to the second floating diffusion region FD2 and outputs this charge as the second pixel signal VOUT2. The third column line COL3 allows the charge generated from the seventh pixel region SPX7 to the ninth pixel region SPX9 to move to the third floating diffusion region FD3 and outputs this charge as the third pixel signal VOUT3.

[0179] For example, when the first, fourth, and seventh transmission transistors are turned on by the first transmission signal TG1 received from the row driver, the charge obtained from the first photodiode PD1, the fourth photodiode PD4, and the seventh photodiode PD7 can move to the connected floating diffusion regions FD1 to FD3 and can be accumulated. The remaining transmission transistors operate in a similar manner, such that the charge obtained from the corresponding photodiodes PD2, PD3, PD5, PD6, PD8, and PD9 can move to the connected floating diffusion regions FD1 to FD3 and can be accumulated.

[0180] Figure 20 This is a timing diagram of the readout operation of a sub-pixel group according to some example embodiments of the present disclosure. Figure 20 It is a reference Figure 19 Timing diagram of the readout operation of sub-pixel groups SPG1 to SPG3.

[0181] Reference Figure 20 A reset operation can be performed, in which the reset transistor and all transfer transistors are turned on to remove or otherwise reduce charge from the floating diffusion region and all photodiodes. The reset transistor and all transfer transistors can then be turned off to initiate an exposure interval. During the exposure interval, pixel PX' can be exposed to light. Photodiodes included in the light-receiving pixel PX' can generate and accumulate charge proportional to the incident light. Pixel PX' can output the reset voltage RST of the floating diffusion region to column lines COL1 to COL3.

[0182] In the first readout interval, the comparator compares the reset voltage RST output from pixel PX' to the column line with the voltage of the ramp signal RAMP. Figure 20In some example embodiments shown, the counter can count the time during which the reset voltage RST is lower than the voltage of the ramp signal RAMP. The reset count value obtained by counting the reset voltage RST can be stored in the memory of a latch or buffer circuit inside the counter.

[0183] Before the second readout operation, the transfer signal TG can be converted into a voltage corresponding to a logic high. The transfer transistor can be turned on by the transfer signal, allowing the charge in the photodiode connected to the turned-on transfer transistor to move to the floating diffusion region. Pixel PX' can output a signal voltage SIG corresponding to the charge accumulated in the floating diffusion region to the column line.

[0184] In the second readout interval, the comparator compares the signal voltage SIG output from pixel PX' to the column line with the voltage of the ramp signal RAMP. Figure 20 In some example embodiments shown, the counter can count the time during which the signal voltage SIG is lower than the voltage of the ramp signal RAMP. The signal count value obtained by counting the signal voltage SIG can be stored in the memory of a latch or buffer circuit inside the counter. Peripheral circuitry can generate a column image signal based on the reset count value and the signal count value.

[0185] Figure 21A and Figure 21B It is a plan view of image signals according to some example embodiments of the present disclosure. Figure 21A and Figure 21B The operation of a group of pixels in a pixel array included in an image sensor is illustrated according to some example embodiments of the present disclosure. (Refer to...) Figure 21A and Figure 21B In some of the example embodiments described, a pixel group PG may include eight pixels PX1 to PX8 arranged in a 4×2 configuration. Furthermore, each of pixels PX1 to PX8 may include nine pixel regions SPX1 to SPX9 sharing a microlens, and each of the nine pixel regions SPX1 to SPX9 may include at least one photodiode.

[0186] Figure 21A This shows the pixel region in pixel group PG that generates the charge corresponding to the signal from the left image. (See reference...) Figure 21AThe left image signal may correspond to the charge generated in pixel regions SPX1 to SPX3, which are included in the first column of image signals from first pixel PX1 to eighth pixel PX8, and the charge generated in pixel regions SPX4 to SPX6, which are included in the first column of image signals from first pixel PX1, second pixel PX2, seventh pixel PX7, and eighth pixel PX8. In some example embodiments, the left image signal may correspond to the charge generated in the first pixel region SPX1 to sixth pixel region SPX6, which are included in each of the first pixel PX1, second pixel PX2, seventh pixel PX7, and eighth pixel PX8, and the charge generated in the first pixel region SPX1 to third pixel region SPX3, which are included in each of the third pixel PX3 to sixth pixel PX6. Among the 72 pixel regions included in pixel group PG, the pixel regions that generate the charge corresponding to the left image signal may be defined as the pixel regions of the first group.

[0187] Figure 21B This shows the pixel region in pixel group PG that generates the charge corresponding to the signal in the right image. (See reference...) Figure 21B The right image signal may correspond to the charge generated in pixel regions SPX4 to SPX6, which are included in the third pixel PX3 to the sixth pixel PX6, and the charge generated in pixel regions SPX7 to SPX9, which are included in the first pixel PX1 to the eighth pixel PX8, in the third column of the image signal. In some example embodiments, the right image signal may correspond to the charge generated in the seventh pixel region SPX7 to the ninth pixel region SPX9, which are respectively included in the first pixel PX1, the second pixel PX2, the seventh pixel PX7, and the eighth pixel PX8, and the charge generated in the fourth pixel region SPX4 to the ninth pixel region SPX9, which are respectively included in the third pixel PX3 to the sixth pixel PX6. Among the 72 pixel regions included in pixel group PG, the pixel regions that generate the charge corresponding to the right image signal may be defined as the pixel regions of the second group. Figure 21A and Figure 21B In some example embodiments shown, the number of pixel regions in the first group is equal to the number of pixel regions in the second group, and can be 36.

[0188] In some exemplary embodiments of this disclosure, the left and right image signals required to achieve the autofocus function can be obtained using the first to third columns of image signals. Peripheral circuitry or an image signal processor can drive pixel groups PG as units and can calculate the average value of the left and right image signals. (See also...) Figures 21A to 21BWithin a pixel group PG, for each color, the number of pixel regions generating charges corresponding to the left image signal can be equal to the number of pixel regions generating charges corresponding to the right image signal. For example, nine pixel regions can be included for each of the red pixels (PX2 and PX6) and blue pixels (PX3 and PX7). Furthermore, 18 pixel regions can be included for the green pixels (PX1, PX4, PX5, and PX8).

[0189] Peripheral circuitry or an image signal processor can obtain a pair of phase signals corresponding to the phase information about the object, based on the average values ​​of the left and right image signals. The image signal processor can use these phase signal pairs to calculate the disparity of the object. For example, two phase signals output for the same object may have different coordinates, and the disparity corresponding to the difference in coordinates can be calculated.

[0190] An image signal processor can generate control signals for implementing autofocus functionality based on calculated parallax. In some example embodiments, a lens driver can adjust the position of at least one of the lenses included in a lens unit based on the control signals to adjust the focus with respect to an object. According to some example embodiments, the processor can control the lens driver in response to the received control signals to adjust the focus with respect to the object. In this way, PDAF operation can be performed using pixels comprising an odd number of pixel regions. This allows for the identification of the angle of light incident on the pixel array with relatively high accuracy while maintaining relatively high resolution, thereby improving autofocus functionality.

[0191] Figures 22 to 24 This is a flowchart of the operation of an image sensor according to some example embodiments of the present disclosure. Figures 22 to 24 This illustrates that when pixels are referenced according to some example embodiments of this disclosure Figure 19 The flowchart describes an example operation when describing pixels. It should be understood that additional operations may be performed. Figures 22 to 24 The operations described below are provided before, during, and after the process, and for additional embodiments of the method, some of the operations described below may be replaced or excluded. The order of operations / processes may be interchangeable, or two or more operations may be performed simultaneously. Figure 22 The operation of the flowchart in the document can be compared with the above references in some aspects. Figure 11 The image sensors described operate the same or similarly, therefore reference can be made to... Figure 11 To be understood in the best way.

[0192] The image signal processor can determine a portion of the entire area of ​​the image being captured as the focus region (S500). The image signal processor can receive raw data output from the pixel array (S600). For example, the raw data may include a reset image signal and a column image signal. The image signal processor can calculate the disparity of the object based on the raw data (S700). The image signal processor can generate a control signal based on the disparity (S800). The control signal may be a signal used to adjust the focus on the object.

[0193] In some example embodiments, the lens driver may adjust the distance between the lens unit and the object based on control signals. According to some example embodiments, the processor may control the lens driver to adjust the position of the lens unit 110 based on control signals to adjust the distance between the lens unit and the object.

[0194] Figure 23 Show reference Figure 22 Operation S600 is described in the operation phase.

[0195] Reset transistors RX1 to RX3 and all transfer transistors are turned on (S601), and a reset operation is performed, in which the charge in the floating diffusion region FD and the charge in all photodiodes are removed or otherwise reduced. Then, the reset transistors and all transfer transistors can be turned off to initiate an exposure interval. During the exposure interval, light can be exposed to the pixel (S602). Photodiodes included in the light-receiving pixel can generate and accumulate a charge proportional to the incident light. The pixel can output the reset voltage of the floating diffusion region FD to the column line (S603).

[0196] In the first readout interval, the comparator compares the reset voltage output from the pixel to the column line with the voltage of the ramp signal. The reset count value obtained by counting the reset voltage can be stored in the memory of a latch or buffer circuit inside the counter.

[0197] Before the second readout operation, the transmission signals TG1 to TG3 can be converted into voltages corresponding to logic high. The transmission transistor is turned on by the transmission signal (S604), allowing the charge in the photodiodes (e.g., PD1 to PD9) connected to the turned-on transmission transistor to move to the floating diffusion region FD. The pixel can output a signal voltage corresponding to the charge accumulated in the floating diffusion region FD to the column line (S605).

[0198] In the second readout interval, the comparator compares the signal voltage output from the pixel to the column line with the voltage of the ramp signal. The signal count value obtained by counting the signal voltage can be stored in the memory of the latch or buffer circuit inside the counter. The peripheral circuit 211 can generate the column image signal based on the reset count value and the signal count value (S606).

[0199] Figure 24 Show reference Figure 22 Operation S700 is described in the operation phase. Figure 24 It is aimed at one of them Figure 22 The operation of S600 is as follows: Figure 23 The flowchart describes the execution of the above.

[0200] The peripheral circuit 211 or image signal processor 220 can obtain the left and right image signals from the column image signals, and can calculate the average value of the left and right image signals (S701). The number of pixel regions in the first group can be equal to the number of pixel regions in the second group, and can be 36. (Refer to...) Figure 21A and Figure 21B Within a pixel group PG, for each color, the number of pixel regions generating charges corresponding to the left image signal can be equal to the number of pixel regions generating charges corresponding to the right image signal. That is, for each of the red pixels (PX2 and PX6) and blue pixels (PX3 and PX7), nine pixel regions can be included. Furthermore, for the green pixels (PX1, PX4, PX5, and PX8), 18 pixel regions can be included.

[0201] The peripheral circuit 211 or the image signal processor 220 can obtain a pair of phase signals corresponding to the phase information about the object based on the average value of the left image signal and the average value of the right image signal (S702). The disparity of the object can be calculated based on the left phase signal and the right phase signal (S703). For example, the two phase signals output according to the same object may have different coordinates, and the disparity corresponding to the difference in coordinates can be calculated.

[0202] Peripheral circuitry 211 or image signal processor 220 can generate control signals for implementing autofocus functionality based on calculated parallax. In some example embodiments, the lens driver can adjust the position of at least one of the lenses included in the lens unit based on the control signals to adjust the focus on the object. According to some example embodiments, the processor can control the lens driver in response to the received control signals to adjust the focus on the object. In this way, PDAF operation can be performed using pixels comprising an odd number of pixel regions. Thus, autofocus functionality can be improved by further identifying the angle of light incident on the pixel array while maintaining high resolution.

[0203] Figure 25 , Figure 26A and Figure 26B This is a plan view of the structure of a pixel group according to some example embodiments of the present disclosure.

[0204] Reference Figure 25 According to some exemplary embodiments of this disclosure, a pixel group PG-1 may include eight pixels PX1-1 to PX8-1 arranged in a 4×2 configuration (or matrix). Among pixels PX1-1 to PX8-1, a first color pixel may include a first microlens ML1 having a first diameter d1 and a plurality of pixel regions SPX arranged in an N×N configuration (where N is an odd number of 3 or greater), and a second color pixel different from the first color pixel may include a plurality of second microlenses ML2 having a second diameter d2 smaller than the first diameter d1 and a plurality of pixel regions SPX arranged in an N×N configuration. At least one photodiode may be disposed in each of the plurality of pixel regions SPX; therefore, the number of photodiodes included in each of pixels PX1-1 to PX8-1 may be equal to or greater than the number of pixel regions SPX included in each of pixels PX1-1 to PX8-1. Figure 25 Each of pixels PX1-1 to PX8-1 is shown to include a plurality of pixel regions SPX arranged in a 3×3 configuration, but this disclosure is not limited thereto.

[0205] Figure 26A This is a plan view illustrating a first color pixel according to some example embodiments of the present disclosure. (Refer to...) Figure 26A A color pixel may include multiple pixel regions SPX1 to SPX9 arranged in a 3×3 configuration, and the multiple pixel regions SPX1 to SPX9 may share a first microlens ML1. Each of the pixel regions SPX1 to SPX9 may include a photodiode PD. The pixel regions SPX1 to SPX9 included in a pixel may share one or more floating diffusion regions.

[0206] Figure 26B This is a plan view illustrating a second color pixel according to some example embodiments of the present disclosure. (Refer to...) Figure 26B A color pixel may include multiple pixel regions SPX1 to SPX9 arranged in a 3×3 configuration, and each of the pixel regions SPX1 to SPX9 may correspond to a second microlens ML2. Each of the pixel regions SPX1 to SPX9 may include a photodiode PD. The pixel regions SPX1 to SPX9 included in a pixel may share one or more floating diffusion regions.

[0207] In some example embodiments, pixel regions SPX1 to SPX9 included in a pixel may share a floating diffusion region. In some example embodiments, the output of pixel regions SPX1 to SPX9 included in a pixel can be output via a column line. In another example embodiment, in a pixel PX, pixel regions SPX1 to SPX3, SPX4 to SPX6, and SPX7 to SPX9, which are located at the same position in a first direction and arranged in a second direction, may each form a sub-pixel group sharing a floating diffusion region. In some example embodiments, pixel signals generated by charges generated by three photodiodes included in each sub-pixel group can be output via a column line.

[0208] Each of the pixel regions SPX1 to SPX9 within the first color pixel is identifiable and receives light incident at different angles through the first microlens ML1. This allows for the acquisition of image data of an object viewed from different directions. In some example embodiments, phase signal pairs can be obtained based on pixel signals obtained from the pixel array, and disparity can be calculated via phase difference arithmetic operations based on the phase signal pairs. AF operations can be performed based on the calculated disparity pairs and the image regions corresponding to the pixels.

[0209] Each of the pixel regions SPX1 to SPX9 included in the second color pixel can receive light incident through the corresponding second microlens ML2. In some example embodiments, image data with higher resolution can be obtained compared to the case where image data is output using the first color pixel.

[0210] Figures 27A to 27D This is a plan view of the operation of pixel groups according to some exemplary embodiments of this disclosure. For ease of explanation, Figures 27A to 27D Assume and illustrate where the PDAF operation is performed as shown in the reference. Figures 6 to 13 The RSS readout operation described herein is performed, but this disclosure is not limited thereto, and the PDAF operation can be performed by other operations (such as the RSRS readout operation).

[0211] Reference Figures 27A to 27DAccording to some exemplary embodiments of this disclosure, a pixel group PG-1 may include eight pixels PX1-1 to PX8-1 arranged in a 4×2 configuration. Furthermore, each of the pixels PX1-1 to PX8-1 included in the pixel group PG-1 may include a plurality of pixel regions SPX arranged in a 3×3 configuration, and the first color pixels may include red pixels PX2-1 and PX6-1 and blue pixels PX3-1 and PX7-1, and the second color pixels may include green pixels PX1-1, PX4-1, PX5-1, and PX8-1. However, the construction of pixels PX1-1 to PX8-1 and pixel regions SPX, as well as the types of pixels included in the first and second color pixels, are not limited thereto.

[0212] Figure 27A This diagram illustrates a pixel region in pixel group PG-1 that generates a charge corresponding to a first image signal. The first image signal may correspond to the charge generated by a first-color pixel among pixels PX1-1 to PX8-1 and pixels arranged in a first direction of the first-color pixel. For example, refer to... Figure 27A The first image signal may correspond to the charge generated by the first pixel region SPX1 to the sixth pixel region SPX6 included in each of the first pixel PX1-1, the second pixel PX2-1, the seventh pixel PX7-1 and the eighth pixel PX8-1, and the charge generated by the first pixel region SPX1 to the third pixel region SPX3 included in each of the third pixel PX3-1 to the sixth pixel PX6-1.

[0213] Figure 27B This shows the pixel regions in pixel group PG-1 corresponding to the charges of the generated and summed image signals. (Refer to...) Figure 27B The summed image signal can correspond to the charge generated in pixel regions SPX1 to SPX9 in each of all pixels PX1-1 to PX8-1 included in pixel group PG-1.

[0214] Figure 27C This diagram illustrates a pixel region within a pixel group PG-1 that is included in the first color pixel among the pixel regions that generate the charge corresponding to the second image signal. This pixel region may be the seventh pixel region SPX7 to the ninth pixel region SPX9 included in each of the second pixel PX2-1 and the seventh pixel PX7-1, and the fourth pixel region SPX4 to the ninth pixel region SPX9 included in each of the third pixel PX3-1 and the sixth pixel PX6-1. Among the 72 pixel regions included in pixel group PG-1, this pixel region may be defined as the pixel region of a second group.

[0215] Figure 27DThis diagram illustrates a pixel region within a pixel group PG-1 that is included in a first color pixel among the pixel regions that generate a charge corresponding to a first image signal. This pixel region may be the first pixel region SPX1 to the sixth pixel region SPX6 included in each of the second pixels PX2-1 and the seventh pixels PX7-1, and the first pixel region SPX1 to the third pixel region SPX3 included in each of the third pixels PX3-1 and the sixth pixels PX6-1. Among the 72 pixel regions included in pixel group PG-1, this pixel region may be defined as the pixel region of a first group.

[0216] The left and right image signals can be obtained from the first and second image signals. For example, refer to... Figures 27A to 27D The left image signal can correspond to the charge generated in the first pixel region SPX1 to the sixth pixel region SPX6, respectively included in the second pixel PX2-1 and the seventh pixel PX7-1, and the charge generated in the first pixel region SPX1 to the third pixel region SPX3, respectively included in the third pixel PX3-1 and the sixth pixel PX6-1. The right image signal can correspond to the charge generated in the seventh pixel region SPX7 to the ninth pixel region SPX9, respectively included in the second pixel PX2-1 and the seventh pixel PX7-1, and the charge generated in the fourth pixel region SPX4 to the ninth pixel region SPX9, respectively included in the third pixel PX3-1 and the sixth pixel PX6-1.

[0217] Figure 28 This is a diagram illustrating the structure of pixel groups according to some exemplary embodiments of the present disclosure. For ease of explanation, Figure 28 This can be described as assuming PDAF operation via, as referenced Figures 6 to 13 The RSS readout operation described herein is performed, but this disclosure is not limited thereto, and the PDAF operation can be performed by other operations (such as the RSRS readout operation).

[0218] Reference Figure 28 According to some exemplary embodiments of this disclosure, pixel group PG-2 may include eight pixels PX1-2 to PX8-2 arranged in a 4×2 configuration. Furthermore, each of the pixels PX1-2 to PX8-2 included in pixel group PG-2 may include a plurality of pixel regions SPX arranged in a 3×3 configuration. The first color pixels may include blue pixels PX3-2 and PX7-2, and the second color pixels may include red pixels PX2-2 and PX6-2, and green pixels PX1-2, PX4-2, PX5-2, and PX8-2. However, the construction of pixels PX1-2 to PX8-2 and pixel regions SPX, as well as the types of pixels included in the first and second color pixels, are not limited thereto.

[0219] Figures 29A to 29D This is a plan view of the operation of pixel groups according to some example embodiments of this disclosure.

[0220] Figure 29A This diagram illustrates a pixel region in pixel group PG-2 that generates a charge corresponding to a first image signal. The first image signal may correspond to the charge generated by a first color pixel among pixels PX1-2 to PX8-2 and pixels arranged in a first direction along the first color pixel. For example, refer to... Figure 29A The first image signal may correspond to the charge generated in the first pixel region SPX1 to the sixth pixel region SPX6 in each of the seventh pixel PX7-2 and the eighth pixel PX8-2, and the charge generated in the first pixel region SPX1 to the third pixel region SPX3 in each of the third pixel PX3-2 and the fourth pixel PX4-2.

[0221] Figure 29B This shows the pixel regions in pixel group PG-2 corresponding to the charges of the generated and summed image signals. (Refer to...) Figure 29B The summed image signal can correspond to the charge generated in pixel regions SPX1 to SPX9 in each of all pixels PX1-2 to PX8-2 included in pixel group PG-2.

[0222] Figure 29C This diagram illustrates a pixel region within a pixel group PG-2 that is included in the first color pixel among the pixel regions that generate the charge corresponding to the second image signal. This pixel region may be the seventh pixel region SPX7 to the ninth pixel region SPX9 included in the seventh pixel PX7-2 and the fourth pixel region SPX4 to the ninth pixel region SPX9 included in the third pixel PX3-2. Among the 72 pixel regions included in pixel group PG-2, this pixel region can be defined as the pixel region of a second group.

[0223] Figure 29D This diagram illustrates a pixel region within a pixel group PG-2 that is included in the first color pixel among the pixel regions that generate the charge corresponding to the first image signal. This pixel region may be the first pixel regions SPX1 to SPX6 included in the seventh pixel PX7-2 and the first pixel regions SPX1 to SPX3 included in the third pixel PX3-2. Among the 72 pixel regions included in pixel group PG-2, this pixel region can be defined as the pixel region of the first group.

[0224] The left and right image signals can be obtained from the first and second image signals. For example, refer to... Figures 29A to 29DThe left image signal can correspond to the charge generated in the first pixel region SPX1 to the sixth pixel region SPX6 included in the seventh pixel PX7-2 and the first pixel region SPX1 to the third pixel region SPX3 included in the third pixel PX3-2. The right image signal can correspond to the charge generated in the seventh pixel region SPX7 to the ninth pixel region SPX9 included in the seventh pixel PX7-2 and the fourth pixel region SPX4 to the ninth pixel region SPX9 included in the third pixel PX3-2.

[0225] Figure 30 This is a diagram illustrating the structure of pixel groups according to some exemplary embodiments of the present disclosure. For ease of explanation, Figure 30 This can be described as assuming PDAF operation via, as referenced Figures 6 to 13 The RSS readout operation described herein is performed, but this disclosure is not limited thereto, and the PDAF operation can be performed by other operations (such as the RSRS readout operation).

[0226] Reference Figure 30 According to some exemplary embodiments of this disclosure, pixel group PG-3 may include eight pixels PX1-3 to PX8-3 arranged in a 4×2 configuration. Furthermore, each of the pixels PX1-3 to PX8-3 included in pixel group PG-3 may include a plurality of pixel regions SPX arranged in a 3×3 configuration, and the first color pixel may include red pixels PX2-3 and PX6-3, and the second color pixel may include blue pixels PX3-3 and PX7-3, and green pixels PX1-3, PX4-3, PX5-3, and PX8-3. However, the construction of pixels PX1-3 to PX8-3 and pixel regions SPX, as well as the types of pixels included in the first and second color pixels, are not limited thereto.

[0227] Figures 31A to 31D This is a plan view of the operation of pixel groups according to some example embodiments of this disclosure.

[0228] Figure 31A This diagram illustrates a pixel region in pixel group PG-3 that generates a charge corresponding to a first image signal. The first image signal may correspond to the charge generated by first-color pixels (e.g., red pixels PX2-3 and PX6-3) from pixels PX1-3 to PX8-3 and pixels arranged in a first direction along the first color pixels (e.g., green pixels PX1-3 and PX5-3). For example, refer to... Figure 31AThe first image signal may correspond to the charge generated in the first pixel region SPX1 to the sixth pixel region SPX6 in each of the first pixels PX1-3 and the second pixels PX2-3, and the charge generated in the first pixel region SPX1 to the third pixel region SPX3 in each of the fifth pixels PX5-3 and the sixth pixels PX6-3.

[0229] Figure 31B This shows the pixel regions in pixel group PG-3 corresponding to the charges of the generated and summed image signals. (Refer to...) Figure 31B The summed image signal can correspond to the charge generated in pixel regions SPX1 to SPX9 in each of all pixels PX1-3 to PX8-3 included in pixel group PG-3.

[0230] Figure 31C This diagram illustrates a pixel region within a pixel group PG-3 that is included in the first color pixel among the pixel regions that generate the charge corresponding to the second image signal. This pixel region may be the seventh pixel region SPX7 to the ninth pixel region SPX9 included in the second pixels PX2-3, and the fourth pixel region SPX4 to the ninth pixel region SPX9 included in the sixth pixels PX6-3. Among the 72 pixel regions included in pixel group PG-3, this pixel region may be defined as the pixel region of a second group.

[0231] Figure 31D This diagram illustrates a pixel region within a pixel group PG-3 that is included in the first color pixel among the pixel regions that generate the charge corresponding to the first image signal. This pixel region may be the first pixel region SPX1 to the sixth pixel region SPX6 included in the second pixels PX2-3, and the first pixel region SPX1 to the third pixel region SPX3 included in the sixth pixels PX6-3. Among the 72 pixel regions included in pixel group PG-3, this pixel region can be defined as the pixel region of the first group.

[0232] The left and right image signals can be obtained from the first and second image signals. For example, refer to... Figures 31A to 31D The left image signal can correspond to the charge generated in the first pixel region SPX1 to the sixth pixel region SPX6 included in the second pixels PX2-3 and the charge generated in the first pixel region SPX1 to the third pixel region SPX3 included in the sixth pixels PX6-3. The right image signal can correspond to the charge generated in the seventh pixel region SPX7 to the ninth pixel region SPX9 included in the second pixels PX2-3 and the charge generated in the fourth pixel region SPX4 to the ninth pixel region SPX9 included in the sixth pixels PX6-3.

[0233] The peripheral circuit 211 or image signal processor 220 can obtain the left and right image signals from the column image signals, and can calculate the average value of the left and right image signals. The number of pixel regions in the first group can be equal to the number of pixel regions in the second group. Within a pixel group PG, for each color, the number of pixel regions generating charges corresponding to the left image signal can be equal to the number of pixel regions generating charges corresponding to the right image signal.

[0234] The peripheral circuit 211 or the image signal processor 220 can obtain a pair of phase signals corresponding to the phase information about the object based on the average value of the left image signal and the average value of the right image signal. The disparity of the object can be calculated based on the left and right phase signals. For example, the two phase signals output for the same object may have different coordinates, and the disparity corresponding to the difference in coordinates can be calculated.

[0235] Peripheral circuitry 211 or image signal processor 220 can generate control signals for implementing autofocus functionality based on calculated parallax. In some example embodiments, the lens driver can adjust the position of at least one of the lenses included in the lens unit based on the control signals to adjust the focus on the object. According to some example embodiments, the processor can control the lens driver in response to the received control signals to adjust the focus on the object. In this way, PDAF operation can be performed using pixels comprising an odd number of pixel regions. This allows for the identification of the angle of light incident on the pixel array with relatively high accuracy while maintaining relatively high resolution, thereby improving autofocus functionality. Furthermore, first color pixels and second color pixels can be arranged together in the pixel array, resulting in image data with higher resolution compared to arranging only the first color pixels.

[0236] Figure 32 and Figure 33 This is a plan view of the structure of a pixel group according to some example embodiments of the present disclosure.

[0237] Reference Figure 32 According to some exemplary embodiments of this disclosure, a pixel group PG-A may include eight pixels PX-A arranged in a 4×2 configuration. Each of the pixels PX-A may include a plurality of pixel regions SPX-A arranged in a 5×5 configuration, and a first microlens ML-A having a first diameter (a) may be disposed on each of the pixel regions SPX-A. The first microlens ML-A may be configured such that it is shared among the pixel regions SPX-A included in a pixel PX-A.

[0238] Each pixel region SPX-A within the pixel PX-A, including the first microlens ML-A, is identifiable and receives light incident at different angles. This allows for the acquisition of image data of an object viewed from different directions. In this case, phase signal pairs can be obtained based on pixel signals obtained from the pixel array, and disparity can be calculated via phase difference arithmetic operations based on the phase signal pairs. AF operations can then be performed based on the calculated disparity pairs and the image regions corresponding to the pixels.

[0239] Reference Figure 33 According to some exemplary embodiments of this disclosure, a pixel group PG-B may include eight pixels PX-B arranged in a 4×2 configuration. Each pixel PX-B may include a plurality of pixel regions SPX-B arranged in a 5×5 configuration, and a second microlens ML-B1 having a second diameter (b1) or a third microlens ML-B2 having a third diameter (b2) smaller than the second diameter (b1) may be disposed in each pixel region SPX-B. The second microlens ML-B1 may be arranged such that some of the pixel regions SPX-B included in a pixel PX-B are shared. The third microlens ML-B2 may be arranged individually for each pixel region SPX-B included in a pixel PX-B.

[0240] Each pixel region SPX-B, including the pixel PX-B comprising the second microlens ML-B1, is identifiable and receives light incident at different angles. This allows for the acquisition of image data of an object viewed from different directions. In this case, phase signal pairs can be obtained based on pixel signals obtained from the pixel array, and disparity can be calculated via phase difference arithmetic operations based on the phase signal pairs. AF operations can then be performed based on the calculated disparity pairs and the image regions corresponding to the pixels.

[0241] Each pixel region SPX-B in the pixel PX-B, including the third microlens ML-B2, can receive light incident through the corresponding third microlens ML-B2. In this case, image data with higher resolution can be obtained compared to the case where only the first microlens ML-A is provided.

[0242] As the number of pixel regions sharing a microlens increases, a relatively large number of incident light angles can be identified with relatively high resolution. Relatively large microlenses can be arranged. In some example embodiments, the angle of light can be clearly identified at the periphery of the pixel array, and autofocus functionality can be improved.

[0243] Figure 34 This is a block diagram illustrating an electronic device employing an imaging apparatus according to some example embodiments of the present disclosure.

[0244] Reference Figure 34An electronic device 1000 according to some example embodiments of the present disclosure may include a camera 1030, a controller 1010, a memory 1020, and a display 1040.

[0245] Electronic device 1000 may include a device with an image sensor 1031 (such as a DSLR9 digital signal lens reflector camera, smartphone, wearable device, Internet of Things (IoT) device, home appliance, personal computer (tablet PC), personal digital assistant (PDA), and portable multimedia player (PMP)). Furthermore, the device with the image sensor 1031 may also be included as a component in vehicles, furniture, manufacturing equipment, doors, various measuring devices, etc.

[0246] Camera 1030 may include image sensor 1031. Image sensor 1031 may be implemented as described above. Figures 1 to 33 The image sensor described. The camera 1030 can use the image sensor 1031 to acquire pixel signals, perform pixel signal processing on the pixel signals, and output the processed pixel signals to the controller 1010.

[0247] Controller 1010 may include processor 1011. Processor 1011 can control the overall operation of each component of electronic device 1000. Processor 1011 may be implemented as at least one of various processors, such as central processing unit (CPU), application processor (AP), and graphics processing unit (GPU). In some example embodiments, controller 1010 may be implemented as an integrated circuit or system-on-a-chip (SoC). For example, processor 1011 may obtain an image file from image data received from image sensor 1031, and may store the image file in memory 1020, and may also recover image data from the image file stored in memory 1020. According to some example embodiments, processor 1011 may perform AF functions based on phase information included in the image data received from image sensor 1031 to adjust focus on an object in the up, down, left, and right directions.

[0248] In some example embodiments, controller 1010 may further include interface 1012, memory controller 1013, display controller 1014, and bus 1015. According to some example embodiments, at least a portion of interface 1012, memory controller 1013, display controller 1014, and bus 1015 may be located outside (or on the outside of) controller 1010.

[0249] Interface 1012 can transmit pixel signals received from image sensor 1031 to memory controller 1013 or display controller 1014 via bus 1015. Memory controller 1013 can control the transmission and reception of data to and from memory 1020, or the transmission of commands to memory 1020. Memory 1020 can store various data and commands.

[0250] Based on control from processor 1011, display controller 1014 can send data to display 1040 for output from display 1040, and display 1040 can display a screen according to the received data. In some example embodiments, display 1040 may also include a touchscreen. The touchscreen can send user input capable of controlling the operation of electronic device 1000 to controller 1010. User input can be obtained when a user touches the touchscreen. For example, when a user touches a specific area of ​​the screen of display 1040, the screen coordinates corresponding to the corresponding area can be sent to controller 1010, and controller 1010 can control image sensor 1031 to focus on the image area corresponding to the corresponding coordinates.

[0251] Bus 1015 provides communication functionality between components of controller 1010. Depending on the communication protocol between components, bus 1015 may include at least one type of bus.

[0252] The exemplary embodiments are not necessarily mutually exclusive. For example, some exemplary embodiments may include one or more features described with reference to one or more accompanying drawings, and may also include one or more other features described with reference to one or more other accompanying drawings.

[0253] As described herein, any device, system, module, part, unit, controller, circuit and / or parts thereof, and / or any part thereof (including but not limited to optical unit 100, lens driver 120, image sensor 200, image signal processor 220, processor 300, line driver 230, control logic 240, readout circuit 250, data output circuit 260, timing controller 241, ramp signal generator 242, clock signal generator 243, buffer circuit 261, multiple memories MEM, electronic device 1000, camera 1030, controller 1010, memory 1020, display 1040) according to any example embodiment Image sensor 1031, interface 1012, memory controller 1013, display controller 1014, any part thereof, etc., may include one or more instances of processing circuitry systems (such as hardware including logic circuitry; hardware / software combinations (such as a processor executing software); or combinations thereof), and / or may be implemented by one or more instances of processing circuitry systems (such as hardware including logic circuitry; hardware / software combinations (such as a processor executing software); or combinations thereof). For example, processing circuitry systems may more specifically include, but are not limited to, central processing units (CPUs), arithmetic logic units (ALUs), graphics processing units (GPUs), application processors (APs), digital signal processors (DSPs), microcomputers, field-programmable gate arrays (FPGAs), programmable logic units, microprocessors, application-specific integrated circuits (ASICs), neural network processors (NPUs), electronic control units (ECUs), image signal processors (ISPs), etc. In some example embodiments, the processing circuitry may include a non-transitory computer-readable storage device (e.g., a memory) (e.g., a solid-state drive (SSD)) storing a program of instructions, and a processor (e.g., a CPU) configured to execute instructions to implement functions and / or methods performed by some or all of any means, system, module, part, unit, controller, circuit and / or parts thereof according to any example embodiment.

[0254] Any elements and / or functional blocks disclosed above may include processing circuitry systems (such as hardware including logic circuitry; hardware / software combinations (such as a processor executing software); or combinations thereof) or implemented in processing circuitry systems (such as hardware including logic circuitry; hardware / software combinations (such as a processor executing software); or combinations thereof). For example, processing circuitry systems may more specifically include, but are not limited to, central processing units (CPUs), arithmetic logic units (ALUs), digital signal processors, microcomputers, field-programmable gate arrays (FPGAs), system-on-a-chip (SoCs), programmable logic units, microprocessors, application-specific integrated circuits (ASICs), etc. Processing circuitry systems may include electrical components (such as at least one of transistors, resistors, capacitors, etc.). Processing circuitry systems may include electrical components (such as logic gates including at least one of AND gates, OR gates, NAND gates, NOT gates, etc.).

[0255] While several embodiments have been provided in this disclosure, it should be understood that the disclosed systems and methods may be implemented in many other specific forms without departing from the spirit or scope of this disclosure. These examples are intended to be illustrative rather than restrictive and are not intended to be limited to the details given herein. For example, various elements or components may be combined or integrated into another system, or specific features may be omitted or not implemented.

Claims

1. An image sensor, comprising: A pixel array comprising multiple groups of pixels in a first direction and in a second direction intersecting the first direction; as well as The peripheral circuitry is configured to drive the pixel array. Each of the plurality of pixel groups comprises a plurality of pixels arranged in a 2M×M format, where M is an even number equal to or greater than 2, and Each of the plurality of pixels includes photodiodes arranged in an N×N configuration, where N is an odd number equal to or greater than 3, and The peripheral circuitry is configured to: use a first pixel group from among the plurality of pixel groups to obtain a first average value of the left image signal and a second average value of the right image signal; and calculate the disparity of the object based on the first and second average values. The left image signal corresponds to the charge generated in the pixel region of the first group, and the right image signal corresponds to the charge generated in the pixel region of a second group different from the first group. In the first pixel group, the first group is to the left of the second group in the first direction, and The number of pixel regions included in the first group and the number of pixel regions included in the second group are equal to each other.

2. The image sensor according to claim 1, wherein, The peripheral circuitry is configured to sequentially perform a first readout operation for each of the plurality of pixels, including reading a reset voltage, a second readout operation for reading a first signal voltage corresponding to a charge generated in the pixel region of the first group, and a third readout operation for reading a summation signal voltage corresponding to a charge generated in the pixel regions of the first and second groups.

3. The image sensor according to claim 2, wherein, The peripheral circuit is configured to: obtain a first image signal using a reset voltage and a first signal voltage; obtain a summed image signal using a reset voltage and a summation signal voltage; obtain a second image signal using the first image signal and the summed image signal; and obtain a left image signal and a right image signal using the first image signal and the second image signal.

4. The image sensor according to claim 1, wherein, The peripheral circuitry is configured to sequentially perform a first readout operation for each of the plurality of pixels, a second readout operation for reading a reset voltage, a third readout operation for reading a reset voltage, and a fourth readout operation for reading a second signal voltage for reading a charge generated in the pixel region of the first group, for each of the plurality of pixels.

5. The image sensor according to claim 4, wherein, The peripheral circuit is configured to: obtain a first image signal using a reset voltage and a first signal voltage, obtain a second image signal using a reset voltage and a second signal voltage, and obtain a left image signal and a right image signal using the first image signal and the second image signal.

6. The image sensor according to claim 1, wherein, The first pixel group includes a first color pixel, and the first color pixel includes a microlens shared by the pixel region included in the first color pixel.

7. The image sensor according to claim 6, wherein, The first color pixel includes either a red filter or a blue filter.

8. The image sensor according to claim 7, wherein, The first pixel group includes a second color pixel that is different from the first color pixel, and the second color pixel includes a plurality of second microlenses corresponding to a plurality of pixel regions included in the second color pixel.

9. The image sensor according to claim 8, wherein, The second color pixel includes a green filter.

10. The image sensor according to claim 1, wherein, The plurality of pixel groups includes a plurality of sub-pixel groups in the first direction. The pixel region comprises multiple pixels in the second direction, and The peripheral circuitry is configured to sequentially perform a first readout operation to read the reset voltage and a second readout operation to read the first signal voltage for each of the plurality of sub-pixel groups.

11. The image sensor according to claim 10, wherein, The peripheral circuitry is configured to use a reset voltage and a first signal voltage to obtain column image signals, and to use column image signals to obtain left and right image signals.

12. The image sensor according to claim 1, wherein, The first pixel group corresponds to the focal area within the entire image.

13. A method for operating an image sensor, comprising: A first image signal and a second image signal are obtained. The first image signal corresponds to the charge generated in a first group of pixel regions among a plurality of pixel regions arranged in an N×N form within a pixel. The second image signal corresponds to the charge generated in a second group of pixel regions that are different from the first group. The first image signal and the second image signal are used to generate the left and right image signals of a pixel group, in which the pixels are set in a 2M×M format; Calculate the first average value of the left image signal and the second average value of the right image signal; and The first and second averages are used to calculate the disparity of the object.

14. The method of operating the image sensor according to claim 13, further comprising: Perform the first readout operation to read the reset voltage; Perform a second readout operation to read the first signal voltage corresponding to the charge generated in the pixel region of the first group; as well as A third readout operation is performed to read the summation signal voltage corresponding to the charges generated in the plurality of pixel regions.

15. The method of operating the image sensor according to claim 14, wherein, The steps for obtaining the first image signal and the second image signal include: The first image signal is obtained using a reset voltage and a first signal voltage; The summation image signal is obtained using the reset voltage and the summation signal voltage; and The second image signal is obtained by using the first image signal and the summed image signal.

16. The method of operating the image sensor according to claim 13, further comprising: Perform the first readout operation to read the reset voltage; Perform a second readout operation to read the first signal voltage corresponding to the charge generated in the pixel region of the first group; Perform the third readout operation to read the reset voltage; as well as Perform a fourth readout operation to read the second signal voltage corresponding to the charge generated in the pixel region of the second group.

17. The method of operating an image sensor according to claim 16, wherein, The steps for obtaining the first image signal and the second image signal include: The first image signal is obtained using a reset voltage and a first signal voltage; and The second image signal is obtained using a reset voltage and a second signal voltage.

18. An imaging device, comprising: An optical unit includes a lens unit and a lens driver, the lens unit including a plurality of lenses, and the lens driver being configured to adjust the position of the plurality of lenses; An image sensor is configured to receive light passing through a lens unit and convert the light into a digital signal, and to output a control signal for adjusting the position of the lens unit; as well as The processor is configured to control the lens driver to adjust the position of at least one of the plurality of lenses based on control signals. The image sensor includes: A pixel array comprising multiple groups of pixels in a first direction and in a second direction intersecting the first direction, and The peripheral circuitry is configured to drive the pixel array. Each of the plurality of pixel groups comprises a plurality of pixels arranged in a 2M×M format, where M is an even number of 2 or greater. Each of the plurality of pixels includes a photodiode arranged in an N×N pattern, where N is an odd number of 3 or greater. The peripheral circuitry is configured to: obtain a first average value of the left image signal and a second average value of the right image signal in a first pixel group among the plurality of pixel groups; and calculate the disparity of the object based on the first and second average values, wherein the left image signal corresponds to the charge generated in the pixel region of the first group, and the right image signal corresponds to the charge generated in the pixel region of a second group different from the first group. In the first pixel group, the first group is to the left of the second group in the first direction, and The number of pixel regions included in the first group and the number of pixel regions included in the second group are equal to each other.

19. The imaging apparatus according to claim 18, wherein, The peripheral circuitry is configured to sequentially perform a first readout operation for each of the plurality of pixels, including reading a reset voltage, a second readout operation for reading a first signal voltage corresponding to a charge generated in the pixel region of the first group, and a third readout operation for reading a summation signal voltage corresponding to a charge generated in the pixel regions of the first and second groups.

20. The imaging apparatus according to claim 19, wherein, The peripheral circuit is configured to: obtain a first image signal using a reset voltage and a first signal voltage; obtain a summed image signal using a reset voltage and a summation signal voltage; obtain a second image signal using the first image signal and the summed image signal; and obtain a left image signal and a right image signal using the first image signal and the second image signal.

Images