Communication method and communication apparatus

Abstract

A communication method and a communication device, comprising: a first communication device generates a first signal comprising a first part and a second part. The first part is used to determine the starting time of data signal transmission, and the second part is used to determine the chip duration of the data signal. The first communication device sends the first signal and the data signal to a second communication device. M corresponding to the first part is equal to 24. The first part comprises a first level, and the number of chips of the first level can be 6, 8, 9, 12, 15, 16, or 18. M corresponding to the second part and / or the data signal is in a first set, and the first set comprises one or more of 1, 2, 4, 6, 8, 12, 16, 24, and 32. Through the design, the duration of the first level in the first part is not equal to the duration of the level with the same level value as the first level in other signals, the first part and other signals are distinguished, and the transmission performance of the downlink signal is improved.

Description

Technical Field

[0001] This application relates to the field of communication technology, and more specifically, to a communication method and a communication device. Background Technology

[0002] With the fifth generation (5 th With the evolution and development of generation (5G) communication technology, the demand for supporting lower power consumption terminals in 5G networks is increasing. Ambient Internet of Things (A-IoT) communication technology can support microwatt-level power consumption, meeting the demand of 5G networks for lower power consumption terminals.

[0003] In A-IoT, a timing acquisition single (TAS) is defined for reader-to-device (R2D) transmission. This timing acquisition single includes a start indicator part (SIP) and a time acquisition part (CAP). The SIP indicates the start time of the R2D transmission, and the CAP indicates the chip duration of the physical reader-to-device channel (PRDCH) during the R2D transmission.

[0004] Currently, during SIP detection, unreasonable SIP design may prevent the distinction between SIP and other signals, thus affecting the transmission performance of downlink signals. Summary of the Invention

[0005] This application provides a communication method to improve the transmission performance of downlink signals.

[0006] Firstly, a communication method is provided. This method can be executed by a first communication device. Unless otherwise specified, the "first communication device" in this application can refer to the first communication device itself (e.g., a network device, a reader, etc.), or a component of the first communication device (e.g., a communication module, processor, chip, or chip system, such as the circuit or chip responsible for communication functions in a network device (e.g., a modem chip, also known as a baseband chip, or a system-on-chip (SoC) chip or system-in-package chip containing a modem core), or it can be a logic module or software that can implement all or part of the first communication device. For ease of description, the following description uses the execution of the first communication device as an example.

[0007] The communication method includes: a first communication device generating a first signal, which includes a first part and a second part. The first part is used to determine the start time of data signal transmission, and the second part is used to determine the chip duration of the data signal. The first communication device sends the first signal and the data signal to a second communication device, wherein, in the time domain, the first signal precedes the data signal; or, in other words, the data signal follows the first signal. The duration of one chip in the first part is... The duration of one orthogonal frequency division multiplexing (OFDM) symbol. The first part includes a first level, the number of chips in which the first level can be any of 6, 8, 9, 12, 15, 16, or 18. The duration of one chip in the second part and / or the data signal is... The duration of an OFDM symbol, wherein the value range of M is a first set, which includes one or more of the following elements: 1, 2, 4, 6, 8, 12, 16, 24 and 32.

[0008] Secondly, a communication method is provided. This method can be executed by a second communication device. Unless otherwise specified, the "second communication device" in this application can refer to the second communication device itself (e.g., a terminal device, a tag, etc.), or a component of the second communication device (e.g., a communication module, processor, chip, or chip system, such as a circuit or chip in a terminal device responsible for communication functions (e.g., a modem chip, also known as a baseband chip, or a SoC chip or system-in-package chip containing a modem core), or it can be a logic module or software that can implement all or part of the functions of the second communication device. For ease of description, the following description uses the execution by a second communication device as an example.

[0009] The communication method includes: a second communication device receiving a first signal and a data signal from a first communication device, wherein in the time domain, the first signal precedes the data signal; or, in other words, the data signal follows the first signal. The first signal includes a first part and a second part. The first part is used to determine the start time of data signal transmission, and the second part is used to determine the chip duration of the data signal. The second communication device is able to determine the start time of data signal transmission and the chip duration of the data signal based on the first signal. The duration of one chip in the first part is... The duration of one OFDM symbol. The first part includes a first level, the number of chips in which the first level can be any one of 6, 8, 9, 12, 15, 16, or 18. The duration of one chip in the second part and / or the data signal is... The duration of an OFDM symbol, wherein the value range of M is a first set, which includes one or more of the following elements: 1, 2, 4, 6, 8, 12, 16, 24 and 32.

[0010] Based on the above technical solution, the first communication device designs the first part of the first signal based on M equal to 24, such that the duration of one chip in the first part is... The duration of one OFDM symbol. The number of chips in the first level of the first part can be any one of 6, 8, 9, 12, 15, 16, or 18, and the duration of one chip in the second part and / or the data signal is... The duration of an OFDM symbol, M, takes values ​​from a first set, which includes one or more of the following elements: 1, 2, 4, 6, 8, 12, 16, 24, and 32. That is, when the number of chips in the first level is any one of 6, 8, 9, 12, 15, 16, or 18, the value of M corresponding to the second part and / or the data signal can be any element in the first set. The elements in the first set can have multiple possible forms, satisfying that the duration of the first level is not equal to the duration of any level value in the second part that is the same as the first level when designing the second part based on elements in the first set of M; and / or, satisfying that the duration of the first level is not equal to the duration of any level value in the data signal that is the same as the first level when designing the data signal based on elements in the first set of M.

[0011] This design ensures that the duration of the first level in the first part is different from the duration of the same level in other signals (such as the second part of the first signal, data signals, etc.). This distinguishes the first part from other signals and improves the transmission performance of downlink signals.

[0012] In conjunction with the first or second aspect, in certain implementations of the first or second aspect, the number of chips in the first level described above is any one of 6, 8, 9, 12, 15, 16, or 18, and the duration of one chip in the second part and / or data signal is... The duration of each OFDM symbol, M, takes values ​​from the first set, where the elements in the first set include one or more of 1, 2, 4, 6, 8, 12, 16, 24, and 32, specifically including the following cases:

[0013] The first level has 9, 16, or 18 chips, and the elements in the first set include one or more of 1, 2, 4, 6, 8, 12, 16, 24, and 32; or, the first level has 6 chips, and the elements in the first set include one or more of 1, 2, 16, 24, and 32; or, the first level has 8 chips, and the elements in the first set include one or more of 1, 2, 12, 16, 24, and 32; or, the first level has 12 or 15 chips, and the elements in the first set include one or more of 1, 6, 8, 12, 16, 24, and 32.

[0014] Based on the above technical solution, when the number of chips at the first level is different, the range of M corresponding to the second part and / or data signal can be different. For different numbers of chips at the first level, the elements in the first set corresponding to the second part and / or data signal are determined, providing a more refined design and thus improving the accuracy of the solution.

[0015] In conjunction with the first aspect or the second aspect, in some implementations of the first aspect or the second aspect, the aforementioned first level may be a low level in the first part.

[0016] Based on the above technical solution, if the first level is a low level in the first part, it can be compatible with the signal design in the current radio frequency identification (RFID) protocol to a certain extent, thereby providing backward compatibility of the solution.

[0017] In conjunction with the first aspect or the second aspect, in some implementations of the first aspect or the second aspect, the aforementioned first level may be the last level of the first part.

[0018] Based on the above technical solution, if the first level is the last level in the first part, it can improve the accuracy of distinguishing the first part from other signals to a certain extent. The reason is that the level before the last level in the first part may be used for other functions, such as the threshold for judging high and low levels. In other words, the level before the last level in the first part (such as the first level) may be interfered with, affecting the accuracy of distinguishing the first part from other signals.

[0019] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the duration of the first part is... When the duration of an OFDM symbol is such that the first part sequentially includes a first high level and a first low level, the number of chips with the first high level and the number of chips with the first low level satisfy at least one of the following: the number of chips with the first high level is 3 and the number of chips with the first low level is 9; or, the number of chips with the first high level is 6 and the number of chips with the first low level is 6; or, the number of chips with the first high level is 4 and the number of chips with the first low level is 8, wherein the first low level is the first level.

[0020] Based on the above technical solution, the duration of the first part is Given the duration of each OFDM symbol, and considering that the first part sequentially includes a first high level and a first low level, the number of chips with the first high level and the number of chips with the first low level can have multiple different values. That is, the pattern of the first part has multiple possible forms, which can improve the flexibility of the scheme.

[0021] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the duration of the first part is... The duration of an OFDM symbol, and the first part sequentially including a first high level, a first low level, a second high level, and a second low level, wherein the number of chips for the first high level is 2, the number of chips for the first low level is 2, the number of chips for the first high level is 2, and the number of chips for the first low level is 6, wherein the second low level is the first level.

[0022] Based on the above technical solution, the duration of the first part is Given the duration of each OFDM symbol, and considering that the first part sequentially includes a first high level, a first low level, a second high level, and a second low level, the number of chips for the first high level, the first low level, the second high level, and the second low level can have multiple different values. That is, the pattern of the first part has multiple possible forms, which can improve the flexibility of the scheme.

[0023] In conjunction with the first or second aspect, in certain implementations of the first or second aspect, when the duration of the first part is the duration of one OFDM symbol, and the first part sequentially includes a first high level and a first low level, the number of chips of the first high level and the number of chips of the first low level satisfy at least one of the following: the number of chips of the first high level is 8, and the number of chips of the first low level is 16; or, the number of chips of the first high level is 6, and the number of chips of the first low level is 18; or, the number of chips of the first high level is 12, and the number of chips of the first low level is 12; or, the number of chips of the first high level is 18, and the number of chips of the first low level is 6; or, the number of chips of the first high level is 16, and the number of chips of the first low level is 8, wherein the first low level is the first level.

[0024] Based on the above technical solution, when the duration of the first part is the duration of one OFDM symbol, and the first part includes a first high level and a first low level in sequence, the number of chips of the first high level and the number of chips of the first low level can have a variety of different values. That is, the pattern of the first part has a variety of possible forms, which can improve the flexibility of the solution.

[0025] In conjunction with the first or second aspect, in certain implementations of the first or second aspect, when the duration of the first part is one OFDM symbol, and the first part sequentially includes a first high level, a first low level, a first high level, and a first low level, the number of chips of the first high level and the number of chips of the first low level satisfy at least one of the following: the number of chips of the first high level is 3, and the number of chips of the first low level is 9; or, the number of chips of the first high level is 6, and the number of chips of the first low level is 6; or, the number of chips of the first high level is 4, and the number of chips of the first low level is 8, wherein the first low level is the first level.

[0026] Based on the above technical solution, when the duration of the first part is the duration of one OFDM symbol, and the first part sequentially includes a first high level, a first low level, a first high level, and a first low level, the number of chips of the first high level and the number of chips of the first low level can have multiple different values. That is, the pattern of the first part has multiple possible forms, which can improve the flexibility of the solution.

[0027] In conjunction with the first or second aspect, in certain implementations of the first or second aspect, when the duration of the first part is the duration of one OFDM symbol, and the first part sequentially includes a first high level, a first low level, a second high level, and a second low level, the number of chips with the first high level, the number of chips with the first low level, the number of chips with the second high level, and the number of chips with the second low level satisfy at least one of the following: the number of chips with the first high level is 6, the number of chips with the first low level is 6, the number of chips with the second high level is 3, and the number of chips with the second low level is 9; or, the number of chips with the first high level is 8, the number of chips with the first low level is 8, the number of chips with the second high level is 2, and the number of chips with the second low level is 6. Alternatively, the number of chips with the first high level is 6, the number of chips with the first low level is 6, the number of chips with the second high level is 4, and the number of chips with the second low level is 8; or, the number of chips with the first high level is 4, the number of chips with the first low level is 4, the number of chips with the second high level is 4, and the number of chips with the second low level is 12; or, the number of chips with the first high level is 3, the number of chips with the first low level is 3, the number of chips with the second high level is 6, and the number of chips with the second low level is 12; or, the number of chips with the first high level is 2, the number of chips with the first low level is 2, the number of chips with the second high level is 5, and the number of chips with the second low level is 15, wherein the second low level is the first level.

[0028] Based on the above technical solution, when the duration of the first part is the duration of one OFDM symbol, and the first part sequentially includes a first high level, a first low level, a second high level, and a second low level, the number of chips of the first high level, the first low level, the second high level, and the second low level can have multiple different values. That is, the pattern of the first part has multiple possible forms, which can improve the flexibility of the solution.

[0029] Thirdly, a communication method is provided. This method can be executed by a first communication device. Unless otherwise specified, the "second communication device" in this application can refer to the first communication device itself (e.g., a network device, a reader, etc.), or a component of the first communication device (e.g., a communication module, processor, chip, or chip system, such as a circuit or chip in a network device responsible for communication functions (e.g., a modem chip, also known as a baseband chip, or a SoC chip or system-in-package chip containing a modem core), or it can be a logic module or software that can implement all or part of the functions of the second communication device. For ease of description, the following description uses the execution by the first communication device as an example.

[0030] The communication method includes: a first communication device generating a second signal, which comprises a third part and a fourth part. The third part is used to determine the start time of the transmission of the second data signal, and the fourth part is used to determine the chip duration of the second data signal. The first communication device sends the second signal and the second data signal to a second communication device, wherein, in the time domain, the second signal precedes the second data signal; or, in other words, the second data signal follows the second signal. The duration of one chip in the third part is... The duration of one OFDM symbol, and the duration of one chip in the second part and / or data signal are... The duration of an OFDM symbol, wherein the value of M is a second set, the elements of which include one or more of 1, 2, 4, 6, 8, 12, 16, 24 and 32.

[0031] The third part includes, in sequence, a third high level, a third low level, a fourth high level, and a fourth low level.

[0032] The duration of the third part is Given the duration of one OFDM symbol, the number of chips with the third high level, the number of chips with the third low level, the number of chips with the fourth high level, and the number of chips with the fourth low level satisfy at least one of the following:

[0033] The number of chips for the third high level is 2, the number of chips for the third low level is 2, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 6; or, the number of chips for the third high level is 3, the number of chips for the third low level is 3, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 4.

[0034] When the duration of the third part is one OFDM symbol, the number of chips with the third high level, the number of chips with the third low level, the number of chips with the fourth high level, and the number of chips with the fourth low level satisfy at least one of the following:

[0035] The number of chips for the third high level is 8, the number of chips for the third low level is 8, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 6; or, the number of chips for the third high level is 6, the number of chips for the third low level is 6, the number of chips for the fourth high level is 3, and the number of chips for the fourth low level is 9; or, the number of chips for the third high level is 4, the number of chips for the third low level is 4, the number of chips for the fourth high level is 4, and the number of chips for the fourth low level is 12; or, the number of chips for the third high level is 2, and the number of chips for the third low level is 2. The number of chips for the fourth high level is 5, and the number of chips for the fourth low level is 15; or, the number of chips for the third high level is 9, the number of chips for the third low level is 9, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 4; or, the number of chips for the third high level is 6, the number of chips for the third low level is 6, the number of chips for the fourth high level is 4, and the number of chips for the fourth low level is 8; or, the number of chips for the third high level is 3, the number of chips for the third low level is 3, the number of chips for the fourth high level is 6, and the number of chips for the fourth low level is 12.

[0036] Fourthly, a communication method is provided. This method can be executed by a second communication device. Unless otherwise specified, the "second communication device" in this application can refer to the second communication device itself (e.g., a terminal device, a tag, etc.), or a component of the second communication device (e.g., a communication module, processor, chip, or chip system, such as a circuit or chip in a terminal device responsible for communication functions (e.g., a modem chip, also known as a baseband chip, or a SoC chip or system-in-package chip containing a modem core), or it can be a logic module or software that can implement all or part of the functions of the second communication device. For ease of description, the following description uses the execution by a second communication device as an example.

[0037] The communication method includes: a second communication device receiving a second signal and a second data signal from a first communication device, wherein in the time domain, the second signal precedes the second data signal; or, in other words, the second data signal follows the second signal. The second signal includes a third part and a fourth part. The third part is used to determine the start time of the second data signal transmission, and the fourth part is used to determine the chip duration of the second data signal. The second communication device can determine the start time of the second data signal transmission and the chip duration of the second data signal based on the second signal. The duration of one chip in the third part is... The duration of one OFDM symbol, and the duration of one chip in the second part and / or the second data signal are... The duration of an OFDM symbol, wherein the value of M is a second set, the elements of which include one or more of 1, 2, 4, 6, 8, 12, 16, 24 and 32.

[0038] The third part includes, in sequence, a third high level, a third low level, a fourth high level, and a fourth low level.

[0039] The duration of the third part is Given the duration of one OFDM symbol, the number of chips with the third high level, the number of chips with the third low level, the number of chips with the fourth high level, and the number of chips with the fourth low level satisfy at least one of the following:

[0040] The number of chips for the third high level is 2, the number of chips for the third low level is 2, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 6; or, the number of chips for the third high level is 3, the number of chips for the third low level is 3, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 4.

[0041] When the duration of the third part is one OFDM symbol, the number of chips with the third high level, the number of chips with the third low level, the number of chips with the fourth high level, and the number of chips with the fourth low level satisfy at least one of the following:

[0042] The number of chips for the third high level is 8, the number of chips for the third low level is 8, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 6; or, the number of chips for the third high level is 6, the number of chips for the third low level is 6, the number of chips for the fourth high level is 3, and the number of chips for the fourth low level is 9; or, the number of chips for the third high level is 4, the number of chips for the third low level is 4, the number of chips for the fourth high level is 4, and the number of chips for the fourth low level is 12; or, the number of chips for the third high level is 2, and the number of chips for the third low level is 2. The number of chips for the fourth high level is 5, and the number of chips for the fourth low level is 15; the number of chips for the third high level is 9, the number of chips for the third low level is 9, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 4; or, the number of chips for the third high level is 6, the number of chips for the third low level is 6, the number of chips for the fourth high level is 4, and the number of chips for the fourth low level is 8; or, the number of chips for the third high level is 3, the number of chips for the third low level is 3, the number of chips for the fourth high level is 6, and the number of chips for the fourth low level is 12.

[0043] Based on the above technical solution, the first communication device designs the third part of the second signal based on M equaling 24, such that the duration of one chip in the third part is... The duration of each OFDM symbol, and the duration of one chip in the fourth part and / or the second data signal are... The duration of each OFDM symbol, M, takes values ​​from a second set, where elements include one or more of 1, 2, 4, 6, 8, 12, 16, 24, and 32. The pattern design of this first part can be one of the aforementioned possible forms. This pattern design allows the pattern of the first part to differ from the patterns of other signals (e.g., the fourth part of the second signal, the second data signal, etc.). Therefore, even when the M value corresponding to the fourth part and / or the second data signal is any element from the second set, the third part can be distinguished from other signals (e.g., the fourth part of the second signal, the second data signal, etc.), improving the transmission performance of the downlink signal.

[0044] Fifthly, a communication device is provided, which may be a first communication device, or a device or module for performing the functions of the first communication device.

[0045] One possible implementation is that the communication device may include modules or units corresponding to the methods / operations / steps / actions described in the first or third aspect. These modules or units may be hardware circuits, software, or a combination of hardware circuits and software.

[0046] In one design, the device may include a processing module and a communication module. The communication module is used to perform the sending and receiving actions performed by the first communication device in the methods described in the first or third aspect above, while the processing module is used to perform processing-related actions performed by the first communication device in the methods described in the first or third aspect above.

[0047] In one design, the device can be a network device, or a device, module, circuit, or chip configured in the network device, or a device that can be used in conjunction with the network device, such as an intelligent network element with a deployed radio intelligent controller (RIC).

[0048] In a sixth aspect, a communication device is provided, which may be a second communication device, or a device or module for performing the functions of a second communication device.

[0049] One possible implementation is that the communication device may include modules or units corresponding to the methods / operations / steps / actions described in either the second or fourth aspect. These modules or units may be hardware circuits, software, or a combination of hardware circuits and software.

[0050] In one design, the device may include a processing module and a communication module. The communication module is used to perform the sending and receiving actions performed by the second communication device in the methods described in the second or fourth aspects above, while the processing module is used to perform processing-related actions performed by the second communication device in the methods described in the second or fourth aspects above.

[0051] In one design, the device can be a terminal device, or a device, module, circuit, or chip configured in the terminal device, or a device that can be used in conjunction with the terminal device.

[0052] A seventh aspect provides a communication apparatus, the apparatus comprising: at least one processor for executing a computer program or instructions to perform the methods of any possible implementation of the first to fourth aspects described above. Optionally, the apparatus further comprises a memory for storing the computer program or instructions. Optionally, the apparatus further comprises a communication interface through which the processor reads the computer program or instructions.

[0053] In one implementation, the device is a communication device (such as a terminal device or a network device).

[0054] In another implementation, the device is a chip, chip system, or circuit for communication equipment (such as terminal equipment or network equipment).

[0055] Eighthly, a processor is provided for performing the methods provided in the first to fourth aspects described above.

[0056] Unless otherwise specified, or if it does not contradict its actual function or internal logic in the relevant description, the transmission and acquisition / reception operations involved in the processor can be understood as processor output and reception, input and other operations, or as transmission and reception operations performed by radio frequency circuits and antennas. This application does not limit them in this regard.

[0057] Optionally, the device further includes: a memory for storing a program; correspondingly, at least one processor for executing the computer program or instructions in the memory.

[0058] Optionally, the device also includes a communication interface. The communication interface is coupled to the processor and can be used to input information to the processor or output information from the processor.

[0059] A ninth aspect provides a computer-readable storage medium storing program code for execution by a device, the program code including methods for performing any of the possible implementations of the first to fourth aspects described above.

[0060] In a tenth aspect, a computer program product containing instructions is provided, which, when run on a computer, causes the computer to perform the method in any of the possible implementations of the first to fourth aspects described above.

[0061] Eleventhly, a chip is provided, the chip including a processing circuit and a communication interface, the processing circuit reads instructions from a memory through the communication interface and executes the method provided by any one of the implementations of the first to fourth aspects.

[0062] Optionally, the processing circuit is one or more processors, or all or part of the control or processing circuitry included in one or more processors.

[0063] Optionally, as one implementation, the chip also includes a memory storing computer programs or instructions, and a processor for executing the computer programs or instructions in the memory. When the computer programs or instructions are executed, the processor is used to perform the method provided by any of the implementations of the first to fourth aspects described above.

[0064] In a twelfth aspect, a communication system is provided, comprising a first communication device and a second communication device. The second communication device is used to implement the method provided in any possible implementation of the second or fourth aspect; the first communication device is used to implement the method provided in any possible implementation of the first or third aspect. Attached Figure Description

[0065] Figure 1 This is a schematic diagram of an Open Radio Access Network (ORAN) system architecture.

[0066] Figure 2 An exemplary diagram of the network element function division and protocol layer structure of an ORAN device provided in an embodiment of this application is shown.

[0067] Figure 3 This is an architecture diagram of a communication system used in an embodiment of this application.

[0068] Figure 4 This is another architecture diagram of the communication system used in the embodiments of this application.

[0069] Figure 5 This is a schematic diagram of the chip structure of an A-IoT terminal.

[0070] Figure 6 This is a schematic diagram of the chip structure of another type of A-IoT terminal.

[0071] Figure 7 This is a schematic diagram of a reader-to-device (R2D) preamble.

[0072] Figure 8 This is a schematic diagram of a SIP (System-in-Package).

[0073] Figure 9 This is a schematic diagram of another type of SIP.

[0074] Figure 10 This is a schematic diagram of a data signal.

[0075] Figure 11 This is a schematic diagram of another type of data signal.

[0076] Figure 12 This is a schematic diagram of yet another type of data signal.

[0077] Figure 13 This is a schematic flowchart of a communication method provided in this application.

[0078] Figures 14 to 31 This is a schematic diagram of the first part provided in this application.

[0079] Figure 32 This is a schematic flowchart of another communication method provided in this application.

[0080] Figure 33 and Figure 34 This is a schematic diagram of the third part provided in this application.

[0081] Figure 35 This is a schematic block diagram of a communication device provided in an embodiment of this application.

[0082] Figure 36 This is a schematic diagram of another communication device provided in an embodiment of this application.

[0083] Figure 37 This is a schematic diagram of a chip system provided in an embodiment of this application. Detailed Implementation

[0084] To facilitate understanding of the embodiments of this application, the following points will be explained first.

[0085] First, in this application, "for indicating" can include both direct and indirect indication. When describing an indication message as indicating A, it can include whether the indication message directly indicates A or indirectly indicates A, but does not necessarily mean that the indication message carries A.

[0086] The information indicated by the instruction is called the information to be instructed. In the specific implementation process, there are many ways to indicate the information to be instructed, such as, but not limited to, directly indicating the information to be instructed, such as the information to be instructed itself or its index. It can also be indirectly indicated by indicating other information, where there is a relationship between the other information and the information to be instructed. It can also indicate only a part of the information to be indicated, while the other parts are known or pre-agreed upon. For example, the instruction of specific information can be achieved by using a pre-agreed (e.g., protocol-defined) arrangement of various pieces of information, thereby reducing instruction overhead to some extent. At the same time, common parts of various pieces of information can be identified and indicated uniformly to reduce the instruction overhead caused by individually indicating the same information.

[0087] Second, in this application, "at least one" refers to one or more, and "more than one" refers to two or more (including two). Furthermore, in the embodiments of this application, "first," "second," and various numerical designations (e.g., "#1," "#2," etc.) are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this application. The sequence numbers of the processes below do not imply an order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. It should be understood that the objects described in this way can be interchanged where appropriate to describe solutions other than those in the embodiments of this application. Moreover, in the embodiments of this application, terms such as "S1310" are merely identifiers for descriptive convenience and do not limit the order of execution steps.

[0088] Third, in the embodiments of this application, the words "exemplary" or "for example" are used to indicate that they are examples, illustrations, or descriptions. Any embodiment or design that is described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or design options. Specifically, the use of the words "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0089] Fourth, the term "storage" in the embodiments of this application can refer to storage in one or more memories. These memories can be separate installations or integrated into an encoder, decoder, processor, or communication device. Alternatively, some memories can be separately installed, while others can be integrated into the decoder, processor, or communication device. The type of memory can be any form of storage medium, and this application does not limit this.

[0090] Fifth, in the implementation of this application, "protocol" may refer to standard protocols in the field of communications, such as the NR protocol and related protocols applied in future communication systems, and this application does not limit it.

[0091] Sixth, in the embodiments of this application, the terms "of", "corresponding (relevant)", "corresponding", and "associate" can sometimes be used interchangeably. It should be noted that when their differences are not emphasized, their intended meanings are consistent.

[0092] Seventh, in the embodiments of this application, "under the circumstances", "when", and "if" can sometimes be used interchangeably. It should be noted that when the distinction is not emphasized, their intended meanings are consistent.

[0093] Eighth, the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0094] Ninth, the terms "message", "information", or "information element (IE)" can be used interchangeably in this article. There are no restrictions on the names of messages, information, or frames, as long as they can achieve the corresponding functions.

[0095] Tenth, in this application, "send" and "receive" indicate the direction of signal transmission. For example, "send information to XX" can be understood as the destination of the information being XX, and "send information" can include direct transmission or indirect transmission through other units or modules. "Receive information from YY" can be understood as the source of the information being YY, and "receive information" can include direct reception from YY or indirect reception from YY through other units or modules. Besides air interface transmission or reception signals implemented at the system level, such as network devices or terminal devices, "send" can also be understood as the "output" of a chip interface, and "receive" can also be understood as the "input" of a chip interface. For example, a modem or system-on-a-chip (SoC) chip or system-in-package chip transmits or receives signals. "Send" or "receive" can also be performed through device components, for example, by using buses, traces, or interfaces to transmit or receive signals through several parts, modules, or chips of a device.

[0096] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0097] The technical solutions of this application can be applied to various communication systems, such as: Long Term Evolution (LTE) systems, LTE Frequency Division Duplex (FDD) systems, LTE Time Division Duplex (TDD) systems, Universal Mobile Telecommunication System (UMTS), 5th Generation (5G) systems or New Radio (NR) systems, Internet of Things (IoT) systems, non-terrestrial network (NTN) satellite communication systems, or other evolved communication systems.

[0098] The technical solution provided in this application can also be applied to future communication systems, such as sixth-generation mobile communication systems. This application does not limit this application.

[0099] The technical solutions provided in this application can also be applied to machine-type communication (MTC), long-term evolution-machine (LTE-M) technology, device-to-device (D2D) networks, machine-to-machine (M2M) networks, Internet of Things (IoT) networks, or other networks. Among these, IoT networks may include, for example, vehicle-to-everything (V2X) networks. The communication methods in V2X systems are collectively referred to as vehicle-to-X (V2X), where X can represent anything. For example, V2X may include vehicle-to-vehicle (V2V) communication, vehicle-to-infrastructure (V2I) communication, vehicle-to-pedestrian (V2P) communication, or vehicle-to-network (V2N) communication, etc.

[0100] For ease of understanding, the following describes the equipment (or network elements, nodes, etc.) that may be involved in this application.

[0101] Terminal equipment: can be called user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication equipment, user agent, or user device.

[0102] Terminal devices can be devices that provide voice / data connectivity to users, such as handheld devices with wireless connectivity, in-vehicle devices, etc. Currently, examples of terminals include: mobile phones, tablets, laptops, PDAs, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, cellular phones, cordless phones, session initiation protocol phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, in-vehicle devices, wearable devices, terminal devices in 5G networks, or terminal devices in future evolved public land mobile networks (PLMNs), etc., and the embodiments of this application are not limited to these.

[0103] By way of example and not limitation, in this embodiment, the terminal device can also be a wearable device. Wearable devices, also known as wearable smart devices, are a general term for devices that utilize wearable technology to intelligently design and develop everyday wearables, such as glasses, gloves, watches, clothing, and shoes. Wearable devices are portable devices that are worn directly on the body or integrated into the user's clothing or accessories. Wearable devices are not merely hardware devices, but also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include those that are feature-rich, large in size, and can achieve complete or partial functions without relying on a smartphone, such as smartwatches or smart glasses, as well as those that focus on a specific type of application function and require the use of other devices such as smartphones, such as various smart bracelets and smart jewelry for vital sign monitoring.

[0104] Furthermore, in this embodiment, the terminal device can also be a terminal device in an IoT system. IoT is an important component of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, thereby realizing an intelligent network of human-machine interconnection and object-to-object interconnection.

[0105] Access network equipment: Provides network access functionality for terminal devices and can use transmission tunnels of different qualities depending on the user's level and service requirements. Access networks can employ different access technologies. Currently, there are two types of wireless access technologies: 3GPP (3rd Generation Partnership Project) access technologies (such as those used in 3G, 4G, or 5G systems) and non-3GPP access technologies. 3GPP access technologies refer to those that conform to 3GPP standards and specifications; for example, access network equipment in a 5G system is called a next-generation node base station (gNB). Non-3GPP access technologies refer to those that do not conform to 3GPP standards and specifications; for example, air interface technologies represented by access points (APs) in Wireless Fidelity (WiFi).

[0106] An access network that uses wireless communication technology to implement access network functions can be called a radio access network (RAN). The RAN manages radio resources, provides access services to terminal devices, and forwards control signals and user data between the terminal and the core network. The RAN can also be an open RAN (O-RAN).

[0107] RAN nodes, also known as radio access network devices, RAN entities, or access nodes, are used to help terminals access communication systems wirelessly. In one application scenario, an RAN node can be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next-generation NodeB (gNB) in a 5G mobile communication system, a next-generation base station in a future mobile communication system, a base station in a future mobile communication system, or an access node in a WiFi system. RAN nodes can be macro base stations, micro base stations, indoor stations, relay nodes, or donor nodes.

[0108] In another application scenario, multiple RAN nodes can collaborate to help terminals achieve wireless access, with different RAN nodes implementing different functions of the base station. For example, a RAN node can be a central unit (CU), a distributed unit (DU), or a radio unit (RU). The CU performs the functions of the base station's radio resource control (RRC) protocol and packet data convergence protocol (PDCP), and can also perform the functions of the service data adaptation protocol (SDAP). The DU performs the functions of the base station's radio link control (RLC) layer and medium access control (MAC) layer, and can also perform some or all of the physical layer (PHY) functions. For specific descriptions of these protocol layers, refer to the relevant 3GPP technical specifications. The RU can be used to implement radio frequency signal transmission and reception. The CU and DU can be two independent RAN nodes, or they can be integrated into the same RAN node, such as within a baseband unit (BBU). RUs can be included in radio frequency equipment, such as remote radio units (RRUs) or active antenna units (AAUs). CUs can be further divided into two types of RAN nodes: CU-control plane and CU-user plane.

[0109] In different systems, RAN nodes can have different names. For example, in an Open RAN (O-RAN) system, a CU can also be called an Open CU (O-CU), a DU can also be called an Open DU (O-DU), and a RU can be called an Open RU (O-RU).

[0110] Figure 1 An exemplary schematic diagram of an ORAN system architecture provided in an embodiment of this application is shown. The ORAN system in this embodiment may include... Figure 1 Other components besides those shown. For example... Figure 1 As shown, access network devices can communicate with the core network (CN) via a backhaul link and with terminals via an air interface. For example, a BBU in an access network device communicates with the core network via a backhaul link, and an RU in the access network device communicates with at least one terminal via an air interface. A BBU communicates with at least one RU via a fronthaul link; the BBU and RU may or may not be co-located. A BBU includes at least one CU and at least one DU, which can communicate via at least one midhaul link.

[0111] Figure 2 An exemplary diagram of the network element function division and protocol layer structure of an ORAN device provided in an embodiment of this application is shown.

[0112] In some possible implementations, the CU is a logical node carrying the RRC layer, Service Data Adaptation Protocol (SDAP) layer, Packet Data Convergence Protocol (PDCP) layer, and other control functions of the access network equipment. The CU can connect to network nodes such as the core network through interfaces (e.g., E2 interfaces). Optionally, the CU may have some core network functions. The CU (e.g., the PDCP layer and higher layers of the CU) connects to the DU (e.g., the radiolink control (RLC) layer and lower layers of the DU) through interfaces (e.g., F1 interfaces). For example, the F1 interface can provide control plane (C-Plane) and user plane (U-Plane) functions (e.g., interface management, system information management, UE context management, RRC message transmission, etc.). F1AP is the application protocol of the F1 interface, defining the signaling procedures of F1 in some examples. The F1 interface supports both the F1 control plane (F1-C) and the F1 user plane (F1-U).

[0113] In some examples, a CU may include CU-CP and CU-UP. CU-CP is a logical node carrying the control plane (PDCP-C) layer, which carries the RRC layer and the Packet Data Convergence Protocol layer, and is used to implement the CU's control plane functions. CU-CP can interact with network elements in the core network used to implement control plane functions. These network elements in the core network can be Access and Mobility Function (AMF) network elements, such as the AMF in a 5G system. CU-UP is a logical node carrying the user plane (PDCP-U) layer, which carries the SDAP layer and the Packet Data Convergence Protocol layer, and is used to implement the CU's user plane functions. CU-UP can interact with network elements in the core network used to implement user plane functions. These network elements in the core network are, for example, the UPF in a 5G system.

[0114] In some possible implementations, the DU is a logical node that carries the RLC layer, the medium access control (MAC) layer, the higher physical layer (Higher PHY) layer, and other functions. In some examples, the DU can control at least one RU. The DU connects to the RU through some interface (e.g., a fronthaul interface). In some examples, the Higher PHY layer includes the physical layer (PHY) processing, such as forward error correction (FEC) encoding and decoding, scrambling, modulation, and demodulation.

[0115] The above configurations of CU and DU are merely examples; the functions of CU and / or DU can be configured as needed. For instance, CU or DU can be configured to have more protocol layer functions, or to have only some protocol layer processing functions. For example, some RLC layer functions and protocol layer functions above the RLC layer can be placed in the CU, while the remaining RLC layer functions and protocol layer functions below the RLC layer can be placed in the DU. Furthermore, the functions of CU or DU can be divided according to service type or other system requirements, such as by latency, placing functions that need to meet low latency requirements in the DU and functions that do not need to meet such latency requirements in the CU.

[0116] In some possible implementations, the RU is a logical node that carries both the lower physical layer (Lower PHY) and radio frequency (RF) processing. In some examples, the RU can be a 3GPP TRP, a remote radio head (RRH), or other similar entity. In some examples, the Low-PHY includes PHY processing functions such as Fast Fourier Transform (FFT), Inverse Fast Fourier Transform (IFFT), digital beamforming, and filtering. The RU communicates with one or more terminals via a wireless link.

[0117] The DU and RU can be co-located or not. The DU and RU exchange control plane and user plane information via a fronthaul link through a Lower-Layer Split CUS-Plane (LLS-CUS or LLS-C / U / S) interface. LLS-CUS may include a Lower-Layer Split C-Plane (LLS-C) interface providing the control plane (C-Plane) and a Lower-Layer Split U-Plane (LLS-U) interface providing the user plane (U-Plane). In some examples, the control plane refers to real-time control between the DU and RU. The DU and RU exchange management information via a Lower-Layer Split management (LLS-M) interface on the fronthaul link. The management plane (M-Plane) refers to non-real-time management operations between the DU and RU.

[0118] DU and RU can cooperate to implement the functions of the PHY layer. A DU can be connected to one or more RUs. The functions of DU and RU can be configured in various ways depending on the design. For example, a DU can be configured to implement baseband functions, and an RU can be configured to implement mid-RF functions. Another example is that a DU can be configured to implement higher-level functions in the PHY layer, and an RU can be configured to implement lower-level functions in the PHY layer, or both lower-level and RF functions. Higher-level functions in the physical layer can include a portion of the physical layer's functions that are closer to the MAC layer, while lower-level functions in the physical layer can include another portion of the physical layer's functions that are closer to the mid-RF side.

[0119] In this application, the RAN node can be implemented through software modules, hardware modules, or a combination of software and hardware modules. For example, the RAN node can be a server loaded with the corresponding software module. The embodiments of this application do not limit the specific technology or device form used in the RAN node.

[0120] It should be understood that the access network can provide services to the cell. Terminal devices can communicate with the cell through the transmission resources (e.g., frequency domain resources, or spectrum resources) allocated by the access network devices.

[0121] Core network equipment: A collective term for various functional entities on the network side used to manage users, data transmission, and access network equipment configuration. These entities provide core network services to terminal devices accessing the access network equipment. Core network equipment can correspond to different devices in different systems. For example, in 4G, core network equipment can correspond to a Mobility Management Entity (MME) and / or a Serving Gateway (S-GW). In 5G, core network equipment can correspond to an Access and Mobility Management Function (AMF) entity, an Ambient IoT Management Function (A-IoTMF) entity, a Session Management Function (SMF) entity, or a User Plane Function (UPF) entity. The A-IoTMF is a core network element used to provide A-IoT services.

[0122] Reader: Also known as a reader / writer, it refers to a device with reading and writing capabilities. It can be understood as a device that communicates with tags, and can be handheld or fixed to read (and sometimes write) tag information. It can take the form of a terminal, a base station, or a device with read / write capabilities. It can also be an integrated access and backhaul (IAB) node or a relay node.

[0123] A tag is a terminal that can respond to paging messages such as instructions or commands. This terminal primarily refers to terminal devices in ambient IoT (A-IoT) systems, and can also be called an A-IoT terminal. Electronic A-IoT terminals are radio frequency identification (RFID) A-IoT terminals. RFID technology can be further divided into active, passive, and semi-active types. Passive A-IoT terminals can also be called passive IoT, meaning passive Internet of Things devices. Therefore, they can also be considered a type of terminal.

[0124] For example, the tag can be an (electronic) tag, that is, a tag-like or card-like chip containing information is attached to a person or object and read and identified by radio waves. Tags can be divided into three types: active tags, passive tags, and semi-active tags. Passive tags, also known as passive IoT devices, can be considered a type of terminal.

[0125] Tags can also be categorized into passive tags, semi-passive tags, and active tags. Passive tags and semi-passive tags use backscatter-based communication, while active tags use actively generated carrier waves.

[0126] In addition, tags can be classified based on whether they are based on reflection-based communication, whether they have the ability to store energy or not, or a combination of both.

[0127] For example, for a microwatt-level power consumption tag, there is energy storage and an initial sampling frequency deviation of 10. X The power of X is usually understood as X = 4 or 5. There are no uplink or downlink amplifiers; uplink transmission is based on reflection transmission using an externally provided carrier. For microwatt-level power tags, there is energy storage, and the initial sampling frequency deviation is 10. X The power, usually understood as X = 4 or 5, has an amplifier for both uplink and downlink, or both uplink and downlink. Uplink transmission can be initiated by the terminal or can be transmitted via backscatter based on an external carrier.

[0128] The excitation source (helper) can be a terminal, a base station, or a small station. This device only has downlink communication with the A-IoT terminal, but has uplink and downlink data transmission with the reader / writer. This may be done through an air interface or through a wired connection.

[0129] It should be understood that the above is merely an example to briefly describe the devices that may be involved in this application, and does not constitute any limitation on the scope of protection of this application. Other devices may also be involved in the following embodiments, which will not be described one by one here.

[0130] As can be seen from the above, this application can be applied to NR systems or other communication systems (such as future communication systems). Exemplarily, in the application system of this application embodiment, the UE can also be located within the coverage area provided by the reader / writer. When the reader / writer is a terminal, the communication between it and the UE can be considered as transmission between terminals; when the reader / writer is a base station, the communication between it and the UE is via the UU interface, i.e., air interface communication. For ease of understanding, the following is combined with... Figure 3 and Figure 4 This diagram illustrates the architecture of a communication system to which embodiments of this application can be applied.

[0131] like Figure 3As shown, architecture 101 includes network devices and A-IoT terminals. The network devices can be macro base stations, pole stations, small stations, or micro stations, and the A-IoT terminals can be tags. For example, an A-IoT device can be a device with a peak power consumption of approximately 1 microwatt (μW), such as device 1; another example is an A-IoT device with a peak power consumption of less than or equal to several hundred μW, such as device 2. In device 2, the device that uses backscattering of an externally provided carrier is called device 2a, and the device that uses its own internally generated carrier for transmission is called device 2b.

[0132] In Architecture 101, A-IoT terminals and network devices can communicate directly and bidirectionally. Communication between the network devices and A-IoT terminals includes environmental IoT data and / or signaling. For example, in Architecture 101, the network device sends environmental IoT data and / or signaling to the A-IoT terminal, or the network device receives environmental IoT data and / or signaling from the A-IoT terminal; that is, there is uplink and downlink data and / or signaling between the network device and the A-IoT terminal.

[0133] For example, Figure 3 In this context, network devices can be understood as communicating with devices as if they were readers. Therefore, the communication link between the base station (BS) and the device is called a reader-to-device (R2D) link or communication. The communication link between the device and the BS is called a device-to-reader (D2R) link or communication.

[0134] like Figure 4 As shown, architecture 102 includes network devices, intermediate nodes, and A-IoT terminals. The descriptions of the network devices and A-IoT terminals can be found above. Figure 3 The descriptions of the network equipment and A-IoT terminals are omitted here. Intermediate nodes can be micro base stations.

[0135] In architecture 102, A-IoT terminals communicate bidirectionally with network devices through intermediate nodes. In architecture 102, the intermediate node can be a repeater, IAB node, UE, or other node capable of realizing environmental IoT. The intermediate node transmits environmental IoT data and / or signaling between the network devices and the A-IoT terminals. For example, the intermediate node sends downlink transmission signals to the A-IoT terminal. Another example is that the intermediate node sends a downlink excitation signal to the A-IoT terminal, and the A-IoT terminal reflects the signals it needs to send to the intermediate node back to the intermediate node, carrying the signals it needs to send to the intermediate node on the received downlink excitation signal.

[0136] For example, Figure 4 The intermediate node in the process can function as a Reader and communicate with the device.

[0137] It should be understood that the above device names are defined solely for the purpose of distinguishing different functions and should not constitute any limitation on this application. This application does not preclude the possibility of using other names in 5G networks and other future networks. For example, in future networks, some or all of the above-mentioned devices may use 5G terminology, or they may use other names, etc.

[0138] It should be understood that Figure 3 and Figure 4 This example, using network equipment and terminal equipment communication, simply illustrates one communication scenario in which this application can be applied, and does not limit other scenarios in which this application can be applied. It should also be understood that... Figure 3 and Figure 4 This is a simplified diagram for ease of understanding only. The communication system may also include other network devices or other terminal devices not shown.

[0139] As described above, the A-IoT terminal can be either device 1 or device 2. The chip system architecture and module functions of different types of A-IoT terminals are described below:

[0140] For example, the chip architecture of device 1 is as follows: Figure 5 As shown, it includes the following parts:

[0141] Antenna: Used to receive and / or transmit signals and data. It can be shared with or separated from radio frequency (RF) energy harvesters and receivers / transmitters.

[0142] Matching network: Matches the impedance between the antenna and other components (including modules related to the RF energy harvester and receiver).

[0143] RF energy harvester: includes a rectifier that converts radio frequency (AC) signals into DC signals.

[0144] Energy storage: storing collected energy from an RF energy receiver, such as through a capacitor.

[0145] Power Management Unit (PMU): A module that manages the energy stored from the energy harvester and provides energy to active systems that require energy supply.

[0146] Digital baseband logic (BB logics) includes functional modules such as encoders, decoders, and controllers.

[0147] Memory includes two types:

[0148] 1) Non-volatile memory, such as electrically erasable programmable read-only memory (EEPROM), and the identifier (ID) of a device that can be permanently stored.

[0149] 2) A register that temporarily stores information, which can only store information when there is sufficient energy in the energy storage.

[0150] Clock generator: Provides clock signals.

[0151] Receive-related modules:

[0152] RF band-pass filter (BPF): Improves frequency selectivity.

[0153] RF envelope detector (ED): Converts RF signals to baseband.

[0154] Baseband low-pass filter (LPF): filters out harmonics and high-frequency components, improving the quality of the signal input to the comparator.

[0155] Comparator: determines whether the input signal is high or low (level).

[0156] Send the relevant modules.

[0157] Backscatter modulator: Switches the impedance to modulate the backscatter signal using the transmit signal from the baseband logic.

[0158] For example, the chip architecture of device 2 (e.g., device 2b mentioned above, which actively transmits by generating a carrier internally) is as follows: Figure 6 As shown, it includes the following parts:

[0159] Antennas, matching networks, RF energy harvesters, PMUs, digital baseband logic, memory, clock generators, etc., can be found in the description above. Additionally, it also includes:

[0160] Local oscillator (LO): Generates a carrier frequency for the transmitter or a carrier frequency offset for the IF receiver.

[0161] Receive relevant modules.

[0162] RF bandpass filter (BPF): Improves frequency selectivity.

[0163] Mixer: Converts RF signals to intermediate frequency signals.

[0164] Intermediate frequency (IF) amplifier: amplifies intermediate frequency signals.

[0165] Intermediate frequency filter: Intermediate frequency filters remove unwanted RF and LO signals.

[0166] Intermediate frequency envelope detector: detects the envelope from the intermediate frequency signal.

[0167] Baseband (BB) amplifier: may or may not exist depending on the implementation.

[0168] Baseband low-pass filter: filters out harmonics and high-frequency components, improving the signal quality input to the comparator / ADC.

[0169] A comparator or an N-bit analog-to-digital converter (ADC).

[0170] Launch-related modules.

[0171] Transmit modulation (modulator): Modulates baseband bits according to the modulation scheme. This part can be part of the baseband logic module.

[0172] Digital-to-analog converter (DAC): Converts digital signals into analog signals.

[0173] Low-pass filter (LPF): filters out unwanted signals.

[0174] Mixer: Upconverts baseband signals to RF frequency range.

[0175] Power amplifier (PA): If present, amplifies the transmitted signal.

[0176] It should be understood that Figure 5 and Figure 6This application is provided solely for ease of understanding of the chip structure of the A-IoT terminal mentioned herein and does not constitute any limitation on the scope of protection of this application. The chip structure of the A-IoT terminal may also take other forms. For example, the chip structure of the A-IoT terminal may include, but is not limited to, other forms. Figure 5 or Figure 6 Other components besides those shown; for example, the chip structure of an A-IoT terminal may not include... Figure 5 or Figure 6 Some of the components shown are not listed here.

[0177] The communication systems and service scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of network architecture and the emergence of new service scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0178] To facilitate understanding of the embodiments of this application, some basic concepts involved in this application will be briefly explained.

[0179] 1. Cyclic prefix (CP): This indicates that the sample count of length CP from the end of the OFDM symbol is copied to the beginning of each OFDM symbol. CP has two functions:

[0180] 1) To resist inter-symbol interference in OFDM caused by multipath delay;

[0181] 2) Enable time boundary alignment of the next time slot after OFDM symbols are combined into a time slot.

[0182] 2. Rising edge and falling edge: These are commonly used terms in digital circuits, referring to the instants when a signal transitions from a low level to a high level and from a high level to a low level. In digital circuits, these instants are very important because they can trigger many logic gates and flip-flops, enabling the circuit to perform specific functions.

[0183] A rising edge is the instantaneous change of a signal from a low level to a high level. In digital circuits and communication systems, a rising edge generally represents the process of a signal state changing from 0 (low level) to 1 (high level). For example, in a digital signal source, when the output signal changes from 0 to 1, a rising edge is said to have occurred.

[0184] A falling edge is the instantaneous change of a signal from a high level to a low level. In digital circuits and communication systems, a falling edge generally represents the process of a signal state changing from 1 (high level) to 0 (low level). For example, in a digital signal source, when the output signal changes from 1 to 0, a falling edge is said to have occurred.

[0185] 3. Amplitude Shift Keying (ASK): ASK is equivalent to amplitude modulation in analog signals, except that the carrier signal is multiplied by binary digits. Amplitude shift treats frequency and phase as constants and amplitude as a variable; information bits are transmitted through changes in the amplitude of the carrier wave. If the possible states of a digitally modulated signal correspond one-to-one with binary information symbols or their corresponding baseband signal states, then the modulated signal is called a binary digital modulated signal. Keying using binary information symbols, that is, using two different amplitudes to represent binary "0" and "1", is called binary amplitude shift keying, denoted by ASK. For example, a higher amplitude carrier wave represents bit "1", and a lower amplitude carrier wave represents bit "0"; or, a higher amplitude carrier wave represents bit "0", and a lower amplitude carrier wave represents bit "1".

[0186] 4. On-off keying (OOK): OOK is a type of binary amplitude keying and a special case of ASK.

[0187] 5. Chip: Such as an OOK chip or an ASK chip. One chip represents one amplitude shift keying level, such as an ASK level or an OOK level. An OFDM symbol can include multiple chips; more specifically, an OFDM symbol can include an integer number of chips, or an OFDM symbol and its CP can include an integer number of chips. For an OOK chip, when the amplitude (or envelope, level, or energy) of the OOK chip is high (e.g., above a certain threshold, or non-zero), the state of the OOK chip is said to be high level, ON, or the symbol {1}; when the amplitude (or envelope, level, or energy) of the OOK chip is low (e.g., below a certain threshold, or zero), the state of the OOK chip is said to be low level, OFF, {0}, or the symbol {0}. The level of amplitude can be defined relative to the receiver's amplitude demodulation threshold; amplitudes greater than the demodulation threshold are called high amplitudes, and amplitudes less than the demodulation threshold are called low amplitudes. A chip can be described as a time unit, an element, a unit of time, a symbol, or a modulation symbol. In one definition, a chip is the time unit occupied by the encoded bits after the information bits have been encoded using line code.

[0188] 6. PRDCH: Data transmission channel from A-IoT device to reader.

[0189] 7. Downlink synchronization signals: These include the timing acquisition single (TAS) signal and the end timing signal. This application mainly focuses on the design of the SIP within the TAS; the end timing signal will not be discussed in detail.

[0190] TAS uses a preamble design, meaning the timing capture signal and the preamble have the same meaning. The end timing signal is used to determine the end of PRDCH transmission and can use a postamble design.

[0191] For example, TAS includes SIP and CAP. SIP indicates the start position of PRDCH transmission, and CAP indicates the length of the OOK chip used in PRDCH transmission. SIP uses alternating high and low levels; the length of each level in SIP is not limited in this application. Furthermore, the number of high and low level groups in SIP can be one or multiple groups. CAP includes at least two rising or falling edges, used by the device to determine the OOK chip length in PRDCH transmission. CAP can be of fixed length or have a fixed pattern.

[0192] Alternatively, SIP can also be called a start-indicator signal, and CAP can also be called a time acquisition signal; or SIP can also be called signal #1, and CAP can also be called signal #2, etc.

[0193] It should be understood that the names of the two signals included in the TAS are not limited in this application, as long as they can achieve the corresponding functions. For example, TAS packet signal #1 and signal #2, signal #1 is used to indicate the start time of the downlink signal, and signal #2 is used to indicate the OOK chip length used in the PRDCH transmission.

[0194] To facilitate understanding, the following will be combined with... Figure 7 This paper briefly describes the timing relationship between SIP, CAP, and PRDCH in this application.

[0195] It should be understood that the A-IoT system is an asynchronous system. Before the device receives the PRDCH, the device obtains the start time of the PRDCH and the length of the chips in the PRDCH.

[0196] For example, the reader sends the aforementioned TAS to the device before sending the PRDCH. Figure 7 As shown, TAS includes SIP and CAP, with CAP located after and adjacent to SIP.

[0197] It should be noted that SIP and CAP being adjacent means that the end time of SIP and the start time of CAP are the same time, and there is no time interval between SIP and CAP.

[0198] 8. SIP Design Scheme: Currently, the following are possible approaches to SIP design:

[0199] Method 1: The number of high and low level groups in SIP is one group.

[0200] In the case shown in Method 1, the high and low level design methods in SIP include the following Methods 1.1 to 1.3:

[0201] Method 1.1: The duration of the high level in SIP is the same as the duration of the low level. For example, the SIP level pattern is ON-OFF, where the duration of ON is the same as the duration of OFF.

[0202] Method 1.2: The ratio of the duration of the high level to the duration of the low level in SIP is 1:2 or 1:3. For example, the SIP level pattern is ON-OFF, where the duration of OFF is twice the duration of ON; another example is ON-OFF, where the duration of OFF is three times the duration of ON.

[0203] Method 1.3: The ratio of high-level duration to low-level duration in SIP is 2:1 or 3:1. For example, the SIP level pattern is ON-OFF, where the ON duration is twice the OFF duration; another example is ON-OFF, where the ON duration is three times the OFF duration.

[0204] For ease of understanding, combined with Figure 8 This section briefly introduces the SIP design approach shown in Method 1. The SIP level pattern can be as follows: Figure 8 In diagram (a), the duration of ON is the same as the duration of OFF, or it can be... Figure 8 The duration of OFF shown in (b) is twice the duration of ON, or it can be... Figure 8 The duration of OFF shown in (c) is three times the duration of ON, or it can be... Figure 8 The ON duration shown in (d) is twice the OFF duration, or it can be... Figure 8 The ON duration shown in (e) is three times the OFF duration.

[0205] It should be understood that Figure 8 This example only illustrates the possible patterns of a SIP when the number of high and low levels is one group. It does not constitute any limitation on the scope of protection of this application. A SIP can also be in other possible forms. For example, the duration of the high level and / or the duration of the low level in a SIP can also be in other possible forms, which will not be illustrated here.

[0206] Method 2: The number of high and low level groups in SIP is multiple.

[0207] In the case shown in Method 2, the high and low level design methods in SIP include Methods 2.1 to 2.4:

[0208] Method 2.1: The SIP pattern is the pattern shown in Method 1.1 above repeated multiple times; or, the SIP pattern is the pattern shown in Method 1.2 above repeated multiple times; or, the SIP pattern is the pattern shown in Method 1.3 above repeated multiple times.

[0209] Method 2.2: The SIP level pattern is ON-OFF-ON, and the duration of OFF and ON can be the same or different.

[0210] Method 2.3: The SIP level pattern is OFF-ON-OFF, and the duration of OFF and ON can be the same or different.

[0211] Method 2.4: The SIP pattern is a combination of the pattern shown in Method 1.1 and the pattern shown in Method 1.2.

[0212] For ease of understanding, combined with Figure 9 This section briefly introduces the SIP design approach shown in Method 2. The SIP level pattern can be as follows: Figure 9 The diagram in (a) shows multiple ON-OFF pairs, where the ON duration and OFF duration are the same in each pair. Alternatively, it could be... Figure 9 As shown in (b), there are multiple ON-OFF groups, and the duration of OFF in each group is twice the duration of ON. Alternatively, it could be... Figure 9 The diagram in (c) shows multiple ON-OFF groups, where the duration of OFF in each group is three times the duration of ON. Alternatively, it could be... Figure 9 The diagram in (d) shows multiple ON-OFF groups, where the ON duration is twice the OFF duration in each group. Alternatively, it could be... Figure 9 The diagram in (e) shows multiple ON-OFF groups, where the ON duration is three times the OFF duration in each group. Alternatively, it could be... Figure 9 The ON-OFF-ON pattern shown in (f) can also be Figure 9 The OFF-ON-OFF pattern shown in (g) can also be Figure 9 The diagram (h) shows a set of ON-OFF pairs where the duration of ON is the same as the duration of OFF, and another set of ON-OFF pairs where the duration of OFF is twice the duration of ON. Alternatively, it could be... Figure 9 The diagram in (i) includes a set of ON-OFF pairs where the duration of ON is the same as the duration of OFF, and also includes a set of ON-OFF pairs where the duration of OFF is three times the duration of ON.

[0213] It should be understood that Figure 9This example merely illustrates the possible patterns of a SIP when there are multiple groups of high and low levels. It does not constitute any limitation on the scope of protection of this application. The SIP can also be in other possible forms. For example, the duration of the high level and / or the duration of the low level in the SIP can also be in other possible forms, which will not be illustrated here.

[0214] Additionally, it should be noted that methods 1 and 2 described above are merely illustrative examples of possible SIP design methods and do not constitute any limitation on the scope of protection of this application. SIP can also adopt other design methods, such as SIP including a set of high and low level OFF-ON, etc., which will not be illustrated here.

[0215] In this application, a certain level in the SIP is used to distinguish the SIP from other signals. For example, the SIP includes a set of high and low levels. Since the first level has significant interference, the second level in this set of high and low levels is used to distinguish the SIP from other signals. As shown in Method 1 above, the OFF level in the SIP is used to distinguish the SIP from other signals. Another example is that the SIP includes multiple sets of high and low levels. The second level in the last set is used to distinguish the SIP from other signals. As shown in Method 2.4 above, the first set of high and low levels in the SIP is used to calculate the threshold of the high and low levels, and the OFF level in the second set of high and low levels in the SIP is used to distinguish the SIP from other signals.

[0216] 9. M value: Represents the number of chips included in an OFDM symbol. For example, if an OFDM symbol includes M chips, then the chip length of each chip is... OFDM symbols.

[0217] In this application, the value of M can be 1, 2, 4, 6, 8, 12, 16, 24, or 32, etc., and the set of values ​​for M can have many different possibilities. For example, one set of values ​​for M is {2, 6, 24}, and another set of values ​​for M is {2, 8, 16, 24}, etc. Optionally, one constraint on the set of values ​​for M is that the largest M value in the set of values ​​for M is not less than 16, such as the largest M value in the set of values ​​for M can be one of 16, 24, or 32; another constraint on the set of values ​​for M is that the set of values ​​for M can include 3, 4, or 5 M values.

[0218] It should be understood that different values ​​of M represent different chip durations. For example, if M is 24, it means that an OFDM symbol contains 24 chips, and the duration of that chip is... OFDM symbols; if M is 8, it means that an OFDM symbol contains 8 chips, and the duration of each chip is... One OFDM symbol. That is, when M is 8, the duration of a chip is 3 times that when M is 24.

[0219] The above text combined Figure 1 This paper briefly introduces the scenarios in which the communication method provided in the embodiments of this application can be applied, as well as the basic concepts that may be involved in the embodiments of this application. In the basic concepts, possible design schemes for SIP are introduced. If no special design is adopted for SIP, the device may be unable to distinguish SIP from other signals.

[0220] To make it easier to understand, the following examples illustrate scenarios where SIP and other signals cannot be distinguished:

[0221] Scene 1:

[0222] Based on the M=24 design, one OFDM symbol includes 24 chips, and the duration of each chip is... One OFDM symbol. For example, SIP#1 duration is... One OFDM symbol. For example, SIP#1 is represented as {110011000000}, meaning SIP#1 is the design method indicated in method 2.4 above, including two sets of ON-OFF levels. One set is ON-OFF, where the ON duration and OFF duration are the same {1100}. The ON duration and OFF duration are both two chips under the M=24 design, i.e. One OFDM symbol. Another group is ON-OFF, where the OFF duration is three times the ON duration {11000000}, and the ON duration in this group is two chips under the M=24 design, i.e. There are 6 OFDM symbols in this group, with an OFF duration of 6 chips under the design of M=24. OFDM symbols.

[0223] In SIP#1, with the pattern as described above for M=24, the percentage is... In the case of an OFDM symbol with the pattern {110011000000}, as described above in the description of distinguishing SIP from other signals, the second OFF in SIP#1 is used to distinguish SIP#1 from other signals, that is, the duration is... The {000000} in the OFDM symbol is used to distinguish SIP#1 from other signals. The duration is... The OFF of one OFDM symbol can also be described as the OFF that occupies 6 chips.

[0224] If the subsequent data portion is designed based on M=8, one OFDM symbol includes 8 chips, and the duration of each chip is... OFDM symbols. For example, such as... Figure 10 As shown, the duration of the data signal is one OFDM symbol, represented as {10100110}, where the data signal includes an OFF signal of {00}. Since the duration of one chip is... If there are 10 OFDM symbols, then the duration of the OFF is 1000. One OFDM symbol, with the same duration as the second OFF in SIP#1 mentioned above.

[0225] In summary, under the scenario shown in Scenario 1, the design of SIP#1 cannot support subsequent data signal transmission based on M=8, because the SIP and data components are confused.

[0226] Scene 2:

[0227] SIP still uses the design shown in Example 1 above.

[0228] If the subsequent data portion is designed based on M=6, one OFDM symbol includes 6 chips, and the duration of each chip is... An OFDM symbol, wherein the OFDM includes CP.

[0229] For example, such as Figure 11 As shown, the data signal is represented as {1010}, where a low level exists within this data signal, consisting of a CP and an OFF signal. Since the duration of one chip is... If there are 10 OFDM symbols, then the duration of the OFF is 1000. OFDM symbols, with a duration of M=6. The OFF of an OFDM symbol can also be described as an OFF that occupies 4 chips when M=24. In addition, the duration of CP can be described as occupying 1.7 chips when M=24. Therefore, the data signal includes a low level with a duration of 5.7 chips when M=24, which is approximately the same as the duration of the second OFF in SIP#1 (6 chips) mentioned above.

[0230] If the subsequent data portion is designed based on M=12, one OFDM symbol includes 12 chips, and the duration of each chip is... An OFDM symbol, wherein the OFDM includes CP.

[0231] For example, such as Figure 12 As shown, the data signal is represented as {10100}, where there is a low level, which consists of one CP and two OFF signals. Since the duration of one chip is... One OFDM symbol, the duration of one OFF is OFDM symbols, duration is The OFF of an OFDM symbol can also be described as an OFF that occupies 2 chips when M=24. Furthermore, the duration of CP can be described as occupying 1.7 chips when M=24. Therefore, the data signal includes a low level with a duration of 5.7 chips when M=24, which is approximately the same duration as the second OFF in SIP#1 mentioned above.

[0232] In summary, under the scenario shown in Scenario 2, the design of SIP#1 cannot support subsequent data signal transmission based on M=6 or M=12 because the CP part of SIP and data is confused.

[0233] As mentioned above, how to design a SIP (System-in-Package) that can be distinguished from other signals is a problem that urgently needs to be solved. This application provides a communication method that improves the transmission performance of downlink signals by designing a SIP pattern that allows the SIP to be distinguished from other signals.

[0234] It should be understood that the communication method provided in the embodiments of this application can be applied to environmental Internet of Things (IoT) communication systems, for example, Figure 2 or Figure 3 The communication system shown is illustrated above. The application scenarios described in the embodiments of this application are merely examples and do not constitute any limitation on the scope of protection of this application.

[0235] It should also be understood that the embodiments shown below do not particularly limit the specific structure of the execution subject of the method provided in the embodiments of this application, as long as it is possible to communicate according to the method provided in the embodiments of this application by running a program that records the code of the method provided in the embodiments of this application. For example, the execution subject of the method provided in the embodiments of this application can be a device, or a functional module in the device that can call and execute a program.

[0236] Figure 13 This is a schematic flowchart illustrating a communication method provided in this application. It includes the following steps:

[0237] S1310, the first communication device generates the first signal.

[0238] For example, the first signal in this application may be called a timing acquisition single (TAS), a clock signal, or a clock acquisition signal, etc. This application does not impose any limitation on the name of the first signal, as long as it can achieve the corresponding function.

[0239] Specifically, the first signal includes a first part and a second part. The first part is used to indicate the start time of data signal transmission, and the second part is used to indicate the chip duration corresponding to the data signal.

[0240] The first part described above, used to determine the start time of data signal transmission, can also be described as follows: the first part is used to indicate the start time of data signal transmission, or the first part is associated with the start time of data signal transmission, etc. Similarly, the second part, used to determine the chip duration of the data signal, can also be described as follows: the second part is used to indicate the chip duration of the data signal, or the second part is associated with the chip duration of the data signal, etc.

[0241] Furthermore, the first part of the first signal can be called SIP or signal #1, etc., and the second part of the first signal can be called CAP or signal #2, etc. The data signal can also be called the downlink signal, PRDCH signal, etc. It should be understood that the name of the signal is not limited in this application, as long as it can achieve the corresponding function.

[0242] In this application, the first part is designed based on M equal to 24, where M represents the number of chips included in an OFDM symbol. Designing the first part based on M equal to 24 can be understood as follows: the duration of one chip in the first part is... Duration of each OFDM symbol.

[0243] One of the chip durations in the first part above is The duration of an OFDM symbol can also be described as follows: the first part corresponds to M equal to 24, where M represents the number of chips included in an OFDM symbol; or, it can also be described as follows: the first part is associated with M equal to 24, where M represents the number of chips included in an OFDM symbol, etc.

[0244] Furthermore, the first part mentioned above includes a first level, which is used to distinguish between the first part and the second part, as well as to distinguish between the first part and the data signal; or, in other words, the first level in the first part is used to indicate the first part, etc. It can be understood that the duration of the first level in the first part is not equal to the duration of the level with the same value as the first level in other signals (such as the second part of the first signal, the data signal, etc.).

[0245] For example, if the first level is an OFF in the first part, then the duration of this OFF is different from the duration of any OFF in the second part, and the duration of this OFF is different from the duration of any OFF in the data signal.

[0246] For example, if the first level is an ON signal in the first part, then the duration of that ON signal is different from the duration of any ON signal in the second part, and the duration of that OFF signal is different from the duration of any ON signal in the data signal.

[0247] It should be understood that "time length" in this application can also be referred to as duration, duration time, time duration, or time period, etc. For example, the duration of a voltage level can be referred to as the duration of the voltage level; similarly, the duration of a first signal can also be referred to as the duration of the first signal.

[0248] By way of example and not limitation, “ON” in this application may also be referred to as high level, ON level, 1 level, symbol {1}, on-off keying (OOK) symbol {1}, etc.; “OFF” may also be referred to as low level, OFF level, 0 level, symbol {0}, OOK symbol {0}, etc.

[0249] In this application, the second part and / or data signal are designed based on the range of values ​​of M as the first set. The first set includes one or more of the following elements: 1, 2, 4, 6, 8, 12, 16, 24, and 32. The elements included in the first set are merely examples and do not constitute any limitation on the scope of protection of this application. The first set may also include other elements, such as 64.

[0250] The above design of the second part and / or data signal based on the range of values ​​for M as the first set can be understood as: the chip duration of one chip in the second part and / or data signal is... The duration of each OFDM symbol, M, takes values ​​from the first set. The duration of one chip in the second part and / or the data signal is... The duration of an OFDM symbol, with M taking values ​​from the first set, can also be described as: the range of M values ​​corresponding to the second part and / or data signal is the first set; or, it can also be described as: the second part and / or data signal is associated with the range of M values ​​from the first set, etc.

[0251] Optionally, designing the second part and / or the data signal based on the range of values ​​for M as the first set can be: designing the second part based on the range of values ​​for M as the first set #1, and / or designing the data signal based on the range of values ​​for M as the first set #2, wherein the first set #1 and the first set #2 can be the same or different. In other words, the value of M corresponding to the second part can be the same as or different from the value of M corresponding to the data signal.

[0252] As can be seen from the above, the function of the first level in the first part of this application is to distinguish the first part from other signals. Specifically, in order to distinguish the first part from other signals, the number of chips of the first level in this application can be any one of 6, 8, 9, 12, 15, 16, or 18.

[0253] In other words, when the number of chips in the first level can be any one of 6, 8, 9, 12, 15, 16, or 18, there exists a first set of values ​​for M corresponding to the second part and / or the data signal, satisfying that the duration of the first level in the first part is not equal to the duration of the level in the second part that has the same level value as the first level, and satisfying that the duration of the first level in the first part is not equal to the duration of the level in the data signal that has the same level value as the first level.

[0254] Optionally, the first communication device in this application can determine, in the case of designing the first part based on M equal to 24, the possible values ​​of M corresponding to the duration of the first level in the first part, so that the range of values ​​of M corresponding to the second part and / or the data signal can be as close as possible to the whole set or a subset of the set {1, 2, 6, 8, 12, 16, 24, 32}, as possible, through the following methods (steps 1 to 4 below):

[0255] Taking the first part as SIP and the second part as CAP as an example, when considering the entire set of M values ​​corresponding to the second part and / or the data signal as {1, 2, 6, 8, 12, 16, 24, 32}, the duration of the possible first level in the first part is filtered as follows:

[0256] Step 1: Define the M value m of SIP SIP =24, define the sampling frequency offset (SFO) size r = 10%, define the CP duration (duration unit: OFDM symbol duration). (For ease of understanding, we take a short CP as an example here. If we consider a long CP, we can define it as the duration of the long CP.)

[0257] Step 2: Define a set of possible M values ​​for CAP and / or the data signal, M = {1, 2, 4, 6, 8, 12, 16, 24, 32}, which contains 9 elements. Let each element be denoted as m. i i = 1, 2, ..., 9;

[0258] Step 3: Calculate m for each value of M in set M. i The duration of the corresponding chip (duration unit: OFDM symbol duration)

[0259]

[0260] In equation (2-1) above, d i m i The corresponding chip duration, m i This represents an element in set M.

[0261] Additionally, the duration of twice the chip corresponding to each M value (i.e., 2d) is calculated.i )2d i 1 chip duration + CP duration (i.e., d) i +l), and the duration of 2 times the chip + the duration of CP (i.e., 2d i +l)

[0262] Step 4: Filter the duration of the possible first level.

[0263] The screening process is as follows: for j = 1, 2, ..., 23, if the following conditions are met... and and and If this holds true for all i = 1, 2, ..., 9, then The duration of the first possible level.

[0264] It should be understood that the methods for determining the duration of the first level shown in steps 1 to 4 above are merely examples and do not constitute any limitation on the scope of protection of this application. Other methods for determining the duration of the first level are also within the scope of protection of this application. For example, the first communication device may fix the duration of the first level and determine the range of M values ​​corresponding to the second part and / or data signal (e.g., M takes different values ​​from the set M = {1, 2, 4, 6, 8, 12, 16, 24, 32}, and determine the M value that meets the requirements as the M value corresponding to the second part and / or data signal).

[0265] For example, when the number of chips in the first level is any one of 6, 8, 9, 12, 15, 16, or 18, the aforementioned first set includes, but is not limited to, the following possible forms:

[0266] As one possible implementation, the number of chips in the first level is 9, 16, or 18.

[0267] In this implementation, the elements in the first set include one or more of the numbers 1, 2, 4, 6, 8, 12, 16, 24, and 32.

[0268] The number of chips in the first level mentioned above is 9, 16, or 18. The elements in the first set include one or more of 1, 2, 4, 6, 8, 12, 16, 24, and 32. This can be understood as follows: when the number of chips in the first level is 9, 16, or 18, the value range of M corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}. That is, the value of M corresponding to the second part and / or data signal can be any one of the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0269] For example, the number of chips in the first level is 9, 16, or 18. The range of M values ​​corresponding to the second part and / or data signal can be elements from the following set: {16, 24, 32}, {12, 16, 24, 32}, or {8, 12, 16, 24, 32}, etc.

[0270] In this implementation, it can be understood that when the number of chips in the first level is 9, 16, or 18, the range of M values ​​corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}. This satisfies that the duration of the first level in the first part is not equal to the duration of the level in the second part that has the same level value as the first level, and also satisfies that the duration of the first level in the first part is not equal to the duration of the level in the data signal that has the same level value as the first level.

[0271] As another possible implementation, the number of chips in the first level is 6.

[0272] In this implementation, the elements in the first set include one or more of 1, 2, 16, 24, and 32.

[0273] The number of chips in the first level is 6. The elements in the first set include one or more of 1, 2, 16, 24 and 32. This can be understood as follows: when the number of chips in the first level is 6, the value range of M corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 16, 24, 32}. That is, the value of M corresponding to the second part and / or data signal can be any one of the entire set or a subset of the set {1, 2, 16, 24, 32}.

[0274] For example, the number of chips in the first level is 6, and the range of M values ​​corresponding to the second part and / or data signal can be elements in the following set: {24, 32}, {16, 24, 32}, or {2, 16, 24, 32}, etc.

[0275] In this implementation, it can be understood that when the number of chips in the first level is 6, the range of M values ​​corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 16, 24, 32}. This satisfies that the duration of the first level in the first part is not equal to the duration of the level in the second part that has the same level value as the first level, and also satisfies that the duration of the first level in the first part is not equal to the duration of the level in the data signal that has the same level value as the first level.

[0276] As another possible implementation, the number of chips in the first level is 8.

[0277] In this implementation, the elements in the first set include one or more of 1, 2, 12, 16, 24, and 32.

[0278] The number of chips in the first level is 8. The elements in the first set include one or more of 1, 2, 12, 16, 24 and 32. This can be understood as follows: when the number of chips in the first level is 8, the value range of M corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 12, 16, 24, 32}. That is, the value of M corresponding to the second part and / or data signal can be any one of the entire set or a subset of the set {1, 2, 12, 16, 24, 32}.

[0279] For example, the number of chips in the first level is 8, and the range of M values ​​corresponding to the second part and / or data signal can be elements in the following set: {24, 32}, {16, 24, 32}, or {12, 16, 24, 32}, etc.

[0280] In this implementation, it can be understood that when the number of chips in the first level is 8, the range of M values ​​corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 12, 16, 24, 32}. This satisfies that the duration of the first level in the first part is not equal to the duration of the level in the second part that has the same level value as the first level, and also satisfies that the duration of the first level in the first part is not equal to the duration of the level in the data signal that has the same level value as the first level.

[0281] As another possible implementation, the number of chips in the first level is 12 or 15.

[0282] In this implementation, the elements in the first set include one or more of the numbers 1, 6, 8, 12, 16, 24, and 32.

[0283] The number of chips in the first level is 12 or 15. The elements in the first set include one or more of 1, 6, 8, 12, 16, 24 and 32. This can be understood as follows: when the number of chips in the first level is 12 or 15, the value range of M corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 12, 16, 24, 32}. That is, the value of M corresponding to the second part and / or data signal can be any one of the entire set or a subset of the set {1, 2, 12, 16, 24, 32}.

[0284] For example, the number of chips in the first level is 12 or 15, and the range of M values ​​corresponding to the second part and / or data signal can be elements in the following set: {24, 32}, {16, 24, 32}, or {12, 16, 24, 32}, etc.

[0285] In this implementation, it can be understood that when the number of chips in the first level is 12 or 15, the range of M values ​​corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 12, 16, 24, 32}. This satisfies that the duration of the first level in the first part is not equal to the duration of the level in the second part that has the same level value as the first level, and also satisfies that the duration of the first level in the first part is not equal to the duration of the level in the data signal that has the same level value as the first level.

[0286] For example, the first level described above can be a low level in the first part. For example, the first level is OFF.

[0287] It should be understood that the aforementioned first level can also be a high level in the first part, that is, the first level can be a low level or a high level in the first part. This application does not limit whether the level value of the first level is high or low, as long as the duration of the first level in the first part is not equal to the duration of the level with the same level value in the second part, and the duration of the first level in the first part is not equal to the duration of the level with the same level value in the data signal.

[0288] For ease of description, the following explanation uses a low level as the first level as an example. For the case where the first level is high, please refer to the description of the case where the first level is low. This application will not repeat the details.

[0289] For example, the first level mentioned above can be the last level in the first part.

[0290] In this application, the first level can be the last level in the first part. For example, the first level is the last level in the first part, and the last level is a low level.

[0291] It should be understood that the first level in this application can also be any level other than the last level in the first part. For example, the first level can be a certain level in the middle of the first part, such as ON#1OFF#1ON#2OFF#2. The first level can be OFF#2, OFF#1, or ON#2, etc.

[0292] It should be noted that this application does not impose any restrictions on the specific location of the first level in the first part, or whether the first level is high or low. The duration of the first level is not equal to the duration of the same level in other signals (such as the second part, data signals, etc.).

[0293] Furthermore, as explained in the basic concepts above, if we take the first part as an example of a SIP, then the design of the first part satisfies the rules shown in methods 1 and 2 above. Additionally, the duration of the first part can be... The duration of one OFDM symbol, or the duration of one OFDM symbol.

[0294] To facilitate understanding, the following examples illustrate the possible forms of the drawings in the first part of this application:

[0295] Example 1: The duration of the first part is The duration of each OFDM symbol, the first part of which includes a first high level and a first low level, and the first low level is the first level mentioned above.

[0296] In the case shown in Example 1, the number of chips with the first high level and the number of chips with the first low level satisfy at least one of the following:

[0297] The number of chips in the first high level is 3, and the number of chips in the first low level is 9; or,

[0298] The number of chips in the first high level is 6, and the number of chips in the first low level is 6; or,

[0299] The number of chips for the first high level is 4, and the number of chips for the first low level is 8.

[0300] Wherein, the first low level is the first level.

[0301] For ease of understanding, combined with Figures 14 to 16 This section briefly describes the possible forms of the pattern in the first part of the example shown in Example 1.

[0302] like Figure 14 As shown, the first part is designed based on M equaling 24, and the duration of this first part is... The duration of each OFDM symbol, and the first part includes one ON and one OFF, wherein the number of chips for ON is 3 and the number of chips for OFF is 9. It should be understood that the pattern of the first part satisfies the design principles introduced in mode 1.2 of the basic concepts above, and the ratio of the duration of ON to OFF in the first part is 1:3.

[0303] It should be understood that the pattern in the first part is... Figure 14 In the case shown, OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 9, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0304] like Figure 15 As shown, the first part is designed based on M equaling 24, and the duration of this first part is... The duration of each OFDM symbol, and the first part includes an ON and an OFF, wherein the number of chips for ON is 6 and the number of chips for OFF is 6. It should be understood that the pattern of the first part satisfies the design principle introduced in Method 1.1 of the basic concepts above, and the duration of ON and OFF in the first part are equal.

[0305] It should be understood that the pattern in the first part is... Figure 15 In the case shown, OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 6, and the range of M values ​​corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 16, 24, 32}.

[0306] like Figure 16 As shown, the first part is designed based on M equaling 24, and the duration of this first part is... The duration of each OFDM symbol, and the first part includes one ON and one OFF, wherein the number of chips for ON is 4 and the number of chips for OFF is 8. It should be understood that the pattern of the first part satisfies the design principles introduced in mode 1.2 of the basic concepts above, and the ratio of the duration of ON to OFF in the first part is 1:2.

[0307] It should be understood that the pattern in the first part is... Figure 16 In the case shown, OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 8, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 2, 12, 16, 24, 32}.

[0308] Example 2: The duration of the first part is The duration of an OFDM symbol, in the first part, includes a first high level, a first low level, a second high level, and a second low level, with the second low level being the first level mentioned above.

[0309] In the case shown in Example 2, the number of chips with the first high level is 2, the number of chips with the first low level is 2, the number of chips with the first high level is 2, and the number of chips with the first low level is 6.

[0310] For ease of understanding, combined with Figure 17 This section briefly describes the possible forms of the pattern in the first part of the example shown in Example 2.

[0311] like Figure 17 As shown, the first part is designed based on M equaling 24, and the duration of this first part is... The duration of each OFDM symbol, and this first part includes two sets of ON-OFF level groups. In one ON-OFF group, the duration of ON and OFF is the same, and the number of chips in each group is 2. In the other ON-OFF group, the duration of OFF is three times the duration of ON, the number of chips for ON is 2, and the number of chips for OFF is 6. It should be understood that the pattern of the first part satisfies the design principles introduced in mode 2.4 of the basic concepts above.

[0312] It should be understood that the pattern in the first part is... Figure 17 In the case shown, the second OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 6, and the range of M values ​​corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 16, 24, 32}.

[0313] Example 3: The duration of the first part is the duration of one OFDM symbol. The first part includes a first high level and a first low level in sequence, and the first low level is the first level mentioned above.

[0314] In the case shown in Example 3, the number of chips with the first high level and the number of chips with the first low level satisfy at least one of the following:

[0315] The number of chips for the first high level is 8, and the number of chips for the first low level is 16; or,

[0316] The number of chips for the first high level is 6, and the number of chips for the first low level is 18; or,

[0317] The number of chips in the first high level is 12, and the number of chips in the first low level is 12; or,

[0318] The number of chips in the first high level is 18, and the number of chips in the first low level is 6; or,

[0319] The number of chips for the first high level is 16, and the number of chips for the first low level is 8.

[0320] For ease of understanding, combined with Figures 18 to 22 This section briefly describes the possible forms of the pattern in the first part of the example shown in Example 3.

[0321] like Figure 18 As shown, the first part is designed based on M equal to 24. The duration of the first part is the duration of one OFDM symbol, and the first part includes one ON and one OFF, wherein the number of chips for ON is 8 and the number of chips for OFF is 16. It should be understood that the pattern of the first part satisfies the design principle introduced in mode 1.2 of the basic concepts above, and the ratio of the duration of ON to OFF in the first part is 1:2.

[0322] It should be understood that the pattern in the first part is... Figure 18 In the case shown, OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 16, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 2, 6, 8, 12, 16, 24, 32}.

[0323] like Figure 19 As shown, the first part is designed based on M equal to 24. The duration of the first part is the duration of one OFDM symbol, and the first part includes one ON and one OFF, wherein the number of chips for ON is 6 and the number of chips for OFF is 18. It should be understood that the pattern of the first part satisfies the design principle introduced in mode 1.2 of the basic concepts above, and the ratio of the duration of ON to OFF in the first part is 1:3.

[0324] It should be understood that the pattern in the first part is... Figure 19 In the case shown, OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 18, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 2, 6, 8, 12, 16, 24, 32}.

[0325] like Figure 20 As shown, the first part is designed based on M equal to 24. The duration of the first part is the duration of one OFDM symbol, and the first part includes one ON and one OFF, wherein the number of chips for ON is 12 and the number of chips for OFF is 12. It should be understood that the pattern of the first part satisfies the design principle introduced in mode 1.1 of the basic concepts above, and the duration of ON and OFF in the first part are equal.

[0326] It should be understood that the pattern in the first part is... Figure 20 In the case shown, OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 12, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 6, 8, 12, 16, 24, 32}.

[0327] like Figure 21 As shown, the first part is designed based on M equal to 24. The duration of the first part is the duration of one OFDM symbol, and the first part includes one ON and one OFF, wherein the number of chips for ON is 18 and the number of chips for OFF is 6. It should be understood that the pattern of the first part satisfies the design principle introduced in mode 1.3 of the basic concepts above, and the ratio of the duration of ON to OFF in the first part is 3:1.

[0328] It should be understood that the pattern in the first part is... Figure 21 In the case shown, OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 6, and the range of M values ​​corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 16, 24, 32}.

[0329] like Figure 22 As shown, the first part is designed based on M equal to 24. The duration of the first part is the duration of one OFDM symbol, and the first part includes one ON and one OFF, wherein the number of chips for ON is 16 and the number of chips for OFF is 8. It should be understood that the pattern of the first part satisfies the design principle introduced in mode 1.3 of the basic concepts above, and the ratio of the duration of ON to OFF in the first part is 2:1.

[0330] It should be understood that the pattern in the first part is... Figure 22 In the case shown, OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 8, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 2, 12, 16, 24, 32}.

[0331] Example 4: The duration of the first part is the duration of one OFDM symbol. The first part includes a first high level, a first low level, a first high level and a first low level in sequence, and the second first low level is the first level.

[0332] In the case shown in Example 4, the number of chips with the first high level and the number of chips with the first low level satisfy at least one of the following:

[0333] The number of chips in the first high level is 3, and the number of chips in the first low level is 9; or,

[0334] The number of chips in the first high level is 6, and the number of chips in the first low level is 6; or,

[0335] The number of chips for the first high level is 4, and the number of chips for the first low level is 8.

[0336] For ease of understanding, combined with Figures 23 to 25 This section briefly describes the possible forms of the pattern in the first part of the example shown in Example 4.

[0337] like Figure 23As shown, the first part is designed based on M equal to 24. The duration of this first part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. These two sets of ON-OFF level groups are identical, essentially repeating the first set of ON-OFF level groups to obtain the first part. The number of ON chips is 3, and the number of OFF chips is 9. It should be understood that the pattern of the first part satisfies the design principles introduced in Method 2.1 of the basic concepts section above.

[0338] It should be understood that the pattern in the first part is... Figure 23 In the case shown, the second OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 9, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 2, 6, 8, 12, 16, 24, 32}.

[0339] like Figure 24 As shown, the first part is designed based on M equal to 24. The duration of this first part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. These two sets of ON-OFF level groups are identical, essentially repeating the first set of ON-OFF level groups to obtain the first part. The number of ON chips is 4, and the number of OFF chips is 8. It should be understood that the pattern of the first part satisfies the design principles introduced in Method 2.1 of the basic concepts section above.

[0340] It should be understood that the pattern in the first part is... Figure 24 In the case shown, the second OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 8, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 2, 12, 16, 24, 32}.

[0341] like Figure 25 As shown, the first part is designed based on M equal to 24. The duration of this first part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. These two sets of ON-OFF level groups are identical, essentially repeating the first set of ON-OFF level groups to obtain the first part. The number of ON chips is 6, and the number of OFF chips is 6. It should be understood that the pattern of the first part satisfies the design principles introduced in Method 2.1 of the basic concepts section above.

[0342] It should be understood that the pattern in the first part is... Figure 25 In the case shown, the second OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 6, and the range of M values ​​corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 16, 24, 32}.

[0343] Example 5: The duration of the first part is the duration of one OFDM symbol. The first part includes a first high level, a first low level, a second high level, and a second low level in sequence, and the second low level is the first level mentioned above.

[0344] In the case shown in Example 5, the number of chips with the first high level, the number of chips with the first low level, the number of chips with the second high level, and the number of chips with the second low level satisfy at least one of the following:

[0345] The number of chips in the first high level is 6, the number of chips in the first low level is 6, the number of chips in the second high level is 3, and the number of chips in the second low level is 9; or,

[0346] The number of chips in the first high level is 8, the number of chips in the first low level is 8, the number of chips in the second high level is 2, and the number of chips in the second low level is 6; or,

[0347] The number of chips with the first high level is 6, the number of chips with the first low level is 6, the number of chips with the second high level is 4, and the number of chips with the second low level is 8; or,

[0348] The number of chips with the first high level is 4, the number of chips with the first low level is 4, the number of chips with the second high level is 4, and the number of chips with the second low level is 12; or,

[0349] The number of chips in the first high level is 3, the number of chips in the first low level is 3, the number of chips in the second high level is 6, and the number of chips in the second low level is 12; or,

[0350] The number of chips for the first high level is 2, the number of chips for the first low level is 2, the number of chips for the second high level is 5, and the number of chips for the second low level is 15.

[0351] For ease of understanding, combined with Figures 26 to 31 This section briefly describes the possible forms of the pattern in the first part of the example shown in Example 5.

[0352] like Figure 26 As shown, the first part is designed based on M equal to 24. The duration of this first part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the ON and OFF durations are the same, and the number of chips in each group is 6. In the other ON-OFF group, the OFF duration is three times the ON duration, the ON chip count is 3, and the OFF chip count is 9. It should be understood that the pattern of the first part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0353] It should be understood that the pattern in the first part is... Figure 26 In the case shown, the second OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 9, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 2, 6, 8, 12, 16, 24, 32}.

[0354] like Figure 27 As shown, the first part is designed based on M equal to 24. The duration of this first part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the duration of ON and OFF is the same, and the number of chips in each group is 8. In the other ON-OFF group, the duration of OFF is three times the duration of ON, the number of chips in ON is 2, and the number of chips in OFF is 6. It should be understood that the pattern of the first part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0355] It should be understood that the pattern in the first part is... Figure 27 In the case shown, the second OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 6, and the range of M values ​​corresponding to the second part and / or data signal can be the entire set or a subset of the set {1, 2, 16, 24, 32}.

[0356] like Figure 28 As shown, the first part is designed based on M equal to 24. The duration of this first part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the ON and OFF durations are the same, and the number of chips in each group is 6. In the other ON-OFF group, the OFF duration is twice the ON duration, the number of chips in the ON group is 4, and the number of chips in the OFF group is 8. It should be understood that the pattern of the first part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0357] It should be understood that the pattern in the first part is... Figure 28 In the case shown, the second OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 8, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 2, 12, 16, 24, 32}.

[0358] like Figure 29As shown, the first part is designed based on M equal to 24. The duration of this first part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the duration of ON and OFF is the same, and the number of chips in each group is 4. In the other ON-OFF group, the duration of OFF is three times the duration of ON, the number of chips in ON is 4, and the number of chips in OFF is 12. It should be understood that the pattern of the first part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0359] It should be understood that the pattern in the first part is... Figure 28 In the case shown, the second OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 12, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 6, 8, 12, 16, 24, 32}.

[0360] like Figure 30 As shown, the first part is designed based on M equal to 24. The duration of this first part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the duration of ON and OFF is the same, and the number of chips in each group is 3. In the other ON-OFF group, the duration of OFF is twice the duration of ON, the number of chips for ON is 6, and the number of chips for OFF is 12. It should be understood that the pattern of the first part satisfies the design principles introduced in Method 2.4 of the basic concepts section above.

[0361] It should be understood that the pattern in the first part is... Figure 30 In the case shown, the second OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 12, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 6, 8, 12, 16, 24, 32}.

[0362] like Figure 31 As shown, the first part is designed based on M equal to 24. The duration of this first part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the duration of ON and OFF is the same, and the number of chips in each group is 2. In the other ON-OFF group, the duration of OFF is three times the duration of ON, the number of chips for ON is 5, and the number of chips for OFF is 15. It should be understood that the pattern of the first part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0363] It should be understood that the pattern in the first part is... Figure 31In the case shown, the second OFF in the first part is the first level mentioned above, that is, the number of chips of the first level is 15, and the value range of M corresponding to the second part and / or data signal can be the whole set or a subset of the set {1, 6, 8, 12, 16, 24, 32}.

[0364] Furthermore, after the first communication device generates the first signal, it can send a signal carrying the first signal and a data signal to the second communication device. Figure 13 The method flow shown also includes:

[0365] S1320, the first communication device sends a first signal and a data signal to the second communication device, and correspondingly, the second communication device receives the first signal and the data signal from the first communication device.

[0366] For example, the time domain position of the first signal precedes the time domain position of the data signal; or, in the time domain, the first signal precedes the data signal; or, in the time domain, the data signal follows the first signal.

[0367] It should be understood that this application does not limit the manner in which the first communication device sends the first signal and data signal to the second communication device. For details, please refer to the description of the reader to device (R2D) timing acquisition single (TAS) signal sent by the reader to the tag in the current related technical solutions.

[0368] For example, as can be seen from the above description of the first part and the second part of the first signal, the first part is used to determine the start time of data signal transmission, and the second part is used to determine the chip duration of the data signal. Therefore, after the second communication device receives the first signal and the data signal, it can perform the following step S1330:

[0369] S1330, the second communication device determines the start time of data signal transmission and the chip duration of the data signal based on the first signal.

[0370] For example, the second communication device determines the start time of data signal transmission based on a first portion of the first signal and determines the chip duration of the data signal based on a second portion of the first signal.

[0371] It should be understood that this application mainly relates to the design of the first part of the drawing, and does not impose any restrictions on how the second communication device uses the first part and / or the second part. You can refer to the descriptions in the current relevant technical solutions regarding the tag determining the start time of data signal transmission based on SIP in TAS, and the descriptions of the tag determining the chip duration of data signal based on CAP in TAS. These will not be described in detail here.

[0372] Figure 13 In the communication method shown, the first communication device designs the first part of the first signal based on M equal to 24, such that the duration of one chip in the first part is The duration of one OFDM symbol. The number of chips in the first level of the first part can be any one of 6, 8, 9, 12, 15, 16, or 18, and the duration of one chip in the second part and / or the data signal is... The duration of each OFDM symbol, M, takes values ​​from a first set, which includes one or more of the following elements: 1, 2, 4, 6, 8, 12, 16, 24, and 32. That is, when the number of chips in the first level is any one of 6, 8, 9, 12, 15, 16, or 18, the value of M corresponding to the second part and / or the data signal can be any element in the first set. The elements in the first set can have multiple possible forms, satisfying that the duration of the first level is not equal to the duration of any level value in the second part that is the same as the first level when designing the second part based on the elements in the first set of M; and / or, satisfying that the duration of the first level is not equal to the duration of any level value in the data signal that is the same as the first level when designing the data signal based on the elements in the first set of M.

[0373] This design ensures that the duration of the first level in the first part is different from the duration of the same level in other signals (such as the second part of the first signal, data signals, etc.). This distinguishes the first part from other signals and improves the transmission performance of downlink signals.

[0374] As can be seen from the above, Figure 13 In the communication method shown, the duration of the first level in the first part is designed to distinguish the first part from subsequent signals (e.g., the second part, data signals, etc.). This application also provides a communication method that designs the SIP pattern to differentiate the SIP from the patterns of subsequent CAP and PRDCH signals. For ease of understanding, the following describes this in conjunction with... Figure 32 This communication method is described in detail.

[0375] Figure 32 This is a schematic flowchart illustrating a communication method provided in this application. It includes the following steps:

[0376] S3210, the first communication device generates the second signal.

[0377] For example, the second signal in this application is similar to the first signal defined above, only the pattern may be different. For example, the second signal may be called a timing acquisition single (TAS), a clock signal, or a clock capture signal, etc. The name of the second signal is not limited in this application, as long as it can achieve the corresponding function.

[0378] Specifically, the second signal includes a third part and a fourth part. The third part indicates the start time of data signal transmission, and the fourth part indicates the chip duration corresponding to the data signal. (This is in accordance with the above...) Figure 13 Distinguishing data signals within the data, Figure 32 In the communication method shown, the data signal is denoted as "second data signal".

[0379] The third part described above, used to determine the start time of the second data signal transmission, can also be described as follows: the third part is used to indicate the start time of the second data signal transmission, or the third part is associated with the start time of the second data signal transmission, etc. Similarly, the fourth part, used to determine the chip duration of the second data signal, can also be described as follows: the fourth part is used to indicate the chip duration of the second data signal, or the fourth part is associated with the chip duration of the second data signal, etc.

[0380] Furthermore, the third part of the second signal can be called SIP or signal #3, etc., and the fourth part of the second signal can be called CAP or signal #4, etc. The second data signal can also be called a downlink signal, PRDCH signal, etc. It should be understood that the name of the signal is not limited in this application, as long as it can achieve the corresponding function.

[0381] In this application, the third part is designed based on M equal to 24, where M represents the number of chips included in an OFDM symbol. Designing the third part based on M equal to 24 can be understood as follows: the duration of one chip in the third part is... Duration of each OFDM symbol.

[0382] One of the chip durations in the third part mentioned above is The duration of an OFDM symbol can also be described as follows: the M corresponding to the third part is equal to 24, where M represents the number of chips included in an OFDM symbol; or, it can also be described as follows: the third part is associated with M equal to 24, where M represents the number of chips included in an OFDM symbol, etc.

[0383] In this application, the fourth part and / or the second data signal are designed based on the range of values ​​of M as the second set. The second set includes one or more of the following elements: 1, 2, 4, 6, 8, 12, 16, 24, and 32. The elements included in the second set are merely examples and do not constitute any limitation on the scope of protection of this application. The second set may also include other elements; for example, the second set may also include 64.

[0384] The above design of the fourth part and / or the second data signal based on the range of values ​​for M as the second set can be understood as follows: the chip duration of one chip in the fourth part and / or the second data signal is... The duration of each OFDM symbol, M, takes values ​​within the second set. The duration of one chip in the fourth part and / or the second data signal is... The duration of each OFDM symbol, with M taking values ​​from the second set, can also be described as: the range of M values ​​corresponding to the fourth part and / or the second data signal is the second set; or, it can also be described as: the fourth part and / or the second data signal is associated with the range of M values ​​from the second set, etc.

[0385] Optionally, designing the fourth part and / or the second data signal based on the range of M values ​​for the second set can be: designing the fourth part based on the range of M values ​​for the second set #1, and / or designing the second data signal based on the range of M values ​​for the second set #2, wherein the second set #1 and the second set #2 can be the same or different. In other words, the M value corresponding to the fourth part can be the same as or different from the M value corresponding to the second data signal.

[0386] The pattern of the third part in this application satisfies the following conditions: the pattern of the third part satisfies the rules shown in Method 2.4 of the basic concepts above, and the pattern of the third part is different from the patterns of other signals (e.g., the fourth part of the second signal, the second data signal, etc.).

[0387] To facilitate understanding, the following examples illustrate the possible forms of the drawings in Part III of this application:

[0388] Example 6: The duration of Part 3 is The duration of each OFDM symbol is divided into three parts: the third high level, the third low level, the fourth high level, and the fourth low level.

[0389] In the case shown in Example 6, the number of chips with the third high level, the number of chips with the third low level, the number of chips with the fourth high level, and the number of chips with the fourth low level satisfy at least one of the following:

[0390] The number of chips for the third high level is 2, the number of chips for the third low level is 2, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 6 (e.g., ...). Figure 17 );or,

[0391] The number of chips for the third high level is 3, the number of chips for the third low level is 3, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 4.

[0392] For ease of understanding, combined with Figure 33 and the above Figure 17 This section briefly describes the possible forms of the pattern in the third part of the example shown in Example Six.

[0393] like Figure 17 As shown, the third part is designed based on M equaling 24, and the duration of this third part is... The duration of each OFDM symbol, and this third part includes two sets of ON-OFF level groups. In one ON-OFF group, the duration of ON and OFF is the same, and the number of chips in each group is 2. In the other ON-OFF group, the duration of OFF is three times the duration of ON, the number of chips for ON is 2, and the number of chips for OFF is 6. It should be understood that the pattern of the third part satisfies the design principles introduced in mode 2.4 of the basic concepts above.

[0394] It should be understood that the pattern in Part Three is... Figure 17 In the case shown, the range of values ​​for M corresponding to the fourth part and / or the second data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0395] like Figure 33 As shown, the third part is designed based on M equaling 24, and the duration of this third part is... The duration of each OFDM symbol, and this third part includes two sets of ON-OFF level groups. In one ON-OFF group, the duration of ON and OFF is the same, and the number of chips in each group is 3. In the other ON-OFF group, the duration of OFF is twice the duration of ON, the number of chips for ON is 2, and the number of chips for OFF is 4. It should be understood that the pattern of the third part satisfies the design principles introduced in mode 2.4 of the basic concepts above.

[0396] It should be understood that the pattern in Part Three is... Figure 33 In the case shown, the range of values ​​for M corresponding to the fourth part and / or the second data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0397] Example 7: The duration of the third part is the duration of one OFDM symbol. The third part consists of the third high level, the third low level, the fourth high level, and the fourth low level in sequence.

[0398] In the case shown in Example 6, the number of chips with the third high level, the number of chips with the third low level, the number of chips with the fourth high level, and the number of chips with the fourth low level satisfy at least one of the following:

[0399] The number of chips for the third high level is 6, the number of chips for the third low level is 6, the number of chips for the fourth high level is 3, and the number of chips for the fourth low level is 9 (e.g., ...). Figure 26 );or,

[0400] The number of chips for the third high level is 8, the number of chips for the third low level is 8, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 6 (e.g., ...). Figure 27 );or,

[0401] The number of chips for the third high level is 6, the number of chips for the third low level is 6, the number of chips for the fourth high level is 4, and the number of chips for the fourth low level is 8 (e.g., ...). Figure 28 );or,

[0402] The number of chips for the third high level is 4, the number of chips for the third low level is 4, the number of chips for the fourth high level is 4, and the number of chips for the fourth low level is 12 (e.g., ...). Figure 29 );or,

[0403] The number of chips for the third high level is 3, the number of chips for the third low level is 3, the number of chips for the fourth high level is 6, and the number of chips for the fourth low level is 12 (e.g., ...). Figure 30 );or,

[0404] The number of chips for the third high level is 2, the number of chips for the third low level is 2, the number of chips for the fourth high level is 5, and the number of chips for the fourth low level is 15 (e.g., ...). Figure 31 );or,

[0405] The number of chips for the third high level is 9, the number of chips for the third low level is 9, the number of chips for the fourth high level is 2, and the number of chips for the fourth low level is 4.

[0406] For ease of understanding, combined with Figure 34 and the above Figures 26 to 31 This section briefly introduces the possible forms of the pattern in the third part, as shown in Example 7.

[0407] like Figure 26 As shown, the third part is designed based on M equal to 24. The duration of this third part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the ON and OFF durations are the same, and the number of chips in each group is 6. In the other ON-OFF group, the OFF duration is three times the ON duration, the number of chips in the ON group is 3, and the number of chips in the OFF group is 9. It should be understood that the pattern of the third part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0408] It should be understood that the pattern in Part Three is... Figure 26 In the case shown, the range of values ​​for M corresponding to the fourth part and / or the second data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0409] like Figure 27 As shown, the third part is designed based on M equal to 24. The duration of this third part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the ON and OFF durations are the same, and the number of chips in each group is 8. In the other ON-OFF group, the OFF duration is three times the ON duration, the ON chip count is 2, and the OFF chip count is 6. It should be understood that the pattern of the third part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0410] It should be understood that the pattern in Part Three is... Figure 27 In the case shown, the range of values ​​for M corresponding to the fourth part and / or the second data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0411] like Figure 28 As shown, the third part is designed based on M equal to 24. The duration of this third part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the ON and OFF durations are the same, and the number of chips in each group is 6. In the other ON-OFF group, the OFF duration is twice the ON duration, the number of chips in the ON group is 4, and the number of chips in the OFF group is 8. It should be understood that the pattern of the third part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0412] It should be understood that the pattern in Part Three is... Figure 28 In the case shown, the range of values ​​for M corresponding to the fourth part and / or the second data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0413] like Figure 29As shown, the third part is designed based on M equal to 24. The duration of this third part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the duration of ON and OFF is the same, and the number of chips in each group is 4. In the other ON-OFF group, the duration of OFF is three times the duration of ON, the number of chips for ON is 4, and the number of chips for OFF is 12. It should be understood that the pattern of the third part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0414] It should be understood that the pattern in Part Three is... Figure 29 In the case shown, the range of values ​​for M corresponding to the fourth part and / or the second data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0415] like Figure 30 As shown, the third part is designed based on M equal to 24. The duration of this third part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the duration of ON and OFF is the same, and the number of chips in each group is 3. In the other ON-OFF group, the duration of OFF is twice the duration of ON, the number of chips for ON is 6, and the number of chips for OFF is 12. It should be understood that the pattern of the third part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0416] It should be understood that the pattern in Part Three is... Figure 30 In the case shown, the range of values ​​for M corresponding to the fourth part and / or the second data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0417] like Figure 31 As shown, the third part is designed based on M equal to 24. The duration of this third part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the ON and OFF durations are the same, and the number of chips in each group is 2. In the other ON-OFF group, the OFF duration is three times the ON duration, the number of chips in the ON group is 5, and the number of chips in the OFF group is 15. It should be understood that the pattern of the third part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0418] It should be understood that the pattern in Part Three is... Figure 31 In the case shown, the range of values ​​for M corresponding to the fourth part and / or the second data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0419] like Figure 34As shown, the third part is designed based on M equal to 24. The duration of this third part is the duration of one OFDM symbol, and it includes two sets of ON-OFF level groups. In one ON-OFF group, the ON and OFF durations are the same, and the number of chips in each group is 9. In the other ON-OFF group, the OFF duration is twice the ON duration, the number of chips in the ON group is 2, and the number of chips in the OFF group is 4. It should be understood that the pattern of the third part satisfies the design principles introduced in mode 2.4 of the basic concepts section above.

[0420] It should be understood that the pattern in Part Three is... Figure 34 In the case shown, the range of values ​​for M corresponding to the fourth part and / or the second data signal can be the entire set or a subset of the set {1, 2, 4, 6, 8, 12, 16, 24, 32}.

[0421] Furthermore, after the first communication device generates the second signal, it can send a signal carrying the second signal and the second data signal to the second communication device. Figure 32 The method flow shown also includes:

[0422] S3220, the first communication device sends a second signal and a second data signal to the second communication device, and correspondingly, the second communication device receives the second signal and the second data signal from the first communication device.

[0423] For example, the time domain position of the second signal is before the time domain position of the second data signal; or, in the time domain, the second signal is earlier than the second data signal; or, in the time domain, the second data signal is after the second signal.

[0424] It should be understood that this application does not limit the manner in which the first communication device sends the second signal and the second data signal to the second communication device. For details, please refer to the description of the reader to device (R2D) timing acquisition single (TAS) signal sent by the reader to the tag in the current related technical solutions.

[0425] For example, as can be seen from the above description of the third and fourth parts of the second signal, the third part is used to determine the start time of the second data signal transmission, and the fourth part is used to determine the chip duration of the second data signal. Therefore, after the second communication device receives the second signal and the second data signal, it can perform the following step S3230:

[0426] S3230, the second communication device determines the start time of the second data signal transmission and the chip duration of the second data signal based on the second signal.

[0427] For example, the second communication device determines the start time of the transmission of the second data signal based on the third part of the second signal, and determines the chip duration of the second data signal based on the fourth part of the second signal.

[0428] It should be understood that this application mainly relates to the design of the third part of the drawings. No restrictions are placed on how the second communication device uses the third part and / or the fourth part. You can refer to the descriptions in the current related technical solutions regarding the tag determining the start time of the second data signal transmission based on SIP in TAS, and the descriptions of the tag determining the chip duration of the second data signal based on CAP in TAS. These will not be described in detail here.

[0429] Figure 32 In the communication method shown, the first communication device designs the third part of the second signal based on M equal to 24, such that the duration of one chip in the third part is... The duration of each OFDM symbol, and the duration of one chip in the fourth part and / or the second data signal are... The duration of each OFDM symbol, M, takes values ​​from a second set, where elements include one or more of 1, 2, 4, 6, 8, 12, 16, 24, and 32. The pattern design of this third part can be one of the aforementioned possible forms. This pattern design allows the pattern of the third part to differ from the patterns of other signals (e.g., the fourth part of the second signal, the second data signal, etc.). Therefore, even when the M value corresponding to the fourth part and / or the second data signal is any element from the second set, the third part can be distinguished from other signals (e.g., the fourth part of the second signal, the second data signal, etc.), improving the transmission performance of the downlink signal.

[0430] It should be understood that the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0431] It should also be understood that, unless otherwise specified or logically conflicting, the terminology and / or descriptions in the various embodiments of this application are consistent and can be referenced interchangeably. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships. For example, the above... Figure 13 and Figure 32In the communication method shown, the first part is designed based on M equal to 24. The pattern of the first part can be any of the patterns shown above. If the first part is designed based on a multiple of M equal to 24 or a divisor of M equal to 24, the pattern of the first part can be an equal multiple of the pattern shown above, either enlarged or reduced by an equal multiple. Furthermore, during the enlargement or reduction process, the pattern of the first part satisfies the rules of methods 1 and 2 in the basic concepts. For example, when the first part is designed based on M equal to 12, the number of ONs in the pattern of the first part can be half the number of ONs when the first part is designed based on M equal to 24; similarly, the number of OFFs in the pattern of the first part can be half the number of OFFs when the first part is designed based on M equal to 24; and again, when the first part is designed based on M equal to 6, the number of ONs in the pattern of the first part can be half the number of ONs when the first part is designed based on M equal to 24. Similarly, the number of OFFs in the first part of the drawing can be the number of OFFs when designing the first part based on M equal to 24. And so on, I will not give examples of them all here.

[0432] It should also be understood that in some of the above embodiments, the examples are mainly based on devices in existing network architectures (such as the first communication device, the second communication device, etc.). It should be understood that the specific form of the device is not limited in the embodiments of this application. For example, any device that can achieve the same function in the future is applicable to the embodiments of this application.

[0433] It is understood that in the above-described method embodiments, the methods and operations implemented by the device (such as the first communication device, the second communication device, etc.) can also be implemented by the device's components (such as chips or circuits).

[0434] The above, combined with Figure 13 The communication method provided in the embodiments of this application is described in detail. The above-described communication method is mainly introduced from the perspective of the interaction between, for example, a first communication device and a second communication device. It is understood that, in order to achieve the above functions, the first communication device and the second communication device include hardware structures and / or software modules corresponding to the execution of each function.

[0435] Those skilled in the art will recognize that, based on the units and algorithm steps described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is implemented in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0436] The following combination Figures 35 to 37The communication device provided in this application is described in detail. It should be understood that the description of the device embodiments corresponds to the description of the method embodiments. Therefore, for details not described in detail, please refer to the method embodiments above; for brevity, some details are omitted.

[0437] This application embodiment can divide the transmitting or receiving device into functional modules according to the above method examples. For example, each function can be divided into its own functional modules, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods. The following description uses the division of functional modules according to each function as an example.

[0438] Figure 35 This is a schematic block diagram of a communication device 10 provided in an embodiment of this application. The device 10 includes a transceiver module 11 and a processing module 12. The transceiver module 11 can implement corresponding communication functions, and the processing module 12 is used for data processing. In other words, the transceiver module 11 is used to perform operations related to receiving and sending, while the processing module 12 is used to perform other operations besides receiving and sending. The transceiver module 11 can also be referred to as a communication interface or a communication unit.

[0439] In one possible implementation, the device 10 may further include a storage module 13, which can be used to store instructions and / or data. The processing module 12 can read the instructions and / or data in the storage module to enable the device to perform the actions of the device in the aforementioned method embodiments.

[0440] In one design, the device 10 may correspond to the first communication device in the above method embodiments, or to a component of the first communication device (such as a chip).

[0441] The device 10 can implement the steps or processes corresponding to those performed by the first communication device in the above method embodiments. The transceiver module 11 can be used to perform the transceiver-related operations of the first communication device in the above method embodiments, and the processing module 12 can be used to perform the processing-related operations of the first communication device in the above method embodiments.

[0442] In one possible implementation, processing module 12 is used to generate a first signal. Transceiver module 11 transmits the first signal and a data signal to the second communication device.

[0443] The description of the first signal can be found above. Figure 13The descriptions of the communication method embodiments shown are not repeated here. Additionally, descriptions related to data signals can be found above. Figure 13 The descriptions of the communication method embodiments shown are not repeated here.

[0444] In another possible implementation, processing module 12 is used to generate a second signal. Transceiver module 11 transmits the second signal and the second data signal to a second communication device.

[0445] The description of the second signal can be found above. Figure 32 The descriptions of the communication method embodiments shown are not repeated here. Additionally, the descriptions related to the second data signal can also be found above. Figure 32 The descriptions of the communication method embodiments shown are not repeated here.

[0446] When the device 10 is used to perform Figure 13 When the method is in use, the transceiver module 11 can be used to execute the steps of sending and receiving information in the method, such as step S1320; the processing module 12 can be used to execute the processing steps in the method, such as step S1310.

[0447] When the device 10 is used to perform Figure 32 When the method is in use, the transceiver module 11 can be used to execute the steps of sending and receiving information in the method, such as step S3220; the processing module 12 can be used to execute the processing steps in the method, such as step S3210.

[0448] It should be understood that the specific process of each unit performing the above-mentioned corresponding steps has been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0449] In another design, the device 10 may correspond to the second communication device in the above method embodiment, or to a component of the second communication device (such as a chip).

[0450] The device 10 can implement the steps or processes corresponding to those performed by the second communication device in the above method embodiments. The transceiver module 11 can be used to perform transceiver-related operations of the second communication device in the above method embodiments, and the processing module 12 can be used to perform processing-related operations of the second communication device in the above method embodiments.

[0451] In one possible implementation, transceiver module 11 receives a first signal and a data signal from a first communication device. Processing module 12 is used to determine the start time of data signal transmission and the chip duration of the data signal based on the first signal.

[0452] In another possible implementation, the transceiver module 11 receives a second signal and a second data signal from the first communication device. The processing module 12 is used to determine the start time of the transmission of the second data signal and the chip duration of the second data signal based on the second signal.

[0453] When the device 10 is used to perform Figure 13 When the method is in use, the transceiver module 11 can be used to execute the steps of sending and receiving information in the method, such as step S1320; the processing module 12 can be used to execute the processing steps in the method, such as step S1330.

[0454] When the device 10 is used to perform Figure 32 When the method is in use, the transceiver module 11 can be used to execute the steps of sending and receiving information in the method, such as step S3220; the processing module 12 can be used to execute the processing steps in the method, such as step S3230.

[0455] It should be understood that the specific process of each unit performing the above-mentioned corresponding steps has been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0456] It should also be understood that the device 10 here is embodied in the form of a functional module. The term "module" here can refer to an application-specific integrated circuit (ASIC), electronic circuitry, a processor (e.g., a shared processor, a proprietary processor, or a group processor, etc.) and memory for executing one or more software or firmware programs, integrated logic circuitry, and / or other suitable components supporting the described functions. In an alternative example, those skilled in the art will understand that device 10 may specifically be a first communication device in the above embodiments, used to execute the various processes and / or steps corresponding to the first communication device in the above method embodiments; or, device 10 may specifically be a second communication device in the above embodiments, used to execute the various processes and / or steps corresponding to the second communication device in the above method embodiments. To avoid repetition, further details are omitted here.

[0457] The apparatus 10 of each of the above-described schemes has the function of implementing the corresponding steps performed by the devices (such as the first communication device, the second communication device, etc.) in the above-described methods. This function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above-described functions; for example, the transceiver module can be replaced by a transceiver (for example, the transmitting unit in the transceiver module can be replaced by a transmitter, and the receiving unit in the transceiver module can be replaced by a receiver), and other units, such as processing modules, can be replaced by processors, which respectively execute the transceiver operations and related processing operations in each method embodiment.

[0458] In addition, the transceiver module 11 can also be a transceiver circuit (for example, it may include a receiving circuit and a transmitting circuit), and the processing module can be a processing circuit.

[0459] Figure 36 This is a schematic diagram of another communication device 20 provided in an embodiment of this application. The device 20 includes a processor 21, which is used to execute computer programs or instructions stored in a memory 22, or to read data / signaling stored in the memory 22, to perform the methods in the above-described method embodiments. In one possible implementation, the processor 21 may be one or more.

[0460] One possible implementation, such as Figure 36 As shown, the device 20 also includes a memory 22 for storing computer programs or instructions and / or data. The memory 22 may be integrated with the processor 21 or it may be disposed separately. In one possible implementation, there may be one or more memories 22.

[0461] One possible implementation, such as Figure 36 As shown, the device 20 also includes a transceiver 23 for receiving and / or transmitting signals. For example, the processor 21 controls the transceiver 23 to receive and / or transmit signals.

[0462] As one approach, the device 20 is used to implement the operations performed by the first communication device and the second communication device in the various method embodiments described above.

[0463] It should be understood that the processor mentioned in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0464] It should also be understood that the memory mentioned in the embodiments of this application can be volatile memory and / or non-volatile memory. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM). For example, RAM can be used as an external cache. By way of example and not limitation, RAM includes the following forms: static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0465] It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA, or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, the memory (storage module) can be integrated into the processor.

[0466] It should also be noted that the memory described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0467] Figure 37 This is a schematic diagram of a chip system 30 provided in an embodiment of this application. The chip system 30 (or processing system) includes logic circuitry 31 and an input / output interface 32.

[0468] The logic circuit 31 can be a processing circuit in the chip system 30. The logic circuit 31 can be coupled to a memory unit, calling instructions from the memory unit, enabling the chip system 30 to implement the methods and functions of the embodiments of this application. The input / output interface 32 can be an input / output circuit in the chip system 30, outputting processed information from the chip system 30, or inputting data or signaling information to be processed into the chip system 30 for processing.

[0469] As one option, the chip system 30 is used to implement the operations performed by the first communication device or the second communication device in the various method embodiments described above.

[0470] For example, logic circuit 31 is used to implement processing-related operations performed by the first communication device or the second communication device in the above method embodiments; input / output interface 32 is used to implement sending and / or receiving-related operations performed by the first communication device or the second communication device in the above method embodiments.

[0471] This application also provides a computer-readable storage medium storing computer instructions for implementing the methods executed by the first communication device or the second communication device in the above-described method embodiments.

[0472] For example, when the computer program is executed by a computer, it enables the computer to implement the methods executed by the first communication device or the second communication device in the various embodiments of the above methods.

[0473] This application also provides a computer program product comprising instructions which, when executed by a computer, implement the methods performed by the first communication device or the second communication device in the above-described method embodiments.

[0474] This application also provides a communication system, including the aforementioned first communication device and second communication device.

[0475] The explanations and beneficial effects of the relevant contents in any of the devices provided above can be found in the corresponding method embodiments provided above, and will not be repeated here.

[0476] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0477] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0478] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0479] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0480] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0481] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to related technologies, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0482] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A communication method, characterized in that, Applied to a first communication device, the method includes: A first signal is generated, the first signal comprising a first part and a second part, the first part being used to determine the start time of data signal transmission, and the second part being used to determine the chip duration of the data signal; The first signal and the data signal are transmitted, wherein the time domain position of the first signal precedes the time domain position of the data signal. In the first part, one chip duration is The duration of each Orthogonal Frequency Division Multiplexing (OFDM) symbol, wherein the first part includes a first level, and the number of chips of the first level is any one of the following: 6, 8, 9, 12, 15, 16, or 18 The second part and / or one chip duration of the data signal is The duration of an OFDM symbol, wherein M takes values ​​from a first set, the first set including one or more of the following elements: 1, 2, 4, 6, 8, 12, 16, 24 and 32.

2. A communication method, characterized in that, Applied to a second communication device, the method includes: Receive a first signal and a data signal, wherein the time domain position of the first signal is before the time domain position of the data signal, and the first signal includes a first part and a second part, wherein the first part is used to determine the start time of the data signal transmission, and the second part is used to determine the chip duration of the data signal; The start time of the data signal transmission and the chip duration of the data signal are determined based on the first signal. In the first part, one chip duration is The duration of an OFDM symbol, the first part including a first level, the number of chips of the first level being any of the following: 6, 8, 9, 12, 15, 16, or 18 The second part and / or one chip duration of the data signal is The duration of an OFDM symbol, wherein M takes values ​​from a first set, the first set including one or more of the following elements: 1, 2, 4, 6, 8, 12, 16, 24 and 32.

3. The method according to claim 1 or 2, characterized in that, The number of chips in the first level is any one of 6, 8, 9, 12, 15, 16, or 18, and the duration of one chip in the second part and / or the data signal is [missing information]. The duration of each OFDM symbol, wherein M takes values ​​from the first set, and the elements in the first set include one or more of 1, 2, 4, 6, 8, 12, 16, 24, and 32, including: The number of chips in the first level is 9, 16, or 18, and the elements in the first set include one or more of 1, 2, 4, 6, 8, 12, 16, 24, and 32; or, The first level has 6 chips, and the elements in the first set include one or more of 1, 2, 16, 24, and 32; or, The first level has 8 chips, and the elements in the first set include one or more of 1, 2, 12, 16, 24, and 32; or, The number of chips in the first level is 12 or 15, and the elements in the first set include one or more of 1, 6, 8, 12, 16, 24 and 32.

4. The method according to any one of claims 1 to 3, characterized in that, The first level is a low level in the first part.

5. The method according to any one of claims 1 to 4, characterized in that, The first level is the last level of the first part.

6. The method according to any one of claims 1 to 5, characterized in that, The duration of the first part is Given the duration of one OFDM symbol, and considering that the first part sequentially includes a first high level and a first low level, the number of chips with the first high level and the number of chips with the first low level satisfy at least one of the following: The number of chips in the first high level is 3, and the number of chips in the first low level is 9; or, The number of chips in the first high level is 6, and the number of chips in the first low level is 6; or, The number of chips for the first high level is 4, and the number of chips for the first low level is 8. Wherein, the first low level is the first level.

7. The method according to any one of claims 1 to 5, characterized in that, The duration of the first part is The duration of each OFDM symbol, and the first part sequentially including a first high level, a first low level, a second high level, and a second low level, The number of chips with the first high level is 2, the number of chips with the first low level is 2, the number of chips with the first high level is 2, and the number of chips with the first low level is 6. Wherein, the second low level is the first level.

8. The method according to any one of claims 1 to 5, characterized in that, When the duration of the first part is the duration of one OFDM symbol, and the first part sequentially includes a first high level and a first low level, the number of chips of the first high level and the number of chips of the first low level satisfy at least one of the following: The number of chips for the first high level is 8, and the number of chips for the first low level is 16; or, The number of chips for the first high level is 6, and the number of chips for the first low level is 18; or, The number of chips in the first high level is 12, and the number of chips in the first low level is 12; or, The number of chips in the first high level is 18, and the number of chips in the first low level is 6; or, The number of chips for the first high level is 16, and the number of chips for the first low level is 8. Wherein, the first low level is the first level.

9. The method according to any one of claims 1 to 5, characterized in that, When the duration of the first part is one OFDM symbol, and the first part sequentially includes a first high level, a first low level, a first high level, and a first low level, the number of chips of the first high level and the number of chips of the first low level satisfy at least one of the following: The number of chips in the first high level is 3, and the number of chips in the first low level is 9; or, The number of chips in the first high level is 6, and the number of chips in the first low level is 6; or, The number of chips for the first high level is 4, and the number of chips for the first low level is 8. Wherein, the second first low level is the first level.

10. The method according to any one of claims 1 to 5, characterized in that, When the duration of the first part is the duration of one OFDM symbol, and the first part sequentially includes a first high level, a first low level, a second high level, and a second low level, the number of chips with the first high level, the number of chips with the first low level, the number of chips with the second high level, and the number of chips with the second low level satisfy at least one of the following: The number of chips in the first high level is 6, the number of chips in the first low level is 6, the number of chips in the second high level is 3, and the number of chips in the second low level is 9; or, The number of chips in the first high level is 8, the number of chips in the first low level is 8, the number of chips in the second high level is 2, and the number of chips in the second low level is 6; or, The number of chips with the first high level is 6, the number of chips with the first low level is 6, the number of chips with the second high level is 4, and the number of chips with the second low level is 8; or, The number of chips with the first high level is 4, the number of chips with the first low level is 4, the number of chips with the second high level is 4, and the number of chips with the second low level is 12; or, The number of chips in the first high level is 3, the number of chips in the first low level is 3, the number of chips in the second high level is 6, and the number of chips in the second low level is 12; or, The number of chips for the first high level is 2, the number of chips for the first low level is 2, the number of chips for the second high level is 5, and the number of chips for the second low level is 15. Wherein, the second low level is the first level.

11. A communication device, characterized in that, include: A processor for executing a computer program stored in a memory to cause the communication device to perform the method as described in any one of claims 1 to 10.

12. A communication device, characterized in that, include: A processor for executing a computer program stored in a memory to cause the communication device to perform the method as described in any one of claims 2 to 10.

13. A communication system, characterized in that, Including a first communication device and a second communication device, Wherein, the first communication device is used to perform the method as described in any one of claims 1 or 3 to 10, and the second communication device is used to perform the method as described in any one of claims 2 to 10.

14. A computer-readable storage medium having a computer program or instructions stored thereon, characterized in that, When the computer program or instructions are executed by a processor, the method described in any one of claims 1 to 10 is performed.

15. A computer program product containing instructions, characterized in that, When it is run on a computer, it causes the method as described in any one of claims 1 to 10 to be performed.

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