Circuit layout, adapter plate, probe card, probe system and related methods

Abstract

This invention provides a circuit layout, an adapter board, a probe card, a probe system, and related methods. The circuit layout is applicable to an adapter board for a probe card and includes a substrate, a first ground trace, a second ground trace, and a switching circuit. The first and second ground traces are disposed on the substrate. The switching circuit is electrically connected between the first and second ground traces and is used to selectively connect or disconnect the first and second ground traces. The trace paths of the first and second ground traces have partially or entirely two correspondingly extending portions on a first axis. The extension portions of the first and second ground traces are spaced on a second axis for electrical coupling, and the first axis is perpendicular to the second axis. This improves impedance matching.

Description

Technical Field

[0001] This invention relates to a circuit board layout technique, and more particularly to a circuit layout and routing method for an adapter board, a method for manufacturing an adapter board, the adapter board, probe cards and probe systems, and related methods. Background Technology

[0002] Probe cards are widely used in the electrical testing of semiconductor wafers, serving as the electrical connection interface between the tester and the device under test (DUT). In high-speed signal testing applications, to avoid interference between different test channels caused by internal noise on the ground (GND) path, the circuit design of probe cards typically separates different ground points (e.g., circuit board ground, DUT ground), thus forming multiple ground paths (GND).

[0003] It is worth noting that, due to the size of electronic components and assembly space constraints, traditional connection methods for components (such as additional wiring, using copper foil, or utilizing internal circuit board traces) can result in excessive distances between signal paths and ground paths, significantly increasing the length of the ground return path. This excessively long ground path can generate severe inductive effects during high-frequency transmission, leading to impedance mismatch and increased transmission path loss at high frequencies. Summary of the Invention

[0004] This invention provides a circuit layout and routing method for an adapter board, a method for manufacturing an adapter board, an adapter board, a probe card, and a probe system to improve impedance matching during signal transmission.

[0005] The circuit layout of this invention is applicable to the adapter board of a probe card. The circuit layout includes a substrate, a first ground trace, a second ground trace, and a switching circuit. The first ground trace and the second ground trace are disposed on the substrate. The switching circuit is electrically connected between the first ground trace and the second ground trace, and is used to selectively connect or disconnect the first ground trace and the second ground trace. The trace paths of the first ground trace and the second ground trace have partially or entirely two correspondingly extending portions on a first axis. The extended portions of the first ground trace and the extended portions of the second ground trace are spaced apart on a second axis, the spacing being used for electrical coupling, and the first axis is perpendicular to the second axis.

[0006] The routing method for an adapter board according to embodiments of the present invention is applicable to probe cards for signal transmission. The routing method includes: providing a substrate, a first ground trace, a second ground trace, and a switching circuit, wherein the first ground trace and the second ground trace are disposed on the substrate; and electrically coupling the first ground trace and the second ground trace through the switching circuit. The arrangement of the first ground trace and the second ground trace includes: the trace paths of the first ground trace and the second ground trace partially or entirely have two correspondingly extending portions on a first axis; the extended portions of the first ground trace and the extended portions of the second ground trace are spaced apart on a second axis, the spacing being used for electrical coupling, and the first axis being perpendicular to the second axis.

[0007] The method for manufacturing an adapter board according to embodiments of the present invention is applicable to probe cards for signal transmission. The method includes: providing a substrate and a switching circuit; determining a coupling path configuration; and forming a first ground trace and a second ground trace on the substrate according to the coupling path configuration. The switching circuit is electrically connected between the first ground trace and the second ground trace. The trace paths of the first ground trace and the second ground trace have, partially or entirely, two correspondingly extending portions on a first axis. The extended portions of the first ground trace and the extended portions of the second ground trace are spaced apart on a second axis for electrical coupling, and the first axis is perpendicular to the second axis.

[0008] The probe card of this invention includes an adapter board, a circuit board, a plurality of cantilever probes, and a support base. The tail ends of at least one of the cantilever probes are coaxially connected to the adapter board. The support base is disposed on the circuit board and is used to support the cantilever probes.

[0009] The probe system of this invention includes a support device, a testing machine, and a probe card. The support device supports the device under test. The testing machine has a test head. The probe card, as described above, is disposed on the test head.

[0010] Based on the above, the circuit layout and routing method for the adapter board, the method for manufacturing the adapter board, the adapter board, the probe card, and the probe system provide extensions of the first ground trace and the second ground trace that extend correspondingly to each other on a first axis and have a spacing for electrical coupling on a second axis perpendicular to the first axis. This layout allows for strong coupling between the first ground trace and the second ground trace at both ends of the switching circuit, effectively suppressing inductive effects on the grounding path and improving impedance matching, thereby enhancing the transmission performance of high-frequency signals. Attached Figure Description

[0011] The accompanying drawings are included to further illustrate the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0012] Figure 1 Component block diagram of a probe system according to an embodiment of the present invention;

[0013] Figure 2 This is a schematic diagram of the architecture of a probe card with an adapter board according to an embodiment of the present invention;

[0014] Figure 3 This is a schematic diagram of the circuit layout according to an embodiment of the present invention;

[0015] Figure 4 This is a schematic diagram of the transmission path and switching circuit according to an embodiment of the present invention;

[0016] Figure 5A This is a side view of the circuit layout according to an embodiment of the present invention;

[0017] Figure 5B yes Figure 5A Top view;

[0018] Figure 6A This is a top view of the circuit layout according to an embodiment of the present invention;

[0019] Figure 6B This is a top view of the circuit layout according to an embodiment of the present invention;

[0020] Figure 6C This is a top view of the circuit layout according to an embodiment of the present invention;

[0021] Figure 6D This is a top view of the circuit layout according to an embodiment of the present invention;

[0022] Figure 7A This is a side view of the circuit layout according to an embodiment of the present invention;

[0023] Figure 7B yes Figure 7A Top view;

[0024] Figure 8A This is a frequency diagram showing the return loss according to an embodiment of the present invention;

[0025] Figure 8B This is an insertion loss versus frequency plot according to an embodiment of the present invention;

[0026] Figure 9 A flowchart of the wiring setup method for the adapter board;

[0027] Figure 10 This is a flowchart of a method for manufacturing an adapter board according to an embodiment of the present invention. Detailed Implementation

[0028] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.

[0029] Figure 1 This is a block diagram of the probe system 1 according to an embodiment of the present invention. Please refer to... Figure 1 The probe system 1 can be used for electrical testing of the device under test 5 (e.g., semiconductor wafer, panel, or other device / component), but is not limited to this application. The probe system 1 includes (but is not limited to) a support device 10, a test machine 20, and a probe card 30.

[0030] The support device 10 may be, for example, a chuck or other device that provides a support surface. In one embodiment, the support device 10 is used to support and secure the device under test 5. For example, the support surface of the support device 10 is configured to support a wafer including the device under test 5.

[0031] The test machine 20 can be a hardware device or circuit, such as a computer, workstation, tablet computer, smartphone, server, wearable device, intelligent auxiliary device, central processing unit (CPU), microcontroller, programmable logic controller, application-specific integrated circuit (ASIC), chip, other components, or combinations of the above components. The test machine 20 can call and execute one or more program codes or computer-readable instructions from memory (not shown) to perform the electrical testing method for the device under test 5 in one or more embodiments of the present invention.

[0032] In one embodiment, the test machine 20 is an Automatic Test Equipment (ATE). The test machine 20 has a test head 21. The test head 21 can be used to mount or connect the probe card 30. In one embodiment, the test head 21 can serve as a connection interface between the probe card 30 and the main body of the test machine 20. In one embodiment, the test machine 20 is used to generate test signals and receive and analyze electrical signals returned by the device under test 5.

[0033] The probe card 30 is disposed on the test head 21 of the test machine 20. The probe card 30 may be a cantilever probe card, a vertical probe card, or other types of probe cards, and is not limited thereto. In one embodiment, the probe card 30 serves as an electrical connection interface between the test machine 20 and the device under test 5, and transmits the test signals generated by the test machine 20 to the device under test 5.

[0034] Figure 2 This is a schematic diagram of the probe card 30 with an adapter plate 31 according to an embodiment of the present invention. Please refer to... Figure 2 , Figure 2 It shows Figure 1 The probe card 30 has a cantilevered internal circuit architecture. The probe card 30 includes (but is not limited to) an adapter board 31, a circuit board 32, multiple cantilevered probes 33, and a support base 34.

[0035] The adapter board 31 may be, for example, a small circuit board or an interposer. In one embodiment, the adapter board 31 is used to transfer signals between the cantilever probe 33 and the circuit board 32, and can be configured with a circuit layout for switching ground paths. The circuit layout of the embodiment of the present invention is applied to this adapter board 31, and will be described in detail below with reference to the accompanying drawings.

[0036] 32-circuit board coupling tester (e.g.) Figure 1 The test machine 20). The circuit board 32 may be, for example, a printed circuit board (PCB). In one embodiment, the circuit board 32 is used to carry various electronic components and circuits on the probe card 30, and serves as a connection to the test machine ( Figure 1 The main connection interface of (20).

[0037] Multiple cantilever probes 33 are supported by a support base 34. The tail ends of one or more cantilever probes 33 are electrically connected to an adapter plate 31 via coaxial cables 331. The probe tips (needle tips) of the cantilever probes 33 are used to contact... Figure 1 5. Device to be tested.

[0038] A support base 34 is disposed on a circuit board 32. The support base 34 may be, for example, a probehead for a vertical probe or a holder for a cantilever probe. In one embodiment, the support base 34 is used to support and secure a cantilever probe 33.

[0039] It should be noted that, in cases such as Figure 2 In the cantilever design shown, the structure of the cantilever probe 33 is that its probe body extends from the edge of the support base 34 (e.g., the probe head) toward the center and is suspended above the device under test 5. Figure 1Above. Thus, when the probe card 30 contacts the device under test 5, the tip of the cantilever probe 33 has elastic space to ensure stable electrical contact. However, the probe card 30 is not limited to a cantilever design, nor is it limited to connecting the adapter plate 31 to the coaxial cable 331.

[0040] Figure 3 This is a schematic diagram of the circuit layout according to an embodiment of the present invention. Please refer to... Figure 3 The circuit layout is suitable for, for example Figure 2 The adapter board 31 shown. The circuit layout includes a substrate 311, a first ground trace 312, a second ground trace 313, and a switching circuit 314. In some embodiments, the circuit layout may also include a signal trace 315.

[0041] The substrate 311 forms the basic structure of the adapter board 31. The substrate 311 may be, for example, a single-layer or multi-layer printed circuit board substrate, a flexible printed circuit (FPC) substrate, or an FR4 substrate. In one embodiment, the substrate 311 is used to support and fix the conductor traces and electronic components thereon.

[0042] A first ground trace 312 is disposed on a substrate 311. The first ground trace 312 is a trace path made of a conductive material (e.g., copper foil). In one embodiment, the first ground trace 312 is used to provide a first ground potential. For example, the first ground trace 312 is used to connect to... Figure 1 The grounding path of the test machine 20.

[0043] The second ground trace 313 is disposed on the substrate 311. The second ground trace 313 is also a trace path made of conductive material. In one embodiment, the second ground trace 313 is used to provide a second ground potential. For example, the first ground trace 312 and the second ground trace 313 are ground paths for connecting to the probe tip. In some embodiments, the first ground trace 312 and the second ground trace 313 may correspond to different ground channels (e.g., respectively corresponding to the device under test 5, the circuit board 32, or other parts).

[0044] The switching circuit 314 is electrically connected between the first ground trace 312 and the second ground trace 313. The switching circuit 314 may be, for example, a relay, switch, or resistor. In one embodiment, the switching circuit 314 is used to selectively connect or disconnect the first ground trace 312 and the second ground trace 313 according to testing requirements or other application requirements.

[0045] Signal traces 315 are disposed on substrate 311 (e.g., the first surface S1 of substrate 311). Signal traces 315 are trace paths made of conductive material. In one embodiment, signal traces 315 are used to transmit test signals.

[0046] In the prior art, the configuration of the switching circuit 314 increases the path length and may even fail to meet the impedance matching requirements. To solve this problem, the circuit layout of this embodiment has a specific geometric configuration. Specifically, the routing paths of the first ground trace 312 and the second ground trace 313 have a special layout.

[0047] Specifically, the routing paths of the first grounding trace 312 and the second grounding trace 313 each have two corresponding extension portions E11 and E21 extending along the first axis A1, either partially or entirely. The extension portion E11 of the first grounding trace 312 and the extension portion E21 of the second grounding trace 313 are spaced apart by a distance D1 along the second axis A2. For example, the two extension portions E11 and E21 are parallel to each other along the first axis A1 and spaced apart by a distance D1. In this invention, "corresponding" means that the two extension portions E11 and E21 extend in the same direction (i.e., the first axis A1), have overlapping projection sections on the first axis A1, and are arranged substantially parallel, so that they can form a stable and continuous spacing relationship in a direction perpendicular to the first axis A1, facilitating electrical coupling as described later. In other words, the two extended portions E11 and E21 form a pair of elongated conductor segments facing each other, or parallel to each other in space, such that they are configured with a generally consistent distance in the direction of the second axis A2 perpendicular to the first axis A1.

[0048] In this layout, the first axis A1 is perpendicular to the second axis A2. The spacing D1 is set to create electrical coupling (e.g., capacitive coupling) between the first ground trace 312 and the second ground trace 313. By extending the extensions E11 and E21 correspondingly on the first axis A1, the coupling area can be increased; and by shortening the spacing D1 on the second axis A2 (e.g., less than 0.2 mm), the coupling strength can be enhanced. This layout can create a strong coupling effect at both ends of the switching circuit 314, thereby suppressing the inductive effect introduced by the switching circuit 314 during high-frequency transmission, and thus improving impedance matching.

[0049] Figure 4 This is a schematic diagram of the transmission path and switching circuit according to an embodiment of the present invention. Please refer to... Figure 4 This is the basic architecture for high-frequency signal transmission, which includes the signal S path and the ground G path. A specific distance needs to be maintained between the two to control impedance matching.

[0050] However, when switching circuit 314 is added to achieve ground path switching, the ground G path must detour to switching circuit 314. In conventional layouts, this detour significantly lengthens the ground path, disrupting the distance and relative relationship between the signal S path and the ground G path, resulting in impedance mismatch and high-frequency loss. The circuit layout of this embodiment (e.g.) Figure 3 (As shown) is to solve this problem.

[0051] Thanks to this layout, even when the switching circuit 314 is in the open state, the grounding loop for high-frequency signals can still be maintained through... Figure 3 The extensions E11 and E21 shown are formed by electrical coupling. Due to the equivalent electrical coupling between the two extensions E11 and E12, even though the actual conductive path is not geometrically shortened, the equivalent ground loop path for high-frequency signals is electromagnetically shortened, thereby suppressing inductive effects and improving impedance matching. Subsequent embodiments will reveal various specific implementations of this circuit layout.

[0052] Figure 5A This is a side view of the circuit layout according to an embodiment of the present invention. Figure 5B yes Figure 5A The top view. Please refer to... Figure 5A and Figure 5B This embodiment illustrates one possible circuit layout configuration. In this configuration, the substrate 311 of the adapter board 31-1 has a first surface S1 and a second surface S2. For example, the first surface S1 is the upper surface, and the second surface S2 is the lower surface. Furthermore, the first surface S1 and the second surface S2 are arranged parallel to each other.

[0053] In this embodiment, the extension E11 of the first ground trace 312 is disposed on the first surface S1, while the extension E21 of the second ground trace 313 is disposed on the second surface S2. Figure 5A As shown, the first axis A1 (i.e., the extension direction of the two extension portions E11 and E21, such as the X-axis or Y-axis) is parallel to the first surface S1 and the second surface S2. The second axis A2 (i.e., the spacing direction of the two extension portions E11 and E21, such as the Z-axis) is perpendicular to the first surface S1 and the second surface S2.

[0054] The extension portion E11 of the first grounding trace 312 and the extension portion E21 of the second grounding trace 313 are parallel to each other on the first axis A1 (i.e., they extend correspondingly). In this embodiment, the two extension portions E11 and E21 extend along the first axis A1 (X) in their length direction and have at least one overlapping projection segment in the direction of the first axis A1, so that they present a geometric configuration in which they face each other and are arranged parallel to each other in space. In other words, whether viewed from the first surface S1 or the second surface S2, the long side directions of the two extension portions E11 and E21 are parallel to each other and can be regarded as a pair of conductive segments at different heights but aligned in the same direction. In addition, the two extension portions E11 and E21 can also extend along the first axis A1 (Y) in their width direction and have at least one overlapping projection segment in the direction of the first axis A1, so that they present a geometric configuration in which they face each other and are arranged parallel to each other in space. In other words, whether viewed from the first surface S1 or the second surface S2, the wide sides of the two extensions E11 and E21 are parallel to each other and can be considered as a pair of conductive segments aligned in the same direction at different heights. The extension E11 of the first ground trace 312 and the extension E21 of the second ground trace 313 have a distance D1 on the second axis A2. This distance D1 is essentially the dielectric layer thickness of the substrate 311 in the region where the two extensions E11 and E21 are located. By shortening this distance D1 (for example, making the distance D1 less than 0.2 mm), a strong electrical coupling in the Z-axis direction (for example, the vertical direction) can be formed between the first ground trace 312 and the second ground trace 313 to improve impedance matching.

[0055] Furthermore, signal traces 315 are disposed on the first surface S1 of substrate 311. Specifically, as... Figure 5B As shown, the first ground trace 312 may have an opening or cutout, in which the signal trace 315 is disposed and thereby electrically isolated from the first ground trace 312. Furthermore, the signal trace 315 is adjacent to an extension E11 of the first ground trace 312.

[0056] Figure 6A This is a top view of the circuit layout according to an embodiment of the present invention. Please refer to... Figure 6A In this configuration, the extensions E11 and E21 of the first ground trace 312 and the second ground trace 313 on the adapter board 31-21 are both disposed on the same surface (e.g., the upper surface) of the substrate 311. In this layout, the first axis A1 (e.g., the X-axis) and the second axis A2 (e.g., the Y-axis) are both parallel to this surface of the substrate 311.

[0057] The circuit layout of this embodiment can also adopt an interdigitated or serpentine staggered structure. Specifically, the first ground trace 312 further has a first main body portion MP11 and a second extension portion E12. The first main body portion MP11 extends along the Y-axis. One end of the extension portion E11 of the first ground trace 312 is connected to one end of the second extension portion E12 of the first main body portion MP11.

[0058] The second grounding trace 313 further comprises a second main body portion MP21 and a third extension portion E22. The second main body portion MP21 extends along the Y-axis. One end of the extension portion E21 of the second grounding trace 313 is connected to one end of the third extension portion E22 of the second main body portion MP21.

[0059] The extension portion E11 of the first grounding trace 312 and the extension portion E21 of the second grounding trace 313 extend correspondingly to each other. At this time, the extension portion E11 extends from its first main body portion MP11 in an direction (e.g., the negative direction of the X-axis) and the extension portion E21 extends from its second main body portion MP21 in a direction (e.g., the positive direction of the X-axis) opposite to each other. Furthermore, the extension portions E11 and E21 have a distance D1 on the second axis A2.

[0060] Simultaneously, the second extension E12 of the first grounding trace 312 and the third extension E22 of the second grounding trace 313 extend correspondingly to each other. At this time, the extension direction of the second extension E12 from its first main body MP11 (e.g., the negative direction of the X-axis) is opposite to / against the extension direction of the third extension E22 from its second main body MP21 (e.g., the positive direction of the X-axis). Furthermore, the second extension E12 and the third extension E22 have a second spacing D2 on the second axis A2. This second spacing D2 is also used for electrical coupling. In some applications, the second spacing D2 is less than 0.2 mm.

[0061] In one embodiment, such as Figure 6A As shown, the second extension E12 of the first grounding trace 312 and the extension E21 of the second grounding trace 313 extend correspondingly to each other, and may have a third spacing D3 on the second axis A2. At this time, the extension E11 is farther away from the reference origin at the bottom of the drawing than the extension E21 on the Y-axis. That is, the staggered arrangement from top to bottom of the drawing is: first grounding trace 312, second grounding trace 313, first grounding trace 312, and second grounding trace 313, and so on.

[0062] Figure 6B This is a top view of the circuit layout according to an embodiment of the present invention. Please refer to... Figure 6B ,and Figure 6A The difference is that, in Figure 6B In the circuit layout on the adapter board 31-22, the extension portion E11 of the first ground trace 312 and the third extension portion E22 of the second ground trace 313 extend correspondingly to each other, and may have a third spacing D3 on the second axis A2. At this time, the extension portion E21 is farther away from the reference origin at the bottom of the drawing than the extension portion E11 on the Y-axis. That is, the staggered arrangement from top to bottom of the drawing is: second ground trace 313, first ground trace 312, second ground trace 313, and first ground trace 312, and so on.

[0063] This third gap D3 is also used for electrical coupling. In some applications, the third gap D3 is less than 0.2 mm.

[0064] By staggering the extensions E11, E12, E21, and E22 of the first grounding trace 312, the second grounding trace 313, and the third grounding trace 313 onto the same plane in a forked or serpentine manner, the coupling distance (spacings D1, D2, D3) in the spacing direction (e.g., the Y-axis direction) can be shortened, while simultaneously increasing the coupling area, thereby forming strong electrical coupling. In one embodiment, the combination of the staggered extensions of the first grounding trace 312 and the second grounding trace 313 includes at least two sets to ensure sufficient coupling strength. Furthermore, as... Figure 6A and Figure 6B As shown, the coupling distances (spacings D1, D2, and D3) are all smaller than the widths of the corresponding extensions E11, E12, E21, and E22 in their vertical direction (e.g., along the second axis A2), which helps to enhance the electrical coupling effect between the first grounding trace 312 and the second grounding trace 313.

[0065] In one embodiment, please refer to Figure 6A and Figure 6B Vias V may be provided on the extension portions E11 and E12 of the first ground trace 312, the extension portions E21 and E22 of the second ground trace 313, and / or other portions. The vias V may be used, for example, to electrically connect to other layers of the substrate 311, or to adjust electrical characteristics. In some embodiments, the vias V may be arranged in a staggered manner to meet process or wiring space constraints.

[0066] Figure 6C This is a top view of the circuit layout according to an embodiment of the present invention. Please refer to... Figure 6A and Figure 6C Compared to Figure 6A The circuit layout, in Figure 6CIn the circuit layout on the adapter board 31-23, the extension E11 of the first ground trace 312 extends further from its first main body MP11 in the positive direction of the X-axis. The second ground trace 313 includes two second main bodies MP21 (located on both sides of the first main body MP11). Furthermore, the extension E21 of the second ground trace 313 extends further from its other second main body MP21 (located to the right of the first main body MP11) in the negative direction of the X-axis.

[0067] Compared to Figure 6A The circuit layout, due to the increased distance of the corresponding extension, therefore Figure 6C The circuit layout can increase the coupling strength between the first ground trace 312 and the second ground trace 313. In some application scenarios, Figure 6C More staggered vias V can be added to the circuit layout.

[0068] Figure 6D This is a top view of the circuit layout according to an embodiment of the present invention. Please refer to... Figure 6D ,and Figure 6C The difference is that, in Figure 6D In the circuit layout on the adapter board 31-24, the extension portion E11 of the first ground trace 312 and the third extension portion E22 of the second ground trace 313 extend correspondingly to each other, and may have a third spacing D3 on the second axis A2. At this time, the extension portion E21 is farther away from the reference origin at the bottom side of the drawing than the extension portion E11 on the Y-axis. That is, the staggered arrangement from top to bottom of the drawing is: second ground trace 313, first ground trace 312, second ground trace 313, and first ground trace 312, and so on.

[0069] This third gap D3 is also used for electrical coupling. In some applications, the third gap D3 is less than 0.2 mm.

[0070] Figure 7A This is a side view of the circuit layout according to an embodiment of the present invention. Figure 7B yes Figure 7A The top view. Please refer to... Figure 7A and Figure 7B In this configuration, the substrate 311 on the adapter board 31-3 is a multilayer board (i.e., it has more than one layer or includes multiple layers Li). The first ground trace 312 and the second ground trace 313 are respectively disposed on multiple layers Li (stacked along the Z-axis) of the substrate 311. Figure 7A As shown, the first ground trace 312 and the second ground trace 313 can be configured on different layers separated by a dielectric material (e.g., FR4).

[0071] For example Figure 7BAs shown, the first ground trace 312 and the second ground trace 313 can be configured on the same layer, and the signal trace 315 can be configured between the first ground trace 312 and the second ground trace 313.

[0072] In one embodiment, the first ground trace 312 and the second ground trace 313 can be bridged between adjacent layers of the substrate 311 through one or more vias V. Through the electrical conduction of the vias V, the first ground trace 312 of any layer Li can be coupled to the second ground trace 313 of the same layer Li.

[0073] In this circuit layout, the first ground trace 312 and the second ground trace 313 are respectively connected through one or more vias V (conceptually as follows). Figure 6B As shown, the ground trace 312 and the second ground trace 313 are distributed on multiple layers Li of the substrate 311. This multilayer structure allows the first ground trace 312 and the second ground trace 313 to be close to each other in the vertical direction (e.g., the Z-axis). Furthermore, on any layer Li of the substrate 311 (e.g., the XY plane) (as shown...) Figure 7B As shown), the routing paths of the first grounding trace 312 and the second grounding trace 313 (e.g., in a forked or serpentine pattern) also have corresponding extension portions E11 (extending from the first main body portion MP12 of the first grounding trace 312 in the negative direction of the X-axis) and extension portion E12 (extending from the second main body portion MP22 of the second grounding trace 313 in the positive direction of the X-axis), and have a spacing D1 on the second axis A2 (e.g., the X-axis). Therefore, this embodiment can be achieved through a multi-layer structure (such as...). Figure 7A As shown) combined with the floor plan layout (such as Figure 7B As shown in the diagram, this method simultaneously increases the coupling area and shortens the coupling distance in both the vertical (Z-axis) and horizontal (e.g., XY plane) directions to achieve strong electrical coupling. Furthermore, increasing the area of ​​the grounding trace can also increase the soldering space for components.

[0074] Figure 8A This is a frequency diagram showing the return loss according to an embodiment of the present invention. Figure 8B This is a frequency response plot of insertion loss according to an embodiment of the present invention. Please refer to... Figure 8A and Figure 8B These two figures illustrate embodiments of the present invention (e.g., Figure 5A , Figure 6A or Figure 7A The signal measurement results obtained from the circuit layout of the circuit are compared with those of the prior art.

[0075] exist Figure 8AIn the return loss diagram, the bandwidth is defined at the -10dB cutoff point. In the prior art, the original path without a relay can have a bandwidth, for example, as high as 7.43 GHz. However, if a relay is added and a conventional layout is used, the bandwidth will be significantly reduced to 1.77 GHz. In contrast, the bandwidth of the strongly coupled grounded integrated architecture disclosed in the embodiments of this invention can reach 5.99 GHz. Figure 8B A similar trend of improvement can also be observed in the insertion loss graph (e.g., with a bandwidth of 2.16 GHz).

[0076] Depend on Figure 8A and Figure 8B The measurement data shows that the circuit layout of the present invention can effectively suppress the impedance mismatch and high-frequency loss caused by the addition of the switching circuit 314, which greatly improves the transmission performance of the adapter board 31 and approaches the original path performance when the switching circuit 314 is not added.

[0077] Figure 9 This is a flowchart of a wiring arrangement method for an adapter board according to an embodiment of the present invention. Please refer to... Figure 9 This flowchart illustrates a wiring arrangement method for an adapter board according to an embodiment of the present invention. This method can be applied to, for example... Figure 1 The probe card 30 shown Figure 2 The probe card 30 shown Figure 5A and Figure 5B The adapter plate 31-1 shown is Figure 6A The adapter plate 31-21 shown Figure 6B The adapter plates 31-22 shown are shown. Figure 6C The adapter plates 31-23 shown are shown. Figure 6D The adapter boards 31-24 shown are Figure 7A and Figure 7B The adapter plate 31-3 shown is illustrated. This method can be achieved through, for example, the adapter plate 31-3. Figure 3 The circuit layout shown is used to implement this, and includes the following steps.

[0078] In step S910, a substrate 311, a first ground trace 312, a second ground trace 313, and a switching circuit 314 are provided. Specifically, the definitions, implementation methods, and functions of the substrate 311, the first ground trace 312, the second ground trace 313, and the switching circuit 314 have been described above (e.g., Figure 3 , Figure 5A , Figure 5B , Figures 6A to 6D , Figure 7A and Figure 7B (Details are provided, and it is disposed on substrate 311.)

[0079] In step S920, the first grounding trace 312 and the second grounding trace 313 are electrically coupled by the switching circuit 314. Specifically, this embodiment of the invention employs a specific layout that allows strong electrical coupling between the first grounding trace 312 and the second grounding trace 313. This layout is defined as follows: the trace paths of the first grounding trace 312 and the second grounding trace 313 have two corresponding extension portions extending along the first axis A1 (e.g., ...). Figure 3 , Figure 5A , Figure 5B , Figures 6A to 6D , Figure 7A and Figure 7B The extensions E11 and E21 shown are spaced apart on the second axis A2. The extension E11 of the first grounding trace 312 and the extension E21 of the second grounding trace 313 are spaced apart on the second axis A2. This spaced apart D1 is used for electrical coupling, and the first axis A1 is perpendicular to the second axis A2.

[0080] This layout method has multiple implementation methods. In the first layout method (such as...) Figure 5A and Figure 5B As shown), the first axis A1 (as shown) Figure 5A and Figure 5B The X-axis or Y-axis is parallel to the first surface S1 of the substrate 311, and the second axis A2 (as shown in the image) is parallel to the first surface S1 of the substrate 311. Figure 5A and Figure 5B The Z-axis is perpendicular to the first surface S1. The extension portion E11 of the first ground trace 312 is located on the first surface S1 of the substrate 311, and the extension portion E21 of the second ground trace 313 is located on the second surface S2 of the substrate 311 relative to the first surface S1, and the first surface S1 and the second surface S2 are arranged in parallel.

[0081] In the second arrangement (such as) Figures 6A to 6D As shown), both the first axis A1 and the second axis A2 are parallel to the same surface of the substrate 311 (as shown). Figure 5A and Figure 5B The plane formed by the X-axis and Y-axis of the substrate 311). The two extensions E11 and E21 of the first ground trace 312 and the second ground trace 313 are both located on this surface of the substrate 311.

[0082] In the second arrangement, a forked or serpentine staggered structure can be further adopted (such as...). Figure 6A(As shown). The first grounding trace 312 further comprises a first main body portion MP11 and a second extension portion E12, one end of the extension portion E11 and one end of the second extension portion E12 being connected to the first main body portion MP11. The second grounding trace 313 further comprises a second main body portion MP21 and a third extension portion E22, one end of the extension portion E21 and one end of the third extension portion E22 being connected to the second main body portion MP21. The second extension portion E12 of the first grounding trace 312 and the third extension portion E22 of the second grounding trace 313 extend correspondingly to each other and have a second spacing D2 on the second axis A1, and this second spacing D2 is also used for electrical coupling.

[0083] In the third arrangement (such as) Figure 7A and Figure 7B As shown), substrate 311 is a multilayer board. First axis A1 (as shown) Figure 7A and Figure 7B The Y-axis) and the second axis A2 (e.g. Figure 7A and Figure 7B The X-axis of each ground trace is parallel to any layer Li of the multilayer board. The first ground trace 312 and the second ground trace 313 are respectively disposed on multiple layers Li of the multilayer board. The first ground trace 312 and the second ground trace 313 are respectively connected across adjacent layers in the multiple layers Li through one or more vias V, and the extension portion E11 of the first ground trace 312 and the extension portion E21 of the second ground trace 313 have a spacing D1 on each layer Li.

[0084] Figure 10 This is a flowchart of a method for manufacturing an adapter board according to an embodiment of the present invention. Please refer to... Figure 10 This flowchart illustrates a method for manufacturing an adapter board according to an embodiment of the present invention. This method is applicable to manufacturing, for example,... Figure 1 The probe card 30 shown Figure 2 The probe card 30 shown Figure 5A and Figure 5B The adapter plate 31-1 shown is Figure 6A The adapter plate 31-21 shown Figure 6B The adapter plates 31-22 shown are shown. Figure 6C The adapter plates 31-23 shown are shown. Figure 6D The adapter boards 31-24 shown are Figure 7A and Figure 7B The adapter plate 31-3 is shown. This method can be achieved through, as shown in... Figure 3 The circuit layout shown is used to implement this, and includes the following steps.

[0085] In step S1010, a substrate 311 and a switching circuit 314 are provided. Specifically, the relevant definitions, implementation methods, and functions of the substrate and the switching circuit have been described above (e.g., Figure 3 , Figure 5A, Figure 5B , Figures 6A to 6D , Figure 7A and Figure 7B (Details)

[0086] In step S1020, the coupling path configuration is determined. Specifically, this step determines the circuit layout scheme used to form strong electrical coupling. This coupling path configuration may be, for example, Figure 5A and Figure 5B The vertical coupling configuration shown Figures 6A to 6D The planar staggered configuration shown, or Figure 7A and Figure 7B The multi-layered structure configuration is shown.

[0087] In step S1030, a first ground trace 312 and a second ground trace 313 are formed on the substrate 311 according to the coupling path configuration. Specifically, the first ground trace 312 and the second ground trace 313 can be formed on the substrate 311 by semiconductor manufacturing processes or circuit board manufacturing processes (such as photolithography, etching, or electroplating techniques) according to the coupling path configuration determined in step S1020.

[0088] During manufacturing, the switching circuit 314 is electrically connected between the formed first ground trace 312 and the second ground trace 313. The final adapter board 31 has two corresponding extension portions E11 and E21 on the first axis A1, either partially or entirely, of the routing paths of the first ground trace 311 and the second ground trace 312. The extension portion E11 of the first ground trace 312 and the extension portion E21 of the second ground trace 313 are spaced apart by a distance D1 on the second axis A2. This distance D1 is used for electrical coupling, and the first axis A1 is perpendicular to the second axis A2.

[0089] In summary, the circuit layout and routing method for the adapter board, the method for manufacturing the adapter board, the adapter board, the probe card, and the probe system of the present invention provide various strong coupling configurations for the first ground trace and the second ground trace at both ends of the switching circuit on the adapter board of the probe card. Whether using the upper and lower surfaces of the substrate for vertical coupling; or using an interlaced structure for horizontal coupling on the same plane; or combining multilayer boards and vias for three-dimensional coupling, the core design is to significantly increase the coupling area between ground traces and shorten their coupling distance. Experimental data confirms that these layout methods can effectively suppress the inductive effect of the ground loop, significantly improve impedance matching, and thus improve the transmission quality of high-frequency signals.

[0090] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A circuit layout, characterized in that, An adapter board (31) for a probe card (30), the circuit layout comprising: substrate(311); The first grounding trace (312) is disposed on the substrate (311). A second ground trace (313) is disposed on the substrate (311); and A switching circuit (314) is electrically connected between the first grounding trace (312) and the second grounding trace (313), and is used to selectively connect or disconnect the first grounding trace (312) and the second grounding trace (313), wherein The routing path of the first grounding trace (312) and the routing path of the second grounding trace (313) have two corresponding extension portions (E11, E21) on the first axis (A1), and the extension portion (E11) of the first grounding trace (312) and the extension portion (E21) of the second grounding trace have a gap (D1) on the second axis (A2), the gap (D1) is used for electrical coupling, and the first axis (A1) is perpendicular to the second axis (A2).

2. The circuit layout according to claim 1, wherein The first axis (A1) is parallel to the first surface (S1) of the substrate (311), and the second axis (A2) is perpendicular to the first surface (S1). The extension portion (E11) of the first ground trace (312) is located on the first surface (S1) of the substrate (311), and the extension portion (E21) of the second ground trace (313) is located on the second surface (S2) of the substrate (311) relative to the first surface (S1). The first surface (S1) and the second surface (S2) are arranged in parallel.

3. The circuit layout according to claim 1, wherein... Both the first axis (A1) and the second axis (A2) are parallel to the surface of the substrate. The two extensions (E11, E21) of the first ground trace (312) and the second ground trace (313) are both located on the surface of the substrate (311).

4. The circuit layout according to claim 3, wherein The first grounding trace (312) further has a first main body portion (MP11) and a second extension portion (E12), wherein one end of the extension portion (E11) of the first grounding trace (312) is connected to one end of the second extension portion (E12) of the first main body portion (MP11). The second grounding trace (313) further has a second main body portion (MP21) and a third extension portion (E22), wherein one end of the extension portion (E21) of the second grounding trace (313) and one end of the third extension portion (E22) are connected to the second main body portion (MP21), the second extension portion (E12) of the first grounding trace (312) and the third extension portion (E22) of the second grounding trace (313) extend correspondingly to each other and have a second spacing (D2) on the second axis (A2), and the second spacing (D2) is used for electrical coupling.

5. The circuit layout according to claim 4, wherein The extension portion (E11) of the first grounding trace (312) and the third extension portion (E22) of the second grounding trace (313) have a third spacing (D3) on the second axis (A2), or The second extension (E12) of the first grounding trace (312) and the extension (E21) of the second grounding trace (313) have the third spacing (D3) on the second axis (A2), and The third spacing (D3) is used for electrical coupling.

6. The circuit layout according to claim 4, wherein the two extension portions (E11, E21) of the first ground trace (312) and the second ground trace (313) are respectively provided with vias (V).

7. The circuit layout according to claim 1, wherein the substrate (311) is a multilayer board, and the first axis (A1) and the second axis (A2) are both parallel to any layer (Li) of the multilayer board. The first grounding trace (312) and the second grounding trace (313) are respectively disposed on multiple layers (Li) of the multilayer board. The first ground trace (312) and the second ground trace (313) are connected across adjacent layers in the plurality of layers through at least one via (V), and the extension portion (E11) of the first ground trace (312) and the extension portion (E21) of the second ground trace (313) have the spacing (D1) on each of the layers.

8. The circuit layout according to claim 1, wherein the spacing (D1) is less than 0.2 mm.

9. The circuit layout according to claim 1, further comprising: Signal traces (315) are disposed on the first surface (S1) of the substrate (311) and are used to transmit test signals.

10. A method for routing traces on an adapter board, characterized in that, Its probe card (30) is suitable for signal transmission, and the routing method includes: A substrate (311), a first ground trace (312), a second ground trace (313), and a switching circuit (314) are provided, wherein the first ground trace (312) and the second ground trace (313) are disposed on the substrate (311); and The first grounding trace (312) and the second grounding trace (313) are electrically coupled through the switching circuit (314). The arrangement of the first grounding trace (312) and the second grounding trace (313) includes: The routing paths of the first grounding trace (312) and the second grounding trace (313) have two corresponding extension portions (E11, E21) on the first axis (A1), and the extension portions of the first grounding trace (312) and the extension portions of the second grounding trace (313) have a gap (D1) on the second axis (A2), the gap (D1) being used for electrical coupling, and the first axis (A1) being perpendicular to the second axis (A2).

11. The wiring arrangement method for an adapter board according to claim 10, wherein the arrangement of the first grounding trace (312) and the second grounding trace (313) further includes: The first axis (A1) is parallel to the first surface (S1) of the substrate (311), and the second axis (A2) is perpendicular to the first surface (S1). The extension portion (E11) of the first ground trace (312) is located on the first surface (S1) of the substrate, and the extension portion of the second ground trace (313) is located on the second surface (S2) of the substrate (311) relative to the first surface (S1). The first surface (S1) and the second surface (S2) are arranged in parallel.

12. The wiring arrangement method for an adapter board according to claim 10, wherein the arrangement of the first grounding trace (312) and the second grounding trace (313) further includes: Both the first axis (A1) and the second axis (A2) are parallel to the surface of the substrate (311). The two extensions (E11, E21) of the first ground trace (312) and the second ground trace (313) are both located on the surface of the substrate (311).

13. The wiring arrangement method for an adapter board according to claim 12, wherein the arrangement of the first grounding trace (312) and the second grounding trace (313) further includes: The first grounding trace (312) further has a first main body portion (MP11) and a second extension portion (E12), wherein one end of the extension portion (E11) of the first grounding trace (312) is connected to one end of the second extension portion (E12) of the first main body portion (MP11). The second grounding trace (313) further has a second main body portion (MP21) and a third extension portion (E22), wherein one end of the extension portion (E21) of the second grounding trace (313) and one end of the third extension portion (E22) are connected to the second main body portion (MP21), the second extension portion (E12) of the first grounding trace (312) and the third extension portion (E22) of the second grounding trace (313) extend correspondingly to each other and have a second spacing (D2) on the second axis (A2), and the second spacing (D2) is used for electrical coupling.

14. The wiring arrangement method for an adapter board according to claim 10, wherein the arrangement of the first grounding trace (312) and the second grounding trace (313) further includes: The substrate (311) is a multilayer board, and the first axis (A1) and the second axis (A2) are both parallel to any layer (Li) of the multilayer board. The first grounding trace (312) and the second grounding trace (313) are respectively disposed on multiple layers (Li) of the multilayer board. The first ground trace (312) and the second ground trace (313) are respectively connected across adjacent layers in the plurality of layers through at least one via (V), and the extension portion (E11) of the first ground trace (312) and the extension portion (E21) of the second ground trace (313) have the spacing (D1) on each of the layers (Li).

15. A method for manufacturing an adapter plate (31), characterized in that, Its probe card (30) is suitable for signal transmission, and the method includes: A substrate (311) and a switching circuit (314) are provided. Determine the coupling path configuration; A first ground trace (312) and a second ground trace (313) are configured on the substrate (311) according to the coupling path, wherein the switching circuit is electrically connected between the first ground trace (312) and the second ground trace (313). The routing paths of the first grounding trace (312) and the second grounding trace (313) have two corresponding extension portions (E11, E21) on the first axis (A1), and the extension portion (E11) of the first grounding trace (312) and the extension portion (E21) of the second grounding trace (313) have a gap (D1) on the second axis (A2), the gap (D1) being used for electrical coupling, and the first axis (A1) being perpendicular to the second axis (A2).

16. A probe card (30), characterized in that, include: The adapter plate (31) as described in claim 1; Circuit board (32); as well as Multiple probes (33), wherein the tail end of at least one of the multiple probes (33) is electrically connected to the adapter plate (31).

17. The probe card (30) according to claim 16, wherein the plurality of probes (33) are a plurality of cantilever probes, and the tail end of at least one of the plurality of probes (33) is connected to the adapter plate (31) via a coaxial line (331), wherein the probe card (30) further includes a support base (34) disposed on the circuit board (32) and used to support the plurality of cantilever probes.

18. A probe system (1), characterized in that, include: Support device (10) is used to support the device under test (5); The testing machine (20) has a test head (21); as well as The probe card (30) as described in claim 16 is disposed on the test head (21).

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