Universal structure of multiple recombination field termination for full n-type devices

Abstract

The application discloses a kind of multiple composite electric field terminal general structures suitable for full N type device, it is related to power semiconductor technical field, including semiconductor substrate, N type drift layer, active region and terminal area;Terminal area contains electric field buffer zone, multistage dielectric groove structure, ladder field plate structure and composite passivation layer;Multistage dielectric groove structure is made of first dielectric layer and the second dielectric layer filled in it;Ladder field plate structure is electrically connected with active region electrode, covers terminal area surface;Electric field buffer zone is lightly doped N type area between active region and multistage dielectric groove structure;Terminal area is made of N type semiconductor area and insulating dielectric structure.The application can realize edge electric field homogenization, improve device withstand voltage capacity and reliability.

Description

Technical Field

[0001] This invention relates to the field of power semiconductor technology, and in particular to a universal structure for multiple composite electric field termination adapted to all N-type devices. Background Technology

[0002] β-Ga₂O₃, as a new generation of ultra-wide bandgap semiconductor material, possesses a bandgap of approximately 4.9 eV and a critical breakdown electric field of approximately 8 MV / cm, showing broad application prospects in high-voltage power electronic devices. β-Ga₂O₃ can achieve a higher Baliga figure of merit than silicon, SiC, and GaN, making it highly suitable for fabricating high-voltage MOSFETs, Schottky diodes, and other power devices.

[0003] However, the long-standing difficulty in P-type doping of gallium oxide materials makes it difficult to apply PN junction-dependent termination technologies such as junction termination extension (JTE) and field limiting ring (FLR), widely used in traditional silicon-based and SiC devices, to all-N-type gallium oxide devices. When the device is under high reverse bias, electric field concentration is prone to occur at the edge of the active region, causing the edge region to break down before the bulk region, resulting in decreased device breakdown voltage, increased leakage current, and reduced reliability.

[0004] Currently, the optimization of gallium oxide devices mainly adopts field plate structures or dielectric trench structures. For example, the prior art CN202110317636.9 discloses a gallium oxide junction barrier Schottky diode with a variable K dielectric trench composite termination, which improves the edge electric field distribution and enhances the device's breakdown voltage performance by setting dielectric trenches with different dielectric constants and tilting field plates.

[0005] However, the above-mentioned solutions are mainly aimed at Schottky diode structures with junction barriers having P-type oxide semiconductor regions. Their electric field modulation mechanism relies on the PN junction boundary, making them difficult to directly apply to devices such as gallium oxide MOSFETs and Schottky diodes that are entirely composed of N-type regions. Furthermore, this solution is designed for silicon-based and silicon carbide-based devices, and its terminal structure has limited versatility, failing to meet the common requirements of different types of all-N-type high-voltage devices.

[0006] Therefore, there is an urgent need to provide a universal termination structure that is independent of the P-type region or PN junction and applicable to a variety of all-N-type gallium oxide power devices, so as to achieve edge electric field uniformity and improve the device's withstand voltage and reliability. Summary of the Invention

[0007] In order to at least solve one of the above-mentioned technical problems, the present invention aims to provide a universal structure for multiple composite electric field terminals that is compatible with all N-type devices, thereby achieving edge electric field uniformity and improving the device's withstand voltage and reliability.

[0008] To achieve the above objectives, the present invention provides the following technical solution: A universal structure for terminating multiple composite electric fields that is compatible with all N-type devices includes a semiconductor substrate, an N-type drift layer formed on the semiconductor substrate, an active region, and a termination region disposed around the active region. The terminal region includes an electric field buffer zone located outside the active region, a multi-level dielectric trench structure formed in the N-type drift layer, a stepped field plate structure disposed in the corresponding region of the multi-level dielectric trench structure, and a composite passivation layer covering the surface of the terminal region. The multi-level media trench structure includes a first media layer disposed along the sidewall and bottom of the trench and a second media layer filled inside the first media layer. The stepped field plate structure is electrically connected to the active region electrode; The electric field buffer zone is a lightly doped N-type region located between the active region and the multi-level dielectric trench structure; Wherein, the dielectric constant of the first dielectric layer is less than that of the second dielectric layer, and the critical breakdown field strength of the first dielectric layer is greater than that of the semiconductor substrate material. The terminal region is composed of an N-type semiconductor region and an insulating dielectric structure.

[0009] Preferably, the stepped field plate structure includes at least a first-level field plate, a second-level field plate, and a third-level field plate arranged sequentially in the direction away from the active region. Adjacent field plates are isolated by an insulating dielectric layer, and the extension length of each level of field plate increases progressively in the direction away from the active region.

[0010] Preferably, the stepped field plate structure is disposed on the surface of the second medium layer.

[0011] Preferably, the stepped field plate structure is embedded inside the second medium layer.

[0012] Preferably, the composite passivation layer includes one or more of a silicon oxide layer, a silicon nitride layer, and an aluminum oxide layer.

[0013] Preferably, the doping concentration of the electric field buffer is lower than that of the N-type drift layer near the active region, so as to form a lightly doped N-type buffer.

[0014] Preferably, in addition to the first and second dielectric layers, the multi-level dielectric trench structure also includes at least one additional dielectric layer disposed between or outside the two, and the dielectric constant of each dielectric layer varies in a stepwise manner along the direction away from the active region.

[0015] Preferably, the first dielectric layer is formed of one or more of silicon dioxide, fluorinated polyimide, or benzocyclobutene; the second dielectric layer is formed of one or more of aluminum oxide, hafnium oxide, or silicon nitride.

[0016] Preferably, the semiconductor substrate is a β-phase gallium oxide substrate, and the N-type drift layer is an N-type epitaxial layer formed on the β-phase gallium oxide substrate.

[0017] The present invention has the following beneficial effects: I. Improving the uniformity of the electric field at the device edge and enhancing its withstand voltage capability: This invention constructs a multi-stage electric field control mechanism by setting up an electric field buffer zone, a multi-level dielectric trench structure, and a stepped field plate structure around the active region. This allows the high electric field, originally concentrated at the edge of the active region, to be gradually dispersed and redistributed. The first and second dielectric layers use materials with different dielectric constants to form a dielectric gradient. Combined with the stepped field plates with progressively increasing lengths, the potential distribution becomes smoother, avoiding excessively high local electric field peaks. This significantly reduces premature breakdown at the edge, improves the electric field utilization rate in the terminal region, shifts the device breakdown location towards the bulk region, and further enhances the overall withstand voltage performance.

[0018] Second, it eliminates the dependence on P-type regions and PN junction structures; the termination region of this invention is entirely composed of an N-type semiconductor region and an insulating dielectric structure, eliminating the need for P-type doped regions or PN junction structures, thus fundamentally solving the problem of achieving stable P-type doping in gallium oxide materials. Compared with traditional junction termination extension structures and field-limiting ring structures, this invention utilizes dielectric and field plate structures to achieve electric field modulation, enabling all-N-type devices to achieve excellent termination protection without relying on P-type junction structures, thereby breaking through the application limitations of existing termination technologies in gallium oxide material systems.

[0019] Third, improving device reliability and reducing leakage current: By setting a lightly doped N-type electric field buffer and a composite passivation layer covering the terminal region, the surface state effects and interface defects caused by edge electric field concentration can be effectively weakened. The composite passivation layer isolates and protects the device surface, reducing surface charge accumulation and performance fluctuations caused by environmental factors, reducing edge leakage current, improving long-term device stability, and enabling the device to maintain good reliability and consistency under high voltage and high temperature environments.

[0020] IV. Enhanced Universal Adaptability of Terminal Structures: This invention adopts a design approach combining a pure N-type region with a dielectric structure, without limiting it to silicon-based or silicon carbide-based device structures. Therefore, it can be simultaneously applied to all-N-type vertical MOSFETs, lateral MOSFETs, Schottky diodes, and other all-N-type high-voltage power devices. Compared to existing terminal solutions that primarily optimize for single devices, this invention has stronger structural compatibility and platform application capabilities, which is conducive to forming a unified terminal design system, reducing the design complexity in the development process of different devices, and improving process reusability.

[0021] V. Enhanced Freedom of Electric Field Control in Terminal Structures: By employing multi-level dielectric trench structures and allowing the addition of additional dielectric layers, the dielectric constant can vary in a stepped manner away from the active region, thereby achieving precise adjustment of the electric field distribution. Simultaneously, the stepped field plates can be placed on the surface of the second dielectric layer or embedded within it, granting the terminal structure greater design freedom. Designers can optimize the configuration of dielectric materials, the number of field plates, and their extension length based on different voltage ratings, chip sizes, and process conditions, thus meeting the performance requirements of various application scenarios.

[0022] VI. Enhancing the breakdown resistance of the terminal structure: The first dielectric layer is formed using a dielectric material with a critical breakdown field strength higher than that of the substrate material, providing stronger insulation protection for the trench sidewalls and bottom. When the device is in a high reverse bias state, the high field region is primarily borne by the high breakdown field strength dielectric, which helps suppress local dielectric failure and electric field penetration, improving the terminal structure's ability to withstand high voltage conditions, thereby enhancing the overall breakdown resistance and safety margin of the device.

[0023] VII. Synergistic Effect of Multiple Electric Field Regulation Mechanisms: This invention organically combines a lightly doped electric field buffer zone, a dielectric constant gradient trench structure, a stepped field plate structure, and a composite passivation layer to form a composite terminal system with multiple mechanisms participating in bulk electric field regulation, dielectric electric field reconstruction, surface potential expansion, and interface protection. The components cooperate and complement each other, resulting in a more continuous and gentle electric field distribution. This not only achieves superior terminal effects compared to a single field plate structure or a single dielectric structure but also improves the fault tolerance and stability of the terminal design, thereby comprehensively enhancing its withstand voltage performance, reliability, and applicability.

[0024] 8. This invention leverages the ultra-wide bandgap advantage of β-phase gallium oxide materials. By fully utilizing the high critical breakdown field strength of β-phase gallium oxide materials and optimizing the electric field distribution in the termination region, the utilization efficiency of the material's intrinsic breakdown voltage capability is improved, enabling the device to operate closer to the theoretical breakdown limit. This fully utilizes the advantages of β-phase gallium oxide's ultra-wide bandgap material in high voltage, low conduction loss, and high power density, providing a reliable termination structure foundation for the development of next-generation high-voltage power devices. Attached Figure Description

[0025] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1This is a partial cross-sectional view of the MOSFET device in Embodiment 1 of the present invention.

[0027] In the figure: 1. Semiconductor substrate; 101. N-type epitaxial layer; 2. N-type drift layer; 3. Active region; 401. Electric field buffer zone; 402. Multi-level dielectric trench structure; 403. Stepped field plate structure; 431. Primary field plate; 432. Secondary field plate; 433. Tertiary field plate; 404. Insulating dielectric layer; 405. Composite passivation layer. Detailed Implementation

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] The β-Ga2O3 substrates used in this embodiment are all commercially available. The substrate thickness is preferably 500 μm, and the crystal orientation is (001). The N-type drift layer 2 is grown using molecular beam epitaxy, with Si as the dopant element and a preferred doping concentration of 1 × 10¹. 6 cm⁻³~8×10¹ 6 The epitaxial layer thickness is preferably 8 μm to 12 μm, with a diameter of cm⁻³. The total width of the terminal region is preferably 40 μm to 120 μm, the number of trenches is preferably 3 to 8, the trench depth is preferably 1 μm to 5 μm, the trench width is preferably 1 μm to 5 μm, and the spacing between adjacent trenches is preferably 2 μm to 8 μm. The dielectric layer is formed using processes such as APCVD, SACVD, PECVD, ALD, or dielectric spin coating. The field plate uses a Ti / Au metal system and is prepared by physical vapor deposition (PVD).

[0030] To verify the performance of the terminal structure of this invention, a reverse breakdown test was performed using a Keysight B1505A power device analysis system at a test temperature of 25°C and a cutoff current of 1mA. The reverse leakage current was measured using a Keithley 4200A-SCS parameter analyzer. The internal electric field distribution of the device was simulated and analyzed using Silvaco TCAD software.

[0031] Example 1 A 500 μm thick β-Ga₂O₃ substrate was selected, and a 10 μm thick Si-doped N-type drift layer 2 was grown on its surface using molecular beam epitaxy. The doping concentration of the drift layer was 5 × 10¹. 6 cm⁻³.

[0032] A lightly doped N-type electric field buffer 401 with a width of 8 μm is formed around the active region 3, and its doping concentration is 1 × 10¹. 6 cm⁻³.

[0033] Three annular trenches were formed using ICP etching. Each trench was 2μm deep and 3μm wide, with a spacing of 4μm between adjacent trenches.

[0034] Subsequently, a 150 nm thick silicon dioxide layer was deposited on the trench sidewalls and bottom using a PECVD process to form the first dielectric layer, with a dielectric constant of approximately 3.9 and a breakdown field strength of approximately 10 MV / cm. Then, an alumina layer was deposited using an ALD process to form the second dielectric layer, with a dielectric constant of approximately 9.2, and this layer filled the interior of the first dielectric layer.

[0035] Three-stage stepped field plates are formed on the surface of the second dielectric layer, wherein the lengths of the first-stage field plate 431, the second-stage field plate 432 and the third-stage field plate 433 are 10μm, 18μm and 30μm, respectively. Adjacent field plates are isolated by a 300nm thick silicon dioxide insulating layer, and each stage of the field plate is electrically connected to the active region electrode 3.

[0036] Finally, a composite passivation layer 405 is formed by sequentially depositing a 200 nm thick silicon dioxide layer or a silicon dioxide plus silicon nitride layer and a 150 nm thick aluminum oxide layer on the surface of the terminal region.

[0037] The final product structure is 1. A universal multi-composite electric field termination structure adapted to all N-type devices, including a semiconductor substrate 1, an N-type drift layer 2 formed on the semiconductor substrate 1, an active region 3, and a termination region disposed around the active region 3; the termination region includes an electric field buffer 401 located outside the active region 3, a multi-level dielectric trench structure 402 formed in the N-type drift layer 2, a stepped field plate structure 403 disposed in the corresponding region of the multi-level dielectric trench structure 402, and a composite passivation layer 405 covering the surface of the termination region; the multi-level dielectric... The trench structure 402 includes a first dielectric layer disposed along the trench sidewalls and bottom, and a second dielectric layer filled inside the first dielectric layer; the stepped field plate structure 403 is electrically connected to the active region 3 electrode; the electric field buffer 401 is a lightly doped N-type region located between the active region 3 and the multi-level dielectric trench structure 402; wherein, the dielectric constant of the first dielectric layer is less than the dielectric constant of the second dielectric layer, and the critical breakdown field strength of the first dielectric layer is greater than the critical breakdown field strength of the semiconductor substrate 1 material; the terminal region is composed of an N-type semiconductor region and an insulating dielectric structure.

[0038] Tests showed that the device's breakdown voltage reached 1512V at 25℃, and the leakage current was 3.8×10⁻⁻⁻⁶ under a 1000V reverse bias. 8 A, the maximum electric field peak is about 6.31 MV / cm, and the breakdown location is in the drift layer region.

[0039] Analysis suggests that the lightly doped electric field buffer 401 can expand the depletion region, the multi-level dielectric structure allows the electric field lines to extend outwards, and the stepped field plate enables the surface potential to be released step by step, thereby improving the device's withstand voltage capability.

[0040] Example 2 This embodiment is basically the same as Embodiment 1, except that an 80nm thick silicon nitride dielectric layer with a dielectric constant of 7.4~7.6 is added between the first dielectric layer and the second dielectric layer, thereby forming a three-level dielectric structure with dielectric constants of 3.9, 7.5 and 9.2 respectively. All other parameters remain the same as in Embodiment 1.

[0041] Test results show that the device breakdown voltage has increased to 1668V, and the leakage current has decreased to 2.9×10⁻⁻⁻⁶ under a 1000V reverse bias. 8 A, the maximum electric field peak value drops to 6.05MV / cm.

[0042] Analysis suggests that the additional dielectric layer further optimizes the dielectric constant distribution in the terminal region, making the potential gradient change more gradual, thereby reducing the local high field effect and improving the terminal utilization rate.

[0043] Example 3 This embodiment is basically the same as embodiment 2, except that the three-stage stepped field plate is embedded inside the second medium layer, and the lengths of each field plate are still 10μm, 18μm and 30μm respectively.

[0044] Test results show that the device breakdown voltage increased to 1778V, and the leakage current decreased to 1.7×10⁻⁻⁻⁶ under a 1000V reverse bias. 8 A, the maximum electric field peak value decreased to 5.72MV / cm.

[0045] Further high-temperature aging tests were conducted at 150℃. After continuous operation for 500 hours, the device breakdown voltage change rate was less than 1.3%, and the leakage current change rate was less than 2.0%.

[0046] Analysis suggests that the embedded field plate can further reduce the surface peak electric field, and the multilayer dielectric structure and the composite passivation layer 405 together improve the long-term stability of the device.

[0047] Example 4 This embodiment is used to illustrate the effect of the concentration of lightly doped N-type electric field buffer 401 on terminal performance; the remaining structural parameters are consistent with those in Embodiment 1.

[0048] When the buffer doping concentration is 2×10¹ 6 At cm⁻³, the device breakdown voltage is 1324V, and the maximum peak electric field is approximately 6.88MV / cm.

[0049] When the buffer doping concentration is 1×10¹ 6 At cm⁻³, the device breakdown voltage is 1512V, and the maximum peak electric field is approximately 6.31MV / cm.

[0050] When the buffer doping concentration is reduced to 5×10¹ 5 At cm⁻³, the device breakdown voltage increases to 1713V, and the maximum electric field peak decreases to 5.93MV / cm.

[0051] The results show that reducing the doping concentration of the buffer layer can increase the width of the depletion layer, making the electric field distribution more uniform, thereby improving the terminal withstand voltage capability.

[0052] Example 5 This embodiment is used to illustrate the impact of the number of stepped field plates on the terminal performance; the remaining parameters are consistent with those in Embodiment 1.

[0053] When using the 431 single-stage field plate structure, the device breakdown voltage is 1186V and the maximum electric field peak value is 7.02MV / cm.

[0054] When using the secondary field plate 432 structure, the device breakdown voltage is increased to 1407V, and the maximum electric field peak value is reduced to 6.53MV / cm.

[0055] When using the three-stage field plate 433 structure, the device breakdown voltage reaches 1512V, and the maximum electric field peak value is reduced to 6.31MV / cm.

[0056] When a four-stage field plate structure is adopted, the device breakdown voltage is increased to 1802V, and the maximum electric field peak value is further reduced to 5.65MV / cm.

[0057] This indicates that as the number of field plate levels increases, the surface potential changes from abrupt to a gradual distribution, thereby reducing the concentration of the electric field at the edge and improving the terminal withstand voltage.

[0058] Comparative Example 1 The same β-Ga2O3 substrate and N-type drift layer 2 structure are used, but no terminal region is set, and only a normal planar structure is used.

[0059] Test results show that the device has a breakdown voltage of only 823V and a leakage current of 8.5×10⁻⁻⁶ under a reverse bias of 1000V. 5 A, the maximum electric field peak reaches 8.42MV / cm, and breakdown first occurs at the edge of the active region 3.

[0060] Comparative Example 2 A single-layer silicon dioxide dielectric trench and a primary field plate 431 structure are set in the terminal area, without setting a lightly doped electric field buffer 401 or an additional dielectric layer.

[0061] Test results show that the device breakdown voltage is 1115V, and the leakage current is 1.8×10⁻⁻⁻⁶ under a 1000V reverse bias. 6 A, the maximum electric field peak value is approximately 7.28 MV / cm.

[0062] Comparative Example 3 A three-stage field plate 433 and a double-layer dielectric structure are set in the terminal region, but a lightly doped electric field buffer 401 is not set.

[0063] Test results show that the device breakdown voltage is 1264V, and the leakage current under a 1000V reverse bias is 6.4×10⁻⁻⁻⁶. 7 A, the maximum electric field peak value is approximately 6.96 MV / cm.

[0064] Technical effect analysis A comprehensive analysis of the test results from Examples 1 to 5 and Comparative Examples 1 to 3 shows that the universal multi-composite electric field termination structure for all-N-type devices proposed in this invention can effectively solve the problems of electric field concentration, insufficient voltage withstand capability, and poor reliability in the termination region of traditional all-N-type power devices. This technical effect does not stem from a simple superposition of single structures, but rather from the synergistic effect of the lightly doped N-type electric field buffer 401, the multi-level dielectric trench structure 402, the stepped field plate structure 403, and the composite passivation layer 405. This results in a multi-composite electric field control mechanism that combines bulk electric field regulation, dielectric electric field reconstruction, surface potential expansion, and interface defect suppression.

[0065] First, for traditional all-N-type β-Ga2O3 devices, due to the lack of P-type doped regions and PN junction structures, a large local electric field peak tends to form at the edge of the active region 3 under high reverse bias conditions, leading to premature breakdown in the edge region and limiting further improvement in the device's breakdown voltage. As shown in Comparative Example 1, without a termination structure, the maximum electric field peak reaches 8.42 MV / cm, while the breakdown voltage is only 823 V, and the breakdown location is at the edge of the active region 3. This indicates that the internal electric field distribution of the device is highly concentrated, and the inherent high critical breakdown field strength advantage of the material cannot be fully utilized.

[0066] This invention creates a low-doped N-type electric field buffer 401 around the active region 3, forming a transition region with a low doping concentration between the active region 3 and the terminal region. When the device is under high reverse bias, this low-doped region can be preferentially depleted, thereby expanding the width of the space charge region, making the potential change more gradual, and reducing the potential gradient per unit distance. As can be seen from Example 4, when the doping concentration of the buffer is increased from 2×10¹... 6 cm⁻³ reduced to 5×10¹ 5At cm⁻³, the device breakdown voltage increased from 1324V to 1713V, and the peak electric field decreased from 6.88MV / cm to 5.93MV / cm. This indicates that the lightly doped buffer can effectively extend the depletion layer propagation path, allowing the high electric field region to gradually diffuse towards the periphery of the terminal, thereby reducing the concentration of the edge electric field and improving the terminal region's ability to withstand pressure.

[0067] Secondly, this invention forms a multi-level dielectric trench structure 402 with progressively varying dielectric constants by setting a first dielectric layer on the trench sidewalls and bottom, filling it with a second dielectric layer, and adding additional dielectric layers as needed. Different dielectric materials have different polarization capabilities. Under the action of an applied electric field, the electric field lines will redistribute at different dielectric interfaces, causing the electric field to gradually change from a localized concentrated state to a continuously expanding state. In Example 2, after adding the silicon nitride additional dielectric layer, the device breakdown voltage increased from 1512V to 1668V, and the maximum electric field peak decreased from 6.31MV / cm to 6.05MV / cm, indicating that the dielectric constant gradient structure can effectively improve the potential distribution in the terminal region and improve the electric field utilization rate.

[0068] Furthermore, the first dielectric layer is located on the sidewalls and bottom of the trench, and its breakdown field strength is higher than that of the β-Ga2O3 material. Therefore, it can preferentially bear the local high field stress at the trench edge under high voltage conditions, reducing the concentration of electric field in the trench's sharp corner region and improving the insulation capacity and safety margin of the terminal structure. At the same time, the high dielectric constant second dielectric layer can enhance the traction effect on the electric field lines, causing the electric field lines to extend further outwards from the terminal, thereby improving the terminal region's ability to share the applied voltage.

[0069] Regarding surface electric field modulation, this invention employs a stepped field plate structure 403. Each level of the field plate is electrically connected to the electrode of the active region 3 and extends progressively away from the active region 3, allowing the surface potential, originally concentrated at the edge of the active region 3, to be released step by step, achieving a gradual distribution of the surface electric field. Test results in Example 5 show that when the number of field plate levels increases from one to four, the device breakdown voltage increases from 1186V to 1802V, while the maximum electric field peak decreases from 7.02MV / cm to 5.65MV / cm. This indicates that as the number of field plate levels increases, the surface potential changes from a single abrupt change to a multi-level gradual change, causing the high-field region to gradually shift from local concentration to a wider distribution, thereby effectively weakening the surface spike electric field and improving the electric field utilization efficiency of the terminal region.

[0070] Example 3 further demonstrates that after embedding the stepped field plate inside the second dielectric layer, the device breakdown voltage increases to 1778V, and the leakage current decreases to 1.7×10⁻⁻⁻⁶. 8A. The reason is that the embedded field plate can reduce the additional electric field concentration effect generated near the metal edge, and at the same time, the dielectric layer is used to cover the edge of the field plate, making the surface electric field distribution smoother, thereby further reducing the surface peak electric field and improving the device's withstand voltage capability.

[0071] Meanwhile, this invention provides overall protection for the terminal structure by setting a composite passivation layer 405 on the surface of the terminal region. The composite passivation layer 405 not only blocks the influence of external humidity, impurities, and contaminants on the device surface, but also reduces surface state density and interface trap density, decreases interface charge accumulation and the formation of surface carrier leakage channels, thereby reducing leakage current and improving device stability. In Example 3, after continuous operation at 150°C for 500 hours, the breakdown voltage change rate was less than 1.3%, and the leakage current change rate was less than 2.0%, indicating that the composite passivation layer 405 can effectively improve the long-term stability and reliability of the device under high-temperature conditions.

[0072] Analysis of Comparative Examples 2 and 3 further reveals that while using a dielectric trench structure or a field plate structure alone can improve the electric field distribution to some extent, their controllability remains limited. In Comparative Example 2, using only a single-layer dielectric trench and a single-stage field plate 431 structure, the breakdown voltage is only 1115V; in Comparative Example 3, using a three-stage field plate 433 and a double-layer dielectric structure without a lightly doped buffer, the breakdown voltage is 1264V, both significantly lower than the results obtained in the embodiments of this invention. This indicates that there is a significant synergistic effect among the lightly doped electric field buffer 401, the multi-stage dielectric trench structure 402, and the stepped field plate structure 403, and all three are indispensable.

[0073] From the perspective of electric field distribution mechanism, the lightly doped buffer is mainly responsible for regulating the longitudinal electric field distribution inside the device, the multi-level dielectric trench structure 402 is mainly responsible for reconstructing the lateral electric field distribution, while the stepped field plate is responsible for regulating the surface potential distribution, and the composite passivation layer 405 is responsible for suppressing interface defects and surface leakage paths. Each structure acts on the device interior, dielectric interface, surface region, and environmental interface, respectively, and together constitutes a three-dimensional composite electric field control system covering the longitudinal, lateral, and surface directions. This allows the terminal region to participate more fully in the process of bearing the applied voltage, thereby achieving the continuity and homogenization of the overall electric field distribution of the device.

[0074] The test results from the combined embodiments and comparative examples show that the present invention reduces the maximum peak electric field of the device from 8.42 MV / cm to 5.65 MV / cm, a reduction of approximately 32.9%; increases the breakdown voltage from 823 V to 1802 V, an increase of approximately 118.9%; reduces the leakage current under a 1000 V reverse bias by approximately three orders of magnitude; and shifts the breakdown location from the edge of the active region 3 to the bulk region of the drift layer. This indicates that the breakdown mode of the device has changed from edge-induced premature breakdown to a bulk breakdown mode approaching the theoretical limit of the material, demonstrating that the terminal region can more fully utilize the advantages of the high critical breakdown field strength of β-Ga2O3 material, improving material utilization and terminal utilization.

[0075] Furthermore, since the termination region of this invention is entirely composed of an N-type semiconductor region and an insulating dielectric structure, and does not depend on a P-type doped region or a PN junction structure, it effectively overcomes the problem of the difficulty in achieving stable P-type doping in β-Ga2O3 materials, and avoids the dependence of traditional junction termination extension structures and field-limiting ring structures on the PN junction. Therefore, it is applicable not only to all-N-type vertical MOSFETs, but also to all-N-type Schottky diodes, lateral MOSFETs, and other all-N-type high-voltage power devices, exhibiting good structural compatibility and process versatility. This facilitates the formation of a unified all-N-type device termination design platform, reduces design complexity in the development of different devices, improves process reusability, and provides a reliable termination structure foundation for the large-scale application of ultra-wide bandgap gallium oxide power devices.

[0076] The above are merely specific embodiments of the present invention, but the technical features of the present invention are not limited thereto. Any simple changes, equivalent substitutions, or modifications made based on the present invention to solve essentially the same technical problems and achieve essentially the same technical effects are all covered within the protection scope of the present invention.

Claims

1. A universal structure for terminating multiple composite electric fields that is compatible with all N-type devices, characterized in that, It includes a semiconductor substrate (1), an N-type drift layer (2) formed on the semiconductor substrate (1), an active region (3), and a terminal region disposed around the active region (3); The terminal region includes an electric field buffer zone (401) located outside the active region (3), a multi-level dielectric trench structure (402) formed in the N-type drift layer (2), a stepped field plate structure (403) disposed in the corresponding region of the multi-level dielectric trench structure (402), and a composite passivation layer (405) covering the surface of the terminal region. The multi-level media trench structure (402) includes a first media layer disposed along the sidewall and bottom of the trench and a second media layer filled inside the first media layer; The stepped field plate structure (403) is electrically connected to the electrode of the active region (3); The electric field buffer zone (401) is a lightly doped N-type region located between the active region (3) and the multi-level dielectric trench structure (402); Wherein, the dielectric constant of the first dielectric layer is less than that of the second dielectric layer, and the critical breakdown field strength of the first dielectric layer is greater than that of the semiconductor substrate (1) material; The terminal region is composed of an N-type semiconductor region and an insulating dielectric structure.

2. The universal structure for multiple composite electric field termination adapted to all N-type devices according to claim 1, characterized in that, The stepped field plate structure (403) includes at least a first-level field plate (431), a second-level field plate (432) and a third-level field plate (433) arranged sequentially in the direction away from the active region (3). Adjacent field plates are isolated by an insulating dielectric layer (404), and the extension length of each level of field plate increases step by step in the direction away from the active region (3).

3. The universal structure for multiple composite electric field termination adapted to all N-type devices according to claim 2, characterized in that, The stepped field plate structure (403) is disposed on the surface of the second medium layer.

4. The universal structure for multiple composite electric field termination adapted to all N-type devices according to claim 2, characterized in that, The stepped field plate structure (403) is embedded inside the second medium layer.

5. The universal structure for multiple composite electric field termination adapted to all N-type devices according to claim 1, characterized in that, The composite passivation layer (405) includes one or more of a silicon oxide layer, a silicon nitride layer, and an aluminum oxide layer.

6. The universal structure for multiple composite electric field termination adapted to all N-type devices according to claim 1, characterized in that, The doping concentration of the electric field buffer (401) is lower than that of the N-type drift layer (2) near the active region (3) to form a lightly doped N-type buffer.

7. The universal structure for multiple composite electric field termination adapted to all N-type devices according to claim 1, characterized in that, In addition to the first and second dielectric layers, the multi-level dielectric trench structure (402) also includes at least one additional dielectric layer disposed between or outside the two dielectric layers, and the dielectric constant of each dielectric layer varies in a stepwise manner along the direction away from the active region (3).

8. The universal structure for multiple composite electric field termination adapted to all N-type devices according to claim 1, characterized in that, The first dielectric layer is formed using one or more of silicon dioxide, fluorinated polyimide, or benzocyclobutene; the second dielectric layer is formed using one or more of aluminum oxide, hafnium oxide, or silicon nitride.

9. The universal structure for multiple composite electric field termination adapted to all N-type devices according to claim 1, characterized in that, The semiconductor substrate (1) is a β-phase gallium oxide substrate, and the N-type drift layer (2) is an N-type epitaxial layer (101) formed on the β-phase gallium oxide substrate.

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