Display panel, manufacturing method, repairing method and display device

CN122846972APending Publication Date: 2026-09-29HEFEI XINSHENG OPTOELECTRONICS TECH CO LTD +1
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Patent Information

Application Number
CN202610992014.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-03
Publication Date
2026-09-29

AI Technical Summary

Technical Problem

[0003]本发明的主要目的在于提供一种显示面板、制作方法、维修方法和显示装置,解决相关技术中至少部分子像素的横向宽度较大,而导致的无法满足打印墨水着落后延展的问题

Benefits of technology

[0032]本发明实施例所述的显示面板、制作方法、维修方法和显示装置针对对应的子像素开口的宽度较大的子像素,将该子像素开口设置为包括阵列排布的至少两行至少两列子开口,以减小各子开口的宽度,并在同一子像素开口内,相邻的子开口之间设置有所述第一挡墙,将横向部和纵向部同时进行Line Bank设计,解决同一子像素由于打印工艺带来的墨水延展性问题,确保显示效果。

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Abstract

This invention provides a display panel, a manufacturing method, a repair method, and a display device. The display panel includes: a display substrate, on which a plurality of pixel regions are arranged in an array; within each pixel region, corresponding sub-pixels are disposed; a pixel demarcation structure located on the display substrate, the pixel demarcation structure having sub-pixel openings at corresponding positions of each of the pixel regions; at least a portion of the sub-pixel openings comprising N rows and M columns of sub-openings arranged in an array; the pixel demarcation structure including a first barrier and a second barrier; N and M being integers greater than 1; within the same sub-pixel opening, a first barrier is disposed between adjacent sub-openings; a second barrier is disposed between adjacent sub-pixel openings. This invention enables display products to be compatible with printing ink dripping issues.
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Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a display panel, a manufacturing method, a repair method, and a display device. Background Technology

[0002] In related technologies, when fabricating a luminescent material layer using inkjet printing, a pixel demarcation layer needs to be pre-fabricated on the display substrate to precisely define the ink's entry into the luminescent area of ​​a specified pixel. Typically, this pixel demarcation layer has multiple sub-pixel openings. During inkjet printing, the ink solution needs to be precisely sprayed into these sub-pixel openings to form the luminescent material layer. However, due to limitations in the ink material, there is a problem where the lateral width of the sub-pixel openings corresponding to cyan and red sub-pixels is relatively large, leading to insufficient ink spread after application. Summary of the Invention

[0003] The main objective of this invention is to provide a display panel, manufacturing method, repair method, and display device to solve the problem in related technologies where at least some sub-pixels have a large lateral width, which prevents them from spreading after printing ink has adhered.

[0004] In one aspect, embodiments of the present invention provide a display panel, comprising:

[0005] The display substrate is divided into multiple pixel regions arranged in an array; within each pixel region, a corresponding sub-pixel is provided.

[0006] A pixel demarcation structure located on the display substrate, wherein the pixel demarcation structure has sub-pixel openings at corresponding positions of each pixel region; at least some of the sub-pixel openings include N rows and M columns of sub-openings arranged in an array; the pixel demarcation structure includes a first barrier and a second barrier; N and M are integers greater than 1;

[0007] Within the same sub-pixel opening, a first barrier is provided between adjacent sub-openings;

[0008] A second barrier is provided between adjacent sub-pixel openings.

[0009] Optionally, the display substrate includes a data line; the sub-pixel opening includes a plurality of sub-openings located in the same column arranged along a first direction, and the sub-pixel opening includes sub-openings located in the same row arranged along a second direction, wherein the first direction is the extension direction of the data line, and the second direction intersects with the first direction.

[0010] Optionally, the second barrier includes a first barrier pattern and a second barrier pattern; the first barrier pattern and the second barrier pattern are arranged sequentially along a direction away from the display substrate.

[0011] Optionally, the first barrier is made of a hydrophilic material, and the second barrier pattern is made of a hydrophobic material.

[0012] Optionally, the orthographic projection of the first barrier pattern on the display substrate is located inside the orthographic projection of the second barrier pattern on the display substrate.

[0013] Optionally, the height of the first retaining wall is less than the height of the second retaining wall.

[0014] The display panel according to at least one embodiment of the present invention further includes an anode disposed in the sub-pixel opening; at least a portion of the anode is disposed between the display substrate and the pixel defining structure;

[0015] The anode comprises N rows and M columns of anode patterns, at least a portion of which is disposed within a corresponding sub-opening;

[0016] Anode patterns corresponding to the same sub-pixel opening are electrically connected via a first connecting line;

[0017] The width of the first connecting line is smaller than the predetermined width.

[0018] Optionally, the length of the sub-opening along the first direction is less than a predetermined length, and the length of the sub-opening along the second direction is less than a predetermined length;

[0019] The predetermined length is greater than or equal to 30 μm and less than or equal to 50 μm.

[0020] The display panel according to at least one embodiment of the present invention further includes a light-emitting material layer disposed on the side of the pixel defining structure opposite to the display substrate, the light-emitting material layer being located within the sub-pixel opening.

[0021] Optionally, at least one pixel may include four sub-pixels;

[0022] The number of sub-openings included in the sub-pixel opening corresponding to at least one of the sub-pixels is different from the number of sub-openings included in the sub-pixel opening corresponding to at least one other sub-pixel besides the at least one sub-pixel included in the at least one pixel.

[0023] Optionally, at least one pixel may include four sub-pixels;

[0024] The number of sub-openings included in the sub-pixel opening corresponding to at least one of the sub-pixels is the same as the number of sub-openings included in the sub-pixel opening corresponding to at least one other sub-pixel besides the at least one sub-pixel included in the at least one pixel.

[0025] Optionally, at least one pixel comprises two rows and two columns of sub-pixels;

[0026] The sub-pixel openings corresponding to two sub-pixels located in the same column include the same number of sub-openings.

[0027] In a second aspect, embodiments of the present invention provide a method for manufacturing a display panel, used to manufacture the aforementioned display panel, characterized in that the manufacturing method includes:

[0028] A first barrier and a second barrier are formed on a display substrate using a patterning process to define a plurality of sub-pixel openings; at least some of the sub-pixel openings include multiple rows and columns of sub-openings arranged in an array; the first barrier is located within the same sub-pixel opening and between adjacent sub-openings; the second barrier is located between adjacent sub-pixel openings.

[0029] In a third aspect, embodiments of the present invention provide a repair method applied to the aforementioned display panel, the repair method comprising:

[0030] When a dark spot occurs in at least one anode pattern included in the anode, the first connection line electrically connected to that anode pattern is disconnected.

[0031] In a fourth aspect, embodiments of the present invention provide a display device including the display panel described above.

[0032] The display panel, manufacturing method, repair method, and display device described in this embodiment of the invention, for subpixels with a larger width of the corresponding subpixel opening, configure the subpixel opening as including at least two rows and at least two columns of sub-openings arranged in an array to reduce the width of each sub-opening. In the same subpixel opening, a first baffle is provided between adjacent sub-openings. The horizontal and vertical portions are simultaneously designed with line banks to solve the ink spreadability problem of the same subpixel due to the printing process and ensure the display effect. Attached Figure Description

[0033] Figure 1 This is a circuit diagram of at least one embodiment of a pixel;

[0034] Figure 2 This is a structural diagram of the display panel according to at least one embodiment of the present invention;

[0035] Figure 3 This is a structural diagram of the display panel according to at least one embodiment of the present invention;

[0036] Figure 4A and Figure 4B yes Figure 3 A-A' section view in the diagram;

[0037] Figure 5A and Figure 5B yes Figure 3Section B-B' in the diagram;

[0038] Figure 6A yes Figure 3 Layout diagram of the light-shielding layer in the middle;

[0039] Figure 6B yes Figure 3 Layout diagram of the semiconductor layer in the diagram;

[0040] Figure 6C yes Figure 3 Layout diagram of the gate metal layer in the middle;

[0041] Figure 6D for Figure 3 Layout diagram of the source and drain metal layers in the image;

[0042] Figure 6E yes Figure 3 Layout diagram of the first ITO (indium tin oxide) layer;

[0043] Figure 6F yes Figure 3 Layout diagram of the second ITO layer;

[0044] Figure 6G yes Figure 3 Layout diagram of the reflective ITO layer in the image;

[0045] Figure 7 This is a schematic diagram of at least one embodiment of the sub-aperture corresponding to the cyan sub-pixel;

[0046] Figure 8 This is a schematic diagram of at least one embodiment of the sub-aperture corresponding to the cyan sub-pixel. Detailed Implementation

[0047] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0048] In all embodiments of this invention, the transistors used can be thin-film transistors, field-effect transistors, or other devices with similar characteristics. In these embodiments, to distinguish the two electrodes of the transistor besides the gate, one electrode is referred to as the first electrode, and the other as the second electrode. In actual operation, when the transistor is a thin-film transistor or a field-effect transistor, the first electrode can be the drain, and the second electrode can be the source; or, the first electrode can be the source, and the second electrode can be the drain.

[0049] The display panel described in this embodiment of the invention includes:

[0050] The display substrate is divided into multiple pixel regions arranged in an array; within each pixel region, a corresponding sub-pixel is provided.

[0051] A pixel demarcation structure located on the display substrate, wherein the pixel demarcation structure has sub-pixel openings at corresponding positions of each pixel region; at least some of the sub-pixel openings include N rows and M columns of sub-openings arranged in an array; the pixel demarcation structure includes a first barrier and a second barrier; N and M are integers greater than 1;

[0052] Within the same sub-pixel opening, a first barrier is provided between adjacent sub-openings; a second barrier is provided between adjacent sub-pixel openings.

[0053] In related technologies, when fabricating a luminescent material layer using inkjet printing, a pixel demarcation layer needs to be pre-fabricated on the display substrate to precisely define the ink's entry into the luminescent area of ​​a specified pixel. Typically, this pixel demarcation layer has multiple sub-pixel openings. During inkjet printing, the ink solution needs to be precisely sprayed into these sub-pixel openings to form the luminescent material layer. However, due to limitations in the ink material, there is a problem where the lateral width of the sub-pixel openings corresponding to cyan and red sub-pixels is too large, resulting in insufficient ink spread after printing. To address this issue, for sub-pixels with larger corresponding sub-pixel openings, the sub-pixel opening is configured as an array of at least two rows and at least two columns of sub-openings to reduce the width of each sub-opening. Furthermore, within the same sub-pixel opening, a first baffle is provided between adjacent sub-openings. This simultaneous line bank design for both the lateral and vertical portions solves the ink spreadability problem caused by the printing process within the same sub-pixel, ensuring optimal display performance.

[0054] In at least one embodiment of the present invention, the display substrate includes a data line; the sub-pixel opening includes a plurality of sub-openings located in the same column arranged along a first direction, and the sub-pixel opening includes sub-openings located in the same row arranged along a second direction, wherein the first direction is the extension direction of the data line, and the second direction intersects the first direction.

[0055] Optionally, the first direction can be a vertical direction, and the second direction can be a horizontal direction.

[0056] In at least one embodiment of the present invention, for cyan sub-pixels and red sub-pixels, the corresponding sub-pixel openings can be set as two rows and two columns of sub-openings arranged in an array. Four light-emitting parts can be set in the sub-pixel openings. The four light-emitting parts share a common anode. Through the horizontal and vertical line bank design, the display product can be made compatible with the printing ink drop problem, thereby solving the display mura (display unevenness) such as the coffee ring.

[0057] Optionally, the length of the sub-opening along the first direction is less than a predetermined length, and the length of the sub-opening along the second direction is less than a predetermined length;

[0058] The predetermined length is greater than or equal to 30 μm and less than or equal to 50 μm.

[0059] In practice, the horizontal and vertical lengths of each sub-opening can be set to be smaller to improve the ink's spreadability in each sub-opening.

[0060] The display panel described in at least one embodiment of the present invention may further include a light-emitting material layer disposed on the side of the pixel defining structure opposite to the display substrate, the light-emitting material layer being located within the sub-pixel opening.

[0061] In at least one embodiment of the present invention, the height of the first retaining wall is less than the height of the second retaining wall.

[0062] In practice, adjacent sub-pixel openings correspond to adjacent pixel regions, and within adjacent pixel regions, sub-pixels of different colors are set.

[0063] Within the same sub-pixel opening, a first baffle is disposed between adjacent sub-openings; a second baffle is disposed between adjacent sub-pixel openings; the height of the second baffle is set to be greater than the height of the first baffle. This allows the second baffle to separate different colored light-emitting material layers during inkjet printing to form a light-emitting material layer within the sub-pixel opening. For example, it effectively prevents ink droplets falling into red pixel areas from mixing with ink droplets falling into cyan pixel areas, eliminating the need to consider the impact of ink droplet size on pixel resolution during the entire printing process. The spacing provided by the second baffle ensures the fabrication of high-resolution display panels using inkjet printing, improving display quality. Furthermore, since the height of the first baffle is lower than the height of the second baffle, light-emitting material of the same color can also flow between sub-openings corresponding to the same pixel area through the first baffle, increasing the diffusion range of the light-emitting material and improving the uniformity of the light-emitting material layer formation.

[0064] Optionally, the luminescent material layer can be an organic luminescent material layer.

[0065] In at least one embodiment of the present invention, the second barrier includes a first barrier pattern and a second barrier pattern; the first barrier pattern and the second barrier pattern are arranged sequentially along a direction away from the display substrate.

[0066] In at least one embodiment of the present invention, the first barrier pattern and the first barrier are made of a hydrophilic material, and the second barrier pattern is made of a hydrophobic material.

[0067] In at least one embodiment of the present invention, the orthographic projection of the first barrier pattern on the display substrate is located inside the orthographic projection of the second barrier pattern on the display substrate; that is, when the second barrier includes the first barrier pattern and the second barrier pattern, the second barrier pattern can cover the side of the first barrier pattern near the sub-opening, and the second barrier pattern can cover the side of the first barrier pattern away from the display substrate, so that when forming a light-emitting material layer in the sub-pixel opening using inkjet printing, the ink contacts the second barrier pattern between adjacent sub-pixel openings. Setting the second barrier pattern to be made of a hydrophobic material can prevent inks in different sub-pixel openings from contacting each other and causing color mixing; between adjacent sub-openings included in the same sub-pixel opening, the ink contacts the first barrier. Setting the first barrier to be made of a hydrophilic material can facilitate the ink spreading in the same sub-pixel opening and facilitate the formation of a more uniform film layer after the ink dries.

[0068] In a specific implementation, the first barrier and the first barrier pattern can be formed on the first pixel defining layer, and the second barrier pattern can be formed on the second pixel defining layer; the first pixel defining layer can be made of a hydrophilic material, and the second pixel defining layer can be made of a hydrophobic material. For example, the hydrophilic material can be silicon oxide or silicon nitride, such as silicon dioxide; the hydrophobic material can be polyimide, etc.

[0069] In at least one embodiment of the present invention, the first barrier is made of a hydrophilic material and the second barrier is made of a hydrophobic material.

[0070] In a specific implementation, the first barrier can be formed on the first pixel defining layer, the second barrier can be formed on the second pixel defining layer, the thickness of the second pixel defining layer can be greater than the thickness of the first pixel defining layer, the first pixel defining layer can be made of a hydrophilic material, and the second pixel defining layer can be made of a hydrophobic material.

[0071] like Figure 1 As shown, a pixel may include a cyan sub-pixel P1, a red sub-pixel P2, a green sub-pixel P3, and a blue sub-pixel P4;

[0072] The cyan sub-pixel P1 may include a first driving transistor TD1, a first first transistor T11, a first second transistor T12, a first capacitor C1, and a cyan light-emitting element;

[0073] The cyan light-emitting element includes a first cyan light-emitting part EC1, a second cyan light-emitting part EC2, a third cyan light-emitting part EC3, and a fourth cyan light-emitting part EC4;

[0074] The gate of T11 is electrically connected to the scan line G1, the drain of T11 is electrically connected to the gate of TD1, and the source of T11 is electrically connected to the cyan data line DTC.

[0075] The drain of TD1 is electrically connected to the power supply voltage line VDD, and the source of TD1 is electrically connected to the anode of the cyan light-emitting element; the cathode of the cyan light-emitting element is electrically connected to the low voltage terminal VSS.

[0076] The gate of T12 is electrically connected to G1, the drain of T12 is electrically connected to the source of TD1, and the source of T12 is electrically connected to the external sensing line SL.

[0077] The first terminal of C1 is electrically connected to the gate of TD1, and the second terminal of C1 is electrically connected to the source of TD1.

[0078] The red sub-pixel P2 may include a second driving transistor TD2, a second first transistor T21, a second second transistor T22, a second capacitor C2, and a red light-emitting element;

[0079] The red light-emitting element includes a first red light-emitting part ER1, a second red light-emitting part ER2, a third red light-emitting part ER3, and a fourth red light-emitting part ER4;

[0080] The gate of T21 is electrically connected to the scan line G1, the drain of T21 is electrically connected to the gate of TD2, and the source of T21 is electrically connected to the red data line DTR.

[0081] The drain of TD2 is electrically connected to the power supply voltage line VDD, the source of TD2 is electrically connected to the anode of the red light-emitting element, and the cathode of the red light-emitting element is electrically connected to the low voltage terminal VSS.

[0082] The gate of T22 is electrically connected to G1, the drain of T22 is electrically connected to the source of TD2, and the source of T22 is electrically connected to the external sensing line SL.

[0083] The first terminal of C2 is electrically connected to the gate of TD2, and the second terminal of C2 is electrically connected to the source of TD2.

[0084] The green sub-pixel P3 may include a third driving transistor TD3, a third first transistor T31, a third second transistor T32, a third capacitor C3, and a green light-emitting element;

[0085] The green light-emitting element includes a first green light-emitting part EG1 and a second green light-emitting part EG2;

[0086] The gate of T31 is electrically connected to scan line G1, the drain of T31 is electrically connected to the gate of TD3, and the source of T31 is electrically connected to the green data line DTG.

[0087] The drain of TD3 is electrically connected to the power supply voltage line VDD, the source of TD3 is electrically connected to the anode of the green light-emitting element, and the cathode of the green light-emitting element is electrically connected to the low voltage terminal VSS.

[0088] The gate of T32 is electrically connected to G1, the drain of T32 is electrically connected to the source of TD3, and the source of T32 is electrically connected to the external sensing line SL.

[0089] The first terminal of C3 is electrically connected to the gate of TD3, and the second terminal of C3 is electrically connected to the source of TD3.

[0090] The blue sub-pixel P4 may include a fourth driving transistor TD4, a fourth first transistor T41, a fourth second transistor T42, a fourth capacitor C4, and a blue light-emitting element;

[0091] The blue light-emitting element includes a first blue light-emitting part EB1 and a second blue light-emitting part EB2;

[0092] The gate of T41 is electrically connected to the scan line G1, the drain of T41 is electrically connected to the gate of TD4, and the source of T41 is electrically connected to the blue data line DTB.

[0093] The drain of TD4 is electrically connected to the power supply voltage line VDD, the source of TD4 is electrically connected to the anode of the blue light-emitting element, and the cathode of the blue light-emitting element is electrically connected to the low voltage terminal VSS.

[0094] The gate of T42 is electrically connected to G1, the drain of T42 is electrically connected to the source of TD4, and the source of T42 is electrically connected to the external sensing line SL.

[0095] The first terminal of C4 is electrically connected to the gate of TD4, and the second terminal of C4 is electrically connected to the source of TD4.

[0096] exist Figure 1 In the diagram, the line labeled AX is a multiplexed control line.

[0097] Figure 1The diagram shows the smallest repeating unit of the pixel circuit included in the display device. Because the aperture ratios of the cyan and red subpixels are relatively large, the lateral length of the subpixel opening corresponding to the cyan subpixel is relatively large, and the lateral length of the subpixel opening corresponding to the red subpixel is also increased. This cannot meet the problem of ink spreading after printing. At least one embodiment of the present invention sets the cyan light-emitting element to include four cyan light-emitting parts and the red light-emitting element to include four red light-emitting parts. That is, the subpixel opening corresponding to the cyan subpixel is set to include two rows and two columns of sub-openings arranged in an array, and the subpixel opening corresponding to the red subpixel is set to include two rows and two columns of sub-openings arranged in an array. This solves the ink spreadability problem of the same subpixel due to the printing process and ensures the display effect.

[0098] like Figure 2 As shown, the first sub-pixel opening corresponds to the cyan sub-pixel, and the first sub-pixel opening includes the first first sub-opening K11, the second first sub-opening K21, the third first sub-opening K31 and the fourth first sub-opening K41;

[0099] The second sub-pixel opening corresponds to the red sub-pixel; the second sub-pixel opening includes the first second sub-opening K12, the second second sub-opening K22, the third second sub-opening K32 and the fourth second sub-opening K42;

[0100] The third sub-pixel opening corresponds to the green sub-pixel; the third sub-pixel opening includes the first third sub-opening K13 and the second third sub-opening K23;

[0101] The fourth sub-pixel opening corresponds to the blue sub-pixel; the fourth sub-pixel opening includes the first fourth sub-opening K14 and the second fourth sub-opening K24;

[0102] exist Figure 2 In the middle, a second pixel delimiting layer is set outside the solid line frame, and a first pixel delimiting layer is set outside the dashed line frame;

[0103] An anode pattern is set inside the opening of each sub-pixel;

[0104] The anode pattern, the first pixel defining layer, and the second pixel defining layer are arranged sequentially along a direction away from the display substrate;

[0105] exist Figure 2 In the diagram, A1 is the first anode pattern, A2 is the second anode pattern, A3 is the third anode pattern, A4 is the fourth anode pattern, A5 is the fifth anode pattern, A6 is the sixth anode pattern, A7 is the seventh anode pattern, and A8 is the eighth anode pattern.

[0106] A portion of the first anode pattern A1 is located at K11, a portion of the first anode pattern A1 is located at K21, a portion of the second anode pattern A2 is located at K31, and a portion of the second anode pattern A2 is located at K41;

[0107] A portion of the third anode pattern A3 is located at K12, a portion of the third anode pattern A3 is located at K22, a portion of the fourth anode pattern A4 is located at K32, and a portion of the fourth anode pattern A4 is located at K42.

[0108] The fifth anode pattern A5 is partially located at K13, and the sixth anode pattern A6 is partially located at K23;

[0109] The seventh anode pattern A7 is partially located at K14, and the eighth anode pattern A8 is partially located at K24;

[0110] The thickness of the first pixel defining layer is less than the thickness of the second pixel defining layer. The first pixel defining layer is made of a hydrophilic material, and the second pixel defining layer is made of a hydrophobic material.

[0111] exist Figure 2 In at least one embodiment shown, the lateral lengths of K11, K21, K31, K41, K12, K22, K32, and K42 are less than 50 μm, so that the printed ink has good extensibility in each sub-opening, which can accommodate the problem of ink landing and thus solve the coffee ring problem.

[0112] Optionally, at least one pixel may include four sub-pixels;

[0113] The number of sub-openings included in the sub-pixel opening corresponding to at least one of the sub-pixels is different from the number of sub-openings included in the sub-pixel opening corresponding to at least one other sub-pixel besides the at least one sub-pixel included in the at least one pixel.

[0114] exist Figure 2 In at least one embodiment shown, the first sub-pixel opening and the second sub-pixel opening may include four sub-openings, and the third sub-pixel opening and the fourth sub-pixel opening may include two sub-openings. The number of sub-openings included in the first sub-pixel opening is different from the number of sub-openings included in the third sub-pixel opening, the number of sub-openings included in the first sub-pixel opening is different from the number of sub-openings included in the fourth sub-pixel opening, the number of sub-openings included in the second sub-pixel opening is different from the number of sub-openings included in the third sub-pixel opening, and the number of sub-openings included in the second sub-pixel opening is different from the number of sub-openings included in the fourth sub-pixel opening.

[0115] Optionally, at least one pixel may include four sub-pixels;

[0116] The number of sub-openings included in the sub-pixel opening corresponding to at least one of the sub-pixels is the same as the number of sub-openings included in the sub-pixel opening corresponding to at least one other sub-pixel besides the at least one sub-pixel included in the at least one pixel.

[0117] exist Figure 2 In at least one embodiment shown, the first sub-pixel opening and the second sub-pixel opening may include four sub-openings, and the third sub-pixel opening and the fourth sub-pixel opening may include two sub-openings. The number of sub-openings included in the first sub-pixel opening is the same as the number of sub-openings included in the second sub-pixel opening, and the number of sub-openings included in the third sub-pixel opening is the same as the number of sub-openings included in the fourth sub-pixel opening.

[0118] Optionally, at least one pixel comprises two rows and two columns of sub-pixels;

[0119] The sub-pixel openings corresponding to two sub-pixels located in the same column include the same number of sub-openings.

[0120] exist Figure 2 In at least one embodiment shown, the first sub-pixel opening and the second sub-pixel opening are located in the first column, and the third sub-pixel opening and the fourth sub-pixel opening are located in the second column. The number of sub-openings included in the first sub-pixel opening located in the first column is the same as the number of sub-openings included in the second sub-pixel opening located in the first column, and the number of sub-openings included in the third sub-pixel opening located in the second column is the same as the number of sub-openings included in the fourth sub-pixel opening located in the second column.

[0121] Figure 3 This is a layout diagram of the display panel according to at least one embodiment of the present invention.

[0122] Figure 4A and Figure 4B yes Figure 3 A-A' section diagram in the middle, Figure 5A and Figure 5B yes Figure 3 The B-B' section diagram.

[0123] exist Figure 4A In the diagram, 40 is the substrate, 41 is the light-shielding layer, 42 is the buffer layer, 43 is the first insulating layer, 44 is the semiconductor layer, 45 is the gate metal layer, 46 is the interlayer dielectric layer, 47 is the source / drain metal layer, 48 is the passivation layer, 49 is the resin layer, 410 is the first ITO (indium tin oxide) layer, 411 is the reflective anode layer, 412 is the first pixel defining layer, and 413 is the second pixel defining layer.

[0124] The anode layer includes a first ITO layer and a reflective anode layer.

[0125] exist Figure 4B In the diagram, DX11 is the first retaining wall graphic, DX12 is the first second retaining wall graphic, and the first second retaining wall includes the first first retaining wall graphic DX11 and the first second retaining wall graphic DX12. The first retaining wall is labeled D11. The height of the first second retaining wall is greater than the height of the first first retaining wall D11.

[0126] like Figure 4B As shown, within the first sub-pixel opening, a first first barrier wall D11 is provided between the first first sub-opening K11 and the third first sub-opening K31; a first second barrier wall is provided between adjacent sub-pixel openings; the height of the first second barrier wall is set to be greater than the height of the first first barrier wall D11, so that when forming a light-emitting material layer in the sub-pixel opening using inkjet printing technology, light-emitting material layers of different colors can be separated by the first second barrier wall; the separation by the first second barrier wall ensures the fabrication of high-pixel-resolution display panels by inkjet printing technology; the height of the first first barrier wall D11 is lower than the height of the first second barrier wall, and light-emitting material of the same color can also flow between K11 and K31 through the first first barrier wall D11, increasing the diffusion range of the light-emitting material and improving the film uniformity of the light-emitting material layer.

[0127] exist Figure 4B In at least one embodiment shown, the first first barrier pattern DX11 and the first first barrier D11 are made of a hydrophilic material, and the first second barrier pattern DX12 is made of a hydrophobic material.

[0128] like Figure 4BAs shown, the orthographic projection of the first first barrier pattern DX11 on the display substrate is located inside the orthographic projection of the first second barrier pattern DX12 on the display substrate; that is, when the first second barrier includes the first first barrier pattern DX11 and the first second barrier pattern DX12, the first second barrier pattern DX12 can cover the side of the first first barrier pattern DX11 near K11, and the first second barrier pattern DX12 can cover the side of the first first barrier pattern DX11 away from the display substrate. This allows the ink to contact the first second barrier pattern DX12 between adjacent sub-pixel openings when forming a light-emitting material layer using inkjet printing. By making the first second barrier pattern DX12 a hydrophobic material, inks in different sub-pixel openings can be prevented from coming into contact with each other and causing color mixing. Between K11 and K31, the ink contacts the first first barrier D11, which is made of a hydrophilic material. This facilitates the ink spreading within the same sub-pixel opening and helps the ink form a more uniform film after drying.

[0129] exist Figure 4B In at least one embodiment shown, the first first barrier D11 and the first first barrier pattern DX11 can be formed on the first pixel defining layer, and the first second barrier pattern DX12 can be formed on the second pixel defining layer; the first pixel defining layer can be made of a hydrophilic material, and the second pixel defining layer can be made of a hydrophobic material. For example, the hydrophilic material can be silicon oxide or silicon nitride, such as silicon dioxide; the hydrophobic material can be polyimide, etc.

[0130] exist Figure 4A , Figure 4B , Figure 5A , Figure 5B In at least one embodiment shown, the display substrate may include a substrate, and a light-shielding layer, a buffer layer, a first insulating layer, a semiconductor layer, a gate metal layer, an interlayer dielectric layer, a source / drain metal layer, a passivation layer, and a resin layer disposed on the substrate.

[0131] like Figure 5A , Figure 5B As shown, along the horizontal direction, there are a third second sub-opening K32, a fourth second sub-opening K42, and a second fourth sub-opening K24 arranged sequentially.

[0132] exist Figure 5B As shown, a second second barrier is provided between the second sub-pixel opening and the fourth sub-pixel opening, and a second first barrier D21 is provided between K32 and K42;

[0133] The second retaining wall may include the second first retaining wall graphic DX21 and the second second retaining wall DX22;

[0134] The height of the second retaining wall is greater than the height of the second first retaining wall D21;

[0135] The second first barrier pattern DX21 and the second second barrier pattern DX22 are arranged sequentially along the direction away from the display substrate;

[0136] DX21 and D21 can be made of hydrophilic materials, while DX22 can be made of hydrophobic materials;

[0137] D21 and DX21 can be formed in the first pixel boundary layer, and DX22 can be formed in the second pixel boundary layer.

[0138] Figure 6A yes Figure 3 Layout diagram of the light-shielding layer in the middle; Figure 6B yes Figure 3 Layout diagram of the semiconductor layer in the diagram; Figure 6C yes Figure 3 Layout diagram of the gate metal layer in the middle. Figure 6D for Figure 3 Layout diagram of the source and drain metal layers in the middle. Figure 6E yes Figure 3 Layout diagram of the first ITO (indium tin oxide) layer in the middle. Figure 6F yes Figure 3 Layout diagram of the second ITO layer in the middle. Figure 6G yes Figure 3 The layout diagram of the reflective ITO layer in the image.

[0139] exist Figure 3 In at least one embodiment shown, the anode layer includes a first ITO layer, a second ITO layer, and a reflective ITO layer arranged sequentially along a direction away from the substrate; the first ITO layer and the second ITO layer are made of ITO, and the reflective ITO layer is made of ITO and a reflective material.

[0140] exist Figure 3 In at least one embodiment shown, the display substrate may include a substrate, and a light-shielding layer, a semiconductor layer, a gate metal layer and a source / drain metal layer arranged sequentially in a direction away from the substrate.

[0141] exist Figure 6A In the diagram, the first shading pattern is labeled ZX1, the second shading pattern is labeled ZX2, the third shading pattern is labeled ZX3, and the fourth shading pattern is labeled ZX4.

[0142] exist Figure 6BIn the diagram, AY1 is the active pattern for TD1, AY11 is the active pattern for T11, and AY12 is the active pattern for T12; AY2 is the active pattern for TD2, AY21 is the active pattern for T21, and AY22 is the active pattern for T22; AY3 is the active pattern for TD3, AY31 is the active pattern for T31, and AY32 is the active pattern for T32; AY4 is the active pattern for TD4, AY41 is the active pattern for T41, and AY42 is the active pattern for T42.

[0143] exist Figure 6C In the diagram, the first plate of C1 is labeled C1a, the first plate of C2 is labeled C2a, the first plate of C3 is labeled C3a, and the first plate of C4a is labeled C4a.

[0144] exist Figure 6D The diagram shows VDD, DTC, DTR, SL, DTG, DTB, and AX.

[0145] exist Figure 6E In the diagram, A11 is the first anode pattern section, A21 is the second anode pattern section, A31 is the third anode pattern section, A41 is the fourth anode pattern section, A51 is the fifth anode pattern section, A61 is the sixth anode pattern section, A71 is the seventh anode pattern section, and A81 is the eighth anode pattern section.

[0146] exist Figure 6F In the middle, each ITO graphic is used as a pad;

[0147] exist Figure 6G In the diagram, A12 is the first second anode pattern section, A22 is the second second anode pattern section, A32 is the third second anode pattern section, A42 is the fourth second anode pattern section, A52 is the fifth second anode pattern section, A62 is the sixth second anode pattern section, A72 is the seventh second anode pattern section, and A82 is the eighth second anode pattern section.

[0148] exist Figures 3-6GIn at least one embodiment shown, the first anode pattern includes A11 and A12, the second anode pattern includes A21 and A22, the third anode pattern includes A31 and A32, the fourth anode pattern includes A41 and A42, the fifth anode pattern includes A51 and A52, the sixth anode pattern includes A61 and A62, the seventh anode pattern includes A71 and A72, and the eighth anode pattern includes A81 and A82.

[0149] exist Figures 3-6G In at least one embodiment shown, the first barrier formed on the first pixel defining layer serves only as a dam. Since the film thickness of the first pixel defining layer is different from that of the second pixel defining layer, and their hydrophilic and hydrophobic functions are different, the first pixel defining layer is not effectively retained between different sub-pixels. The first pixel defining layer is only retained between adjacent sub-openings in the same sub-pixel opening. This design requires the thickness of the second pixel defining layer to be greater than the thickness of the first pixel defining layer.

[0150] Figure 7 This is a schematic diagram of at least one embodiment of the sub-aperture corresponding to the cyan sub-pixel.

[0151] exist Figure 7 In the diagram, the one labeled A1 is the first anode pattern, and the one labeled A2 is the second anode pattern;

[0152] A1 and A2 are electrically connected via a first connection pattern;

[0153] The first connection diagram includes a first first connection line Y1 and a second first connection line Y2 that are interconnected.

[0154] exist Figure 7 In at least one embodiment shown, K11 and K21 share A1, K31 and K41 share A2, and the cyan sub-pixel can be repaired through Y1 and Y2;

[0155] Specifically, when A1 has a dark spot, Y1 can be cut off by laser; when A2 has a dark spot, Y2 can be cut off by laser.

[0156] exist Figure 7 In at least one embodiment shown, the linewidths of Y1 and Y2 are less than a predetermined linewidth, which may be greater than or equal to 5 μm and less than or equal to 12 μm. For example, the linewidths of Y1 and Y2 may be greater than or equal to 6 μm and less than or equal to 10 μm.

[0157] The display panel according to at least one embodiment of the present invention further includes an anode disposed in the sub-pixel opening; at least a portion of the anode is disposed between the display substrate and the pixel defining structure;

[0158] The anode comprises N rows and M columns of anode patterns, at least a portion of which is disposed within corresponding sub-openings; N and M are integers greater than 1;

[0159] Anode patterns corresponding to the same sub-pixel opening are electrically connected via a first connecting line;

[0160] The width of the first connecting line is smaller than the predetermined width.

[0161] In the panel described in at least one embodiment of the present invention, when a dark spot occurs in the anode pattern corresponding to the sub-opening, the corresponding first connecting line can be cut for repair, which can ensure that the display panel has a better lifespan and a lower risk of image retention.

[0162] Optionally, the predetermined line width can be greater than or equal to 5 μm and less than or equal to 12 μm. For example, the line width of the first connecting line can be greater than or equal to 6 μm and less than or equal to 10 μm.

[0163] Figure 8 This is a schematic diagram of at least one embodiment of the sub-aperture corresponding to the cyan sub-pixel.

[0164] exist Figure 8 In the diagram, A1 is the first anode pattern, A2 is the second anode pattern, A3 is the third anode pattern, and A4 is the fourth anode pattern.

[0165] A1 corresponds to K11, A2 corresponds to K21, A3 corresponds to K31, and A4 corresponds to K41;

[0166] A1 and A2 are electrically connected via the first connecting wire Y1; A3 and A4 are electrically connected via the second connecting wire Y2; A1 and A3 are electrically connected via the third connecting wire Y3; and A2 and A4 are electrically connected via the fourth connecting wire Y4.

[0167] A2 and A4 are also electrically connected via a second connecting graphic;

[0168] The second connection diagram includes a fifth first connection line Y5 and a sixth first connection line Y6 that are interconnected.

[0169] exist Figure 8 In at least one embodiment shown, when a dark spot exists in A1, Y1 and Y3 can be cut off by laser.

[0170] When A2 has a dark spot, Y1, Y4 and Y5 can be cut off by laser.

[0171] When there is a dark spot in A3, Y3 and Y4 can be cut off by laser.

[0172] When there are dark spots in A4, Y2, Y4 and Y6 can be cut off by laser.

[0173] By adopting Figure 8 At least one embodiment shown can be used to repair each anode pattern and isolate sub-openings where dark spots occur, thereby ensuring that the remaining sub-openings work normally.

[0174] The method for manufacturing a display panel according to an embodiment of the present invention is used to manufacture the aforementioned display panel, and the manufacturing method includes:

[0175] A first barrier and a second barrier are formed on a display substrate using a patterning process to define a plurality of sub-pixel openings; at least some of the sub-pixel openings include multiple rows and columns of sub-openings arranged in an array; the first barrier is located within the same sub-pixel opening and between adjacent sub-openings; the second barrier is located between adjacent sub-pixel openings.

[0176] The repair method described in this embodiment of the invention is applied to the aforementioned display panel, and the repair method includes:

[0177] When a dark spot occurs in at least one anode pattern included in the anode, the first connection line electrically connected to that anode pattern is disconnected.

[0178] The display device described in this embodiment of the invention includes the display panel described above.

[0179] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A display panel, characterized in that, include: The display substrate is divided into multiple pixel regions arranged in an array. Within the pixel area, corresponding sub-pixels are provided; A pixel defining structure located on the display substrate, wherein the pixel defining structure has sub-pixel openings at corresponding positions of each pixel region; at least some of the sub-pixel openings include N rows and M columns of sub-openings arranged in an array. The pixel demarcation structure includes a first barrier and a second barrier; N and M are integers greater than 1; Within the same sub-pixel opening, a first barrier is provided between adjacent sub-openings; A second barrier is provided between adjacent sub-pixel openings.

2. The display panel as described in claim 1, characterized in that, The display substrate includes a data line; the sub-pixel opening includes a plurality of sub-openings located in the same column arranged along a first direction, and the sub-pixel opening includes sub-openings located in the same row arranged along a second direction, the first direction being the extension direction of the data line, and the second direction intersecting the first direction.

3. The display panel as described in claim 1, characterized in that, The second barrier includes a first barrier pattern and a second barrier pattern; the first barrier pattern and the second barrier pattern are arranged sequentially along a direction away from the display substrate.

4. The display panel as described in claim 1, characterized in that, The first barrier is made of a hydrophilic material, and the second barrier is made of a hydrophobic material.

5. The display panel as described in claim 4, characterized in that, The orthographic projection of the first barrier pattern on the display substrate is located inside the orthographic projection of the second barrier pattern on the display substrate.

6. The display panel according to any one of claims 1 to 5, characterized in that, The height of the first retaining wall is less than the height of the second retaining wall.

7. The display panel according to any one of claims 1 to 5, characterized in that, It also includes an anode disposed in the sub-pixel opening; at least a portion of the anode is disposed between the display substrate and the pixel defining structure; The anode comprises N rows and M columns of anode patterns, at least a portion of which is disposed within a corresponding sub-opening; Anode patterns corresponding to the same sub-pixel opening are electrically connected via a first connecting line; The width of the first connecting line is smaller than the predetermined width.

8. The display panel as described in claim 2, characterized in that, The length of the sub-opening along the first direction is less than a predetermined length, and the length of the sub-opening along the second direction is less than a predetermined length; The predetermined length is greater than or equal to 30 μm and less than or equal to 50 μm.

9. The display panel according to any one of claims 1 to 5, characterized in that, It also includes a light-emitting material layer disposed on the side of the pixel defining structure opposite to the display substrate, the light-emitting material layer being located within the sub-pixel opening.

10. The display panel according to any one of claims 1 to 5, characterized in that, At least one pixel comprises four sub-pixels; The number of sub-openings included in the sub-pixel opening corresponding to at least one of the sub-pixels is different from the number of sub-openings included in the sub-pixel opening corresponding to at least one other sub-pixel besides the at least one sub-pixel included in the at least one pixel.

11. The display panel according to any one of claims 1 to 5, characterized in that, At least one pixel comprises four sub-pixels; The number of sub-openings included in the sub-pixel opening corresponding to at least one of the sub-pixels is the same as the number of sub-openings included in the sub-pixel opening corresponding to at least one other sub-pixel besides the at least one sub-pixel included in the at least one pixel.

12. The display panel according to any one of claims 1 to 5, characterized in that, At least one pixel comprises two rows and two columns of sub-pixels; The sub-pixel openings corresponding to two sub-pixels located in the same column include the same number of sub-openings.

13. A method for manufacturing a display panel, used to manufacture the display panel as described in any one of claims 1 to 12, characterized in that, The manufacturing method includes: A first barrier and a second barrier are formed on a display substrate using a patterning process to define a plurality of sub-pixel openings; at least some of the sub-pixel openings include multiple rows and columns of sub-openings arranged in an array; the first barrier is located within the same sub-pixel opening and between adjacent sub-openings; the second barrier is located between adjacent sub-pixel openings.

14. A repair method applied to the display panel as described in claim 7, characterized in that, The repair method includes: When a dark spot occurs in at least one anode pattern included in the anode, the first connection line electrically connected to that anode pattern is disconnected.

15. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 12.