An annealing method for an indium phosphide single crystal VGF furnace boron oxide encapsulation
Patent Information
- Application Number
- CN202610900670.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-22
- Publication Date
- 2026-10-09
AI Technical Summary
该发明能缓解传统LEC法生长界面不稳定和晶体热应力高的问题,但需要精确控制籽晶杆与坩埚的相对转速(5-15r/min)以及后期高达2500√R(R为晶体半径cm)的离心转速(r/min),生长过程中还需通过观察窗实时监测熔体液面形态并动态调节多段加热器功率,对设备控制精度和操作人员经验要求极高,且高速离心旋转带来的机械振动和坩埚支撑稳定性问题增加了晶体开裂的风险,实用性有待验证
[0021]本发明氧化硼封装后退火替代了封闭石英管内装红磷,降低退火成本且未影响晶片质量。采用晶锭退火而非晶片退火,提高了整个晶锭的电学参数一致性,其次,本发明采用的退火温度和降温速率等工艺参数,保证了退火的有效性。
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Figure CN122879839A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor material processing technology, and specifically relates to an annealing method for indium phosphide crystals. Background Technology
[0002] Indium phosphide (InP) is an emerging III-V compound semiconductor with irreplaceable strategic value in optical communications, radio frequency electronics, and new energy fields. InP boasts a direct bandgap of 1.35 eV and a wavelength of 5400 cm⁻¹. 2 Its high electron mobility of / V·s and excellent matching with optical fiber communication bands make it a key material for high-speed optical modules, 5G / 6G high-frequency devices (HEMT / HBT) and vehicle-mounted lidar.
[0003] Indium phosphide (IP) is prone to various point defects during single crystal growth, primarily including indium vacancies, phosphorus vacancies, indium antisites, phosphorus antisites, and interstitial atoms. Uncontrolled point defects can reduce mobility, shorten carrier lifetime, and impair device performance. Annealing is an effective method to improve crystal performance. At high temperatures, atoms in the crystal undergo thermal vibrations, resulting in minute displacements that restore them to their original lattice sites. This releases thermal stress in the crystal, reduces point defects, activates dopant atoms, and improves the electrical uniformity of the crystal.
[0004] Currently, the annealing method for indium phosphide is generally high-temperature annealing in a phosphorus atmosphere. During annealing, the indium phosphide single crystal needs to be sealed inside a quartz tube and filled with sufficient red phosphorus to generate vapor pressure. After annealing, the quartz tube is cut open, and the annealed single crystal is removed. The main drawbacks of this method are its complexity, the increased cost due to the single-use nature of the quartz tube, and the potential for fragmentation due to improper handling when annealing wafers.
[0005] Chinese patent application CN202510928745.2, entitled "A High-Pressure Annealing Apparatus and Annealing Method for Indium Phosphide Wafers," discloses an annealing apparatus and method for indium phosphide wafers. The high-pressure chamber, heaters in the high and low temperature zones, and the quartz tube used in the annealing apparatus are all conventional components of a horizontal gradient solidification (HGF) polycrystalline indium phosphide synthesis furnace. The difference lies in placing the wafer on a dedicated sample holder and slightly tilting the annealing furnace in both directions during annealing to allow the wafer to roll slightly, avoiding prolonged annealing on the same support point and the generation of localized thermal stress. This invention can alleviate the uniformity problem in wafer annealing, but it requires a complex sample holder and continuously changes the furnace tilt angle during annealing to make the wafer roll back and forth, increasing operational complexity and uncertainty. Its practicality remains to be verified.
[0006] Chinese patent application CN202310543999.3, entitled "An Annealing Method for Indium Phosphide Wafers," discloses an annealing method for indium phosphide wafers. This method uses a low-vacuum nitrogen atmosphere (1.0-1.2 Pa) instead of the traditional red phosphorus or phosphorus vapor protective atmosphere. By controlling the combination of process parameters—heating rate (0.4-1.3°C / min), annealing temperature (850-900°C), and holding time (12-15 h)—and in conjunction with a hot concentrated sulfuric acid pre-cleaning process, it achieves control of bright spot defects on the wafer surface. This invention eliminates the safety hazards and instantaneous flame generation during wafer removal associated with traditional phosphorus atmosphere annealing, simplifying the operation process. However, according to Xie Wenxia et al.'s paper "Modified horizontal synthesis of polycrystalline indium phosphide," indium phosphide undergoes slow dissociation at 750°C. Therefore, even when annealing wafers at low pressures to 850-900°C, there is still a significant risk of dissociation, affecting crystal quality.
[0007] Chinese patent application CN202311071433.1, entitled "A Method and Apparatus for Semiconductor Crystal Growth and In-situ Annealing," discloses a method and apparatus for growing and annealing indium phosphide crystals. This apparatus designs the seed crystal rod and crucible to rotate at different speeds in the same direction. In the later stages of crystal growth, high-speed centrifugal rotation is used to form a tubular structure in the melt, simultaneously achieving lateral crystal growth and in-situ annealing. This invention can alleviate the problems of unstable growth interface and high thermal stress in the traditional LEC method. However, it requires precise control of the relative rotation speed between the seed crystal rod and the crucible (5-15 r / min) and the centrifugal rotation speed (r / min) reaching up to 2500√R (R is the crystal radius in cm) in the later stages. During the growth process, the melt surface morphology needs to be monitored in real time through an observation window, and the power of multiple heaters needs to be dynamically adjusted. This places extremely high demands on equipment control precision and operator experience. Furthermore, the mechanical vibration caused by high-speed centrifugal rotation and the instability of the crucible support increase the risk of crystal cracking. Its practicality remains to be verified.
[0008] In addition, although the industry standard "SJ 21476-2018 Technical Requirements for Annealing Process of Indium Phosphide Single Crystal Ingots" specifies the process flow, materials, equipment, technical parameters and inspection methods for annealing indium phosphide single crystals, the range of process parameters is too wide, the control of phosphorus vapor pressure in the furnace is not clearly defined, and only a general annealing process is specified, lacking detailed requirements for single crystal ingots of different doping types and sizes.
[0009] Therefore, there is an urgent need in the field for an annealing method that is simple to operate, low in cost, can effectively prevent phosphorus volatilization, and is suitable for the batch processing of large-size ingots. Summary of the Invention
[0010] The purpose of this invention is to provide an efficient and practical crystal annealing method that can effectively release internal stress in the crystal, repair point defects in the crystal, improve the electrical uniformity of the crystal, and improve the quality of the crystal.
[0011] An annealing method for indium phosphide single crystal VGF in-furnace boron oxide encapsulation, characterized in that the method includes the following steps:
[0012] S1, the pBN crucible was cleaned thoroughly;
[0013] S2, the quartz tube is cleaned and dried;
[0014] S3, the ingot is placed in a pBN crucible. The front and rear ends of the crucible are filled with boron oxide. After the boron oxide melts, it envelops the entire ingot. High-pressure nitrogen gas is used to suppress the dissociation of indium phosphide crystal.
[0015] S4. Place the pBN crucible containing the crystal ingot into a quartz tube, and then place the entire quartz tube into the VGF furnace for annealing. The specific steps are as follows:
[0016] In S4-1, the VGF furnace is first evacuated, and the heating rate is set to 3-5℃ / min. Heating begins, and once the temperature reaches 470℃, it is kept constant for 1-3 hours. Then, the gas inlet valve is opened to purge the furnace with nitrogen until the gas pressure reaches 0.5-0.7MPa. The purging is then stopped, and the heating rate is continued at 3-7℃ / min.
[0017] S4-2, after the furnace temperature reaches 900-980℃, adjust the furnace pressure to 1.0MPa and maintain constant temperature and pressure for 20-50 hours, then cool down at a rate of 0.8-1℃ / min.
[0018] S4-3, when the temperature drops to 430℃, increase the cooling rate to 2-5℃ / min, and at the same time open the vent valve to release gas at a rate of 800 L / h to atmospheric pressure. Then turn off the heating and wait for the furnace to cool naturally to below 150℃ to complete the annealing.
[0019] Preferably, in step S4-2, the annealing temperature is 950°C, the annealing time is 50 hours, and the temperature is reduced at a rate of 0.8°C / min.
[0020] In this invention, the heating furnace used for annealing can be a vertical temperature gradient growth furnace (VGF furnace) for growing single crystals, and it does not require a complex crystal placement support. The process method is similar to that of crystal growth, making it easy to operate and mass-produce.
[0021] This invention replaces the use of red phosphorus within a sealed quartz tube with boron oxide encapsulation followed by annealing, reducing annealing costs without affecting wafer quality. The use of ingot annealing instead of wafer annealing improves the consistency of electrical parameters across the entire ingot. Furthermore, the annealing temperature and cooling rate parameters employed in this invention ensure the effectiveness of the annealing process. Attached Figure Description
[0022] Figure 1 The curve showing the relationship between temperature and air pressure during the annealing process in Example 1 is shown.
[0023] Figure 2 The photoluminescence (PL) detection spectrum of adjacent wafers annealed in Example 1 is shown.
[0024] Figure 3 The photoluminescence (PL) detection spectrum of adjacent wafers without annealing in Example 1 is shown.
[0025] Figure 4 This is a photograph of the crystal surface for Comparative Example 1. Detailed Implementation
[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0027] Example 1: Using an indium phosphide single crystal ingot (number: INP01), the single crystal has a diameter of 4 inches and a length of 100 mm. First, cut the head piece INP01-T and the tail piece INP01-W for subsequent comparison. Then, cut the single crystal into two segments (referred to as INP01-01 and INP01-02 respectively), each segment being approximately 50 mm. The head and tail of the corresponding two segments of the ingot are marked as INP01-01-t1 (head) and INP01-01-w1 (tail) respectively.
[0028] Before annealing, the ingots were cleaned by immersing them in an alkaline solution prepared with ammonia, hydrogen peroxide and deionized water in a ratio of 2:1:1 for 2 hours.
[0029] This embodiment uses ingot INP01-01 for boron oxide encapsulation annealing, including the following steps:
[0030] S1. Prepare a pBN crucible, soak it in aqua regia for 5 hours, then rinse it repeatedly with deionized water and anhydrous ethanol 3 times, and then clean it in an ultrasonic cleaner for 4 hours.
[0031] S2, prepare a quartz tube, soak it in 10% hydrofluoric acid for 10 minutes, rinse it repeatedly with deionized water and anhydrous ethanol 3 times, and then place it in a forced-air drying oven to bake at 120°C for 2 hours.
[0032] S3, place the crystal ingot INP01-01 in a pBN crucible. The front and rear ends of the crucible are filled with boron oxide. After the boron oxide melts, it envelops the entire crystal ingot. High-pressure nitrogen gas is used to suppress the dissociation of indium phosphide crystal.
[0033] S4. Place the pBN crucible containing the crystal into the quartz tube, and then place the entire quartz tube into the VGF furnace for annealing. The specific steps are as follows:
[0034] In S4-1, the VGF furnace is first evacuated for 15 minutes. The heating rate is set to 5℃ / min. Heating begins, and the temperature is maintained at 470℃ after the thermocouple TC reaches 1 hour. Then, the gas inlet valve is opened to purge the furnace with nitrogen at a rate of 0.75MPa / hour. When the pressure reaches 0.7MPa, the purging is stopped, and the heating continues at a rate of 5℃ / min.
[0035] S4-2, after the furnace temperature reaches 950℃, adjust the furnace pressure to 1.0MPa, maintain constant temperature and pressure for 20 hours, and then cool down at a rate of 0.8℃ / min.
[0036] S4-3, when the temperature drops to 430℃, increase the cooling rate to 5℃ / min, and at the same time open the vent valve to release gas at a rate of 800 L / h to atmospheric pressure. Then turn off the heating and wait for the furnace to cool naturally to below 150℃ to complete the annealing.
[0037] After annealing, the crucible and crystal are removed and placed in an ultrasonic vibratory washer. The water temperature is set to 90℃ and the ultrasonic frequency to 50Hz. After vibrating for 5 hours, the crystal is removed and separated from the crucible to obtain the annealed indium phosphide crystal. The head and tail wafers of the crystal are cut off and labeled as INP01-01-t1 and INP01-01-w1 for testing.
[0038] Comparative Example 1: Ingot INP01-02 was used; the annealing process differed from that of Example 1 in that:
[0039] In step S3, the ingot is placed in a pBN crucible, but no boron oxide is placed in the crucible.
[0040] After removing the annealed indium phosphide crystal, localized phosphorus enrichment was observed on the crystal surface, such as... Figure 4 Cut off the head and tail sections of the crystal, labeling them INP01-02-t1 and INP01-02-w1, for testing.
[0041] Electrical parameters were tested on the crystals obtained after annealing according to the method of Example 1 and Comparative Example 1, as well as the unannealed head wafer T and tail wafer W. The electrical parameter results of the samples of ingot INP01 from head to tail are shown in Table 1.
[0042]
[0043] As can be seen from Table 1:
[0044] Comparing the annealed wafer INP01-01-t1 treated in Example 1 with its unannealed adjacent wafer INP01-T, the resistivity change of the annealed wafer was extremely small, while the mobility increased by 6.2%, indicating that the crystallinity of the crystal was improved. The carrier concentration increased by 5.3%, indicating that annealing caused thermal vibrations in the doped atoms within the crystal, with some doped atoms entering the lattice and replacing phosphorus atoms, thus achieving electroactivation. The crystal quality was improved after annealing.
[0045] Compared to the unannealed adjacent INP-W wafers, the crystal treated in Comparative Example 1 exhibited lower mobility and higher carrier concentration, indicating a significant decline in crystal quality. The ingot without added boron oxide showed obvious surface dissociation after annealing, demonstrating the crucial role of boron oxide in preventing phosphorus volatilization.
[0046] X-ray diffraction was used to examine the rocking curve of the crystal, and the full width at half maximum (FWHM) of the curve was measured to characterize the crystal quality. The residual stress within the crystal was calculated using the tilting method, and the results are shown in Table 2. Compared to the unannealed wafer (INP-T,W), the annealed wafer (INP-01-t1,w1) had a slightly smaller FWHM and lower residual stress, indicating that the quality of the crystal was improved after annealing. In Comparative Example 1, the annealed wafer (INP-02-t1,w1) exhibited phosphorus dissociation, leading to an imbalance in the indium to phosphorus atomic ratio within the crystal, resulting in numerous point defects such as phosphorus vacancies and indium antisites. This caused an increase in the FWHM, increased stress, and decreased crystal integrity.
[0047]
[0048] Figure 2 , Figure 3 The images show the photoluminescence (PL) wavelength spectra of the unannealed wafer (INP-T) and the annealed wafer (INP-01-t1). The wavelength distribution of the unannealed wafer is approximately in the range of 917~919 nm, while the PL peak wavelength of the annealed crystal decreases (blue shifts) by about 7 nm, with a wavelength range of approximately 913~913.5 nm. This indicates that the dopant atoms in the crystal are activated by annealing, releasing electrons, increasing the number of charge carriers, and raising the donor energy level, resulting in greater photorecombination luminescence energy and a shorter wavelength. The annealing method in Example 1 is beneficial for improving the electrical properties and crystal integrity of the crystal.
[0049] Example 2: Using an indium phosphide single crystal ingot (number: INP02), the single crystal has a diameter of 4 inches and a length of 100 mm. Head slices INP02-T and tail slices INP02-W were cut for subsequent comparison. The head and tail of the ingot were marked as INP02-01-t1 (head) and INP02-01-w1 (tail), respectively. The ingot length was approximately 95 mm.
[0050] Before annealing, the ingots are cleaned by immersing them in an alkaline solution prepared with ammonia, hydrogen peroxide and deionized water in a 2:1:1 ratio for 2 hours.
[0051] This embodiment uses ingot INP02-01. Compared with the annealing method in Example 1, the difference is:
[0052] In step S4-2, maintain constant temperature and pressure for 50 hours.
[0053] Comparative Example 2: The wafers INP02-T and INP02-W were subjected to conventional wafer annealing. The wafers were placed on a quartz support and encapsulated in a quartz tube filled with red phosphorus to generate phosphorus gas pressure to suppress the dissociation of indium phosphide at high temperature. Annealing was carried out in a horizontal furnace at a temperature of 950°C and a gas pressure of 1.0 MPa. After holding for 20 hours, the temperature was lowered and the gas pressure was released to room temperature and pressure at a rate of 0.8°C / min.
[0054] For the ingot (INP02-01) annealed in Example 2 above, and the wafers (INP02-T and INP02-W) annealed in Comparative Example 2, electrical parameters were tested after sampling. The test results of the ingot INP02-01 are listed in order from beginning to end, as shown in Table 3.
[0055]
[0056] As can be seen from the test data in Table 3, the ingot samples (INP02-01-t1 and INP02-01-w1) treated in Example 2 show little difference in mobility compared to the wafers (INP02-T and INP02-W) treated in Comparative Example 2. However, the head-to-tail change rate of carrier concentration in Example 2 is 40.7%, while that in Comparative Example 2 is 86.6%, indicating that the ingot annealing process results in better radial electrical parameter uniformity compared to wafer annealing. Furthermore, the annealing method in this invention does not require sealing the ingot in a quartz tube. Instead, it uses a boron oxide covering method, combined with nitrogen filling the furnace to prevent indium phosphide dissociation at high temperatures. This eliminates the need for red phosphorus and sealing the quartz tube. The crucible and ingot can be removed immediately after annealing, and the quartz tube can be reused, saving annealing costs.
[0057] Example 3: Using an indium phosphide single crystal ingot (number: INP03), the single crystal has a diameter of 4 inches and a length of 100 mm. First, cut the head piece INP03-T and the tail piece INP03-W for subsequent comparison. Then, cut the ingot into two segments (INP03-01 and INP03-02), each segment about 50 mm long. Mark the corresponding head and tail of the two segments of the ingot as INP03-01-t1 (head) and INP03-01-w1 (tail), respectively.
[0058] This embodiment uses ingot INP03-01, and the annealing process is exactly the same as in Embodiment 1.
[0059] Comparative Example 3: Using ingot INP03-02, compared with the single crystal ingot INP03-01 in Example 3, the difference in the annealing process is as follows:
[0060] In step S4-2, after the furnace temperature is raised to 800℃, the furnace pressure is adjusted to 1.0MPa and kept constant temperature and pressure for 10 hours. Then, the temperature is lowered at a rate of 2℃ / min.
[0061] After sampling the ingots (INP03-01) annealed in Example 3 and the crystals (INP03-02) annealed in Comparative Example 3, electrical parameters were tested. The test results of the ingots INP03 are listed in order from beginning to end, as shown in Table 4.
[0062]
[0063] As can be seen from the test data in Table 4, the crystal treated in Example 3 showed improved mobility and carrier concentration compared to INP03-T, while the crystal treated in Comparative Example 3 showed little difference in electrical parameters compared to the unannealed crystal INP03-W, with no significant improvement.
[0064] Tables 1-4 above are listed in the order of the crystal ingot from beginning to end. (Note: When comparing data in these tables, only adjacent data is compared.)
Claims
1. An annealing method for indium phosphide single crystal VGF furnace-encapsulated boron oxide, characterized in that, The method includes the following steps: S1, the pBN crucible was cleaned thoroughly; S2, the quartz tube is cleaned and dried; S3, the ingot is placed in a pBN crucible. The front and rear ends of the crucible are filled with boron oxide. After the boron oxide melts, it envelops the entire ingot. High-pressure nitrogen gas is used to suppress the dissociation of indium phosphide crystal. S4. Place the pBN crucible containing the crystal ingot into a quartz tube, and then place the entire quartz tube into the VGF furnace for annealing. The specific steps are as follows: In S4-1, the VGF furnace is first evacuated, and the heating rate is set to 3-5℃ / min. Heating begins, and once the temperature reaches 470℃, it is kept constant for 1-3 hours. Then, the gas inlet valve is opened to purge the furnace with nitrogen until the gas pressure reaches 0.5-0.7MPa. The purging is then stopped, and the heating rate is continued at 3-7℃ / min. S4-2, after the furnace temperature reaches 900-980℃, adjust the furnace pressure to 1.0MPa and maintain constant temperature and pressure for 20-50 hours, then cool down at a rate of 0.8-1℃ / min. S4-3, when the temperature drops to 430℃, increase the cooling rate to 2-5℃ / min, and at the same time open the vent valve to release gas at a rate of 800 L / h to atmospheric pressure. Then turn off the heating and wait for the furnace to cool naturally to below 150℃ to complete the annealing.
2. The annealing method for indium phosphide single crystal VGF furnace-encapsulated boron oxide as described in claim 1, characterized in that, In step S4-2, the annealing temperature is 950℃, the annealing time is 50 hours, and the temperature is reduced at a rate of 0.8℃ / min.
Citation Information
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Annealing method of indium phosphide wafer
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