High-voltage cable withstand voltage test and double-end fault location integrated system, method, device and medium

Abstract

The embodiment of the application provides a high-voltage cable withstand voltage test and double-end fault location integrated system, method, equipment and medium, and belongs to the field of power system detection and fault diagnosis. The system comprises at least two distance measuring hosts, which are respectively arranged at the first end and the last end of the cable to be tested; and at least two flexible sensors, which are respectively detachably attached to the surface of the outer sheath of the corresponding phase of the cable to be tested through a fixed tool. In the process of voltage rise in the withstand voltage test, the tame clock and the wake-up circuit keep working, and the traveling wave acquisition module is in a dormant state; when the cable to be tested is broken down and high-frequency transient traveling waves are generated, the wake-up circuit starts the traveling wave acquisition module, and records the time when the traveling waves arrive at the first end and the last end of the cable to be tested; and according to the time difference of the double-end traveling waves, the length of the cable to be tested and the actual traveling wave velocity, the position of the fault point is calculated. In the process of the withstand voltage test, the double-end precise location is automatically completed without shutdown and without contacting high voltage, so that safe and efficient fault location can be realized.

Description

Technical Field

[0001] This invention relates to the field of power system testing and fault diagnosis technology, specifically to an integrated system, method, equipment, and medium for high-voltage cable withstand voltage testing and dual-end fault location. Background Technology

[0002] High-voltage cross-linked polyethylene cables are prone to insulation aging, moisture absorption, and air gaps during long-term operation, which can lead to high-resistance grounding or flashover breakdown faults. The insulation resistance of such faults is extremely high, approaching that of an intact cable, making it difficult to achieve effective distance measurement using conventional low-voltage pulse methods, pulse current methods, secondary pulse methods, and bridge methods.

[0003] Currently, withstand voltage testing and fault location are typically performed independently in separate steps. The withstand voltage test is conducted first, and the system is shut down and the ranging instrument replaced after breakdown occurs. This process not only prolongs power outage time and reduces operational efficiency, but also fails to capture the traveling wave signal simultaneously at the moment of breakdown. This results in insufficient discharge channels for high-resistance flashover faults, leading to ranging failure. For long-distance cables, cross-connected structures, or T-junction branch cables, the single-end traveling wave ranging method is susceptible to interference from complex reflected wavefronts, making it difficult to accurately identify the effective wavefront, resulting in positioning errors of tens of meters. Furthermore, traditional ranging devices require direct connection to the high-voltage circuit, posing a risk of electric shock and altering the original test wiring, which can introduce interference and affect test safety. Summary of the Invention

[0004] The purpose of this invention is to provide an integrated system, method, equipment, and medium for high-voltage cable withstand voltage testing and dual-end fault location. During the withstand voltage test, it automatically completes accurate dual-end distance measurement without stopping the machine or contacting the high voltage, thus achieving safe and efficient fault location.

[0005] To achieve the above objectives, embodiments of the present invention provide an integrated system for high-voltage cable withstand voltage testing and dual-end fault location, comprising: At least two ranging hosts are respectively configured at the beginning and end of the cable under test. Each ranging host has a built-in disciplined clock, a traveling wave acquisition module, and a wake-up circuit triggered by the leading edge of the traveling wave. By synchronizing and calibrating the disciplined clocks of each ranging host, each ranging host has a unified time reference, and this time reference is used as the basis for determining the timestamp of the arrival time of the traveling wave, so as to eliminate the time error between the beginning and end. At least two flexible sensors are connected to the test host and are detachably attached to the outer sheath surface of the corresponding phase of the cable under test via a fixing fixture. The grounding unit provides an isolation reference ground for the ranging host; The integrated system for high-voltage cable withstand voltage testing and dual-end fault location is configured as follows: During the voltage ramp-up process of the withstand voltage test, the discipline clock and wake-up circuit remain operational, while the traveling wave acquisition module is in sleep mode. When the cable under test experiences a breakdown flashover and generates a high-frequency transient traveling wave, the leading edge of the traveling wave is coupled to the wake-up circuit via the flexible sensor. The wake-up circuit then activates the traveling wave acquisition module and records the time it takes for the traveling wave to reach the beginning and end of the cable under test. Based on this, the arrival time difference between the two ends of the traveling wave is calculated. The location of the fault point is calculated based on the arrival time difference of the traveling wave at both ends, the length of the cable under test, and the actual traveling wave velocity.

[0006] Optionally, by synchronizing and calibrating the disciplined clocks of each ranging host, a unified time reference is established for each ranging host, and this time reference is used as the basis for determining the timestamp of the traveling wave's arrival time, thereby eliminating time errors at the beginning and end of the wave, including: Receives an external timing signal and uses the external timing signal as a reference frequency to discipline and lock the internal crystal oscillator, so that the output frequency and phase of each disciplined clock are kept synchronized and locked with the external timing signal. After the taming and locking are completed, a sampling reference clock is generated by each of the tamed clock sources, and the sampling reference clock is used as the sampling clock of the traveling wave acquisition module and the time base signal for timestamp calibration. During the pressure test, the external timing signal is continuously received and dynamic tracking calibration is performed to maintain the consistency of the time reference between the first-end ranging host and the last-end ranging host throughout the test. When the external timing signal is lost or its signal-to-noise ratio is lower than a preset threshold, the system switches to timekeeping mode, continues to output the sampling reference clock according to the frequency control parameters stored in the discipline lock phase, and re-enters the discipline lock state after the external timing signal is restored.

[0007] Optionally, the fixed tooling includes: An arc-shaped insulating bracket, wherein a longitudinal through groove is formed on the inner arc surface of the arc-shaped insulating bracket; An elastic clamping layer is embedded at the bottom of the longitudinal through groove, and the thickness of the clamping layer is greater than the thickness of the flexible sensor; A snap-locking mechanism is located on one side of the arc-shaped insulating bracket. This snap-locking mechanism produces a positioning sound and tactile feedback when fully locked in place; and The foolproof structure is set at one end of the longitudinal through groove or on the groove wall, and is a raised positioning block used to cooperate with the groove at the end of the flexible sensor. After the fixing fixture is locked, the elastic clamping layer is compressed and forces the signal acquisition surface of the flexible sensor to form a gapless surface contact with the outer sheath of the cable, so as to reduce the capacitive coupling attenuation of the traveling wave signal.

[0008] Optionally, the wake-up circuit is configured as follows: If the amplitude of the signal at the leading edge of the traveling wave exceeds a preset threshold and the rise time is less than a preset delay, a start pulse is sent to the traveling wave acquisition module.

[0009] Optionally, the ranging host is further configured as follows: When the wake-up circuit does not detect a traveling wave leading edge that meets the triggering conditions within a preset time window, it controls the traveling wave acquisition module to re-enter the sleep state and maintains the working state of the disciplined clock and the wake-up circuit until the withstand voltage test ends.

[0010] Optionally, the integrated system for high-voltage cable withstand voltage testing and dual-end fault location also includes: The wave velocity adaptive correction module is configured to inject a low-voltage wide pulse calibration signal into the cable under test through the flexible sensor via a ranging host configured at the beginning of the cable under test before the withstand voltage test and when the cable under test is not pressurized. The low-voltage wide pulse calibration signal is received synchronously by the ranging host configured at the beginning and end of the cable under test, and the actual traveling wave velocity is calculated based on the length of the cable under test and the time difference between the arrival of the signal at both ends. The actual traveling wave velocity is then used to replace the theoretical wave velocity for the calculation of the fault location.

[0011] Optionally, the BeiDou / GPS dual-mode receiver and the disciplined clock are configured together as follows: It receives satellite time signals and performs discipline calibration on the internal clock to ensure that the time synchronization error of the dual-end ranging host is less than a preset error threshold.

[0012] Optionally, the integrated system for high-voltage cable withstand voltage testing and dual-end fault location is further configured as follows: When multiple breakdown flashovers occur during the withstand voltage test, the wake-up circuit activates the traveling wave acquisition module once for each breakdown to record the arrival time and waveform data of the traveling wave corresponding to each breakdown, and caches multiple ranging results in chronological order, and finally outputs the positions of all breakdown points.

[0013] Secondly, the present invention also provides an integrated method for high-voltage cable withstand voltage testing and dual-end fault location in an integrated system for high-voltage cable withstand voltage testing and dual-end fault location, comprising: Distance measuring host is deployed at the beginning and end of the cable to be tested, and connected to an independent grounding unit and a Beidou / GPS antenna to complete dual-end discipline and time synchronization so that the time synchronization error is less than the preset time threshold. The flexible sensor is installed on the outer sheath of each phase cable using a fixing fixture. The sensor orientation is limited by the foolproof structure of the fixing fixture, and the flexible sensor is air-gap-freely bonded to the cable under test by the compression deformation of the elastic clamping layer. The withstand voltage test is started and the voltage is gradually increased. The ranging host enters the low power monitoring mode. When the cable under test experiences a breakdown flashover, the leading edge of the traveling wave is coupled to the wake-up circuit through the flexible sensor. The wake-up circuit starts the traveling wave acquisition module and records the time when the traveling wave arrives at the beginning and end of the cable under test. The arrival time difference of the traveling wave at both ends is calculated based on this. The location of the fault point is calculated based on the arrival time difference of the traveling wave at both ends, the length of the cable under test, and the actual traveling wave velocity.

[0014] Thirdly, the present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the above-described integrated method for high-voltage cable withstand voltage testing and dual-end fault location.

[0015] Fourthly, the present invention also provides a storage medium storing a computer program thereon, wherein the computer program, when executed by a processor, implements the steps of the above-described integrated method for high-voltage cable withstand voltage test and double-end fault location.

[0016] The above technical solution can automatically complete fault location measurement while performing withstand voltage tests on high-voltage cables, and synchronously record the arrival time of traveling waves from both ends of the cable. This allows for the rapid calculation of the accurate location of the fault point without stopping the machine, changing instruments, or having anyone come into contact with the high-voltage circuit, thus significantly shortening the power outage time and avoiding the risk of electric shock.

[0017] Other features and advantages of the embodiments of the present invention will be described in detail in the following detailed description section. Attached Figure Description

[0018] The accompanying drawings are provided to further illustrate embodiments of the present invention and form part of the specification. They are used together with the following detailed description to explain the embodiments of the present invention, but do not constitute a limitation thereof. In the drawings: Figure 1 This is a schematic diagram of the structure of an integrated system for high-voltage cable withstand voltage testing and dual-end fault location provided in an embodiment of the present invention; Figure 2 This is a flowchart of an integrated method for high-voltage cable withstand voltage testing and double-end fault location provided by an embodiment of the present invention; Figure 3 This is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present invention.

[0019] Explanation of reference numerals in the attached figures 1. Distance measuring host; 2. Cable to be tested; 3. Flexible sensor; 4. Grounding unit. Detailed Implementation

[0020] Various embodiments of this disclosure will be described more fully in the following detailed description. This disclosure may have various embodiments, and adjustments and changes may be made therein. However, it should be understood that there is no intention to limit the various embodiments of this disclosure to the specific embodiments disclosed herein, but rather this disclosure should be understood to cover all adjustments, equivalents, and / or alternatives falling within the spirit and scope of the various embodiments of this disclosure.

[0021] In the following, the terms “comprising” or “may include”, which may be used in various embodiments of this disclosure, indicate the presence of the disclosed functions or operations and do not limit the addition of one or more functions or operations. Furthermore, as used in various embodiments of this disclosure, the terms “comprising,” “having,” and their cognates are intended only to indicate a specific feature, number, step, operation, or combination of the foregoing and should not be construed as primarily excluding the presence of one or more other features, numbers, steps, operations, or combinations of the foregoing, or the possibility of adding one or more features, numbers, steps, operations, or combinations of the foregoing.

[0022] In various embodiments of this disclosure, the expression "or" or "at least one of A and / or B" includes any combination or all combinations of the words listed simultaneously. For example, the expression "A or B" or "at least one of A and / or B" may include A, may include B, or may include both A and B.

[0023] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] See Figure 1 The diagram shown is a schematic representation of a specific embodiment of an integrated system for high-voltage cable withstand voltage testing and dual-end fault location, including: At least two ranging hosts 1 are respectively configured at the beginning and end of the cable 2 under test. Each ranging host 1 has a built-in disciplined clock, a traveling wave acquisition module, and a wake-up circuit triggered by the leading edge of the traveling wave. By synchronizing and calibrating the disciplined clocks of each ranging host 1, each ranging host 1 has a unified time reference, and this time reference is used as the basis for determining the timestamp of the arrival time of the traveling wave, so as to eliminate the time error between the beginning and end. At least two flexible sensors 3 are connected to the test host 1 and are detachably attached to the outer sheath surface of the corresponding phase of the cable 2 to be tested via a fixing fixture. Grounding unit 4 provides an isolation reference ground for the ranging host 1; The integrated system for high-voltage cable withstand voltage testing and dual-end fault location is configured to perform the following steps: S1: During the voltage boosting process of the withstand voltage test, the discipline clock and wake-up circuit remain operational, while the traveling wave acquisition module is in sleep mode.

[0025] S2: When the cable under test experiences a breakdown flashover and generates a high-frequency transient traveling wave, the leading edge of the traveling wave is coupled to the wake-up circuit via the flexible sensor. The wake-up circuit then activates the traveling wave acquisition module and records the arrival times of the traveling wave at the beginning and end of the cable under test. Based on this, the arrival time difference between the two ends of the traveling wave is calculated.

[0026] S3: Calculate the location of the fault point based on the arrival time difference of the traveling wave at both ends, the length of the cable under test, and the actual traveling wave velocity.

[0027] In one embodiment, the ranging host is a T-930A portable host with an orange PELICAN safety protective chassis and polyurethane wheels at the bottom, providing portability and drop protection, suitable for complex working environments such as cable trenches and narrow wells. The host has a built-in 20AH lithium battery, supporting 24 hours of standby time on a single charge, and is equipped with a 220V AC charging interface to meet the needs of long-term field testing. The host panel is equipped with signal input, a Beidou / GPS time synchronization interface, a communication interface, and a grounding terminal. Its internal acquisition module has a sampling frequency of no less than 20MHz, capable of capturing traveling wave fronts with a rise time ≤200ns, and an acquisition bandwidth of 10kHz~20MHz, ensuring distortion-free acquisition of high-frequency transient traveling wave signals.

[0028] The flexible sensor employs a non-contact capacitive coupling principle. It features a black, flexible strip structure, 250mm in length, 32mm in width, and 3mm in thickness. One end has a BNC connector for connection to the host computer. A white logo is printed on the sensor surface to indicate that this side must face outwards during installation. The sensor operates within a bandwidth of 10kHz to 20MHz, has an insulation withstand voltage rating of at least 20kV, and avoids contact with high-voltage circuits after installation, thus ensuring the safety of testing personnel and equipment.

[0029] Furthermore, by synchronizing and calibrating the disciplined clocks of each ranging host, a unified time reference is established for each ranging host. This time reference is then used as the basis for determining the timestamp of the traveling wave's arrival time, thereby eliminating time errors at the beginning and end of the wave. This process includes the following steps: SA: Receives an external timing signal and uses the external timing signal as a reference frequency to discipline and lock the internal crystal oscillator, so that the output frequency and phase of each disciplined clock are kept synchronized with the external timing signal.

[0030] Specifically, let the arrival time of the calibration signal recorded by the first-end ranging host be t1, and the arrival time of the same calibration signal recorded by the last-end ranging host be t2. The total length of the cable under test is L. Then, the actual traveling wave velocity v is measured by the wave velocity adaptive correction module. The time synchronization error ΔT between the first-end and last-end ranging hosts is... sync It is determined by the synchronization accuracy of the disciplined clock.

[0031] During the taming and locking phase, the output frequency of the head-end taming clock is:

[0032] in, In the formula, This refers to the nominal frequency of the crystal oscillator. For external time signal reference frequency, , , For PID control coefficients, This is the frequency compensation amount for the taming and locking phase.

[0033] The real-time clock offset between the beginning and the end is:

[0034] in, , These are the discipline clock readings at the beginning and end of the circuit, respectively, under discipline lock state. , This is the preset time synchronization error threshold.

[0035] SB: After completing the discipline lock, each generates a sampling reference clock using its own disciplined clock source, and uses the sampling reference clock as the sampling clock and time base signal for the traveling wave acquisition module.

[0036] SC: During the pressure test, the external timing signal is continuously received and dynamic tracking calibration is performed to maintain the consistency of the time reference between the first-end ranging host and the last-end ranging host throughout the test.

[0037] SD: When the external timing signal is lost or its signal-to-noise ratio is lower than a preset threshold, switch to timekeeping mode, continue to output the sampling reference clock according to the frequency control parameters stored in the discipline lock phase, and re-enter the discipline lock state after the external timing signal is restored.

[0038] when When the clock is tamed, it switches to clockkeeping mode, and the clockkeeping output frequency is:

[0039] in, The predicted value of crystal oscillator frequency drift based on the frequency control parameters stored during the discipline-locking phase: ; In the formula, To tame the crystal frequency deviation stored during the locking phase, For crystal oscillator aging rate, The temperature frequency coefficient, The current temperature. The reference temperature stored for the taming and locking phase. This is the second-order aging coefficient, used to compensate for nonlinear aging drift; This is the moment when the external time signal is lost.

[0040] The absolute moment when the traveling wave reaches its tip With the absolute time of reaching the end Based on the time references of their respective docile clocks, the arrival time difference of the two-terminal traveling waves is:

[0041] In the formula, To compensate for the synchronization error between the two-terminal disciplined clocks at the arrival time of the traveling wave, in the disciplined-locked state... The error is negligible; in timekeeping mode, The cumulative error is determined by the timekeeping accuracy of a disciplined clock: .

[0042] For example, the frequency control parameters include at least: frequency control word or DAC control code, voltage control voltage value, crystal oscillator aging rate and historical frequency deviation record, temperature frequency characteristic data and temperature zone parameters, discipline model or intelligent learning algorithm parameters, and clock difference data and 1PPS phase deviation.

[0043] Furthermore, the fixed tooling includes: An arc-shaped insulating bracket, wherein a longitudinal through groove is formed on the inner arc surface of the arc-shaped insulating bracket; An elastic clamping layer is embedded at the bottom of the longitudinal through groove, and the thickness of the clamping layer is greater than the thickness of the flexible sensor; A snap-locking mechanism is located on one side of the arc-shaped insulating bracket. This snap-locking mechanism produces a positioning sound and tactile feedback when fully locked in place; and The foolproof structure is set at one end of the longitudinal through groove or on the groove wall, and is a raised positioning block used to cooperate with the groove at the end of the flexible sensor. After the fixing fixture is locked, the elastic clamping layer is compressed and forces the signal acquisition surface of the flexible sensor to form a gapless surface contact with the outer sheath of the cable, so as to reduce the capacitive coupling attenuation of the traveling wave signal.

[0044] In one embodiment, the arc-shaped main support of the flexible sensor quick-fixing fixture is injection molded from ABS flame-retardant plastic, with a total length of 260mm, a width of 40mm, and a wall thickness of 3mm. The inner arc radius is designed to be R25mm, accommodating cables with an outer diameter range of φ30mm to φ90mm. A longitudinal through-slot with a depth of 3.5mm and a width of 33mm is formed on the inner side of the support for embedding the flexible sensor. One end of the through-slot has a protruding logo facing outwards, forming a foolproof structure to ensure that the sensor can only be installed with the correct orientation.

[0045] An adaptive elastic clamping layer is attached to the bottom of the channel. This clamping layer is made of a 3mm thick silicone strip with a Shore A hardness of 40A. When the fixture is tightened, the silicone strip automatically compensates for manufacturing deviations in the cable's outer diameter and installation gaps, forcing the signal acquisition surface of the flexible sensor to form 100% surface contact with the cable's outer sheath.

[0046] One side of the fixed fixture is equipped with a single-sided press-type quick-release buckle locking mechanism. The buckle is made of polyoxymethylene material and can open and close at an angle of up to 120°. When locked in place, it emits a clear click sound and provides tactile feedback.

[0047] In addition, each end of the tooling is equipped with a nylon webbing and a D-ring buckle to form an anti-slip protection strap. In extreme cases of severe cable vibration or accidental pulling, this protective strap can prevent the tooling from slipping off the cable, ensuring the continuity and safety of the sensor's signal acquisition.

[0048] Furthermore, the wake-up circuit is configured to detect whether the signal amplitude of the leading edge of the traveling wave exceeds a preset threshold and whether the rise time is less than a preset delay; if so, it sends a start pulse to the traveling wave acquisition module.

[0049] For example, when a flashover occurs in the cable under test, a high-frequency transient traveling wave generated at the fault point propagates along the cable to the flexible sensor installation location. The sensor couples the traveling wave signal to the wake-up circuit input of the ranging host via capacitive coupling. The wake-up circuit has two preset trigger conditions: one is the amplitude threshold of the traveling wave signal, and the other is the delay threshold of the rising edge of the traveling wave signal. The wake-up circuit monitors the input signal in real time. When it detects that the amplitude of the rising edge of the traveling wave exceeds 100mV, and the time taken for the rising edge to rise from 10% amplitude to 90% amplitude is less than 200ns, the signal is determined to be a valid traveling wave front.

[0050] Once the above two conditions are met, the wake-up circuit sends a 10μs-wide start pulse to the traveling wave acquisition module within 1 microsecond. This start pulse switches the traveling wave acquisition module from sleep mode to working mode, and simultaneously locks the absolute arrival time of the traveling wave to the count value of the discipline clock, ensuring that the traveling wave head information is not lost. If the input signal only meets the amplitude condition but the rise time is greater than or equal to 200ns, the wake-up circuit determines it as an invalid trigger, does not send a start pulse, and the traveling wave acquisition module remains in sleep mode, thereby avoiding false triggering.

[0051] By combining the above-mentioned amplitude and rise time as dual conditions, the wake-up circuit can effectively distinguish between the real traveling wave front and interference signals, ensuring the triggering reliability of the ranging system.

[0052] Furthermore, the ranging host is also configured as follows: When the wake-up circuit does not detect a traveling wave leading edge that meets the triggering conditions within a preset time window, it controls the traveling wave acquisition module to re-enter the sleep state and maintains the working state of the disciplined clock and the wake-up circuit until the withstand voltage test ends.

[0053] While ensuring the system has millisecond-level response capability to cable breakdown events, the overall power consumption is reduced: the traveling wave acquisition module is only briefly awakened when a valid traveling wave arrives, and remains in deep sleep for the rest of the time, thereby avoiding the energy waste caused by the high-speed sampling circuit running idle for a long time. The discipline clock and wake-up circuit run continuously, ensuring the continuity of time synchronization at both ends and the ability to capture subsequent breakdowns, thus achieving a balance between low power consumption and high real-time performance.

[0054] Furthermore, the integrated system for high-voltage cable withstand voltage testing and dual-end fault location also includes: The wave velocity adaptive correction module is configured to inject a low-voltage wide pulse calibration signal into the cable under test through the flexible sensor via a ranging host configured at the beginning of the cable under test before the withstand voltage test and when the cable under test is not pressurized. The low-voltage wide pulse calibration signal is received synchronously by the ranging host configured at the beginning and end of the cable under test, and the actual traveling wave velocity is calculated based on the length of the cable under test and the time difference between the arrival of the signal at both ends. The actual traveling wave velocity is then used to replace the theoretical wave velocity for the calculation of the fault location.

[0055] Specifically, the actual traveling wave velocity can be calculated using the following formula:

[0056] In the formula, The length of the cable to be tested. The time when the signal arrives at the head end. This is the time when the signal reaches its end.

[0057] Furthermore, the BeiDou / GPS dual-mode receiver and the disciplined clock are configured together as follows: It receives satellite time signals and performs discipline calibration on the internal clock to ensure that the time synchronization error of the dual-end ranging host is less than a preset error threshold.

[0058] It should be understood that the preset error threshold can be set according to the specific application scenario, such as 20ns, and is not limited here.

[0059] Furthermore, the integrated system for high-voltage cable withstand voltage testing and dual-end fault location is also configured as follows: When multiple breakdown flashovers occur during the withstand voltage test, the wake-up circuit activates the traveling wave acquisition module once for each breakdown to record the arrival time and waveform data of the traveling wave corresponding to each breakdown, and caches multiple ranging results in chronological order, and finally outputs the positions of all breakdown points.

[0060] In one specific embodiment, taking the integrated ranging of high-resistance flashover faults in 10kV cables as an example: taking a 10kV YJV22-3×300mm² cross-linked polyethylene cable as an example, the total length of the cable is 1200m, and a series resonant withstand voltage test device is used to conduct the withstand voltage test.

[0061] One T-930A ranging host is placed at each end of the cable. Each host is connected to an independent BeiDou / GPS time synchronization antenna, which is placed in an open outdoor area to ensure that at least 4 satellites are received. The host is connected to the ground through an independent grounding pin, completely separated from the high-voltage grounding circuit of the withstand voltage test.

[0062] The flexible sensors are installed on the outer sheaths of phases A, B, and C of the cable using a quick-fixing fixture. During installation, the flexible sensors are embedded into the longitudinal through-slots of the fixture, ensuring correct orientation using the "LOGO facing outwards" anti-foolproof protrusion. The clips are then pressed to lock the sensors in place, and the BNC connectors are connected to the signal input interface of the main unit. Cable parameters are entered into the backend software: total length L = 1200m, initial wave velocity set to 170m / μs. The dual-end main units perform BeiDou / GPS time synchronization.

[0063] The series resonant withstand voltage test device was activated, and a high-voltage power frequency was applied to the cable, with the voltage slowly increasing to 35kV according to the procedure. During this process, the ranging host automatically entered a low-power monitoring mode, the traveling wave acquisition module went into sleep mode, and only the wake-up circuit remained operational. When the voltage reached 35kV, a weak point in the cable's internal insulation broke down, resulting in a high-resistance flashover fault. The high-frequency transient voltage traveling wave released instantaneously at the fault point propagated along the cable to both ends, with a rising edge of approximately 150ns. The flexible sensor at the first end coupled and acquired the traveling wave signal. The wake-up circuit detected a signal amplitude exceeding 100mV and a rise time less than 200ns, determining it to be a valid traveling wave leading edge. It immediately activated the traveling wave acquisition module within 1μs and recorded the absolute time of the traveling wave arriving at the first end, TS=100.000010s. Simultaneously, the flexible sensor at the end also coupled and acquired the traveling wave signal, and the wake-up circuit of the end host was triggered synchronously, recording the absolute time of the traveling wave arriving at the end, TR=100.000018s.

[0064] After receiving the time data from both ends, the background software automatically calculates the distance based on the two-end traveling wave ranging formula:

[0065]

[0066] in, For the total length of the cable, For the speed of travel wave propagation, , The distance from the fault point to the beginning and end is calculated as follows: 460m from the beginning of the fault point. Considering the deviation of wave velocity due to cable aging and temperature, the system then retrieves the actual wave velocity of 168m / μs measured by the wave velocity adaptive correction module and recalculates the fault distance to approximately 455m, with an error ≤2m.

[0067] The background software displays the double-ended traveling wave waveform in real time, marks the starting point of the wavefront, and marks the fault distance on the cable line diagram. After the test, an integrated report is automatically generated, which includes: withstand voltage test value, breakdown time, fault distance, double-ended waveform screenshots, and operator information.

[0068] In this embodiment, by deeply integrating the withstand voltage test with the double-ended traveling wave ranging, synchronous triggering and acquisition at the moment of cable breakdown, non-contact safe coupling, and high-precision time synchronization with BeiDou / GPS are achieved. This solves the technical problems in the traditional process, such as the separation of test and ranging, the inability to measure ranging due to high-resistance flashover, large single-ended positioning errors, and high risks associated with contact wiring. By using a quick-fixing fixture with a foolproof structure and adaptive clamping, the installation standardization and signal coupling quality of the flexible sensor are improved, fault location errors are controlled, and test safety and operational efficiency are ensured.

[0069] like Figure 2As shown, the following are embodiments of the integrated method for high-voltage cable withstand voltage testing and dual-end fault location provided in this disclosure. It belongs to the same inventive concept as the integrated system for high-voltage cable withstand voltage testing and dual-end fault location in the above embodiments. For details not described in detail in the embodiments of the integrated method for high-voltage cable withstand voltage testing and dual-end fault location, please refer to the embodiments of the integrated system for high-voltage cable withstand voltage testing and dual-end fault location.

[0070] S200: Deploy distance measuring hosts at the beginning and end of the cable under test, and connect them to independent grounding units. By synchronizing and calibrating the disciplined clocks of each distance measuring host, each distance measuring host has a unified time reference. This time reference is used as the basis for calibrating the timestamp of the arrival time of the traveling wave, so as to eliminate the time error between the beginning and end.

[0071] S201: The flexible sensor is installed on the outer sheath of each phase cable using a fixing fixture. The sensor orientation is limited by the foolproof structure of the fixing fixture, and the flexible sensor is air-gap-freely bonded to the cable under test by the compression deformation of the elastic clamping layer.

[0072] S202: Start the withstand voltage test and gradually increase the voltage. The ranging host enters the low power monitoring mode. When the cable under test experiences a breakdown flashover, the leading edge of the traveling wave is coupled to the wake-up circuit through the flexible sensor. The wake-up circuit starts the traveling wave acquisition module and records the time when the traveling wave arrives at the beginning and end of the cable under test. The arrival time difference of the traveling wave at both ends is calculated based on this.

[0073] S203: Calculate the location of the fault point based on the arrival time difference of the traveling wave at both ends, the length of the cable under test, and the actual traveling wave velocity.

[0074] Figure 3 This is a schematic diagram of the hardware structure of an electronic device that implements various embodiments of the present invention.

[0075] The integrated high-voltage cable withstand voltage test and two-end fault location method provided in this application can be applied to electronic devices. Those skilled in the art will understand that the electronic device structure involved in the embodiments of this invention does not constitute a limitation on the electronic device. An electronic device may include more or fewer components than illustrated, or combine certain components, or have different component arrangements. In the embodiments of this invention, the electronic device includes, but is not limited to, laptop computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the embodiments of this application described and / or claimed herein.

[0076] Electronic devices may include processors, external memory interfaces, internal memory, universal serial bus (USB) interfaces, charging management modules, power management modules, batteries, wireless communication modules, audio modules, speakers, microphones, sensor modules, buttons, cameras, displays, and SIM card interfaces, etc.

[0077] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device. In other embodiments of this application, the electronic device may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0078] A processor may include one or more processing units, such as: a central processing unit (CPU), an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural network processing unit (NPU). Different processing units may be independent devices or integrated into one or more processors.

[0079] The processor can serve as the nerve center and command center of an electronic device. The controller can generate operation control signals based on the instruction opcode and timing signals to control the fetching and execution of instructions.

[0080] The processor may also include memory for storing instructions and data. In some embodiments, the memory in the processor is a cache memory. This memory can store instructions or data that the processor has just used or that are used repeatedly. If the processor needs to use the instruction or data again, it can retrieve it directly from this memory. This avoids repeated accesses, reduces processor latency, and thus improves system efficiency.

[0081] An external storage interface (ESI) can be used to connect external memory cards, such as microSD cards, to expand the storage capacity of electronic devices. The external memory card communicates with the processor through the ESI to perform data storage functions, such as saving music and video files on the external memory card.

[0082] Internal memory can be used to store computer executable program code, which includes instructions. The processor executes various functional applications and data processing of electronic devices by running the instructions stored in internal memory. Internal memory can include a program storage area and a data storage area. Internal memory can include high-speed random access memory, and can also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc.

[0083] Wireless communication functionality in electronic devices can be achieved through antennas, wireless communication modules, modem processors, and baseband processors.

[0084] Wireless communication modules can provide solutions for wireless communication applications in electronic devices, including wireless local area networks (WLANs) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), and infrared (IR) technologies.

[0085] Electronic devices can implement audio functions through audio modules, speakers, receivers, microphones, headphone jacks, and application processors.

[0086] Electronic devices can achieve shooting functions through ISPs, cameras, video codecs, GPUs, displays, and application processors.

[0087] Electronic devices can achieve display functions through GPUs, displays, and application processors.

[0088] A GPU is a microprocessor for image processing, connected to the display screen and application processor. GPUs are used to perform mathematical and geometric calculations for graphics rendering. A processor may include one or more GPUs, which execute program instructions to generate or modify display information.

[0089] A display screen is used to display images, videos, etc. A display screen includes a display panel.

[0090] The storage medium provided in this application stores a program product capable of integrating high-voltage cable withstand voltage testing with two-end fault location.

[0091] The integrated method for high-voltage cable withstand voltage testing and double-end fault location includes: deploying a distance measuring host at both the beginning and end of the cable under test and connecting them to independent grounding units; synchronizing the disciplined clocks of each distance measuring host to ensure a unified time reference for each host, using this time reference as the timestamp for the arrival time of the traveling wave to eliminate time errors at the beginning and end; using a fixing fixture to install flexible sensors on the outer sheath of each phase cable, limiting the sensor orientation through the foolproof structure of the fixing fixture, and achieving a gapless fit between the flexible sensor and the cable under test through the compression deformation of the elastic clamping layer; initiating the withstand voltage test and gradually increasing the voltage, with the distance measuring host entering a low-power monitoring mode; when a breakdown flashover occurs in the cable under test, the leading edge of the traveling wave is coupled to a wake-up circuit via the flexible sensor, which then activates the traveling wave acquisition module and records the arrival times of the traveling wave at the beginning and end of the cable under test, calculating the double-end traveling wave arrival time difference; and calculating the fault location based on the double-end traveling wave arrival time difference, the length of the cable under test, and the actual traveling wave velocity.

[0092] In some possible implementations, the subject matter of this disclosure, entitled "Integrated Method and System for High Voltage Cable Withstand Voltage Testing and Two-End Fault Locating," can be implemented as a program product comprising program code that, when run on a terminal device, causes the terminal device to perform the steps described in the "Exemplary Methods" section of this specification according to various exemplary embodiments of this disclosure.

[0093] The storage medium disclosed herein may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof.

[0094] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An integrated system for high-voltage cable withstand voltage testing and dual-end fault location, characterized in that, include: At least two ranging hosts are configured at the beginning and end of the cable under test, respectively. Each ranging host has a built-in disciplined clock, a traveling wave acquisition module, and a wake-up circuit triggered by the leading edge of the traveling wave. By synchronizing and calibrating the disciplined clocks of each ranging host, each ranging host has a unified time reference, and this time reference is used as the basis for determining the timestamp of the arrival time of the traveling wave, so as to eliminate the time error between the beginning and end. At least two flexible sensors are detachably attached to the outer sheath surface of the corresponding phase of the cable under test via a fixing fixture, and each flexible sensor is electrically connected to the ranging host at the corresponding end via a coaxial cable to transmit the coupled traveling wave signal to the ranging host. The grounding unit provides an isolation reference ground for the ranging host; The integrated system for high-voltage cable withstand voltage testing and dual-end fault location is configured as follows: During the voltage ramp-up process of the withstand voltage test, the discipline clock and wake-up circuit remain operational, while the traveling wave acquisition module is in sleep mode. When the cable under test experiences a breakdown flashover and generates a high-frequency transient traveling wave, the leading edge of the traveling wave is coupled to the wake-up circuit via the flexible sensor. The wake-up circuit then activates the traveling wave acquisition module and records the time it takes for the traveling wave to reach the beginning and end of the cable under test. Based on this, the arrival time difference between the two ends of the traveling wave is calculated. The location of the fault point is calculated based on the arrival time difference of the traveling wave at both ends, the length of the cable under test, and the actual traveling wave velocity.

2. The integrated system for high-voltage cable withstand voltage testing and dual-end fault location as described in claim 1, characterized in that, By synchronizing and calibrating the disciplined clocks of each ranging host, a unified time reference is established for each host. This time reference is then used as the basis for determining the timestamp of the traveling wave's arrival time, thus eliminating time errors at the beginning and end of the wave. This includes: Receives an external timing signal and uses the external timing signal as a reference frequency to discipline and lock the internal crystal oscillator, so that the output frequency and phase of each disciplined clock are kept synchronized and locked with the external timing signal. After the taming and locking are completed, a sampling reference clock is generated by each of the tamed clock sources, and the sampling reference clock is used as the sampling clock of the traveling wave acquisition module and the time base signal for timestamp calibration. During the pressure test, the external timing signal is continuously received and dynamic tracking calibration is performed to maintain the consistency of the time reference between the first-end ranging host and the last-end ranging host throughout the test. When the external timing signal is lost or its signal-to-noise ratio is lower than a preset threshold, the system switches to timekeeping mode, continues to output the sampling reference clock according to the frequency control parameters stored in the discipline lock phase, and re-enters the discipline lock state after the external timing signal is restored.

3. The integrated system for high-voltage cable withstand voltage testing and dual-end fault location as described in claim 1, characterized in that, The fixed fixture includes: An arc-shaped insulating bracket, wherein a longitudinal through groove is formed on the inner arc surface of the arc-shaped insulating bracket; An elastic clamping layer is embedded at the bottom of the longitudinal through groove, and the thickness of the clamping layer is greater than the thickness of the flexible sensor; A snap-locking mechanism is located on one side of the arc-shaped insulating bracket. This snap-locking mechanism produces a positioning sound and tactile feedback when fully locked in place; and The foolproof structure is set at one end of the longitudinal through groove or on the groove wall, and is a raised positioning block used to cooperate with the groove at the end of the flexible sensor. After the fixing fixture is locked, the elastic clamping layer is compressed and forces the signal acquisition surface of the flexible sensor to form a gapless surface contact with the outer sheath of the cable, so as to reduce the capacitive coupling attenuation of the traveling wave signal.

4. The integrated system for high-voltage cable withstand voltage testing and dual-end fault location as described in claim 1, characterized in that, The wake-up circuit is configured as follows: If the amplitude of the signal at the leading edge of the traveling wave exceeds a preset threshold and the rise time is less than a preset delay, a start pulse is sent to the traveling wave acquisition module.

5. The integrated system for high-voltage cable withstand voltage testing and dual-end fault location as described in claim 1, characterized in that, The integrated system for high-voltage cable withstand voltage testing and two-end fault location also includes: The wave velocity adaptive correction module is configured to inject a low-voltage wide pulse calibration signal into the cable under test through the flexible sensor via a ranging host configured at the beginning of the cable under test before the withstand voltage test and when the cable under test is not pressurized. The low-voltage wide pulse calibration signal is received synchronously by the ranging host configured at the beginning and end of the cable under test, and the actual traveling wave velocity is calculated based on the length of the cable under test and the time difference between the arrival of the signal at both ends. The actual traveling wave velocity is then used to replace the theoretical wave velocity for the calculation of the fault location.

6. The integrated system for high-voltage cable withstand voltage testing and dual-end fault location as described in claim 1, characterized in that, Each ranging host is equipped with a built-in BeiDou / GPS dual-mode receiver, and the BeiDou / GPS dual-mode receiver and the disciplined clock are configured as follows: It receives satellite time signals and performs discipline calibration on the internal clock to ensure that the time synchronization error of the dual-end ranging host is less than a preset error threshold.

7. The integrated system for high-voltage cable withstand voltage testing and dual-end fault location as described in claim 1, characterized in that, The integrated system for high-voltage cable withstand voltage testing and dual-end fault location is also configured as follows: When multiple breakdown flashovers occur during the withstand voltage test, the wake-up circuit activates the traveling wave acquisition module once for each breakdown to record the arrival time and waveform data of the traveling wave corresponding to each breakdown, and caches multiple ranging results in chronological order, and finally outputs the positions of all breakdown points.

8. A method for integrating high-voltage cable withstand voltage testing and dual-end fault location in the integrated system of high-voltage cable withstand voltage testing and dual-end fault location as described in any one of claims 1-7, characterized in that, include: Distance measuring hosts are deployed at the beginning and end of the cable under test and connected to independent grounding units. By synchronizing and calibrating the disciplined clocks of each distance measuring host, each distance measuring host has a unified time reference. This time reference is used as the basis for determining the timestamp of the arrival time of the traveling wave, so as to eliminate the time error between the beginning and end. The flexible sensor is installed on the outer sheath of each phase cable using a fixing fixture. The sensor orientation is limited by the foolproof structure of the fixing fixture, and the flexible sensor is air-gap-freely bonded to the cable under test by the compression deformation of the elastic clamping layer. The withstand voltage test is started and the voltage is gradually increased. The ranging host enters the low power monitoring mode. When the cable under test experiences a breakdown flashover, the leading edge of the traveling wave is coupled to the wake-up circuit through the flexible sensor. The wake-up circuit starts the traveling wave acquisition module and records the time when the traveling wave arrives at the beginning and end of the cable under test. The arrival time difference of the traveling wave at both ends is calculated based on this. The location of the fault point is calculated based on the arrival time difference of the traveling wave at both ends, the length of the cable under test, and the actual traveling wave velocity.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the steps of the integrated method for high-voltage cable withstand voltage test and double-end fault location as described in claim 8.

10. A storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the integrated method for high-voltage cable withstand voltage test and double-end fault location as described in claim 8.

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