A probeless card (CP) test method for large-size chips

Abstract

The present application relates to a kind of large size chip's no-probe card CP testing method, comprising: for the wafer of completing chip process, the micro bump of chip is prepared;Cut wafer to obtain multiple separated chip particles;Chip particles are placed on CP test platform, the test platform includes electrically connected adapter module and test seat, the micro bump pad of chip particles is electrically connected with the micro bump pad of adapter module, and the center distance between the micro bump pad of the adapter module and the center distance between the micro bump pad match;The test seat is connected test machine by load board PCB;CP testing is carried out to chip.The present application is converted to chip and test seat by adapter module as pitch conversion structure, not only avoid the use of specific test pad on chip particle, so as to greatly increase the number of power supply micro bump on chip particle, and test seat+load board PCB is used instead of probe card, no-probe card CP testing can be realized, and test cost is reduced.

Description

Technical Field

[0001] This invention relates to the field of chip testing technology, and in particular to a probeless CP testing method for large-size chips. Background Technology

[0002] In existing large-size chip probing (CP testing) processes, the electrical performance of the chip is typically tested using probe cards and probe arrays before the wafer is diced and separated from the die. Due to limitations in current probe fabrication processes, the pitch of conventional commercial probes is around 150 μm; fabricating probes with smaller pitches would significantly increase manufacturing costs.

[0003] like Figure 3 As shown, for large-size chips using advanced packaging processes, the center-to-center distance of their uBumps 31 is typically only 50μm, which is significantly different from the minimum adaptation distance of the probes 11 of the existing CP test probe card 10. To adapt to the existing 150μm pitch probes for CP testing, the existing solution requires the addition of large-pitch probe pads 12. These probe pads occupy the effective chip area that could have been used to place uBumps, reducing the number of uBumps available for chip power supply. At the same time, the uBump pads corresponding to high-speed signals are limited by space arrangement and spacing, making it impossible to arrange probe pads that are compatible with the existing probe card, thus preventing the high-speed signal path from completing electrical detection during the CP testing phase. Summary of the Invention

[0004] To address at least some of the problems mentioned above in the prior art, the present invention provides a probeless CP testing method for large-size chips, comprising: For wafers that have completed the chip manufacturing process, microbumps are fabricated to form the chips; Dividing a wafer yields multiple separate chip particles; The chip is placed on a CP test bench, which includes an electrically connected adapter module and a test socket. The microbumps of the chip are electrically connected to the microbump pads of the adapter module. The center-to-center spacing between the microbump pads of the adapter module matches the center-to-center spacing between the microbump pads. The test socket is connected to the test bench via a load board PCB. Perform CP testing on the chip.

[0005] Furthermore, the load board PCB is located below the test socket; The test socket has test pins that are electrically connected to the load board PCB and the adapter module.

[0006] Furthermore, the adapter module includes: A substrate has a first side facing the test socket and a second side away from the test socket, both the first and second sides of the substrate having bump pads; the bump pads on the first side of the substrate are electrically connected to the test pins of the test socket; the center-to-center spacing of the test pins matches the center-to-center spacing of the bump pads on the first side of the substrate. An adapter board is located on the substrate. The adapter board has a first side facing the test socket and a second side away from the test socket. The first side of the adapter board has bump pads, and the second side of the adapter board has microbump pads. The bump pads on the first side of the adapter board are electrically connected to the bump pads on the second side of the substrate, and the microbump pads on the adapter board are electrically connected to the microbumps of the chip.

[0007] Furthermore, the CP test bench also includes: An elastic support module, located on the substrate, includes a drop-stop support and a spring. The lower end of the drop-stop support is fixed to the substrate, and the spring is coaxially sleeved outside or adjacent to the drop-stop support. The lower end of the spring is fixed to the substrate, and the upper end of the spring extends freely and exceeds the top surface of the drop-stop support to form a floating stroke. The pressure plate is configured to press down and fix the chip particles.

[0008] Furthermore, the CP test station also includes: an upper frame, which is fixed on the substrate and surrounds the elastic support module, and there is a gap between the upper frame, the elastic support module and the adapter plate.

[0009] Furthermore, the adapter module is an adapter board, which has a first side facing the test socket and a second side away from the test socket. The first side of the adapter board has bump pads, and the second side of the adapter board has microbump pads. The microbump pads of the adapter board are used to electrically connect the microbumps of the chip. The center-to-center distance between the bump pads is greater than the center-to-center distance between the microbump pads.

[0010] Furthermore, the bump pads on the first and second sides of the substrate are connected by conductive elements in the substrate. The bump pads on the first and second sides of the adapter board are connected by electrical connectors in the adapter board.

[0011] Furthermore, it also includes fixing the chip particles onto the adapter module by pressing down with a pressure plate.

[0012] Furthermore, it also includes: The shape of the adapter board and the center spacing and position of the microbump pads are designed according to the shape of the chip particles and the center spacing and position of the microbumps. Install the adapter board on the CP test bench.

[0013] The present invention has at least the following beneficial effects: This invention uses an adapter module as a pitch conversion structure to connect chip chips to test sockets. The adapter module includes an adapter board or an adapter board and a substrate. A large-pitch bump pad is provided on the first side of the adapter board, and a small-pitch micro-bump pad is provided on the second side. The two are connected by electrical connectors inside the adapter board. Through this pitch conversion structure, after the chip chip is flip-chip mounted, its micro-bumps are directly electrically connected to the micro-bump pads, and then adapted to the test probes of existing test sockets via the bump pads. Thanks to this design, the reliance on high-cost micro-pitch probes in traditional whole-wafer testing is avoided, reducing testing costs. Furthermore, high-speed signal paths can be completely probed, and the use of specific large-pitch probe pads on the chip is avoided, effectively increasing the number of power supply micro-bumps on the chip chip.

[0014] The large-size chip CP test station of the present invention uses a test socket + load board PCB to replace the probe card, which can realize CP testing without probe card.

[0015] After completing the chip fabrication process on the wafer, this invention first grows microbumps, then cuts the wafer into individual chip particles, and then places them one by one on the test stage and performs pressure plate pressing to fix them for testing. This can achieve precise single-chip screening of 50μm micro-pitch bumps. Compared with traditional wafer-level testing, it saves the probe movement and alignment steps, shortens the testing time, and improves testing efficiency. Attached Figure Description

[0016] To further illustrate the above and other advantages and features of the various embodiments of the present invention, a more specific description of the embodiments of the invention will be presented with reference to the accompanying drawings. It is to be understood that these drawings depict only typical embodiments of the invention and are therefore not intended to limit its scope. In the drawings, identical or corresponding parts will be indicated by identical or similar reference numerals for clarity.

[0017] Figure 1 This illustrates a traditional flowchart from wafer fabrication to chip packaging and testing.

[0018] Figure 2 A flowchart illustrating the process from wafer fabrication to chip packaging testing that integrates the CP testing method of this invention is shown.

[0019] Figure 3 A schematic diagram of the cross-sectional structure of an existing CP test is shown.

[0020] Figure 4 A cross-sectional structural schematic diagram of a CP test station for probeless CP testing according to an embodiment of the present invention is shown.

[0021] Figure 5 A cross-sectional structural schematic diagram of a CP test bench according to an embodiment of the present invention is shown.

[0022] Figure 6 A cross-sectional structural schematic diagram of a CP test bench according to an embodiment of the present invention is shown. Detailed Implementation

[0023] It should be noted that the components in the accompanying drawings may be shown exaggerated for illustrative purposes and may not be to scale.

[0024] In this invention, the various embodiments are merely intended to illustrate the solutions of the invention and should not be construed as limiting.

[0025] In this invention, unless otherwise specified, the quantifiers “a” and “one” do not exclude scenarios involving multiple elements.

[0026] It should also be noted that, in the embodiments of the present invention, only a portion of the parts or components may be shown for clarity and simplicity. However, those skilled in the art will understand that, under the teachings of the present invention, the required parts or components can be added as needed for specific scenarios.

[0027] It should also be noted that within the scope of this invention, the terms "same", "equal", and "equal to" do not mean that the two values ​​are absolutely equal, but allow for a certain reasonable error. In other words, the terms also cover "substantially the same", "substantially equal", and "substantially equal to".

[0028] It should also be noted that in the description of this invention, the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not explicitly or implicitly suggest that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0029] Furthermore, the embodiments of the present invention describe the process steps in a specific order. However, this is only for the convenience of distinguishing each step, and is not a limitation on the order of each step. In different embodiments of the present invention, the order of each step can be adjusted according to the process.

[0030] Figure 1 This illustrates a traditional flowchart from wafer fabrication to chip packaging and testing.

[0031] like Figure 1As shown, existing technology performs CP testing directly on the entire wafer after wafer fabrication (completion of chip manufacturing process). Large-pitch probe pads for CP testing are fabricated on each chip on the wafer. After CP testing, microbumps are fabricated on the chips, and then the wafer is diced into chip particles. The chips are then packaged, and finally, the package structure undergoes FT testing (Final Test).

[0032] Using a probe card to perform CP testing on the entire wafer: Each chip on the wafer is individually tested by moving probes. This process involves probe movement and alignment of large-pitch probe pads and probes, and the overall testing time is relatively long.

[0033] Figure 2 A flowchart illustrating the process from wafer fabrication to chip packaging testing that integrates the CP testing method of this invention is shown.

[0034] like Figure 2 As shown, for large-size chips, the number of chips in a wafer is relatively small. After wafer production (completion of chip manufacturing process), the chip's microbumps (uBump) are first prepared. Then, the wafer is cut into individual chip dies. Each chip die is subjected to CP testing (chip probe testing). When the chip die passes the CP test, the chip is packaged. Finally, the package structure is subjected to FT testing.

[0035] A probeless CP testing method for large-size chips includes the following steps: For wafers that have completed the chip manufacturing process, microbumps are fabricated to form the chips; Dividing a wafer yields multiple separate chip particles; The chip is placed on the CP test bench, which includes an electrically connected adapter module and a test socket. The microbumps of the chip are electrically connected to the microbump pads of the adapter module. The center-to-center spacing between the microbump pads of the adapter module matches the center-to-center spacing between the microbump pads. The test socket is connected to the test bench via a load board PCB. Perform CP testing on the chip.

[0036] In one embodiment, the adapter module substrate and the adapter board, wherein: The substrate has a first side facing the test socket and a second side away from the test socket. Both the first and second sides of the substrate have bump pads. The bump pads on the first side of the substrate are electrically connected to the test pins of the test socket. The center-to-center spacing of the test pins matches the center-to-center spacing of the bump pads on the first side of the substrate. The adapter board is located on the substrate. The adapter board has a first side facing the test socket and a second side away from the test socket. The first side of the adapter board has bump pads, and the second side of the adapter board has microbump pads. The bump pads on the first side of the adapter board are electrically connected to the bump pads on the second side of the substrate, and the microbump pads on the adapter board are electrically connected to the microbumps of the chip.

[0037] In another embodiment, the adapter module is an adapter board having a first side facing the test socket and a second side away from the test socket. The first side of the adapter board has bump pads, and the second side of the adapter board has microbump pads. The microbump pads of the adapter board are used for electrically connecting the microbumps of the chip. The center-to-center distance between the bump pads is greater than the center-to-center distance between the microbump pads.

[0038] In one embodiment, the probeless CP testing method for large-size chips further includes: designing the shape of the adapter board and the center spacing and position of the microbump pads according to the shape of the chip particles and the center spacing and position of the microbumps; and mounting the adapter board on the CP test bench.

[0039] The shape of the adapter board and the microbump pads can be adjusted according to the shape and microbumps of the chip to be measured. The size, position, and spacing of the microbump pads on the adapter board need to match the size, position, and spacing of the microbumps on the chip.

[0040] Figure 4 A cross-sectional structural schematic diagram of a CP test station for probeless CP testing according to an embodiment of the present invention is shown.

[0041] like Figure 4 As shown, the CP test stand includes a test stand 70, a load board PCB 80, an adapter module, an upper frame 52, an elastic support module 53, and a pressure plate 60.

[0042] The load board PCB 80 is used to connect to the testing equipment. The test socket 70 is located on the load board PCB 80, and the two are electrically connected. The test socket 70 has test pins 71, and solder balls 72 are provided on the upper surface of the test socket 70. The test pins 71 connect the solder balls 72 and the load board PCB 80. The test pins 71 are metal pillars in the test socket 70.

[0043] The adapter module includes an adapter plate 20 and a base plate 40 that are electrically connected. The adapter plate 20 and the base plate 40 can be electrically connected via solder ball bumps 24. The base plate 40 is electrically connected to the probe 11, and the adapter plate 20 is located on the base plate 40.

[0044] The substrate 40 has a first surface facing the probe 11 and a second surface away from the probe 11. Both the first and second surfaces of the substrate 40 have bump pads 21. The center-to-center distance between the bump pads 21 on the first surface of the substrate 40 matches the center-to-center distance between the probes 11 on the probe card 10, that is, the center-to-center distance is the same. The center-to-center distance between the bump pads 21 on the first surface of the substrate 40 is greater than the center-to-center distance between the bump pads 21 on the second surface of the substrate 40.

[0045] The bump pads 21 on the first and second sides of the substrate 40 are connected by a conductive element 43.

[0046] The adapter board 20 has a first side facing the probe 11 and a second side away from the probe 11. The first side of the adapter board 20 has a bump pad 21, and the second side of the adapter board 20 has a microbump pad 22. The bump pad 21 and the microbump pad 22 are connected by an electrical connector 23 in the adapter board 20.

[0047] The center distance between the bump pads 21 is greater than the center distance between the microbump pads 22.

[0048] The microbump pads 22 of the adapter board 20 are used to connect the microbumps 31 of the chip 30.

[0049] The upper frame 52 and the elastic support module 53 are fixed on the base plate 40, with the upper frame 52 surrounding the elastic support module 53. The elastic support module 53 is located on both sides or around the adapter plate 20. The elastic support module 53 can be compressed. The elastic support module 53 includes a stop support and a spring. The stop support can be a cylinder, with its lower end vertically fixed to the base plate 40. The spring is coaxially sleeved outside the stop support or adjacent to it. The lower end of the spring is fixed to the base plate, while the upper end of the spring extends freely, floating a certain distance above the top surface of the stop support. When the pressure plate 60 presses down, it first contacts the upper end of the spring, compressing it downwards. The pressure plate continues to press down until its bottom surface adheres to the top of the stop support, at which point a rigid stop point is reached, and the spring no longer compresses.

[0050] In one embodiment, there is a gap between the upper frame 52, the elastic support module 53, and the adapter plate 20.

[0051] The pressure plate 60 has a handle and is used to press down and fix the chip 30 and the adapter board 20.

[0052] By connecting the test socket and load board PCB to the test bench, CP testing without probe cards can be achieved. In this way, the test bench can perform CP testing on micro bumps with a center distance of 50um, and avoid the need for expensive probes.

[0053] During testing, the chip is placed upside down, and the microbumps are electrically connected to the adapter module.

[0054] A CP testing method for large-size chips includes the following steps: For wafers that have completed the chip manufacturing process, microbumps are fabricated to form the chips; Dividing a wafer yields multiple separate chip particles; The chip is placed on a CP test bench, which includes an electrically connected adapter module and a probe card; the chip is electrically connected to the adapter module. Perform CP electrical tests on the chip.

[0055] The chip is flip-chip mounted, and the microbumps are electrically connected to the adapter module.

[0056] Figure 5 A cross-sectional structural schematic diagram of a CP test bench according to an embodiment of the present invention is shown.

[0057] In one embodiment, such as Figure 5 As shown, the CP test bench includes an adapter module and a probe card 10 that are electrically connected. The probes 11 of the probe card 10 face upwards, and the adapter module is located on the probes 11.

[0058] The adapter module may include an adapter board 20 having a first side facing the probe 11 and a second side away from the probe 11. The first side of the adapter board 20 has bump pads 21, and the second side of the adapter board 20 has microbump pads 22.

[0059] The center-to-center distance between the bump pads 21 on the first side of the adapter board 20 matches the center-to-center distance between the probes 11 on the probe card 10, meaning the center-to-center distance is the same. The center-to-center distance between the micro-bump pads 22 on the second side of the adapter board 20 matches the center-to-center distance between the micro-bumps 31 on the chip 30, meaning the center-to-center distance is the same. The center-to-center distance between the bump pads 21 is greater than the center-to-center distance between the micro-bump pads 22.

[0060] The bump pad 21 and the microbump pad 22 are connected by an electrical connector 23 in the adapter plate 20.

[0061] This CP test station allows the use of a standard 150µm center-to-center probe to detect microbumps with a 50µm center-to-center distance.

[0062] Large-pitch probe pads that do not require a specific center distance can fully utilize the position of the microbumps, enabling CP testing of microbumps that cover high-speed signals during the CP testing phase.

[0063] Figure 6 A cross-sectional structural schematic diagram of a CP test bench according to an embodiment of the present invention is shown.

[0064] like Figure 6As shown, the test bench includes a probe card 10, an adapter module, a bottom support 51, an upper frame 52, an elastic support module 53, and a pressure plate 60.

[0065] The bottom support 51 is located below the adapter module and is used to support the adapter module. The probe card 10 is located below the adapter module, and the probe 11 is electrically connected to the adapter module.

[0066] The bottom support 51 can be two opposing support plates or a rectangular frame. The probe card 10 is located within the space enclosed by the bottom support 51.

[0067] The adapter module includes an adapter plate 20 and a base plate 40 that are electrically connected. The adapter plate 20 and the base plate 40 can be electrically connected via solder ball bumps 24. The base plate 40 is electrically connected to the probe 11, and the adapter plate 20 is located on the base plate 40.

[0068] The substrate 40 has a first surface facing the probe 11 and a second surface away from the probe 11. Both the first and second surfaces of the substrate 40 have bump pads 21. The center-to-center distance between the bump pads 21 on the first surface of the substrate 40 matches the center-to-center distance between the probes 11 on the probe card 10, that is, the center-to-center distance is the same.

[0069] The bump pads 21 on the first and second sides of the substrate 40 are connected by a conductive element 43.

[0070] The adapter board 20 has a first side facing the probe 11 and a second side away from the probe 11. The first side of the adapter board 20 has a bump pad 21, and the second side of the adapter board 20 has a microbump pad 22. The bump pad 21 and the microbump pad 22 are connected by an electrical connector 23 in the adapter board 20.

[0071] The center distance between the bump pads 21 is greater than the center distance between the microbump pads 22.

[0072] The microbump pads 22 of the adapter board 20 are used to connect the microbumps 31 of the chip 30.

[0073] The upper frame 52 and the elastic support module 53 are fixed on the substrate 40, with the upper frame 52 surrounding the elastic support module 53. The elastic support module 53 is located on both sides or around the adapter plate 20. The elastic support module 53 can be compressed. The elastic support module 53 includes a stop support and a spring. The stop support can be a cylinder, with its lower end vertically fixed to the substrate 40. The spring is coaxially sleeved outside the stop support or adjacent to it. The lower end of the spring is fixed to the substrate, while the upper end extends freely, floating a certain distance above the top surface of the stop support. When the pressure plate 60 presses down, it first contacts the upper end of the spring, compressing it downwards. The pressure plate continues to press down until its bottom surface adheres to the top of the stop support, at which point a rigid stop point is reached, and the spring no longer compresses, preventing excessive pressure from the top plate on the chip.

[0074] In one embodiment, there is a gap between the upper frame 52, the elastic support module 53, and the adapter plate 20.

[0075] The pressure plate 60 has a handle and is used to press down and fix the chip 30 and the adapter board 20.

[0076] use Figure 6 The steps for performing CP testing on the CP test bench shown are as follows: For wafers that have completed the chip manufacturing process, grow and fabricate microbumps for the chip. The wafer is cut into multiple separate chip particles; The chip is placed on the test stage and fixed by pressing down with a pressure plate. The test stage includes an electrically connected adapter module and a probe card. The chip is electrically connected to the adapter module. The chip is placed upside down and the microbumps are electrically connected to the adapter module.

[0077] Perform CP testing on the chip.

[0078] Given the significant difference between the approximately 150μm center-to-center distance of existing commercial probes and the mere 50μm center-to-center distance of microbumps on advanced packaged chips, traditional solutions require additional large-pitch probe pads. This not only occupies valuable chip area but also prevents high-speed signal paths from completing electrical probing during the CP testing phase. Therefore, this invention features large-pitch bump pads on the first side of an adapter board and small-pitch microbump pads on the second side, connected by internal electrical connectors. This pitch conversion structure allows the microbumps of the chip to be directly electrically connected to the microbump pads after flip-chip placement, enabling adaptation to probes on existing probe cards via the bump pads. This design avoids the reliance on high-cost micro-pitch probes in traditional whole-wafer testing, allows for complete probing of high-speed signal paths, and eliminates the need for specific large-pitch probe pads on the chip, effectively increasing the number of power supply microbumps on the chip.

[0079] To ensure contact reliability and prevent overpressure damage during flip-chip bonding, the test bench employs a flexible pressing and fixing structure consisting of a pressure plate and an elastic support module. For buffering and rigid limiting, the elastic support module contains a stop support and a spring. The upper end of the spring extends freely above the top surface of the stop support, forming a floating stroke. When the pressure plate continuously presses down, it first contacts and compresses the spring until the bottom surface of the pressure plate adheres to the top of the stop support, reaching a rigid stop point, at which point the spring stops compressing. Because this structure has a defined compression stroke and rigid stop point, it can adapt to minute height differences on the chip surface, achieving uniform distribution and stable maintenance of contact pressure, thereby ensuring a low-impedance and highly reliable electrical contact between the microbumps and microbump pads.

[0080] For efficient signal transfer and a compact structure, a hierarchical electrical connection layout is achieved between the substrate and the adapter board using solder ball bumps and conductive components. The center-to-center distance of the bump pads on the first side of the substrate precisely matches the spacing of the probe or test pin array, and this spacing is greater than the center-to-center distance of the bump pads on the second side of the substrate; the pads on both sides of the substrate and the pads on both sides of the adapter board are interconnected through internal conductive components. Through this hierarchical stacking design, the signal can smoothly transition from the probe end to the micro-bump end. Therefore, this layout not only improves the integrity and transmission rate of the test signal, but also optimizes the overall stacking efficiency of the test station.

[0081] Given the limited yield of large-size chips per wafer and the need for strict yield control, this invention employs a process of first growing microbumps on the wafer, then dicing the wafer and performing individual flip-chip testing. The wafer is diced into individual chips, which are then placed one by one on a testing stage and fixed by a pressure plate for testing. Because this process skips the traditional wafer-level batch probe testing steps, it enables precise individual screening of bumps with a 50μm micro-pitch.

[0082] While some embodiments of the present invention have been described in this application, those skilled in the art will understand that these embodiments are merely illustrative. Numerous variations, alternatives, and improvements will arise in those skilled in the art under the teachings of this invention without departing from its scope. The appended claims are intended to define the scope of the invention and thereby cover methods and structures within the scope of the claims themselves and their equivalents.

Claims

1. A probeless CP testing method for large-size chips, characterized in that, include: For wafers that have completed the chip manufacturing process, microbumps are fabricated to form the chips; Dividing a wafer yields multiple separate chip particles; The chip is placed on a CP test bench, which includes an electrically connected adapter module and a test socket. The microbumps of the chip are electrically connected to the microbump pads of the adapter module. The center-to-center spacing between the microbump pads of the adapter module matches the center-to-center spacing between the microbump pads. The test socket is connected to the test bench via a load board PCB. Perform CP testing on the chip.

2. The probeless CP testing method for large-size chips according to claim 1, characterized in that, The load board PCB is located below the test socket; The test socket has test pins that are electrically connected to the load board PCB and the adapter module.

3. The probeless CP testing method for large-size chips according to claim 2, characterized in that, The adapter module includes: A substrate has a first side facing the test socket and a second side away from the test socket, both the first and second sides of the substrate having bump pads; the bump pads on the first side of the substrate are electrically connected to the test pins of the test socket; the center-to-center spacing of the test pins matches the center-to-center spacing of the bump pads on the first side of the substrate. An adapter board is located on the substrate. The adapter board has a first side facing the test socket and a second side away from the test socket. The first side of the adapter board has bump pads, and the second side of the adapter board has microbump pads. The bump pads on the first side of the adapter board are electrically connected to the bump pads on the second side of the substrate, and the microbump pads on the adapter board are electrically connected to the microbumps of the chip.

4. The probeless CP testing method for large-size chips according to claim 3, characterized in that, The CP test bench also includes: An elastic support module, located on the substrate, includes a drop-stop support and a spring. The lower end of the drop-stop support is fixed to the substrate, and the spring is coaxially sleeved outside or adjacent to the drop-stop support. The lower end of the spring is fixed to the substrate, and the upper end of the spring extends freely and exceeds the top surface of the drop-stop support to form a floating stroke. The pressure plate is configured to press down and fix the chip particles.

5. The probeless CP testing method for large-size chips according to claim 4, characterized in that, The CP test station also includes: an upper frame, which is fixed on the substrate and surrounds the elastic support module, and there is a gap between the upper frame, the elastic support module and the adapter plate.

6. The probeless CP testing method for large-size chips according to claim 1, characterized in that, The adapter module is an adapter board, which has a first side facing the test socket and a second side away from the test socket. The first side of the adapter board has bump pads, and the second side of the adapter board has microbump pads. The microbump pads of the adapter board are used to electrically connect the microbumps of the chip. The center-to-center distance between the bump pads is greater than the center-to-center distance between the microbump pads.

7. The probeless CP testing method for large-size chips according to claim 3, characterized in that, The bump pads on the first and second sides of the substrate are connected by conductive components in the substrate. The bump pads on the first and second sides of the adapter board are connected by electrical connectors in the adapter board.

8. The probeless CP testing method for large-size chips according to claim 3, characterized in that, Also includes: The chip is fixed onto the adapter module by pressing down with a pressure plate.

9. The probeless CP testing method for large-size chips according to claim 3 or 6, characterized in that, Also includes: The shape of the adapter board and the center spacing and position of the microbump pads are designed according to the shape of the chip particles and the center spacing and position of the microbumps. Install the adapter board on the CP test bench.

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