A multi-mode multi-channel signal simulation source method and device for a satellite navigation anti-jamming receiver chip, and a chip test method based on a chip-in signal simulation source IP

Abstract

The application discloses a kind of multi-mode multi-channel signal simulation source methods for satellite navigation anti-interference receiver chip, comprising: satellite signal simulation and interference signal simulation, satellite signal simulation is: according to user configuration realizes pseudo code generation, carrier generation and noise sequence generation, I / Q text is modulated by pseudo code and carrier modulation and generates signal sequence, signal sequence and noise sequence are multiplied by corresponding amplitude factor and added, obtain first superposition result, with satellite signal array response vector is multiplied, obtain first multiplication result;Interference signal simulation is: generating interference signal, carrier modulation is carried out, with interference signal array response vector is multiplied, obtain second multiplication result;Two kinds of simulation processes are parallel, first multiplication result and second multiplication result are superimposed, and shift saturation is obtained analog intermediate frequency signal.The signal simulation source of the application reduces verification and test cost, improves verification coverage and efficiency, and provides flexible and configurable high-fidelity test excitation.

Description

Technical Field

[0001] This invention relates to the field of satellite ground equipment, and more specifically, to a method and apparatus for a multi-mode, multi-channel signal simulation source for a satellite navigation anti-jamming receiver chip, and a chip testing method based on on-chip signal simulation source IP. Background Technology

[0002] In recent years, satellite navigation interference incidents have occurred frequently, posing a serious threat to the low-altitude economy and the autonomous driving industry. Urban drone logistics, aerial inspection, and eVTOL scenarios heavily rely on continuous and reliable navigation and positioning. However, the widespread availability of low-cost civilian drones makes malicious jamming devices easily accessible. Suppression and spoofing attacks can instantly cause drones to lose connection and crash, or autonomous vehicles to veer off course. Currently, most ordinary navigation chips prioritize low power consumption and small size, lacking active anti-interference capabilities. They lose lock-up or output incorrect positioning when faced with interference, leaving them virtually unprotected. Therefore, developing a low-cost, anti-interference baseband integrated chip is of significant practical importance: without significantly increasing power consumption and area, it embeds anti-suppression and anti-spoofing algorithms into consumer-grade and automotive-grade terminals, providing underlying hardware guarantees for the safe and large-scale application of the low-altitude economy and autonomous driving.

[0003] However, the design and verification of this type of chip faces a core challenge—data source acquisition. Existing technologies mainly include two solutions: one is a testing solution that relies on external signal and interference sources. This requires a multi-channel satellite navigation signal simulator, a multi-channel interference signal source, a high-precision time synchronization system, a full-sky microwave anechoic chamber, and high-speed intermediate frequency data acquisition and storage instruments, with a single system costing millions of yuan. In multi-element scenarios, multi-channel intermediate frequency data needs to be acquired simultaneously, requiring extremely high storage bandwidth, resulting in a huge amount of data and time-consuming post-processing. Furthermore, it cannot achieve chip-level closed-loop self-testing, and each verification requires the construction of an external environment, resulting in a long debugging cycle, which is not suitable for rapid iteration and mass production testing during the chip design stage. Another reference patent, ZL202311800329.1, "A Signal Simulation Source Device for Verification and Testing of Satellite Navigation Chips," employs an on-chip integrated signal simulation source technology to achieve on-chip self-verification. However, it only supports the generation of intermediate frequency signals for a single satellite and a single frequency point, failing to support joint simulation of multiple satellites and multiple frequency points in a single-antenna scenario. This makes it difficult to achieve complex integrated function verification such as simultaneous multi-satellite tracking, synchronized message parsing, and high-precision observation extraction. Furthermore, this device completely lacks support for array antenna scenarios, failing to provide the required synchronization signals and phase relationships between multiple array element channels, thus making it impossible to perform any form of functional performance verification on the array anti-interference receiver. In summary, existing on-chip signal simulation technologies have significant shortcomings in supporting multiple satellites, multiple frequency points, and multiple array elements, failing to meet the full-scenario, full-function closed-loop verification requirements of anti-interference baseband integrated chips. Summary of the Invention

[0004] The present invention aims to overcome at least one defect in the prior art and provides a method and apparatus for multi-mode multi-channel signal simulation source for satellite navigation anti-interference receiver chips, and a chip testing method based on on-chip signal simulation source IP, to solve the problems of high cost or difficulty in supporting joint simulation of multiple satellites, multiple frequency points and multiple array elements.

[0005] The technical solution adopted in this invention is a method for simulating multi-mode, multi-channel signals for satellite navigation anti-jamming receiver chips, comprising two parts: satellite signal simulation and interference signal simulation. Satellite signal simulation includes the following steps: S1. Pseudocode generation, and pseudocode modulation of the I / Q message; S2. Carrier generation, and carrier modulation of the pseudocode-modulated symbols; S3. Multiply the carrier modulation result by the signal amplitude factor to obtain the satellite signal; S4. Noise is generated, and the noise is multiplied by the noise amplitude factor to obtain the final noise signal; S5. Add the satellite signal to the final noise signal to obtain the first superposition result; S6. Multiply the first superposition result with the satellite signal array response vector to obtain the first multiplication result; Interference signal simulation includes the following steps: S7. Interference is generated and filtered by an FIR filter; S8. Carrier generation, and carrier modulation of the filtered interference; S9. Multiply the carrier modulation result by the interference amplitude factor to obtain the interference signal; S10. Multiply the interference signal with the response vector of the interference signal array to obtain the second multiplication result; The satellite signal simulation and interference signal simulation are performed in parallel. After obtaining the first multiplication result and the second multiplication result, subsequent steps are executed: S11. The first multiplication result is superimposed with the second multiplication result to obtain a second superposition result, and the second superposition result is shifted and saturated to obtain an analog intermediate frequency signal.

[0006] This solution adds calculations of signal amplitude factor, noise amplitude factor, and satellite signal array vector multiplication in the satellite signal simulation section, and adds calculations of interference amplitude factor and interference signal array response vector multiplication in the interference signal simulation section. This enables the solution to support intermediate frequency signal simulation for single-antenna and array antenna satellite navigation, with flexible and configurable operating modes. It supports the entire GNSS (Global Navigation Satellite System) system and all frequency points, as well as low-Earth orbit navigation enhancement signal systems, and can be expanded to support other types of navigation systems.

[0007] To establish a multi-timescale simulation system, the satellite signal simulation and interference signal simulation processes are driven by a local timing module, specifically as follows: The local timing module is driven by the working clock BBCLK and is based on the code NCO. The phase accumulation overflow flag of the code NCO drives the chip count ChipCnt, the chip count ChipCnt overflow flag drives the millisecond count MsCnt, the millisecond count MsCnt overflow flag drives the message count NavCnt, and the message count NavCnt overflow flag drives the subframe count SFCnt.

[0008] The local timing module's five-level time system supports the synchronous generation of multiple satellite signals, enabling precise phase control between multiple array element channels to simulate the array response vector; it also ensures the coherent superposition of navigation rain interference signals, simulating a real electromagnetic environment.

[0009] Preferably, the pseudocode generation in step S1, and the pseudocode modulation of the I / Q message, specifically includes: The pseudocode generation process is as follows: The pseudo-random code is generated by a universal code generator, which generates the following types of pseudo-random codes, including m-sequences, Gold codes, Weil codes, and storage codes. Pseudocode modulation specifically refers to: The specific rules for processing modulation methods are as follows: (1) For the BOC modulated signal, perform half-chip subcarrier modulation on the pseudo-code; (2) For time-division multiplexing pseudo-code, generate I / Q pseudo-code, which correspond to the two sets of code sequences of time-division multiplexing respectively; (3) For BPSK modulated signals, only one pseudo-code is generated; (4) For the dual BPSK modulation signal, generate two pseudo codes, I and Q, which are used for the data channel and the pilot channel, respectively.

[0010] Preferably, the noise generation in step S4 specifically involves generating a Gaussian white noise sequence using the inverse cumulative distribution function (ICDF), specifically: Linear feedback shift registers generate uniformly distributed pseudo-random sequences; The pseudo-random sequence is accumulated modulo 2 to obtain a new uniformly distributed sequence; Obtain the input of the ICDF function from a uniformly distributed sequence; Calculate the lookup table address for the ICDF function; Calculate the second-order polynomial interpolation of the ICDF function and output a Gaussian white noise sequence.

[0011] In order to obtain and configure the relative positional relationship between the satellite and the receiver, before executing step S6, the satellite signal array vector is first obtained, specifically as follows: The array signal model is a uniform circular array with center O and radius R. M identical omnidirectional arrays are uniformly distributed on the xy plane with radius R. On the circumference, The signal wavelength is the incident signal. This is a useful signal; Let the angle between the line connecting the m-th array element and the center O and the x-axis be θ. , Then the position vector of array element m for:

[0012] Incident signal direction unit vector for:

[0013] The phase difference between the origin and the signal envelope received by array element m at the same time for:

[0014] The array response vector of M uniform circular arrays for:

[0015] The array response vector of the satellite signal can be configured via registers, supporting any relative positional relationship between the satellite and the receiver.

[0016] To support narrowband, wideband suppression interference, and forwarding spoofing interference, step S8 involves carrier generation and carrier modulation of the filtered interference, specifically as follows: The interference carrier generation is specifically as follows: A carrier NCO combined with a sine and cosine lookup table is used to generate carrier signals with different center frequencies and introduce Doppler frequency shift. The interference carrier modulation is specifically as follows: In addition to multiplying the generated carrier wave with the pseudocode sequence by a complex number, it also includes pulse modulation and sweep frequency modulation methods.

[0017] The jamming code supports single-tone (no code) and pseudo-random generated codes. The bandwidth, duty cycle, and center frequency can be configured, thus supporting narrowband and wideband suppression jamming in the form of continuous, pulse, and frequency sweep. It also supports forwarding spoofing jamming.

[0018] To obtain and configure the relative positional relationship between the interference source and the receiver, before executing step S10, the response vector of the interference signal array is first obtained, specifically: The array signal model is a uniform circular array with center O and radius R. M identical omnidirectional arrays are uniformly distributed on the xy plane with radius R. On the circumference, The signal wavelength is the incident signal. This is an interference signal; Let the angle between the line connecting the m-th array element and the center O and the x-axis be θ. , Then the position vector of array element m for:

[0019] Incident signal direction unit vector for:

[0020] The phase difference between the origin and the signal envelope received by array element m at the same time for:

[0021] The array response vector of M uniform circular arrays for:

[0022] The array response vector of the interference source can be configured via registers, supporting any relative positional relationship between the interference source and the receiver.

[0023] To support joint simulation of multiple satellites and multiple frequencies in a single-antenna scenario, as well as in an array antenna scenario, step S11 involves superimposing the first multiplication result with the second multiplication result to obtain a second superposition result, and then shifting and saturating the second superposition result to obtain the simulated intermediate frequency signal. Specifically: The intermediate frequency signal vector received by the sixteen array elements for:

[0024] For satellite signals, The final noise signal, This is the first superposition result. Let M be the array response vector of M uniform circular arrays. This is an interference signal. The elevation and azimuth angles of the satellite signal are the incident elevation angle and azimuth angle. The incident elevation and azimuth angles of the interference signal.

[0025] The first superposition result obtained by superimposing the satellite signal and the final noise signal is multiplied by the first multiplication result obtained by multiplying the satellite signal array vector, and then the second multiplication result obtained by multiplying the interference signal and the interference signal array response vector is superimposed. After shift saturation, the final analog intermediate frequency signal is obtained. The analog intermediate frequency signal supports multi-element, multi-satellite, and multi-frequency configuration. It can meet the requirements of full baseband function verification such as multi-satellite tracking and observation extraction in single-antenna scenarios, as well as the requirements of multi-channel synchronous signal generation and anti-interference algorithm closed-loop testing in array antenna scenarios. This enables low-cost self-verification of the anti-interference baseband integrated chip in all scenarios and with all functions.

[0026] A multi-mode, multi-channel signal simulation device for satellite navigation anti-jamming receiver chips, constructed based on the aforementioned method for a multi-mode, multi-channel signal simulation source for satellite navigation anti-jamming receiver chips, includes the following modules: Local timing module: used for pseudocode chip updates, secondary code updates, and message updates; Pseudocode module: used to generate pseudocode and perform pseudocode modulation; Carrier generation module: used for carrier generation and carrier modulation of satellite signals and interference signals; Noise generation module: Generates a Gaussian white noise sequence using the ICDF method, and multiplies it by the noise amplitude factor to obtain the final noise signal; Interference generation module: includes interference chip generation and finite impulse response (FIR) low-pass filtering; Array response vector module: Used to generate array response vector parameters for satellite signals and interference signals.

[0027] By integrating an on-chip configurable intermediate frequency signal simulation source that supports multiple array elements, multiple satellites, and multiple frequency points, it can not only meet the requirements for full baseband function verification such as multi-satellite tracking and observation extraction in single-antenna scenarios, but also meet the requirements for multi-channel synchronous signal generation and anti-interference algorithm closed-loop testing in array antenna scenarios.

[0028] A chip testing method based on on-chip signal simulation source IP, implemented using the aforementioned multi-mode, multi-channel signal simulation device for satellite navigation anti-jamming receiver chips, includes the following steps: T1. During the UVM simulation and verification phase, the signal simulation and baseband signal processing flow are run through the chip's algorithm model, and the running results of key nodes are stored as files. T2. Configure the registers of the baseband signal processing module in the CPU firmware, and select the output of the signal analog source IP as the intermediate frequency signal data source; T3, CPU firmware configuration signal analog source IP register and output enable data; T4. At a specific time, read the real-time running results of the module and compare them with the stored reference running results. Statistically analyze the comparison results over a certain period of time to determine whether the verification or test has been passed.

[0029] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. Reduce verification and testing costs: By directly integrating the multi-mode, multi-channel signal simulation source IP into the satellite navigation chip, the reliance on expensive external dedicated testing equipment, such as multi-channel satellite signal simulators, multi-channel interference sources, starry microwave anechoic chambers, and high-speed intermediate frequency acquisition instruments, is eliminated. This allows the chip to achieve closed-loop self-verification of functions and performance at extremely low cost in all stages of design simulation, FPGA prototype verification, and mass production testing, significantly saving on equipment purchase, environment setup, and subsequent maintenance costs.

[0030] 2. Comprehensively improve verification coverage and efficiency: Compared to existing on-chip simulation solutions that only support single satellite and single frequency points, this solution supports multi-satellite full-system full-frequency points and multiple array elements under single antenna and array antenna, such as 4 arrays, 8 arrays, and 16 arrays, and joint simulation of complex scenarios with multiple interference types. This not only enables comprehensive verification of the receiver's baseband core functions, such as simultaneous multi-satellite tracking, message synchronous parsing, and high-precision observation extraction, but also enables the first on-chip quantitative testing of the performance of array nulling / multi-beam anti-interference algorithms, improving the verification coverage from the module level to the system level, and significantly shortening the chip development and testing cycle.

[0031] 3. Provides flexible and configurable high-fidelity test stimuli: With a precise local timing mechanism, a configurable array response vector model, a high-precision ICDF noise generation algorithm, and rich interference simulation capabilities, highly realistic multi-channel intermediate frequency signals can be generated on-chip. Key parameters such as carrier-to-noise ratio, interference-to-signal ratio, satellite / interference source direction, dynamic Doppler, and signal system of these signals can be flexibly configured, simulating various extreme conditions from conventional urban environments to complex electromagnetic countermeasure environments. This provides anti-interference receivers with rigorous, repeatable, and quantifiable test cases that are difficult to achieve using traditional methods. Attached Figure Description

[0032] The accompanying drawings are for illustrative purposes only and should not be construed as limiting the invention. To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0033] Figure 1 This is a flowchart of a method for simulating multi-mode, multi-channel signals for a satellite navigation anti-interference receiver chip, according to the present invention.

[0034] Figure 2 This is a block diagram of a local computing module for a satellite navigation anti-jamming receiver chip according to the present invention.

[0035] Figure 3 This is a schematic diagram of a uniform circular array signal model for a multi-mode, multi-channel signal simulation source method and device for satellite navigation anti-interference receiver chips according to the present invention.

[0036] Figure 4 This is a functional block diagram of a multi-mode, multi-channel signal analog source device for a satellite navigation anti-interference receiver chip according to the present invention.

[0037] Figure 5 This is an architecture diagram of a satellite navigation anti-jamming receiver chip according to the present invention.

[0038] Figure 6 This is a flowchart illustrating the verification and testing of a satellite navigation chip based on a multi-mode, multi-channel signal analog source IP according to the present invention. Detailed Implementation

[0039] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] It should be noted that, unless otherwise defined, the technical or scientific terms used in this invention should have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0041] Example 1 like Figure 1 As shown, this scheme proposes a multi-mode, multi-channel signal simulation source method for satellite navigation anti-jamming receiver chips, comprising two parts: satellite signal simulation and interference signal simulation. Satellite signal simulation includes the following steps: S1. Pseudocode generation, and pseudocode modulation of the I / Q message; Message I / Q can be configured via the bus; The pseudo-random code is generated by a universal code generator, which can generate the following types of pseudo-random codes: m-sequences, such as GPS L2C signals; Gold codes, used for most satellite navigation signals; Weil codes, such as BeiDou B1C and GPS L1C signals; and stored codes, such as Galileo E1OS signals. Based on the type of pseudo-random code generated by the universal code generator, the corresponding modulation scheme is selected. The specific processing rules are as follows: (1) For BOC modulated signals, when applied to signals such as Beidou B1C, GPS L1C, and Galileo E1OS, it is necessary to perform half-chip subcarrier modulation on the pseudo code, that is, the pseudo code is multiplied by the square wave subcarrier. At this time, the pseudo code is Weil code or stored code. (2) For time-division multiplexing pseudo-codes, such as GPS L2C and low-orbit MCSK signals, generate two pseudo-codes, I and Q, which correspond to two sets of code sequences in time-division multiplexing. At this time, the two pseudo-codes generated are both Gold codes. (3) For BPSK modulated signals, such as Beidou B1I and GPS L1C / A signals, only I pseudo-code is generated. The pseudo-code generated at this time is Gold code or m sequence. (4) For dual BPSK modulated signals, such as Beidou B2a and GPS L5 signals, generate two pseudo codes, I and Q, which are used for the data channel and the pilot channel, respectively. The pseudo code generated at this time is Gold code.

[0042] S2. Carrier generation, and carrier modulation of the pseudocode-modulated symbols; By employing a carrier NCO in conjunction with a sine / cosine lookup table, carrier signals with different center frequencies and incorporating Doppler frequency shifts can be flexibly generated. Multiplying the generated carrier signal by a pseudocode sequence using a complex number yields BPSK or dual BPSK modulation.

[0043] S3. Multiply the carrier modulation result by the signal amplitude factor to obtain the satellite signal; The signal amplitude factor is configured by the user.

[0044] S4. Noise is generated, and the noise is multiplied by the noise amplitude factor to obtain the final noise signal; Noise generation employs the Inverse Cumulative Distribution Function (ICDF) method to generate a Gaussian white noise sequence. First, a 64-bit uniformly distributed sequence is generated, which is then converted to a 16-bit Gaussian distributed sequence. Specifically: First, a uniformly distributed pseudo-random sequence is generated using a linear feedback shift register as shown in the following formula. :

[0045] Let represent the i-th pseudo-random sequence, with the index k indicating the running time; k, q, and s are all shift coefficients and are positive integers. A and C are 64-bit integers; the high k bits of C are 1, and the low (64-k) bits are 0.

[0046] Then N pseudo-random sequences The uniformly distributed sequence with a longer period and better randomness is obtained by performing modulo-2 accumulation according to the following formula. :

[0047] Next, the ICDF function is used to convert the uniformly distributed sequence into a Gaussian distributed sequence. :

[0048] x is the input uniformly distributed sequence [0,1], and y is the output Gaussian distributed sequence. This is the inverse error function.

[0049] The ICDF function is implemented using a lookup table method. Piecewise second-order polynomial interpolation is performed on the ICDF function values, and the polynomial coefficients are stored in a lookup table in Static Random Access Memory (SRAM). The lookup table is divided into 62 segments in power-of-2 increments, with each segment further divided into 4 segments, for a total of 248 addresses. The C0-C2 segments are obtained by looking up the table based on the segment address of the uniformly distributed sequence value x, and then the corresponding Gaussian distributed sequence value y is calculated.

[0050] The following formula is used to obtain a uniformly distributed 64-bit sequence. Obtaining ICDF function input :

[0051] The address of the ICDF function lookup table is calculated using the following formula:

[0052] The second-order polynomial interpolation output of the ICDF function is calculated according to the following formula. That is, the required Gaussian white noise sequence:

[0053] S5. Add the satellite signal to the final noise signal to obtain the first superposition result; S6. Multiply the first superposition result with the satellite signal array response vector to obtain the first multiplication result; The array response vector parameters of satellite signals can be configured via registers, such as... Figure 3 As shown, the array signal model is introduced using a commonly used uniform circular array as an example.

[0054] M identical omnidirectional arrays are uniformly distributed on the xy plane with radius... On the circumference, The incident signal is the wavelength of the signal. This is a useful signal.

[0055] The angle between the line connecting the m-th element and the center O and the x-axis is . , Then the position vector of array element m for:

[0056] Incident signal direction unit vector for:

[0057] The phase difference between the origin and the signal envelope received by array element m at the same time for:

[0058] The array response vector of M uniform circular arrays for:

[0059] Interference signal simulation includes the following steps: S7. Interference is generated and filtered by an FIR filter; The interference signal generation includes interference chip generation and finite impulse response (FIR) low-pass filtering, using Gold code sequences not currently used by satellites in orbit as interference chips; the interference bandwidth is constrained and shaped by configuring FIR filter parameters.

[0060] S8. Carrier generation, and carrier modulation of the filtered interference; Interference signal generation also includes interference carrier modulation. For interference signals, in addition to multiplying the generated interference carrier with the pseudo-code sequence by a complex number to achieve BPSK or double BPSK modulation, pulse modulation and frequency sweep modulation methods are also integrated to support more complex interference scenario simulation.

[0061] For forwarding spoofing interference scenarios, instead of generating a separate interference code or performing FIR filtering, a configurable delay is introduced into the pseudo code chip of the real signal, i.e., a forwarding spoofing delay chip.

[0062] S9. Multiply the carrier modulation result by the interference amplitude factor to obtain the interference signal; The interference amplitude factor is configured by the user.

[0063] S10. Multiply the interference signal with the response vector of the interference signal array to obtain the second multiplication result; Before performing the multiplication calculation, the response vector of the interference signal array is first obtained, specifically: The array response vector parameters of the interference signal can be configured via registers, such as... Figure 3 As shown, the array signal model is introduced using a commonly used uniform circular array as an example.

[0064] M identical omnidirectional arrays are uniformly distributed on the xy plane with radius... On the circumference, The incident signal is the wavelength of the signal. This is an interference signal; The angle between the line connecting the m-th element and the center O and the x-axis is . Then the position vector of array element m is:

[0065] The unit vector of the incident signal direction is:

[0066] At the same moment, the phase difference between the origin and the signal envelope received by array element m is:

[0067] The array response vector of M uniform circular arrays is:

[0068] The satellite signal simulation and interference signal simulation are performed in parallel. After obtaining the first multiplication result and the second multiplication result, subsequent steps are executed: S11. The first multiplication result is superimposed with the second multiplication result to obtain a second superposition result, and the second superposition result is shifted and saturated to obtain an analog intermediate frequency signal.

[0069] The intermediate frequency signal vector received by the sixteen array elements is:

[0070] For satellite signals, The final noise signal, This is the first superposition result. Let M be the array response vector of M uniform circular arrays. This is an interference signal. The elevation and azimuth angles of the satellite signal are the incident elevation angle and azimuth angle. The incident elevation and azimuth angles of the interference signal.

[0071] The array response vector is calculated based on the incident elevation and azimuth angles of the pre-set satellite signal and interference signal. The array response vector is then configured in the register and multiplied by the satellite signal and interference signal respectively to obtain the array intermediate frequency signal.

[0072] Additionally, the aforementioned satellite signal simulation and interference signal simulation are driven by the local timing module for pseudo-code chip updates, secondary code updates, and message updates, specifically as follows: like Figure 2 As shown, the local timing module is driven by the working clock BBCLK and based on the code NCO. The phase accumulation overflow flag of the code NCO drives the chip count ChipCnt, the chip count ChipCnt overflow flag drives the millisecond count MsCnt, the millisecond count MsCnt overflow flag drives the message count NavCnt, and the message count NavCnt overflow flag drives the subframe count SFCnt, forming a five-level time recursion system of "NCO phase → chip count → millisecond count → message bit count → subframe count".

[0073] Example 2 This embodiment provides a multi-mode, multi-channel signal simulation source device for a satellite navigation anti-jamming receiver chip, used to implement the multi-mode, multi-channel signal simulation source method for a satellite navigation anti-jamming receiver chip described in Embodiment 1, specifically as follows: The functional block diagram of the multi-mode multi-channel signal analog source IP is as follows: Figure 4 As shown. The message I / Q can be configured via the bus; the signal pseudocode I / Q is generated by a code generator, supporting Gold / m sequence generation codes, Weil codes, and stored codes; pseudocode modulation supports binary offset carrier (BOC), multiplex code shift keying (MCSK), and chip time-division multiplexing; the signal carrier is generated using a numerically controlled oscillator (NCO) lookup table, supporting configurable carrier frequency and Doppler; signal carrier modulation supports binary phase shift keying (BPSK) and data / pilot dual BPSK; the final noise signal uses an inverse cumulative distribution function (ICDF). The interference code is generated using a function algorithm; it supports single-tone, i.e., no code and pseudo-random generated code, and the bandwidth, duty cycle, and center frequency can be configured, thus supporting narrowband and wideband suppression interference in the form of continuous, pulse, and frequency sweep, and also supports forwarding spoofing interference; the array response vectors of satellite signals and interference signals can be configured through registers, supporting arbitrary relative positional relationships between satellites, interference sources, and receivers; the carrier-to-noise ratio and interference-to-signal ratio of the signal can be set by configuring the signal, noise, and interference amplitude factors.

[0074] The main characteristics of the multi-mode, multi-channel signal analog source IP are as follows: (1) It can support intermediate frequency signal simulation of single antenna and array antenna receivers, including multi-antenna single satellite single frequency point, multi-antenna single satellite multi-frequency point, multi-antenna multi-satellite single frequency point, multi-antenna multi-satellite multi-frequency point, and single antenna single satellite multi-frequency point, single antenna multi-satellite single frequency point, single antenna multi-satellite multi-frequency point and other modes. (2) The intermediate frequency signal is in complex form, and the data bit width and format are configurable; (3) The message, frame synchronization header, and secondary code can all be configured; the secondary code, also known as the sub-code, is a secondary spreading code modulated on the pseudo-code to improve signal correlation performance. (4) The intermediate frequency and Doppler can be matched; (5) The pseudocode supports three types: generated code, Weil code and stored code. Among them, the I / Q channel generator polynomial of the generated code can be configured; the generated code can be an m-sequence or a Gold code. (6) Supports BOC and MCSK pseudocode modulation, and supports BPSK and D / P dual BPSK carrier modulation; (7) Supports adding Gaussian white noise to the signal, and the carrier-to-noise ratio is configurable; (8) Supports multiple types of suppression interference and forwarding deception interference, and the interference-to-signal ratio is configurable.

[0075] Module design Local timing module: like Figure 2 As shown, the local timing module is driven by the working clock BBCLK and based on the code NCO. The phase accumulation overflow flag of the code NCO drives the chip count ChipCnt, the chip count ChipCnt overflow flag drives the millisecond count MsCnt, the millisecond count MsCnt overflow flag drives the message count NavCnt, and the message count NavCnt overflow flag drives the subframe count SFCnt, which is used for pseudocode chip update, secondary code update and message update.

[0076] Pseudocode generation module: The pseudo-random code generation module includes a general-purpose code generator and a pseudo-random code modulation submodule. The general-purpose code generator can generate the following types of pseudo-random codes, covering m-sequences such as GPS L2C signals; Gold codes, used for most satellite navigation signals; Weil codes, such as BeiDou B1C and GPS L1C signals; and stored codes, such as Galileo E1OS signals. The processing rules are as follows, depending on the modulation method: (1) For BOC code, which is applied to signals such as Beidou B1C, GPS L1C, and Galileo E1OS, it is necessary to perform half-chip subcarrier modulation on the pseudo code, that is, the pseudo code is multiplied by the square wave subcarrier. At this time, the pseudo code is Weil code or stored code. (2) For time-division multiplexing pseudo-codes, such as GPS L2C and low-orbit MCSK signals, generate two pseudo-codes, I and Q, which correspond to two sets of code sequences in time-division multiplexing. At this time, the two pseudo-codes generated are both Gold codes. (3) For BPSK modulated signals, such as Beidou B1I and GPS L1C / A signals, only I pseudo-code is generated. The pseudo-code generated at this time is Gold code or m sequence. (4) For dual BPSK modulated signals, such as Beidou B2a and GPS L5 signals, generate two pseudo codes, I and Q, which are used for the data channel and the pilot channel, respectively. The pseudo code generated at this time is Gold code.

[0077] Carrier generation module: The carrier generation module includes carrier generation and modulation functions for both satellite and interference signals. This module employs a carrier NCO combined with a sine / cosine lookup table to flexibly generate carrier signals with different center frequencies and introduce Doppler shift. For satellite signals, BPSK or dual BPSK modulation is achieved by complex multiplying the generated carrier with a pseudocode sequence. For interference signals, in addition to the basic carrier modulation mentioned above, pulse modulation and frequency sweep modulation are also integrated to support simulation of more complex interference scenarios.

[0078] Noise generation module: First, a 64-bit uniformly distributed sequence is generated, and then it is converted into a 16-bit Gaussian distributed sequence.

[0079] First, a uniformly distributed pseudo-random sequence is generated using a linear feedback shift register as shown in the following formula. :

[0080] in, Let represent the i-th pseudo-random sequence, with the index k indicating the running time; k, q, and s are all shift coefficients and are positive integers. A and C are 64-bit integers; the high k bits of C are 1, and the low (64-k) bits are 0.

[0081] Then N pseudo-random sequences The uniformly distributed sequence with a longer period and better randomness is obtained by performing modulo-2 accumulation according to the following formula. :

[0082] Next, the ICDF function is used to convert the uniformly distributed sequence into a Gaussian distributed sequence. :

[0083] Where x is the input uniformly distributed sequence [0,1], and y is the output Gaussian distributed sequence. This is the inverse error function.

[0084] The ICDF function is implemented using a lookup table method. Piecewise second-order polynomial interpolation is performed on the ICDF function values, and the polynomial coefficients are stored in a lookup table in Static Random Access Memory (SRAM). The lookup table is divided into 62 segments in power-of-2 increments, with each segment further divided into 4 segments, for a total of 248 addresses. The C0-C2 segments are obtained by looking up the table based on the segment address of the uniformly distributed sequence value x, and then the corresponding Gaussian distributed sequence value y is calculated.

[0085] The following formula is used to obtain a uniformly distributed 64-bit sequence. Obtaining ICDF function input :

[0086] The address of the ICDF function lookup table is calculated using the following formula:

[0087] The second-order polynomial interpolation output of the ICDF function is calculated according to the following formula. That is, the required Gaussian white noise sequence:

[0088] The Gaussian white noise sequence is the output of the noise generator. Multiplying this sequence by the noise amplitude factor yields the final noise signal.

[0089] Interference generation module: The jamming signal generation includes jamming chip generation and Finite Impulse Response (FIR) low-pass filtering. Gold code sequences not currently used by in-orbit satellites are used as jamming chips, and the jamming bandwidth is constrained and shaped by configuring FIR filter parameters. For repeater-based spoofing jamming scenarios, jamming codes are not generated separately, nor are they subjected to FIR filtering. Instead, a configurable delay is introduced into the pseudo-code chip of the real signal, resulting in a repeater-based spoofing delayed chip.

[0090] Array response vector module: The array response vector parameters of satellite signals and jamming signals can be configured via registers, and the working principle is as follows: like Figure 3 As shown, the array signal model is introduced using a commonly used uniform circular array as an example. M identical omnidirectional arrays are uniformly distributed on the xy plane with a radius of... On the circumference, The incident signal is the wavelength of the signal. This is a useful signal.

[0091] The angle between the line connecting the m-th element and the center O and the x-axis is . , Then the position vector of array element m for:

[0092] Incident signal direction unit vector for:

[0093] The phase difference between the origin and the signal envelope received by array element m at the same time for:

[0094] The array response vector of M uniform circular arrays for:

[0095] For this module design, the intermediate frequency signal vector received by the sixteen array elements is:

[0096] For satellite signals, The final noise signal, This is the first superposition result. Let M be the array response vector of M uniform circular arrays. This is an interference signal. The elevation and azimuth angles of the satellite signal are the incident elevation angle and azimuth angle. The incident elevation and azimuth angles of the interference signal.

[0097] The array response vector is calculated based on the incident elevation and azimuth angles of the pre-set satellite signal and interference signal. The array response vector is then configured in the register and multiplied by the satellite signal and interference signal respectively to obtain the array intermediate frequency signal.

[0098] Example 3 like Figure 5 As shown, this embodiment provides a satellite navigation anti-jamming receiver chip, which is based on the multi-mode, multi-channel signal analog source device for a satellite navigation anti-jamming receiver chip described in Embodiment 2. It includes a multi-mode, multi-channel signal analog source IP, an anti-jamming baseband subsystem, a receiver baseband subsystem, a central processing unit (CPU) subsystem, a storage subsystem, a peripheral subsystem, and a bus unit. The signal analog source IP outputs an intermediate frequency digital signal to the anti-jamming baseband subsystem or directly to the receiver baseband subsystem for array anti-jamming or receiver baseband processing.

[0099] Example 4 like Figure 6 As shown, a verification and testing process for a satellite navigation chip based on a multi-mode, multi-channel signal analog source IP is used to test a satellite navigation anti-interference receiver chip described in Example 3. The specific workflow is as follows: (1) Store reference execution results of key nodes In the simulation verification phase of the Universal Verification Methodology (UVM), the signal simulation and baseband signal processing flow are run through the chip's algorithm model, and the running results of key nodes are stored as files; During the prototype verification and batch testing phases of Field-Programmable Gate Array (FPGA), the Central Processing Unit (CPU) firmware initializes the reference running results generated during the simulation verification phase into the chip's SRAM or on-chip memory such as Double Data Rate Synchronous Dynamic Random Access Memory (DDR).

[0100] (2) Configure the baseband signal processing module The CPU firmware configures the registers of baseband signal processing modules such as capture, tracking, data preprocessing, and anti-interference through the bus, and selects the intermediate frequency signal data source as the output of the signal analog source IP.

[0101] (3) Configure the signal analog source IP The CPU firmware finally configures the registers of the signal simulation source IP and outputs enable data to ensure consistency at the start of operation.

[0102] (4) Read the execution results and compare them At specific moments, such as in the interrupt capture and interrupt tracing service subroutines, the real-time running results of the reading module are compared with the stored reference running results. The comparison results over a certain period of time are statistically analyzed to determine whether the verification or test has been passed.

[0103] The preferred embodiments of the present invention disclosed above are merely illustrative of the invention. These preferred embodiments do not exhaustively describe all details, nor do they limit the invention to specific implementation methods. Clearly, many modifications and variations can be made based on the content of this specification. The selection and specific description of these embodiments in this specification are intended to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to better understand and utilize the invention. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A method for simulating a multi-mode, multi-channel signal source for a satellite navigation anti-jamming receiver chip, characterized in that, It consists of two parts: satellite signal simulation and interference signal simulation. Satellite signal simulation includes the following steps: S1. Pseudocode generation, and pseudocode modulation of the I / Q message; S2. Carrier generation, and carrier modulation of the pseudocode-modulated symbols; S3. Multiply the carrier modulation result by the signal amplitude factor to obtain the satellite signal; S4. Noise is generated, and the noise is multiplied by the noise amplitude factor to obtain the final noise signal; S5. Add the satellite signal to the final noise signal to obtain the first superposition result; S6. Multiply the first superposition result with the satellite signal array response vector to obtain the first multiplication result; Interference signal simulation includes the following steps: S7. Interference is generated and filtered by an FIR filter; S8. Carrier generation, and carrier modulation of the filtered interference; S9. Multiply the carrier modulation result by the interference amplitude factor to obtain the interference signal; S10. Multiply the interference signal with the response vector of the interference signal array to obtain the second multiplication result; The satellite signal simulation and interference signal simulation are performed in parallel. After obtaining the first multiplication result and the second multiplication result, subsequent steps are executed: S11. The first multiplication result is superimposed with the second multiplication result to obtain a second superposition result, and the second superposition result is shifted and saturated to obtain an analog intermediate frequency signal.

2. The method for a multi-mode, multi-channel signal simulation source for a satellite navigation anti-interference receiver chip according to claim 1, characterized in that, The satellite signal simulation and interference signal simulation processes are driven by the local timing module, specifically as follows: The local timing module is driven by the working clock BBCLK and is based on the code NCO. The phase accumulation overflow flag of the code NCO drives the chip count ChipCnt, the chip count ChipCnt overflow flag drives the millisecond count MsCnt, the millisecond count MsCnt overflow flag drives the message count NavCnt, and the message count NavCnt overflow flag drives the subframe count SFCnt.

3. The method for a multi-mode, multi-channel signal simulation source for a satellite navigation anti-interference receiver chip according to claim 1, characterized in that, The pseudocode generation in step S1, and the pseudocode modulation of the I / Q message, are specifically as follows: The pseudocode generation process is as follows: The pseudo-random code is generated by a universal code generator, which generates the following types of pseudo-random codes, including m-sequences, Gold codes, Weil codes, and storage codes. Pseudocode modulation specifically refers to: The specific rules for modulation processing are as follows: (1) For the BOC modulated signal, perform half-chip subcarrier modulation on the pseudo-code; (2) For time-division multiplexing pseudo-code, generate I / Q pseudo-code, which correspond to the two sets of code sequences of time-division multiplexing respectively; (3) For BPSK modulated signals, only one pseudo-code is generated; (4) For the dual BPSK modulation signal, generate two pseudo codes, I and Q, which are used for the data channel and the pilot channel, respectively.

4. The method for a multi-mode, multi-channel signal simulation source for a satellite navigation anti-interference receiver chip according to claim 1, characterized in that, The noise generation in step S4 specifically involves generating a Gaussian white noise sequence using the inverse cumulative distribution function (ICDF). Linear feedback shift registers generate uniformly distributed pseudo-random sequences; The pseudo-random sequence is accumulated modulo 2 to obtain a new uniformly distributed sequence; Obtain the input of the ICDF function from a uniformly distributed sequence; Calculate the lookup table address for the ICDF function; Calculate the second-order polynomial interpolation of the ICDF function and output a Gaussian white noise sequence.

5. The method for a multi-mode, multi-channel signal simulation source for a satellite navigation anti-interference receiver chip according to claim 1, characterized in that, Before executing step S6, the satellite signal array vector is first obtained, specifically as follows: The array signal model is a uniform circular array with center O and radius R. M identical omnidirectional arrays are uniformly distributed on the xy plane with radius R. On the circumference, The signal wavelength is the incident signal. This is a useful signal; Let the angle between the line connecting the m-th array element and the center O and the x-axis be θ. , Then the position vector of array element m for: Incident signal direction unit vector for: The phase difference between the origin and the signal envelope received by array element m at the same time for: The array response vector of M uniform circular arrays for:

6. The method for a multi-mode, multi-channel signal simulation source for a satellite navigation anti-interference receiver chip according to claim 1, characterized in that, The carrier generation in step S8, and the carrier modulation of the filtered interference, are specifically as follows: The interference carrier generation is specifically as follows: A carrier NCO combined with a sine and cosine lookup table is used to generate carrier signals with different center frequencies and introduce Doppler frequency shift. The interference carrier modulation is specifically as follows: In addition to multiplying the generated carrier wave with the pseudocode sequence by a complex number, it also includes pulse modulation and sweep frequency modulation methods.

7. The method for a multi-mode, multi-channel signal simulation source for a satellite navigation anti-interference receiver chip according to claim 6, characterized in that, Before performing step S10, the response vector of the interference signal array is first obtained, specifically: The array signal model is a uniform circular array with center O and radius R. M identical omnidirectional arrays are uniformly distributed on the xy plane with radius R. On the circumference, The signal wavelength is the incident signal. This is an interference signal; Let the angle between the line connecting the m-th array element and the center O and the x-axis be θ. , Then the position vector of array element m for: Incident signal direction unit vector for: The phase difference between the origin and the signal envelope received by array element m at the same time for: The array response vector of M uniform circular arrays for:

8. The method for a multi-mode, multi-channel signal simulation source for a satellite navigation anti-interference receiver chip according to claim 1, characterized in that, Step S11 involves superimposing the first multiplication result and the second multiplication result to obtain a second superposition result, and then shifting and saturating the second superposition result to obtain an analog intermediate frequency signal. Specifically: The intermediate frequency signal vector received by the sixteen array elements for: For satellite signals, The final noise signal, This is the first superposition result. Let M be the array response vector of M uniform circular arrays. This is an interference signal. The elevation and azimuth angles of the satellite signal are the incident elevation angle and azimuth angle. The incident elevation and azimuth angles of the interference signal.

9. A multi-mode, multi-channel signal simulation device for a satellite navigation anti-interference receiver chip, characterized in that, The method for constructing a multi-mode, multi-channel signal simulation source for a satellite navigation anti-jamming receiver chip, based on claim 1, includes the following modules: Local timing module: used for pseudocode chip updates, secondary code updates, and message updates; Pseudocode generation module: used to generate pseudocode and perform pseudocode modulation; Carrier generation module: used for carrier generation and carrier modulation of satellite signals and interference signals; Noise generation module: Generates a Gaussian white noise sequence using the ICDF method, and multiplies it by the noise amplitude factor to obtain the final noise signal; Interference generation module: includes interference chip generation and finite impulse response (FIR) low-pass filtering; Array response vector module: Used to generate array response vector parameters for satellite signals and interference signals.

10. A chip testing method based on on-chip signal analog source IP, characterized in that, The implementation of the multi-mode multi-channel signal simulation device for a satellite navigation anti-interference receiver chip according to claim 9 includes the following steps: T1. During the UVM simulation and verification phase, the signal simulation and baseband signal processing flow are run through the chip's algorithm model, and the running results of key nodes are stored as files. T2. Configure the registers of the baseband signal processing module in the CPU firmware, and select the output of the signal analog source IP as the intermediate frequency signal data source; T3, CPU firmware configuration signal analog source IP register and output enable data; T4. At a specific time, read the real-time running results of the module and compare them with the stored reference running results. Statistically analyze the comparison results over a certain period of time to determine whether the test is passed.

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