A current driving circuit

Abstract

The application discloses a current driving circuit, comprising a voltage drop control module, a shunt voltage regulation module and a current source module; the shunt voltage regulation module is used for adjusting the supply voltage provided to the current source module according to the analog voltage signal output by the voltage drop control module, so as to control the voltage drop stability of the current source module; the current source module comprises at least one current source, the current source is used for outputting constant driving current to a load, and the output and shutdown of the driving current are controlled according to a PWM signal; the voltage drop control module comprises a voltage sampling circuit, an output driving circuit and a storage unit; the voltage drop control module is connected with the PWM signal, is used for collecting the sampling voltage of the current source according to the PWM signal, and outputs an analog voltage signal. The application can improve the working environment temperature of the current driving chip, reduce the establishment time of the output current, and improve the output current precision.

Description

Technical Field

[0001] This invention relates to the field of current drive technology, and in particular to a current drive circuit. Background Technology

[0002] In current-driven chips, it is generally necessary to maintain a low voltage drop across the current source to reduce chip heat generation and thus increase the chip's operating temperature. A common method to reduce the current source voltage drop is to adjust the resistor across the current source to absorb the additional voltage drop.

[0003] In existing technologies, during PWM dimming, the current drive circuit typically employs a current source voltage drop control circuit, a purely analog method to adjust the voltage drop across the current source. However, this approach usually requires a relatively large sample-and-hold capacitor. Each time the PWM signal is low, capacitor leakage causes the circuit node voltage to drift, requiring the circuit node voltage to be re-established when the next PWM signal is high. This affects the settling time and current accuracy of the current source output current. Summary of the Invention

[0004] This invention provides a current driving circuit to improve the accuracy of the output current.

[0005] According to one aspect of the present invention, a current driving circuit is provided, including a voltage drop control module, a shunt voltage regulation module, and a current source module; The voltage input terminal of the shunt voltage regulation module is connected to the main power supply, the control terminal of the shunt voltage regulation module is connected to the output terminal of the voltage drop control module, and the output terminal of the shunt voltage regulation module is connected to the current source module. The shunt voltage regulation module is used to adjust the supply voltage provided to the current source module according to the analog voltage signal output by the voltage drop control module, so as to control the voltage drop of the current source module to stabilize. The current source module includes at least one current source, which is used to output a constant drive current to the load and control the output and shutdown of the drive current according to the PWM signal. The voltage drop control module includes a voltage sampling circuit, an output driving circuit, and a storage unit. The voltage sampling circuit includes at least one voltage sampling input terminal, and each voltage sampling input terminal is connected to the output terminal of the corresponding current source. The output terminal of the voltage sampling circuit is connected to the input terminal of the storage unit, and the output terminal of the storage unit is connected to the input terminal of the output driving circuit. The output terminal of the output driving circuit serves as the output terminal of the voltage drop control module and is connected to the control terminal of the shunt voltage regulation module. The voltage drop control module receives a PWM signal and is used to acquire the sampling voltage of the current source according to the PWM signal and output an analog voltage signal.

[0006] Optionally, the input terminal of each current source is connected to the output terminal of the shunt voltage regulation module, the control terminal of each current source is connected to the corresponding PWM signal, and the output terminal of each current source is connected to the corresponding load.

[0007] Optionally, the shunt voltage regulation module includes a voltage regulating switch and a first resistor; The first terminal of the voltage regulating switch and the first terminal of the first resistor are both connected to the voltage input terminal of the shunt voltage regulating module. The second terminal of the voltage regulating switch and the other terminal of the first resistor are both connected to the output terminal of the shunt voltage regulating module. The control terminal of the voltage regulating switch is connected to the control terminal of the shunt voltage regulating module.

[0008] Optionally, the voltage regulating switch includes a PMOS transistor; The source of the PMOS transistor is connected to the first terminal of the voltage regulator switch, the drain of the PMOS transistor is connected to the second terminal of the voltage regulator switch, and the gate of the PMOS transistor is connected to the control terminal of the voltage regulator switch.

[0009] Optionally, the PMOS transistor is integrated inside the current-driven chip.

[0010] Optionally, the first resistor is located outside the current-driven chip.

[0011] Optionally, the voltage sampling circuit includes an analog-to-digital converter; The analog-to-digital converter is used to determine the valid sampling voltage based on the PWM signal, convert the sampling voltage into a digital voltage signal, and transmit the digital voltage signal to the storage unit.

[0012] Optionally, the storage unit includes a register; The register is used to update or latch the digital voltage signal according to the PWM signal and transmit the digital voltage signal to the output drive circuit.

[0013] Optionally, the output drive circuit includes a digital-to-analog converter; The digital-to-analog converter is used to generate an adjustable analog voltage signal based on the digital voltage signal.

[0014] In this embodiment of the invention, when the PWM signal is high, the current source is turned on, outputting current to the load. The voltage sampling circuit in the voltage drop control module synchronously collects the output voltage of each current source, selects the output voltage of the current source in the on state as the valid sampling voltage according to the PWM signal, and converts the valid sampling voltage into a digital voltage signal and sends it to the storage unit. The storage unit updates the digital voltage signal in real time and transmits the latest digital voltage signal to the output drive circuit. The output drive circuit generates an analog voltage signal matching the current power supply voltage according to the digital voltage signal to regulate the shunt voltage regulation module, so that the operating voltage drop of the current source is dynamically stable and has sufficient voltage, thereby achieving a constant output current of the current source. When the PWM signal is low, multiple current sources are turned off, stopping the output current to the load. At this time, the voltage sampling circuit in the voltage drop control module determines that the output voltage of the current source in the off state is invalid according to the PWM signal and stops sampling it. At the same time, the storage unit latches the digital voltage signal corresponding to the last time the PWM signal was high, and it does not change. The output drive circuit continuously reads the digital voltage signal latched by the storage unit to maintain the stability of the output analog voltage signal, so that the analog voltage signal controls the current regulation module in a constant state. This allows the current source to instantly restore the target current output when the next PWM signal is high, greatly shortening the current settling time and improving the current accuracy.

[0015] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of a current driving circuit according to an embodiment of the present invention; Figure 2 This is a schematic diagram of another current-driven circuit provided according to an embodiment of the present invention. Detailed Implementation

[0018] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0019] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and their variations, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0020] Figure 1 This is a schematic diagram of a current-driven circuit provided in an embodiment of the present invention. See also: Figure 1 The current drive circuit includes a voltage drop control module 10, a shunt voltage regulation module 20, and a current source module 30.

[0021] The shunt voltage regulation module 20 has its voltage input terminal connected to the main power supply, its control terminal connected to the output terminal of the voltage drop control module 10, and its output terminal connected to the current source module 30. The shunt voltage regulation module 20 adjusts the supply voltage Vx provided to the current source module 30 according to the analog voltage signal Vg output by the voltage drop control module 10, thereby stabilizing the voltage drop of the current source module 30. The current source module 30 includes at least one current source, which outputs a constant drive current to the load and controls the output and shutdown of the drive current according to a PWM signal.

[0022] The voltage drop control module 10 includes a voltage sampling circuit 101, an output drive circuit 102, and a storage unit 103. The voltage sampling circuit 101 includes at least one voltage sampling input terminal, each connected to the output terminal of a corresponding current source. The output terminal of the voltage sampling circuit 101 is connected to the input terminal of the storage unit 103, and the output terminal of the storage unit 103 is connected to the input terminal of the output drive circuit 102. The output terminal of the output drive circuit 102 serves as the output terminal of the voltage drop control module 10 and is connected to the control terminal of the shunt voltage regulation module 20. The voltage drop control module 10 receives a PWM signal and is used to acquire the sampled voltage of the current source based on the PWM signal and output an analog voltage signal.

[0023] Specifically, Figure 1 The example diagram illustrates a current source module 30 comprising N current sources, where N is an integer greater than or equal to 1. The current sources in the current source module 30 are a first current source I1, a second current source I2, and so on, up to the Nth current source In. Each current source is matched with one PWM signal and one load. The PWM signal connected to the first current source I1 is the first PWM signal PWM1, the PWM signal connected to the second current source I2 is the second PWM signal PWM2, and so on, with the PWM signal connected to the Nth current source In being the Nth PWM signal PWMn. Each PWM signal is divided into two paths; one PWM signal is sent to the current source to control the on / off state of each current source. For example, when the PWM signal is high, the current source is on, meaning it operates and outputs current. At this time, the output voltage of the first current source I1 is Vo1, the output voltage of the second current source I2 is Vo2, and so on, with the output voltage of the Nth current source being Von. When the PWM signal is low, the current source is off, and the current source output is zero. Therefore, by setting the duty cycle of the PWM signal to D, and the output current of any current source in constant current state to I, the actual effective output current of any current source is I*D. This allows the PWM signal to be controlled to adjust the magnitude of the actual effective output current of the current source. Another set of PWM signals is sent to the voltage drop control module 10 to provide channel status timing instructions for the voltage sampling and storage logic.

[0024] The prerequisite for a current source to achieve stable constant current is that its voltage drop across its terminals is sufficient. The target voltage drop of the current source is the difference between the supply voltage Vx of the current source module and the output voltage of the current source. The supply voltage Vx of the current source module is output by the shunt voltage regulation module 20. When the PWM signal is high, the corresponding current source inside the current source module 30 is turned on and continuously outputs current to the load. The voltage sampling circuit 101 inside the voltage drop control module 10 identifies the current source that is turned on based on the input PWM signal, and only collects the output voltage of the current source that is turned on as the effective sampling voltage. After converting the effective sampling voltage into a digital voltage signal, it is sent to the storage unit 103. The power supply voltage VDD output by the main power supply will change under different operating conditions, and the output voltage of the current source will also change accordingly. Therefore, the storage unit 103 can update the digital voltage signal in real time under the high-level drive of the PWM signal. The output drive circuit 102 reads the latest digital voltage signal in the storage unit, performs calculations based on the target voltage drop, generates the corresponding analog voltage signal Vg, and transmits it to the control terminal of the shunt voltage regulation module 20. The shunt voltage regulation module 20 adjusts the equivalent impedance of its internal circuit according to the analog voltage signal Vg, and dynamically corrects the supply voltage Vx output to the current source module 30, so that the voltage drop across the current source has sufficient voltage, thereby achieving a constant output current of the current source drive circuit.

[0025] When the PWM signal switches to a low level, the corresponding current source turns off, stopping the output current to the load. At this time, the output potential of the current source floats, and the sampled voltage loses its reference value. The voltage sampling circuit 101 determines that the sampling data of the output voltage of the corresponding current source is invalid based on the low level of the PWM signal and stops the acquisition of invalid voltage. At the same time, the storage unit 103 latches the latest digital voltage signal obtained in the previous conduction cycle under the low level drive of the PWM signal. The output drive circuit 102 continuously reads the fixed digital voltage signal latched in the storage unit 103 and continuously outputs the converted constant analog voltage signal Vg to the shunt voltage regulation module 20, so that the control parameters of the voltage drop control module 10 for the shunt voltage regulation module 20 will not change due to the current source being turned off, thereby maintaining the constant internal impedance of the shunt voltage regulation module 20. This means that when the PWM signal switches to high level again, the internal circuit impedance of the shunt voltage regulation module 20 does not need to be readjusted and established. The current source can obtain the required working voltage drop at the moment of conduction, and the output current instantly recovers to the same level as the output current of the previous conduction cycle. This greatly shortens the settling time of the output current of the current drive circuit and improves the constant current control accuracy of the output current.

[0026] In this embodiment of the invention, when the PWM signal is high, the current source is turned on, outputting current to the load. The voltage sampling circuit in the voltage drop control module synchronously collects the output voltage of each current source, selects the output voltage of the current source in the on state as the valid sampling voltage according to the PWM signal, and converts the valid sampling voltage into a digital voltage signal and sends it to the storage unit. The storage unit updates the digital voltage signal in real time and transmits the latest digital voltage signal to the output drive circuit. The output drive circuit generates an analog voltage signal matching the current power supply voltage according to the digital voltage signal to regulate the shunt voltage regulation module, so that the operating voltage drop of the current source is dynamically stable and has sufficient voltage, thereby achieving a constant output current of the current source. When the PWM signal is low, the current source is turned off, stopping the output current to the load. At this time, the voltage sampling circuit in the voltage drop control module determines that the output voltage of the current source in the off state is invalid according to the PWM signal and stops sampling it. At the same time, the storage unit latches the digital voltage signal corresponding to the last time the PWM signal was high, and it does not change it. The output drive circuit continuously reads the digital voltage signal latched by the storage unit to maintain the stability of the output analog voltage signal, so that the analog voltage signal controls the current regulation module in a constant state. This allows the current source to instantly restore the target current output when the next PWM signal is high, greatly shortening the current settling time and improving the current accuracy.

[0027] Based on the above embodiments, Figure 2 This is a schematic diagram of another current-driven circuit provided in an embodiment of the present invention. Figure 2 Optionally, the input terminal of each current source is connected to the output terminal of the shunt voltage regulation module 20, the control terminal of each current source is connected to the corresponding PWM signal, and the output terminal of each current source is connected to the corresponding load.

[0028] Specifically, the input terminals of all current sources within the current source module 30 are connected to the output terminal of the shunt voltage regulation module 20, which provides a unified supply voltage Vx. The voltage drop control module 10 adjusts the supply voltage Vx by regulating the internal circuit impedance of the shunt voltage regulation module 20, thereby synchronously adjusting the voltage drop across each current source. This allows a single voltage regulation loop to control the voltage drop of the current sources, eliminating the need for a separate voltage regulation circuit for each current source, thus reducing the area and cost of the current drive chip.

[0029] Each current source is configured with an independent control signal, and the control terminal of each current source is connected to its corresponding PWM signal. The current drive circuit relies on the PWM signal to achieve independent control of the current source's on and off states, enabling independent adjustment and time-sharing drive of the current source. The output terminals of each current source are connected to their respective matched loads. When a current source is turned on, it can deliver a constant drive current to the corresponding load, achieving independent drive control of the load.

[0030] See also Figure 2 Optionally, the shunt voltage regulation module 20 includes a voltage regulating switch 201 and a first resistor R1.

[0031] The first end of the voltage regulating switch 201 and the first end of the first resistor R1 are both connected to the voltage input end of the shunt voltage regulating module 20, the second end of the voltage regulating switch 201 and the other end of the first resistor R1 are both connected to the output end of the shunt voltage regulating module 20, and the control end of the voltage regulating switch 201 is connected to the control end of the shunt voltage regulating module 20.

[0032] The voltage regulator 201 includes a PMOS transistor T1. The source of the PMOS transistor T1 is connected to the first terminal of the voltage regulator 201, the drain of the PMOS transistor T1 is connected to the second terminal of the voltage regulator 201, and the gate of the PMOS transistor T1 is connected to the control terminal of the voltage regulator 201.

[0033] Specifically, the voltage regulating switch 201 is connected in parallel with the first resistor R1. The voltage regulating switch 201 can be configured as a PMOS transistor T1, whose equivalent impedance is controlled by the gate voltage and is continuously adjustable. The analog voltage signal Vg output by the voltage drop control module 10 is applied to the gate of the PMOS transistor T1 as a control signal.

[0034] When the power supply voltage VDD is low, the output voltage of each current source acquired by the voltage sampling circuit 101 is also low. The output drive circuit 102 detects that the voltage drop of each current source is insufficient and calculates a low-value analog voltage signal Vg to the gate of the PMOS transistor T1 based on the current power supply voltage VDD. The low-value analog voltage signal Vg can reduce the equivalent impedance of the PMOS transistor T1. In other words, the change in the analog voltage signal Vg can control the current of the PMOS transistor T1 to increase, so that most of the current flows through the PMOS transistor T1, and less current flows through the first resistor R1. This reduces the overall voltage drop of the shunt voltage regulation module 20, ensuring that the supply voltage Vx of the current source module 30 output by the shunt voltage regulation module 20 is high enough. This pulls up the voltage drop across each current source, ensuring sufficient voltage across the current source and thus ensuring that the output current of the current drive circuit is constant.

[0035] When the power supply voltage VDD is too high, the output voltage of each current source acquired by the voltage sampling circuit 101 is also too high. The output drive circuit 102 detects that there is an excess voltage drop in each current source. At this time, the output drive circuit 102 calculates and outputs a higher analog voltage signal Vg to the gate of the PMOS transistor T1. The higher analog voltage signal Vg can increase the equivalent impedance of the PMOS transistor T1, that is, the voltage difference between the gate and source of the PMOS transistor T1 becomes smaller, and the current on the PMOS transistor T1 becomes smaller, so that most of the current flows through the first resistor R1, thereby increasing the overall voltage drop of the shunt voltage regulation module 20 and reducing the supply voltage Vx of the shunt voltage regulation module 20 to the current source module 30, thereby reducing the voltage drop across each current source and optimizing the power consumption of the current drive chip.

[0036] See also Figure 2 Optionally, the PMOS transistor T1 is integrated inside the current drive chip. The first resistor R1 is located outside the current drive chip.

[0037] Specifically, the PMOS transistor T1 is integrated inside the current drive chip, enabling the voltage drop control module 10 to precisely control the gate voltage of the PMOS transistor, thereby directly regulating the equivalent impedance of the PMOS transistor T1. The first resistor R1 is located outside the current drive chip. On one hand, this allows the heat generated when most of the current flows through the first resistor R1 to dissipate outside the chip, preventing excessive internal temperature rise and overheating failure, thus improving the operating temperature range of the current drive chip. On the other hand, it facilitates flexible selection of different resistance values ​​for the first resistor R1 based on the actual application scenario, the range of the power supply voltage VDD, and the load specifications, enhancing the versatility of the current drive chip.

[0038] See also Figure 2 Optionally, the voltage sampling circuit 101 includes an analog-to-digital converter U1.

[0039] The analog-to-digital converter U1 is used to determine the valid sampling voltage based on the PWM signal, convert the sampling voltage into a digital voltage signal, and transmit the digital voltage signal to the storage unit 103.

[0040] Specifically, the voltage sampling circuit 101 uses an analog-to-digital converter U1 to realize voltage acquisition and signal conversion functions. The analog-to-digital converter U1 is connected to a PWM signal as the enable judgment basis for voltage sampling. When the PWM signal is high and the current source is on, the output voltage of the on current source is determined to be a valid sampling voltage; when the PWM signal is low and the current source is off, the output potential of the off current source floats, and the sampling value has no reference value. The analog-to-digital converter U1 can convert the sampling voltage from analog to digital and transmit the digital voltage signal to the storage unit 103. This allows the voltage drop control module 10 to latch the latest digital voltage signal parameters of the previous conduction cycle using the storage unit 103 when the PWM signal is low, overcoming the control voltage drift problem caused by capacitor leakage in traditional analog sample-and-hold circuits and ensuring the continuous and stable operation of the closed-loop voltage regulation of the current drive circuit.

[0041] See also Figure 2 Optionally, the storage unit 103 includes a register U3.

[0042] Register U2 is used to update or latch the digital voltage signal according to the PWM signal and transmit the digital voltage signal to the output drive circuit 102.

[0043] Specifically, the storage unit 103 is composed of register U3. Register U3 uses the PWM signal as the read / write control timing signal. When the PWM signal is high, the current source is normally turned on, and the register continuously receives and updates the digital voltage signal output by the analog-to-digital converter U1; when the PWM signal jumps to low, the current source is turned off, the sampling voltage becomes invalid, and register U3 immediately latches the latest internal digital voltage signal and no longer responds to external input signals. Compared with traditional analog sample-and-hold circuits, register U3 uses digital storage, eliminating the control voltage drift problem caused by capacitor leakage. Regardless of whether the PWM signal is high or low, register U3 can stably and continuously output a digital voltage signal to the output drive circuit 102, ensuring that the regulation state of the shunt voltage regulation module 20 remains continuous and stable throughout the entire PWM signal cycle.

[0044] See also Figure 2 Optionally, the output drive circuit 102 includes a digital-to-analog converter U2.

[0045] The digital-to-analog converter U2 is used to generate an adjustable analog voltage signal based on the digital voltage signal.

[0046] Specifically, the output drive circuit 102 uses a digital-to-analog converter U2 to achieve digital-to-analog conversion. The digital voltage signal latched by register U3 is a digital signal and cannot directly drive the PMOS transistor T1 to complete impedance regulation. The digital-to-analog converter U2 calculates the digital voltage signal according to the state of the power supply voltage VDD, generates an adjustable analog voltage signal Vg, and outputs it to the gate of the PMOS transistor T1. The analog voltage signal Vg serves as the gate voltage of the PMOS transistor T1 to regulate its impedance. Regardless of whether register U3 is in data update mode or latching mode, the digital-to-analog converter U2 can stably output the corresponding analog voltage signal Vg, ensuring that the shunt voltage regulation module 20 can continuously obtain an effective control signal throughout the entire PWM signal cycle, maintaining a stable current source voltage drop, and ensuring a constant output current of the current drive circuit.

[0047] Another current-driven circuit provided in this embodiment of the invention constructs a closed-loop voltage regulation system by setting up a voltage drop control module, a shunt voltage regulation module, and a current source module. In the current-driven circuit, the current sources share a shunt voltage regulation network composed of an on-chip PMOS transistor and an external resistor connected in parallel. The heat generated by the circuit operation is dissipated through the external resistor. The digital-mode voltage drop control link, composed of an analog-to-digital converter, a digital-to-analog converter, and a register, combines a PWM signal to perform time-division multiplexing of the current source output voltage sampling, control parameter latching, and PMOS transistor impedance adjustment, thereby stabilizing the voltage drop of each current source. The closed-loop voltage regulation of the current-driven circuit adopts a hybrid digital-analog control method, which can overcome the capacitor leakage defect of traditional analog sample-and-hold circuits. This reduces internal chip heating, increases the chip's operating temperature, reduces the output current settling time, and improves the current accuracy of the output current.

[0048] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0049] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A current-driven circuit, characterized in that, Includes a voltage drop control module, a shunt voltage regulation module, and a current source module; The voltage input terminal of the shunt voltage regulation module is connected to the main power supply, the control terminal of the shunt voltage regulation module is connected to the output terminal of the voltage drop control module, and the output terminal of the shunt voltage regulation module is connected to the current source module. The shunt voltage regulation module is used to adjust the supply voltage provided to the current source module according to the analog voltage signal output by the voltage drop control module, so as to control the voltage drop of the current source module to stabilize. The current source module includes at least one current source, which is used to output a constant drive current to the load and control the output and shutdown of the drive current according to the PWM signal. The voltage drop control module includes a voltage sampling circuit, an output driving circuit, and a storage unit. The voltage sampling circuit includes at least one voltage sampling input terminal, and each voltage sampling input terminal is connected to the output terminal of the corresponding current source. The output terminal of the voltage sampling circuit is connected to the input terminal of the storage unit, and the output terminal of the storage unit is connected to the input terminal of the output driving circuit. The output terminal of the output driving circuit serves as the output terminal of the voltage drop control module and is connected to the control terminal of the shunt voltage regulation module. The voltage drop control module receives a PWM signal and is used to acquire the sampling voltage of the current source according to the PWM signal and output an analog voltage signal.

2. The current driving circuit according to claim 1, characterized in that, The input terminal of each current source is connected to the output terminal of the shunt voltage regulation module, the control terminal of each current source is connected to the corresponding PWM signal, and the output terminal of each current source is connected to the corresponding load.

3. The current driving circuit according to claim 1, characterized in that, The shunt voltage regulation module includes a voltage regulating switch and a first resistor; The first terminal of the voltage regulating switch and the first terminal of the first resistor are both connected to the voltage input terminal of the shunt voltage regulating module. The second terminal of the voltage regulating switch and the other terminal of the first resistor are both connected to the output terminal of the shunt voltage regulating module. The control terminal of the voltage regulating switch is connected to the control terminal of the shunt voltage regulating module.

4. The current driving circuit according to claim 3, characterized in that, The voltage regulating switch includes a PMOS transistor; The source of the PMOS transistor is connected to the first terminal of the voltage regulator switch, the drain of the PMOS transistor is connected to the second terminal of the voltage regulator switch, and the gate of the PMOS transistor is connected to the control terminal of the voltage regulator switch.

5. The current driving circuit according to claim 4, characterized in that, The PMOS transistor is integrated inside the current-driven chip.

6. The current driving circuit according to claim 3, characterized in that, The first resistor is located outside the current source driver chip.

7. The current driving circuit according to claim 1, characterized in that, The voltage sampling circuit includes an analog-to-digital converter; The analog-to-digital converter is used to determine the valid sampling voltage based on the PWM signal, convert the sampling voltage into a digital voltage signal, and transmit the digital voltage signal to the storage unit.

8. The current driving circuit according to claim 1, characterized in that, The storage unit includes registers; The register is used to update or latch the digital voltage signal according to the PWM signal and transmit the digital voltage signal to the output drive circuit.

9. The current driving circuit according to claim 1, characterized in that, The output drive circuit includes a digital-to-analog converter; The digital-to-analog converter is used to generate an adjustable analog voltage signal based on the digital voltage signal.

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