A method for soft error protection of a quantized neural network based on in-situ embedding coding

CN122884749APending Publication Date: 2026-10-09XIDIAN UNIV
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Application Number
CN202611127711.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-28
Publication Date
2026-10-09

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该类方法通常从权值置零、数值感知校验或编码保护等角度提升受扰权重的恢复能力,但在不同网络结构和不同错误率条件下,仍存在保护粒度单一、对越限错误的恢复能力有限或在线恢复开销较高等问题

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1.通过步骤1构建具有共享权重的混合精度超网模型,并采用非对称路径采样和采样路径梯度直接汇聚策略,降低极低位宽路径引入的量化噪声,提高超网训练稳定性及后续异构位宽结构搜索的可靠性,为在模型精度约束下释放存储冗余位提供参数基础。

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Abstract

The application belongs to the technical field of neural network fault tolerance, and particularly relates to a soft error protection method for a quantized neural network based on in-situ embedded coding. The method first constructs a mixed precision super network and performs fault tolerance space searching, determines the partition scheme of the high-order fault tolerance sub-space bit segment and the low-order data bit segment in the quantized weight in combination with the bottom physical memory word length and the Hamming bound constraint; then, the prior distribution of the high-order fault tolerance sub-space quantized weight is counted and determined, a soft error state transition probability matrix is constructed, a data remapping dictionary and a correction verification generating codebook are solved offline, and weight coding storage is completed; in the edge inference process, the posterior probability model is established according to the disturbed code word, the Bayesian optimal recovery and the lookup table mechanism are used to complete the complete quantized weight recovery; the application can improve the inference reliability and the precision maintaining capability of the quantized neural network in the soft error environment at a lower hardware overhead and time delay cost.
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Description

Technical Field

[0001] This invention belongs to the field of neural network fault tolerance technology, specifically relating to a soft error protection method for quantized neural networks based on in-situ embedding coding. Background Technology

[0002] With the development of edge intelligence and low-power artificial intelligence applications, quantized neural networks are widely deployed on resource-constrained hardware platforms due to their low model storage overhead and low computational complexity. These networks typically store quantized weights in physical memory such as static random access memory (SRAM), which can meet the needs of edge inference under normal environments.

[0003] However, as semiconductor process dimensions continue to shrink, memory cells become increasingly sensitive to particle radiation, charge perturbations, and transient noise. In radiation environments, complex electromagnetic environments, or other application scenarios prone to transient disturbances, quantization weights in memory are more susceptible to bit flipping, leading to weight value shifts and affecting network inference accuracy. Soft errors refer to non-permanent errors in data bits within memory or registers caused by external particle radiation, charge perturbations, or transient noise, without permanent physical damage to the device itself. Single-event upsets (SEUs) are a typical form of soft errors, where a single high-energy particle incident on a data bit causes one or more storage bits to flip. For quantized neural networks, these soft errors or SEUs typically act directly on the physical storage cells containing quantization weights, causing changes in weight encoding bits and further resulting in inference output shifts and decreased model accuracy.

[0004] To improve the reliability of neural network systems in soft error environments, existing technologies have proposed solutions from different perspectives, such as accelerator structural error handling, circuit fault detection and repair, and software anomaly localization.

[0005] Chinese patent document CN116882465B discloses "A neural network accelerator and its soft error handling device and method." This patent mainly addresses the soft error handling problem in neural network accelerators. It achieves error detection and processing by grouping filters in convolutional layers, setting verification filters, and comparing relevant output results. This solution mainly focuses on error detection and processing at the accelerator structure level and does not address issues such as releasing redundant bits based on mixed-precision training in quantized neural networks, dividing high-order protection bit segments and low-order original code bit segments according to bit importance, or optimizing encoding and recovering from over-limits by combining weight distribution priors in the process.

[0006] Chinese patent document CN120652250A discloses a "Method and System for Fault Detection and Repair of Neural Network Accelerator Circuits in Radiation Environments." This solution addresses fault detection and repair of neural network accelerator circuits in radiation environments. It achieves fault repair by modeling the critical path, generating fault location information, and processing the affected circuits. However, this solution focuses on accelerator circuit-level fault detection and repair, and does not address solutions for encoding protection, weight recovery, and low-latency deployment issues following soft errors or single-event flips in quantized neural network weights within physical memory.

[0007] Chinese patent document CN118885330A discloses "A Method and System for Software Mislocalization in Neural Networks." This solution analyzes the outputs of relevant nodes during the neural network inference process to locate software anomalies. This solution primarily addresses the problem of software mislocalization during neural network operation, but it does not address the bit flipping problem caused by soft errors in memory when quantizing weights, nor does it involve a technical solution for establishing a posterior probability model and reconstructing weights for stored scrambled codewords.

[0008] In addition, among the existing publicly available non-patented technical solutions, there are several algorithms for soft error protection of quantized neural networks, such as Weight Nulling, Value-aware Parity (VAP), and WCAT. These methods typically improve the recovery capability of disturbed weights from the perspectives of zeroing out weights, numerically aware verification, or encoding protection. However, under different network structures and error rates, they still suffer from problems such as single protection granularity, limited recovery capability for out-of-limit errors, or high online recovery overhead.

[0009] In summary, although existing technologies have proposed solutions from the perspectives of accelerator soft error handling, circuit fault detection and repair, and software anomaly localization, a unified fault-tolerant method for soft errors in the storage weights of quantized neural networks has not yet been formed. It fails to simultaneously take into account bit width allocation and redundant space release during the training phase, encoding optimization during the deployment phase, and low-complexity weight recovery during the online inference phase. Therefore, it is still difficult to meet the comprehensive requirements of quantized neural networks for accuracy preservation, recovery capability, and deployment efficiency in soft error environments. Summary of the Invention

[0010] To overcome the shortcomings of the prior art, the present invention aims to propose a soft error protection method for quantized neural networks based on in-situ embedding coding. Based on the mapping relationship between physical storage bit width and candidate quantization bit width, a bidirectional search is performed under accuracy constraints to find the optimal heterogeneous bit width configuration for fault tolerance, resulting in the quantized model structure for deployment and the determined higher-order fault-tolerant subspace and lower-order data subspace. Discrete prior distributions and state transition matrices are established for the weight bits of the determined higher-order fault-tolerant subspace. The optimal data remapping dictionary and error correction codebook are solved offline, and the encoding results are written to the terminal physical storage array. Bayesian posterior probability is used to recover the weights from the disturbed codewords and determine the optimal higher-order recovery result. Finally, the results are concatenated to form complete quantization weights. This method can achieve efficient fault-tolerant recovery of quantized neural networks under soft error conditions, especially single-event flip conditions, while maintaining model accuracy, over-limit error recovery capability, and low-latency deployment requirements at the edge.

[0011] A soft error protection method for quantized neural networks based on in-situ embedding coding includes the following steps: Step 1: Construct a mixed-precision supernet model of a quantized neural network, assuming a shared fundamental weight matrix. The multi-precision configuration space set is During iterative training, the hybrid precision supernet model is updated iteratively using training data as input. To reduce the interference of extremely low bit-width paths on the training of shared weights, an asymmetric path sampling strategy is adopted in each iteration: a single highest-precision path is sampled. And randomly sample several heterogeneous paths Simultaneously, the sampling indicator variable of the extremely low minimum bit width path will be... Set to zero. Under this sampling method, the gradients of each path are directly aggregated according to the following formula to update the shared weights: in, For learning rate, For the loss function, This represents the total number of sampling paths in each iteration. After iterative training, shared weight parameters are obtained for subsequent structure search.

[0012] Step 2: Establish the segmented mapping relationship between the underlying physical memory bit width and the quantization bit width. Let the physical word length of the physical memory cell be... The target quantization bit width of a certain layer is ,in The quantization bit width is divided into high-order bit segments that are protected by coding. and low-order bits that do not participate in coding protection ,satisfy: Thus, feasible protection bit width division schemes for each layer are obtained; The redundant bit width released by quantization down-biting is: The actual physical code length used in encoding is: ; To ensure that the released redundant bits can support single-bit error correction, a redundant bit width is used to store the parity bits. Must satisfy the Hamming boundary constraint: .

[0013] Based on this, the original quantization weights are divided into a higher-order fault-tolerant subspace (MSB) and a lower-order data subspace (LSB). The MSB participates in encoding protection, while the LSB retains its original storage form, thus forming a bit-width partitioning result that can be directly used for deployment at each layer.

[0014] Step 3: Based on the feasible mapping constraints given in Step 2, establish a heterogeneous bit-width configuration search mechanism oriented towards fault tolerance benefits. During the search, the shared weights obtained from training in Step 1 are used as parameters, and the accuracy of each candidate subnet is evaluated using validation data. For the first... Layer target quantization bit width The redundancy bit width to be released is defined as: Correspondingly, the fault tolerance benefit function for this layer is defined as: Correspondingly, the fault tolerance benefit function for this layer is defined as follows: when hour, ;when hour, .in, Let be a discrete reward coefficient that monotonically increases with the redundancy bit width, and satisfy . The total fault tolerance benefit of the entire network is defined as: .

[0015] in, Let be the effective number of layers in the network. Let the baseline accuracy be... The maximum allowable accuracy degradation threshold is Then the lower bound of precision is: .

[0016] With the current subnet accuracy higher At that time, a local downsizing search is performed using a specified utility function: ; When the current subnet accuracy is less than or equal to At that time, a callback ascending search is performed using the specified utility function: ; in, For the first The change in fault tolerance benefit caused by adjusting the layer width. This corresponds to the change in precision. and The value is a constant. Through the above bidirectional local search, the heterogeneous bit-width configuration subnet with the optimal fault tolerance benefit is obtained under the premise of satisfying the accuracy constraint. After determining the target subnet, its structure is frozen and parameter fine-tuning training is performed to output the hierarchical bit-width configuration and quantization model parameters used in the final deployment.

[0017] Step 4: Establish a discrete prior distribution for the quantization weights of the determined higher-order fault-tolerant subspace described in Step 3, and construct a soft-error state transition probability matrix. Specifically, extract the quantization weights of the determined higher-order fault-tolerant subspace layer by layer from the final deployment model obtained in Step 3, assuming the corresponding signed integers are... It is mapped to a non-negative integer state through an offset binary transformation. : Based on this, the discrete prior distribution is obtained. Furthermore, suppose the single-bit flip error rate of the physical memory is... Then the encoding state is changed from Flip to The elements of the state transition probability matrix are: in, This indicates that the encoding state is changed from Become The set of error vectors, This represents the number of flipped bits in the error vector. This step yields the prior distribution and state transition probability matrix for each layer, which can be used in the offline coding optimization and online recovery phases.

[0018] Step 5: Based on the prior distribution and state transition probability matrix (i.e., the probability model) constructed in Step 4, solve for the optimal data remapping dictionary offline. Codebook generation with error correction and verification Taking the minimum mean square error of reconstructed numerical distortion under out-of-limit errors as the optimization objective, the distortion function under a single error rate condition is defined as follows: Error rate set for various radiation environments and their weights Construct a comprehensive optimization objective: ; When protected high-order bit width At that time, the data dictionary is remapped using an alternating coordinate descent method. Codebook generation with error correction and verification Perform joint iterative optimization; when At that time, the standard Hamming code generator matrix is ​​fixed as the basic error correction structure, and in general invertible linear groups Searching for the optimal matrix in candidate transformations In order to achieve the comprehensive optimization objective The minimum encoding mapping scheme. After the solution is completed, the determined higher-order fault-tolerant subspace weights are encoded offline according to the dictionary and codebook of the corresponding layer, and the encoding results are written together with the lower-order original code data into the terminal physical storage array to form the model storage image before deployment.

[0019] Step 6: During the online inference phase, establish a posterior probability model of the candidate source state for the scrambled codewords directly read from the terminal physical storage array described in Step 5. For each read of the protected higher-order code field, let the scrambled codeword be... Source state The corresponding legal codeword is Then the posterior probability satisfies: in, Let be the Hamming distance between the scrambled codeword and the valid encoded codeword. By combining the likelihood information of the read codeword with the prior distribution of the weights, the posterior probability distribution of each candidate source state can be obtained. This distribution is then used as the basis for the recovery of the current code field. Bayesian optimal weight recovery is then performed to obtain the weight recovery candidate set.

[0020] Step 7: Based on the minimum mean square error criterion, determine the optimal higher-order recovery result from the weighted recovery candidate set described in Step 6. The recovery criterion is as follows: in, Representing state The corresponding quantization value. To avoid floating-point underflow during Bayesian normalization, a preset stability threshold is used. When the joint probability of candidate states is summed When this happens, stop performing the normalized division operation and directly select the prior probability. The largest candidate state is taken as the recovery result.

[0021] Furthermore, the recovery results of the determined higher-order fault-tolerant subspace are pre-compiled offline into a higher-order recovery lookup table. It is then concatenated with the low-order original code data bit segments to construct a complete weighted quantization recovery lookup table offline. During online inference, the complete scrambled codeword is directly used as the lookup address. The recovered complete quantization weights are output through a single table lookup, and these quantization weights are then loaded into subsequent neural network forward inference and multiply-accumulate operations, thereby reducing the online recovery complexity to [missing information]. .

[0022] Furthermore, a fault injection simulation is performed to verify the complete quantization weight recovery process obtained in step 7. A random fault mask is generated according to a preset bit error rate, and the random fault mask is XORed with the original stored codeword to obtain a scrambled codeword. The scrambled codeword is then input into the recovery process described in steps 6 and 7, and the model inference accuracy is statistically analyzed under different bit error rate conditions to verify the effectiveness of the fault tolerance method.

[0023] In storage-based soft error scenarios involving continuous inference tasks, single-event flip events typically exhibit sparse, random, and independent arrival processes over time, and can therefore be approximated as a Poisson process. Let the hardware baseline failure rate be... The single inference cycle is Then it occurs within one inference cycle. The probability of a second-order flip event is: Let the total number of bits in the model's storage space be... Assuming that the bit-flipping events are independent and uniformly distributed among the storage bits, the average flipping intensity of a single storage bit within one inference cycle is: Therefore, the probability that a single storage bit will flip at least once during the inference cycle is: Under low error rate conditions, with the single-bit flip probability This is approximated as the bit error rate (BER) at the storage bit level. Let the actual number of bits that flips be... The bit error rate can also be statistically defined as... For the first Each storage bit generates a random fault variable. and satisfy All fault variables are combined into a fault mask vector. and the original stored codeword Perform a bitwise XOR operation to obtain the scrambled codeword. The scrambled codewords are then input into the recovery process described in steps 6 and 7 to statistically analyze the model inference accuracy under different BER conditions.

[0024] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. By constructing a hybrid precision supernet model with shared weights in step 1, and adopting asymmetric path sampling and direct convergence strategy of sampling path gradients, the quantization noise introduced by extremely low bit width paths is reduced, the training stability of the supernet is improved and the reliability of subsequent heterogeneous bit width structure search is enhanced, and a parameter basis is provided for releasing redundant storage bits under the model accuracy constraint.

[0025] 2. By establishing the segmented mapping relationship between physical memory word length, candidate quantization bit width and redundant bit width released by quantization downsizing in step 2, and by combining the discrete ladder reward function and bidirectional local search in step 3 to jointly optimize the quantization bit width of each layer, a heterogeneous bit width configuration with better fault tolerance benefits can be obtained under the premise of meeting the model accuracy constraints, thereby providing more usable coding redundancy for protected high-order bit segments.

[0026] 3. By extracting the discrete prior distribution of the quantized weights in step 4 and constructing the soft error state transition probability matrix, and then by taking the minimum mean square error of reconstructing numerical distortion under the condition of out-of-limit error as the objective in step 5, the data remapping dictionary and error correction verification codebook are solved offline in a joint manner. Compared with the scheme that only relies on the coding distance for recovery, it can reduce the numerical distortion of the weights under the condition of out-of-limit error and improve the weight recovery capability in multi-bit flip scenarios.

[0027] 4. By combining the weight discrete prior distribution, the set of legal coded codewords, and the state transition probability matrix in step 6, a posterior probability model of the candidate source state is established. In step 7, the optimal higher-order recovery result is determined based on the minimum mean square error criterion. At the same time, the higher-order recovery and its splicing relationship with the lower-order original code segments are pre-compiled offline into a static lookup table, so that the edge end can complete the complete quantization weight recovery through a single table lookup, thereby reducing the online recovery latency and computational overhead.

[0028] 5. By establishing a storage-based soft error fault injection simulation framework based on Poisson processes, the sparse random arrival characteristics of single-event flip events in the time dimension can be accurately modeled. By generating disturbed codewords through bit-by-bit independent fault injection, a quantifiable end-to-end verification method is provided for the recovery process in steps 6 and 7. This allows for the system evaluation of the degradation of the model's inference accuracy under different bit error rates, providing a basis for parameter tuning and reliability compliance determination of the fault-tolerant scheme before deployment.

[0029] In summary, this invention enables efficient fault-tolerant recovery of quantized neural networks under soft errors, especially single-event flip conditions, without significantly increasing hardware complexity, while maintaining model accuracy, over-limit error recovery capability, and low-latency deployment requirements at the edge. Attached Figure Description

[0030] Figure 1 is a schematic diagram of the overall process of the present invention.

[0031] Figure 2 is a schematic diagram of the supernet training method for redundancy-tolerant space search in an embodiment of the present invention.

[0032] Figure 3 is a schematic diagram of the failure of weight decoding of traditional error correction code under the condition of exceeding the limit error in an embodiment of the present invention.

[0033] Figure 4 is a schematic diagram of the distributed sensing coding mapping (DACM) process in an embodiment of the present invention.

[0034] Figure 5 is a schematic diagram of the Bayesian Optimal Weight Recovery (BOWR) process in an embodiment of the present invention.

[0035] Figure 6 is a schematic diagram of the bit width configuration results of each layer of the MobileNet-V2 model after fault-tolerant bit width search in an embodiment of the present invention.

[0036] Figure 7 is a schematic diagram of the bit width configuration results of each layer formed by the R20 model after fault-tolerant bit width search in the embodiment of the present invention.

[0037] Figure 8 is a schematic diagram of the simulation process of soft error fault injection based on Poisson process and bit error rate conversion in an embodiment of the present invention.

[0038] Figure 9 is a comparison of the classification accuracy of the MobileNet-V2 model under various bit error rate conditions using different fault-tolerant methods in the embodiments of the present invention.

[0039] Figure 10 is a comparison of the classification accuracy of the ResNet-20 model under various bit error rate conditions using different fault-tolerant methods in the embodiments of the present invention. Detailed Implementation

[0040] To make the objectives, technical solutions, and beneficial effects of this invention clearer, the following description is provided in conjunction with the appendix. Figure 1 To be continued Figure 10 Specific embodiments further illustrate the present invention.

[0041] Referring to Figure 1, this embodiment provides a soft error protection method for quantized neural networks based on in-situ embedding coding, which includes the following steps: Step 1: Construct a mixed-precision supernet model of a quantized neural network and complete shared weight training.

[0042] Specifically, a set of candidate quantization bit widths is preset for each quantizable layer in the quantizable neural network to be deployed. Construct a shared basic weight matrix A mixed-precision supernet model is constructed. During training, the training dataset is used as input, and an asymmetric path sampling strategy is employed for subnet sampling in each iteration. Referring to Figure 2, during supernet training, a single highest-width path is sampled, and several heterogeneous-width paths are randomly sampled. After forward and backward propagation of each path, the gradients are pooled to update the shared weights. This process is repeated until the convergence condition is met, yielding the supernet shared parameters used for subsequent heterogeneous-width subnet searches. A single highest-width path is retained in each iteration. As gradient anchor points, several heterogeneous paths are randomly sampled. Simultaneously, the sampling indicator variable of the extremely low minimum bit width path... Set to zero to avoid introducing excessive quantization noise continuously into extremely low bit-width paths.

[0043] In a single iteration, forward and backward propagation are performed on each sampled subnet, and the gradients of each path are directly converged. The shared weights are then updated as follows: , in, For learning rate, For loss function, This represents the total number of sampling paths in a single iteration. In this embodiment, we can let... In each iteration, one highest-width path and three random-width paths are sampled. After training the supernet, shared weight parameters that can be used for subsequent structure search are obtained.

[0044] Step 2: Establish the segmented mapping relationship between the physical memory bit width and the quantization bit width.

[0045] Specifically, it reads the physical word length of the underlying physical memory in the edge deployment hardware. In this embodiment, a common... Taking bit storage word length as an example. For a certain layer of target quantization bit width... The quantization weights of this layer are divided into high-order bit segments protected by encoding. and low-order segments that do not participate in coding protection ,satisfy: The redundant bit width released by quantization downsizing is: The actual physical code length used in the encoding is: .

[0046] To ensure that the released redundant bits can support single-bit error correction, the redundant bit width used to store the parity bits is... satisfy: Based on this, feasible protection bit width partitioning schemes under different quantization bit widths can be obtained. For example, when and At that time, it can be divided into , ;when When, only the highest bit can be included in the protected higher-order bit segment; when At that time, it is usually impossible to form an effective division that meets the requirements of in-situ coding protection.

[0047] Step 3: Search for the optimal configuration subnet with the best bit width under the precision constraint.

[0048] Specifically, based on the shared weight parameters obtained in step 1, and to evaluate the accuracy of each candidate subnet using the verification dataset, a bidirectional local search mechanism is established under the feasible partitioning constraints given in step 2. For the first... Layer candidate quantization bit width Define the redundant bit width released in this layer as: The fault tolerance benefit function of this layer is further defined as follows: when hour, ;when hour, .in, Let be a discrete reward coefficient that monotonically increases with the number of redundant bits. The total fault-tolerant reward for the entire network is: in, Let be the effective number of layers in the network. Assume the maximum bit width baseline accuracy is . The maximum allowable accuracy degradation threshold is Then the lower bound of precision is: The current subnet accuracy is higher than At that time, the following utility function is used to perform a local downsizing search: When the current subnet accuracy is less than or equal to At that time, the following utility function is used to perform a callback ascending search: Among them, the The change in accuracy caused by adjusting the layer width is defined as follows: The corresponding change in fault tolerance benefit is defined as: The total fault tolerance gain of the entire network can also be equivalently expressed as: in, Indicates the first The subnet accuracy after single-step bit width adjustment at each layer. Indicates the current subnet precision. and The parameter is a constant. Through the above search, a heterogeneous bit-width configuration subnet that satisfies the accuracy constraint and has the optimal overall fault tolerance benefit is obtained. Fine-tuning training is then performed under a fixed structure to obtain the final deployed model parameters. (Refer to...) Figure 6 and Figure 7 , Figure 6 This shows the quantization bit width configuration of each layer of the MobileNet-V2 model after fault-tolerant bit width search. Figure 7 This shows the quantization bit width configuration of each layer in the ResNet-20 model after fault-tolerant bit width search. Figure 6 and Figure 7 It can be seen that the search method can allocate different bit widths according to different network structures and the quantization sensitivity of each layer. While meeting the model accuracy constraints, it can release redundant bits used for in-situ encoding protection by reducing the quantization bit width of some network layers.

[0049] Step 4: Extract the prior distribution of the determined higher-order fault-tolerant subspace quantization weights and construct the state transition probability matrix.

[0050] Specifically, the higher-order fault-tolerant subspace quantization weights are extracted layer by layer from the final deployment model obtained in step 3, and the corresponding signed integers are set as follows: The offset binary transformation maps to a non-negative integer state. : Based on this, the discrete prior distribution of the quantization weights of the higher-order fault-tolerant subspace is determined. Meanwhile, let the single-bit flip error rate of the physical memory be... Then the encoding state is changed from Flip to The elements of the state transition probability matrix are: in, This indicates that the encoding state is changed from Become The set of error vectors, This represents the number of flips in the error vector. This step yields the prior distribution and state transition probability matrix for each layer, which can be used for subsequent offline encoding design and online weight recovery.

[0051] Step 5: Solve the distribution-aware coding mapping offline and complete the pre-deployment coding.

[0052] Referring to Figures 3 and 4, given a fixed higher-order fault-tolerant subspace bit width, the traditional method of recovery based solely on coding distance is prone to significant numerical deviations under out-of-bounds error conditions. For example... Figure 3As shown, when the number of flipped bits in the stored codeword exceeds the designed error-correcting capability of traditional error-correcting codes, nearest-neighbor decoding may restore the scrambled codeword to another valid state, causing a large error in the weight values. This is because traditional decoding primarily relies on Hamming distance for decision-making, without considering the prior distribution of quantization weights and the numerical distortion corresponding to different recovery results. For example... Figure 4 As shown, the distribution-aware coding mapping first extracts the prior distribution of the protected weights and constructs a soft-error state transition matrix. Then, based on the minimum mean square error objective, it jointly solves the data remapping dictionary and generates a codebook through error correction verification. After offline encoding of the determined higher-order fault-tolerant subspace weights using the obtained dictionary and codebook, the encoded weights are written into the target memory. Therefore, this embodiment uses the prior distribution and state transition probability matrix obtained in step 4 to solve the optimal data remapping dictionary offline. Codebook generation with error correction and verification With the objective of minimizing the mean square error of reconstructed numerical distortion under out-of-limit errors, the distortion function under a single error rate condition is defined as follows: Error rate set for various radiation environments and their weights Construct a comprehensive optimization objective: Once the bit width of the higher-order fault-tolerant subspace is determined... At that time, the data dictionary is remapped using an alternating coordinate descent method. Codebook generation with error correction and verification Perform joint iterative optimization; when At that time, the standard Hamming code generator matrix is ​​fixed as the basic error correction structure, and in general invertible linear groups Searching for the optimal matrix in candidate transformations In order to achieve the comprehensive optimization objective The minimum encoding mapping scheme. After the solution is completed, the determined higher-order fault-tolerant subspace weights are encoded offline according to the dictionary and codebook of the corresponding layer, and the encoding results are written together with the lower-order original code data into the terminal physical storage array to form the model storage image before deployment.

[0053] Step 6: Build a posterior probability model of the candidate source states during the online inference phase.

[0054] Specifically, during edge-end inference, the scrambled codeword is read from physical memory. For each read, the determined higher-order fault-tolerant subspace code field is denoted as . Source state The corresponding legal codeword is Then the posterior probability satisfies: .

[0055] in, Let be the Hamming distance between the scrambled codeword and the valid encoded codeword. From this, the posterior probability distribution of each candidate source state can be calculated, and it can be used as the basis for recovering the current scrambled code field.

[0056] Step 7: Complete the weight recovery and construct the static lookup table based on the minimum mean square error criterion.

[0057] Referring to Figure 5, the system calculates the posterior probability of the candidate source state based on the scrambled codeword, the prior distribution of weights, the Hamming distance, and the bit error rate, and determines the higher-order weight recovery result according to the minimum mean square error criterion. Subsequently, the higher-order recovery result is concatenated with the lower-order original code segment, and the complete quantization weights are output through a pre-compiled lookup table. After obtaining the posterior probability distribution, the optimal higher-order recovery result is determined according to the minimum mean square error criterion, which is as follows: in, Representing state The corresponding quantized value. The joint probability sum of candidate states is defined as: To avoid floating-point underflow during Bayesian normalization, a preset stability threshold is used. When the joint probability of candidate states is summed When this happens, stop performing the normalized division operation and directly select the prior probability. The largest candidate state is taken as the recovery result.

[0058] Furthermore, to reduce online recovery overhead, the recovery results of all potentially disturbed higher-order code fields are pre-compiled offline into a higher-order recovery lookup table. Its index space covers the entire The codewords of the protected coded segment are read out; and the process of concatenating the recovered higher-order result with the lower-order original code data bit segment is further pre-compiled into a complete weighted quantization recovery lookup table. Its index space covers the entire A complete physical storage word length is used to read the codeword. During online inference, the complete scrambled codeword is directly used as the lookup address. The recovered complete quantized weight is output through a single table lookup, and this weight is loaded into the subsequent forward inference and multiply-accumulate operations of the neural network. For an 8-bit storage word length scenario, the maximum complete input space is... Therefore, it can be used at the edge end. Complexity achieves weight recovery.

[0059] The method of the present invention was simulated and verified based on a random fault injection model: Referring to Figure 8, specifically, to verify the effectiveness of the method of the present invention, a soft error injection experiment was conducted on a quantized neural network model. Existing publicly available methods, Weight Nulling, Value-aware Parity (VAP), and WCAT, were selected as comparative methods. Under a unified experimental setting, the classification accuracy of different methods under different bit error rates (BER) was compared. In the storage-type soft error scenario of continuously executing inference tasks, the single-particle flip event was approximated as a Poisson process in the time dimension; assuming the hardware baseline failure rate is... The single inference cycle is Then it occurs within one inference cycle. The probability of a second-order flip event is: Let the total number of bits in the model's storage space be... Assuming that the bit-flipping events are independent and uniformly distributed among the storage bits, the average flipping intensity of a single storage bit within one inference cycle is: Therefore, the probability that a single storage bit will flip at least once during the inference cycle is: Under low error rate conditions, with the single-bit flip probability This is approximated as the bit error rate (BER) at the storage bit level. Let the actual number of bits that flips be... The bit error rate can also be statistically defined as... For the first Each storage bit generates a random fault variable. and satisfy All fault variables are combined into a fault mask vector. and the original stored codeword Perform a bitwise XOR operation to obtain the scrambled codeword. like Figure 8As shown, the fault injection process first generates a random fault mask based on a preset bit error rate, and then performs a bitwise XOR operation with the original stored codeword to obtain the scrambled codeword. Subsequently, the scrambled codeword is input into the weight recovery process and network inference is executed. The model classification accuracy under different error rate conditions is statistically analyzed through repeated fault injections. Thus, simulation verification first uses a Poisson process to characterize the total arrival statistics of single-particle flip events within an inference cycle, then converts this total flip intensity into the flip probability of a single stored bit, and constructs a Bernoulli random fault mask using the BER corresponding to this single-bit flip probability, thereby achieving an approximate simulation of the real soft error environment. The scrambled codeword is then input into the recovery process described in steps 6 and 7, and the classification accuracy of the model under different BER conditions is statistically analyzed. The following, in conjunction with Figures 9 and 10, Tables 1 and 2, illustrates the fault-tolerance effect of the method of the present invention under different network models and different error rate conditions.

[0060] Table 1. Classification accuracy statistics of MobileNet-V2 model under various bit error rates using different fault-tolerant methods. BER Unprotected baseline Weight Nulling VAP WCAT Method of the present invention 1.00E-05 71.69±0.11 71.00±0.08 69.39±0.00 71.76±0.01 71.97±0.04 1.58E-05 71.68±0.18 70.81±0.16 69.39±0.00 71.81±0.07 71.95±0.04 2.51E-05 71.50±0.24 70.72±0.28 69.39±0.00 71.83±0.10 71.96±0.02 3.98E-05 70.32±1.50 70.58±0.34 69.39±0.00 71.55±0.24 71.97±0.03 6.31E-05 70.13±1.26 70.50±0.18 69.39±0.00 71.41±0.26 72.00±0.08 1.00E-04 69.06±0.88 70.36±0.12 69.39±0.00 71.21±0.22 72.00±0.00 1.58E-04 67.16±2.72 69.72±0.08 69.39±0.00 71.35±0.13 72.04±0.05 2.51E-04 63.92±2.04 67.87±0.70 69.39±0.00 70.66±0.17 71.99±0.05 3.98E-04 58.36±4.57 65.41±1.93 69.39±0.00 70.51±0.26 71.97±0.04 6.31E-04 52.58±3.82 62.44±2.57 69.36±0.03 70.04±0.32 71.91±0.18 1.00E-03 40.65±8.77 53.97±4.84 69.38±0.01 68.56±0.85 71.71±0.15 1.58E-03 19.53±5.01 41.29±1.11 69.33±0.04 66.12±0.41 71.65±0.36 2.51E-03 10.45±3.00 25.59±6.41 69.04±0.22 63.54±0.48 71.35±0.23 3.98E-03 1.77±0.31 10.64±1.26 66.18±0.33 55.69±3.50 70.78±0.20 6.31E-03 1.33±0.19 2.52±0.41 59.81±1.94 49.80±5.69 69.97±0.13 1.00E-02 1.13±0.01 1.54±0.39 22.43±12.67 32.55±6.91 68.41±0.71 1.58E-02 1.04±0.22 0.88±0.20 2.14±1.40 14.77±4.65 64.02±2.56 2.51E-02 0.99±0.01 0.96±0.04 0.95±0.12 2.93±0.12 56.57±1.81 3.98E-02 1.19±0.18 1.00±0.00 0.89±0.05 1.43±0.28 37.86±4.37 6.31E-02 1.02±0.04 1.00±0.00 1.00±0.02 1.00±0.04 14.55±4.66 1.00E-01 0.98±0.05 1.00±0.00 0.98±0.00 1.14±0.20 2.05±0.67 1.12E-01 1.04±0.03 1.00±0.00 1.00±0.00 1.00±0.00 1.29±0.28 1.25E-01 1.03±0.04 1.00±0.00 1.01±0.05 1.00±0.00 1.47±0.28 1.39E-01 1.00±0.00 1.00±0.00 1.02±0.03 1.01±0.01 1.09±0.06 1.55E-01 1.01±0.01 1.00±0.00 0.99±0.01 1.00±0.00 1.11±0.09 1.73E-01 1.00±0.00 1.00±0.00 1.06±0.02 1.00±0.00 1.09±0.06 1.93E-01 0.96±0.05 1.00±0.00 0.98±0.03 1.00±0.00 1.04±0.06 2.16E-01 0.99±0.02 0.97±0.04 0.91±0.12 1.00±0.00 1.03±0.03 2.41E-01 1.05±0.04 1.00±0.01 0.96±0.03 1.00±0.00 0.91±0.23 2.69E-01 1.06±0.02 1.06±0.09 1.00±0.00 1.00±0.00 1.01±0.00 3.00E-01 0.98±0.05 1.00±0.03 0.99±0.01 1.00±0.00 1.01±0.00 As can be seen from Figure 9 and Table 1, on the MobileNet-V2 model, when the bit error rate is in a low range, the method of this invention and all the comparison methods can maintain a high classification accuracy, but the method of this invention still maintains the highest or near-highest accuracy overall. Figure 9 As shown, with the increase of bit error rate, the classification accuracy of each comparative method gradually decreases, while the inflection point of accuracy decline of the method of this invention generally shifts towards higher error rates. Under medium-to-high bit error rate conditions, the method of this invention can still maintain a high classification accuracy, indicating that it can reduce the recovery distortion of disturbed weights. For example, at bit error rates of 1.00E-05, 1.00E-04, and 1.00E-03, the corresponding classification accuracies of the method of this invention are 71.97%, 72.00%, and 71.71%, respectively, all higher than the unprotected baseline, Weight Nulling, and WCAT, and the fluctuations within the above ranges are small, indicating that the method of this invention can maintain the original inference performance of the model well under low to medium soft error intensity conditions.

[0061] Furthermore, as shown in Figure 9 and Table 1, the classification accuracy of existing methods decreases rapidly as the bit error rate continues to rise, while the method of this invention maintains a significant advantage. When the bit error rate is 1.00E-02, the classification accuracy of unprotected baseline, weight nulling, value-aware parity (VAP), and WCAT decreases to 1.13%, 1.54%, 22.43%, and 32.55%, respectively, while the method of this invention still maintains a classification accuracy of 68.41%. When the bit error rate is 2.51E-02, all the comparative methods are close to failure, while the method of this invention still maintains a classification accuracy of 56.57%. Even at a bit error rate of 3.98E-02, the method of this invention still maintains a classification accuracy of 37.86%. This demonstrates that the method of this invention still has strong recovery capabilities under conditions of high error rates and out-of-limit errors.

[0062] Table 2. Classification accuracy statistics of the ResNet-20 model under various bit error rates using different fault-tolerant methods. BER Unprotected baseline Weight Nulling VAP WCAT Method of the present invention 1.00E-05 91.53±0.05 91.45±0.01 90.28±0.00 91.03±0.11 91.60±0.00 1.58E-05 91.48±0.06 91.45±0.04 90.28±0.00 90.98±0.02 91.60±0.00 2.51E-05 91.46±0.08 91.44±0.02 90.28±0.00 91.01±0.04 91.62±0.00 3.98E-05 91.46±0.05 91.44±0.04 90.28±0.00 91.06±0.08 91.61±0.02 6.31E-05 91.50±0.09 91.46±0.03 90.28±0.00 90.97±0.09 91.60±0.02 1.00E-04 91.29±0.12 91.45±0.04 90.28±0.00 90.89±0.11 91.65±0.06 1.58E-04 91.21±0.15 91.31±0.06 90.28±0.00 90.85±0.05 91.63±0.01 2.51E-04 91.01±0.10 90.86±0.18 90.28±0.00 90.64±0.14 91.59±0.07 3.98E-04 90.85±0.26 90.86±0.23 90.28±0.00 90.80±0.08 91.58±0.08 6.31E-04 90.31±0.69 90.44±0.19 90.28±0.00 90.70±0.19 91.63±0.06 1.00E-03 89.52±0.63 89.84±0.75 90.28±0.01 89.83±0.75 91.60±0.07 1.58E-03 88.69±1.36 89.23±0.64 90.28±0.02 89.31±0.71 91.57±0.10 2.51E-03 86.87±1.88 87.07±0.44 90.40±0.05 88.20±1.19 91.56±0.12 3.98E-03 83.46±2.32 82.33±1.67 90.25±0.11 86.17±1.95 91.51±0.12 6.31E-03 76.37±0.79 69.88±4.36 89.57±0.39 83.40±2.85 91.28±0.18 1.00E-02 61.19±5.56 58.55±17.95 86.69±1.61 76.23±3.66 91.08±0.12 1.58E-02 35.56±3.40 34.38±8.63 78.09±1.70 65.47±2.38 90.47±0.20 2.51E-02 20.45±3.98 15.31±4.85 45.96±15.08 40.08±10.46 86.86±2.15 3.98E-02 12.19±0.20 9.81±0.33 15.91±3.17 23.38±0.90 75.71±7.26 6.31E-02 10.33±2.21 11.09±1.11 11.25±1.13 11.47±0.81 47.28±5.39 1.00E-01 10.32±0.30 10.07±0.14 10.19±0.13 10.12±0.17 23.24±4.39 1.12E-01 9.49±0.18 9.80±0.30 10.16±0.12 9.75±0.18 15.98±3.66 1.25E-01 8.59±1.57 9.96±0.04 10.83±1.04 9.32±0.58 15.98±3.66 1.39E-01 9.23±1.10 9.94±0.08 9.97±0.25 10.32±0.59 13.20±1.89 1.55E-01 10.21±0.20 10.00±0.00 9.78±0.32 10.00±0.01 10.05±0.67 1.73E-01 10.05±0.08 10.00±0.00 9.56±0.37 9.50±0.53 10.52±1.45 1.93E-01 10.08±0.11 10.00±0.00 9.83±0.21 9.41±0.62 10.48±0.43 2.16E-01 10.10±0.14 10.01±0.01 9.99±0.01 10.67±0.94 9.33±1.25 2.41E-01 9.33±0.94 9.59±0.58 9.73±0.39 10.13±0.19 10.05±0.00 2.69E-01 9.20±1.13 10.16±0.23 9.65±0.49 9.97±0.04 10.05±0.00 3.00E-01 10.00±0.00 9.59±0.58 10.00±0.00 9.09±1.25 9.93±0.17 As can be seen from Figure 10 and Table 2, as Figure 10 As shown, the method of this invention also exhibits a relatively gentle accuracy degradation trend on the ResNet-20 model, and significantly outperforms the unprotected baseline and other comparative methods under medium-to-high bit error rates. As the bit error rate increases from 1.00E-05 to 1.58E-02, the classification accuracy of the method of this invention remains at a high level. This result demonstrates that the described bit-width search, distribution-aware coding, and Bayesian weight recovery methods are applicable to different quantized neural network structures. For example, at a bit error rate of 1.00E-02, the classification accuracy of the method of this invention is 91.29%, while that of unprotected baseline, weight nulling, and value-aware parity (VAP) is 57.79%, 54.03%, and 74.44%, respectively. At a bit error rate of 3.98E-02, the method of this invention still maintains a classification accuracy of 73.64%, while the comparative methods have decreased to 12.68%, 10.65%, and 23.32%, respectively. At a bit error rate of 1.12E-01, the method of this invention still maintains a classification accuracy of 23.77%, while the comparative methods are close to the level of random output. The above results show that the method of this invention still has good adaptability and stability in deeper network structures and a wider error rate range. (See Figure 9 for details.) Figure 10As shown in Tables 1 and 2, the method of this invention exhibits good soft error tolerance on both MobileNet-V2 and ResNet-20 models. Under low error rate conditions, the method of this invention can achieve weight protection with minimal sacrifice of model accuracy; under medium to high error rate conditions, the method of this invention shows a more gradual trend of accuracy degradation and a higher residual classification accuracy compared to existing methods; under extremely high error rate conditions, although the classification accuracy of all methods decreases, the method of this invention can still maintain significantly better performance than the comparison methods over a relatively long error rate range. This demonstrates that the bit-width redundancy release, distribution-aware coding, and weight recovery mechanism based on posterior probability proposed in this invention can effectively improve the inference reliability of quantized neural networks under soft error environments.

[0063] Working principle of this invention: This invention first trains a mixed-precision supernet model and updates shared weights using an asymmetric path sampling strategy. Then, based on the mapping relationship between physical storage bit width and candidate quantization bit width, it searches bidirectionally for the optimal heterogeneous bit width configuration under precision constraints, obtaining the quantization model structure for deployment and the determined higher-order fault-tolerant subspace and lower-order data subspace. Discrete prior distributions and state transition matrices are established for the weight bits of the determined higher-order fault-tolerant subspace. The optimal data remapping dictionary and error correction codebook are solved offline to minimize reconstruction distortion under various error rates, and the encoding results are written to the terminal physical storage array. During inference, the weights are recovered from the scrambled codewords using Bayesian posterior probability (combining Hamming distance and prior distribution) and the optimal higher-order recovery result is determined. Finally, the results are concatenated to form complete quantization weights.

Claims

1. A soft error prevention method for quantized neural networks based on in-situ embedding coding, characterized in that, Includes the following steps: Step 1: For the candidate quantization bit width set of each layer to be quantized in the quantization neural network, construct a mixed-precision supernet model with shared weights; use training data to iteratively train the mixed-precision supernet model, and in each iteration, adopt an asymmetric path sampling strategy based on quantization noise suppression, and directly aggregate the gradients of each sampling path in the asymmetric path sampling strategy to update the shared weights of the mixed-precision supernet model, thereby obtaining the supernet shared parameters for structure search; Step 2: Read the physical word length of the underlying physical memory in the edge deployment hardware, and combine it with the candidate quantization bit width of each layer of the supernet shared parameters described in Step 1. Based on the single-bit error correction Hamming boundary, establish a segmented mapping relationship between the physical word length, quantization bit width, and releasable parity redundancy bits. Divide the quantization weight of each layer's candidate quantization bit width into a high-order fault-tolerant subspace protected by coding and a low-order data subspace not involved in coding protection according to bit importance. Step 3: Based on the supernet shared parameters described in Step 1 and the high-order fault-tolerant subspace and low-order data subspace described in Step 2, establish a fault-tolerant space exploration method based on discrete ladder reward function and bidirectional local search. Under the lower bound constraint of the accuracy of the mixed-precision supernet model, adjust and verify the candidate quantization bit width of each layer of the supernet shared parameters described in Step 1 layer by layer, search for the heterogeneous bit width configuration subnet with the optimal fault-tolerant benefit, and perform fine-tuning training on the heterogeneous bit width configuration subnet to obtain the quantization model structure for deployment, as well as the determined high-order fault-tolerant subspace and the determined low-order data subspace. Step 4: Based on the deployment quantization model structure described in Step 3, statistically analyze the quantization weights of the determined high-order fault-tolerant subspace in Step 3 and extract the weight prior distribution; at the same time, combine the soft error bit flipping characteristics of the physical memory in the target deployment environment to construct the coding state transition probability matrix for the high-order fault-tolerant subspace, and obtain the probability model required for subsequent coding optimization and online recovery. Step 5: Based on the probability model described in Step 4, with the minimum mean square error of reconstruction distortion under out-of-limit errors as the objective, the optimal data remapping dictionary and error correction verification codebook are jointly solved for different high-order fault-tolerant subspaces determined in Step 3; then, the obtained dictionary and codebook are used to pre-encode the weights of the determined high-order fault-tolerant subspaces to obtain fault-tolerant coding values, and the fault-tolerant coding values ​​and the determined low-order data subspaces in Step 3 are concatenated to form a set of legal coding codes, and the set of legal coding codes is written into the terminal physical storage array; Step 6: During the edge inference process, read the disturbed codewords from the terminal physical storage array described in Step 5; for the fault-tolerant coding value described in Step 5, combine the weight prior distribution of its corresponding layer, the set of legal coding codewords described in Step 5, and the probability model described in Step 4 to establish the posterior probability model of the candidate source state, and perform Bayesian optimal weight recovery accordingly to obtain the weight recovery candidate set; Step 7: Based on the minimum mean square error criterion, determine the optimal higher-order recovery result from the weight recovery candidate set described in Step 6, and concatenate the optimal higher-order recovery result with the lower-order data subspace described in Step 3 to form a complete quantized weight.

2. The method for preventing soft errors in quantized neural networks as described in claim 1, characterized in that, Step 1 describes the specific process of the asymmetric path sampling strategy based on quantization noise suppression and updating the shared weights of the hybrid precision supernet model as follows: Define the shared basic weight matrix as follows The multi-precision configuration space set is Let the total number of sampling paths in each iteration be . ,and ; During training, the sampling indicator variable of the extremely low minimum bit width path will be used. Set to zero; Each iteration constructs a highest-precision configuration path and randomly sample the rest heterogeneous paths ; The gradients corresponding to each sampling path are directly accumulated to obtain the shared weight update amount.

3. The method for preventing soft errors in quantized neural networks as described in claim 1, characterized in that, Step 2: The segmented mapping relationship satisfies the following conditions: Let the physical word length of the underlying physical memory unit be... The quantization bit width of the target layer is ,in The quantization bit width is divided into high-order bit segments that are protected by encoding. and low-order bits that do not participate in coding protection ,satisfy The redundant bit width released by quantization down-biting is Redundant bit width used to store the parity bit Satisfying the single-bit error-correcting Hamming boundary constraint: .

4. The method for preventing soft errors in quantized neural networks as described in claim 1, characterized in that, Step 3 The fault tolerance space exploration method described above satisfies the following conditions: Regarding the first Layer target quantization bit width The redundant bit width released by quantization down-biting is defined as... ; when At that time, the fault tolerance benefit of this layer is increased. ; when At that time, a discrete reward coefficient that monotonically increases with the number of redundant bits is used. Characterizes the fault tolerance benefit of this layer, and satisfies Based on this, the fault tolerance benefits of each layer are summed to obtain the total fault tolerance benefit of the entire network: in, Let be the effective number of layers in the network, and let the baseline accuracy of the model be . The maximum allowable accuracy degradation threshold is Then the lower bound of precision is In the current subnet accuracy is higher than At that time, according to Perform a local downsampling search; when the precision of the current subnet is less than or equal to At that time, according to Perform a callback-based upshift search; after determining the optimal subnet with the best bit width configuration, freeze the subnet structure and perform parameter fine-tuning training.

5. The method for preventing soft errors in quantized neural networks as described in claim 1, characterized in that, Step 4, the process of extracting the prior distribution of weights and constructing the state transition probability matrix, is as follows: First, the signed integers corresponding to the quantization weights of the higher-order fault-tolerant subspace determined in step 3 are... Perform offset binary transformation Map it to the non-negative integer domain and statistically obtain the discrete prior distribution. ; Combined with the single-bit flip error rate of physical memory Construct the state transition probability matrix : in, This indicates that the encoding state is changed from Flip to The set of error vectors, This indicates the number of bits that are flipped in the error vector. This indicates the total bit width of the protected coded segment.

6. The method for preventing soft errors in quantized neural networks as described in claim 1, characterized in that, Step 5 describes the process of solving for the optimal data remapping dictionary and generating the codebook through error correction and verification: With the goal of minimizing the mean square error of reconstructed numerical distortion under out-of-limit errors, a distortion objective function is defined under a single error rate condition: in, Remap the dictionary for the data. Generate a codebook for error correction and verification; Error rate set for various radiation environments and corresponding weights Establish comprehensive optimization goals Based on the comprehensive optimization objective, the optimal data remapping dictionary and error correction verification codebook under the corresponding protection bit width are solved offline. During deployment, the determined high-order fault-tolerant subspace weights are encoded and written into the terminal physical storage array.

7. The method for preventing soft errors in quantized neural networks as described in claim 6, characterized in that, Step 5: The different higher-order fault-tolerant subspaces determined in Step 3 are solved using the following strategy: Once the higher-order fault-tolerant subspace is determined... At that time, an alternating coordinate descent method is used to iteratively optimize the data remapping dictionary and the error correction verification codebook. Once the higher-order fault-tolerant subspace is determined... At that time, the standard Hamming code generator matrix is ​​fixed as the underlying error correction structure, and in general invertible linear groups The optimal matrix is ​​searched among all candidate transformations to obtain the encoding mapping scheme that minimizes the overall optimization objective.

8. The method for preventing soft errors in quantized neural networks as described in claim 1, characterized in that, The posterior probability model described in step 6 is as follows: in, The scrambled codeword read from the physical memory. source state The corresponding legal codeword, The Hamming distance is the distance between the scrambled codeword and the valid encoded codeword.

9. The method for preventing soft errors in quantized neural networks as described in claim 2, characterized in that, In a single iteration of the iterative training described in step 2, the total number of sampling paths is set to... And let the introduction of indicator variables for extremely low minimum bit width paths Thus, in each iteration, one highest bit-width path is sampled. and 3 random bit-width paths .

10. The method for preventing soft errors in quantized neural networks as described in claim 3, characterized in that, The physical code length of the higher-order fault-tolerant subspace described in step 3 satisfies And when the underlying physical storage word length At that time, quantization bit width The piecewise mapping satisfies: when or or When, all valid bits are assigned to the determined higher-order fault-tolerant subspace; when At that time, it was divided into and ;when When, only the highest-order bit is allocated to the determined higher-order fault-tolerant subspace; when At that time, it does not constitute a valid division that meets the requirements of in-situ coding protection.

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