A single-stage DAB inverter frequency conversion decoupling and reinforcement learning adaptive control method

Abstract

The application discloses a single-stage DAB inverter variable frequency decoupling and reinforcement learning adaptive control method, S1) defining three key control variables; S2) calculating an effective width pure open-loop feedforward quantity according to a grid-connected current reference instruction, and calculating a feedforward frequency by using an effective width variable frequency linearization function; S3) taking the current inner loop PI regulator output as a frequency correction quantity, superimposing and synthesizing the feedforward frequency and the frequency correction quantity according to a negative feedback polarity to obtain an actual switching frequency; S4) eliminating steady-state errors caused by model mismatch and parameter perturbation through three compensation mechanisms designed according to time scale; S5) training an intelligent agent offline by using a deep deterministic policy gradient algorithm; and S6) quantitatively deploying the trained Actor network to a digital signal processor, and setting a safety fallback mechanism. The application solves the problems of traditional DAB inverter control variable coupling and poor parameter adaptability, significantly improves dynamic response and full-load efficiency, and can be independently implemented or integrated into an existing energy storage inverter software platform.

Description

Technical Field

[0001] This invention relates to the field of power electronic conversion and control technology, and in particular to a method for frequency conversion decoupling and reinforcement learning adaptive control of a single-stage DAB inverter. Background Technology

[0002] Single-stage DAB bidirectional DC / AC inverters have become the core power unit for distributed photovoltaic energy storage systems and solid-state transformers due to their advantages such as simple topology, high-frequency isolation, inherent soft switching, and bidirectional energy flow. However, existing control methods still have the following prominent problems:

[0003] 1) Confusion regarding the concept of control variables, failure to distinguish between effective width and inward phase shift angle: Existing literature often refers to effective width as... (primary voltage) The equivalent pulse width of the three-level waveform and the inner phase shift angle α (the driving delay angle of S2 / S3 relative to S1 / S4) are collectively referred to as the "phase shift angle," without clearly distinguishing the essential physical difference between the two: α is the physical width of the voltage waveform (a direct determinant of power transfer), and α is the drive delay angle (control mechanism) that generates this waveform. The two are connected through... This conceptual confusion creates difficulties for understanding the physical properties of the controller, parameter tuning, and engineering debugging.

[0004] 2) Strong coupling of control variables, with effective bandwidth and frequency mutually constraining each other: In the frequency conversion linearization control architecture disclosed in the paper "Highly Efficient Single-Stage DAB Microinverter Using a Novel Modulation Strategy to Minimize Reactive Power", the current closed-loop PI regulator directly outputs the effective bandwidth correction. Actual effective width Simultaneously carrying dual information such as "power reference sinusoidal feedforward command" and "current tracking error correction amount", the switching frequency... Passive tracking of effective width changes. When the transformer leakage inductance drifts by ±15% to ±25% due to factors such as temperature rise and DC bias of the magnetic core, the feedforward mathematical model and the actual hardware become mismatched. The effective width at the peak of the sine wave can easily reach the saturation limit of 0.5, the grid-connected current shows a significant dip, the total harmonic distortion rate deteriorates sharply, and the dynamic tracking performance drops significantly.

[0005] 3) Lack of a systematic compensation framework for perturbations of multiple time-scale parameters in engineering: In practical engineering, there are three types of key parameter perturbations: ① Switching dead-time effect—the dead-time varies with frequency, causing a shift in the effective width; the duty cycle loss introduced by a fixed dead-time at different frequencies can differ by more than two times; ② Line voltage drop—PCB traces, connectors, and transformer winding resistance generate significant voltage drops under heavy loads, resulting in the actual voltage reaching the full-bridge input being lower than the sampled value; ③ Leakage inductance temperature drift—the leakage inductance of ferrite cores can change by ±20% with temperature. These three types of perturbations occur at different time scales (cycle-by-cycle, millisecond, and second-level), and existing solutions do not provide a hierarchical compensation architecture.

[0006] 4) Poor adaptability of fixed parameter controllers: Under conditions such as sudden load changes, input voltage fluctuations, and device aging, fixed PI parameters are difficult to maintain optimal performance. Although there is research on using deep reinforcement learning for DAB converter parameter optimization, it has not been deeply integrated with frequency conversion linear decoupling control, nor has a lightweight and safe embedded deployment solution been formed. Summary of the Invention

[0007] To address the shortcomings of existing technologies, this invention provides a single-stage DAB inverter frequency conversion decoupling and reinforcement learning adaptive control method, which strictly distinguishes the effective bandwidth. Inward phase angle With the outward shift phase angle The inner-loop PI regulator only outputs the frequency correction value. The actual switching frequency is determined by the feedforward frequency. and Linear synthesis achieves complete decoupling of effective bandwidth and frequency. At the same time, a multi-timescale compensation system of instantaneous dead zone correction + steady-state voltage drop feedforward + long-term parameter self-tuning is constructed. The deep deterministic policy gradient (DDPG) agent is used to optimize the voltage outer loop PI parameters and frequency correction channel gain online, achieving high efficiency and fast dynamic response across the entire load range. At the same time, it solves the problems of lightweight deployment and safety supervision of AI models.

[0008] The objective of this invention is achieved as follows: a method for frequency conversion decoupling and reinforcement learning adaptive control of a single-stage DAB inverter, comprising the following steps:

[0009] S1) Define three key control variables: define the effective width as the equivalent pulse width of the three-level waveform of the primary voltage; define the inner phase shift angle as the phase difference between the two bridge arm drive signals inside the low-voltage side primary full bridge; define the outer phase shift angle as the phase difference between the corresponding switch drive signals of the primary full bridge and the secondary full bridge.

[0010] S2) The effective width pure open-loop feedforward quantity is calculated according to the grid-connected current reference command, and the feedforward frequency is calculated by the frequency conversion linearization function after the effective width is used;

[0011] S3) Use the output of the inner current loop PI regulator as the frequency correction amount, and combine the feedforward frequency and the frequency correction amount according to the negative feedback polarity to obtain the actual switching frequency.

[0012] S4) Construct a multi-timescale compensation system: Eliminate steady-state errors caused by model mismatch and parameter perturbation through three time-scale hierarchical compensation mechanisms;

[0013] S5) The agent is trained offline using a deep deterministic strategy gradient algorithm. The system voltage and current error and the operating state are used as the state space, and the PI parameter increment and the frequency conversion linearization coefficient increment are output.

[0014] S6) The trained Actor network is quantized and deployed to the digital signal processor, periodically inferring and updating the controller parameters online, and a safe rollback mechanism is set.

[0015] Furthermore, S1) specifically includes: defining the effective width. Primary voltage The equivalent pulse width of the three-level waveform is determined by the inner phase shift angle α. ;

[0016] The inner phase shift angle α is the phase difference between the driving signals of the two bridge arms inside the primary side of the full bridge. Normalized, with values ​​ranging from 0 to 0.5;

[0017] The outer phase angle The phase difference between the corresponding switching transistor drive signals of the primary and secondary full-bridge circuits of the high-frequency transformer is given by the following relationship: ,in This is the phase shift index.

[0018] Furthermore, S2) specifically includes:

[0019] Calculation of effective width pure open-loop feedforward:

[0020]

[0021] in, For transformer turns ratio, For the total equivalent leakage, Maximum switching frequency, This is a current amplitude command. This is the sampled value of the DC bus voltage. The angular frequency of the power grid;

[0022] Actual effective width It contains no feedback correction; the corresponding inner phase shift angle is , used to generate PWM drive signals;

[0023] Feedforward frequency calculation: Substitute the calculated effective bandwidth into the frequency conversion linearization function to obtain the feedforward frequency:

[0024]

[0025] in, For linearization parameters, The phase shift index;

[0026] In real-time feedforward control, at the zero crossing point Frequency smoothing approaches The frequency waveform is a smooth bias sine wave.

[0027] Furthermore, S3) specifically includes:

[0028] Calculate the frequency correction: The output of the current inner-loop PI regulator is directly used as the switching frequency correction. :

[0029]

[0030] in, For current tracking error, , These are the proportional gain and integral gain of the current loop, respectively.

[0031] Actual switching frequency synthesis: The actual switching frequency acting on the system is a linear superposition of the feedforward frequency and the feedback correction.

[0032]

[0033] Hardware constraints and limits: ,in Determined by core saturation and audio noise constraints, It is determined by the constraints of power transmission capability and switching losses.

[0034] Limiting strategy: When At that time, the frequency is clamped to At the same time, the integral term shrinks; when At that time, the frequency is clamped to At the same time, the output power command is saturated.

[0035] Furthermore, S4) specifically includes: the multi-time-scale engineering compensation system includes dead-zone adaptive compensation, line voltage drop feedforward compensation, and online adaptive leakage inductance identification.

[0036] The dead-time adaptive compensation adaptively adjusts the dead-time based on the real-time switching frequency, and the dead-time compensation amount is superimposed in the effective width feedforward.

[0037] Dead time adaptively adjusts with switching frequency:

[0038]

[0039] In the formula, To at the nominal frequency The minimum safe dead zone measured below; It is the real-time switching frequency;

[0040] The dead-time compensation is also superimposed in the effective width feedforward instruction: ;

[0041] The line voltage drop feedforward compensation is a correction of the effective width feedforward based on the equivalent resistance of the power transmission path and the active power command.

[0042] The line voltage drop feedforward compensation is as follows:

[0043]

[0044] in, It's line voltage drop. , It is the equivalent resistance of the power transmission path. It is an active power command. It is the effective value of the grid voltage; This is the compensation amount converted back to the original edge;

[0045] The online adaptive identification of leakage inductance uses the integral term of the current inner loop PI regulator as a model error indicator, slowly updates the leakage inductance estimate and injects it into the effective width feedforward calculation in real time, and applies physical boundary constraints to the identification results.

[0046] Leakage inductance online adaptive identification is as follows:

[0047]

[0048] in, This is the integral component of the current inner-loop PI regulator. As adaptive coefficients, the identification results are injected into the effective width feedforward calculation in real time, and physical boundary constraints are applied. .

[0049] Furthermore, the state space of the agent trained offline by the deep deterministic policy gradient algorithm described in S5) includes voltage error, voltage error rate of change, current error, current switching frequency, output power, and current effective width feedforward value; the action space includes the voltage outer loop PI parameter increment, the current inner loop proportional gain increment, and the frequency conversion linearization coefficient increment; the reward function is composed of a weighted sum of voltage error penalty term, current error penalty term, switching frequency penalty term, power tracking reward term, and efficiency reward term.

[0050] The reward function for a deep deterministic policy gradient agent is:

[0051]

[0052] in ~ These are the weighting coefficients. This is an estimate of the instantaneous efficiency.

[0053] Furthermore, as described in S6), the trained Actor network is quantized and deployed to a digital signal processor, specifically using 8-bit symmetric quantization. The header file generated by the 8-bit symmetric quantization includes quantization weights, biases, and dequantization factors. During inference, only integer multiplication and addition operations are used, and the single inference time is less than 80μs.

[0054] Furthermore, the safety fallback mechanism described in S6) is to automatically use the last valid parameter or classic PI parameter and set the abnormal flag when the increment of the deep deterministic policy gradient output parameter causes the PI parameter or frequency conversion linearization coefficient to exceed the preset safety range; if the limit is exceeded multiple times in a row, the deep deterministic policy gradient inference engine is shut down and switched to fixed parameter mode.

[0055] Compared with the prior art, the beneficial effects of the present invention are: (1) the concept of control variables is clarified and completely decoupled, which greatly improves the waveform quality under leakage inductance mismatch; the present invention is the first to strictly distinguish the effective width in DAB frequency conversion linearization control. (primary voltage V) p Equivalent pulse width, ), inner phase shift angle α (driving delay angle) and outer phase shift angle φ (phase difference between primary and secondary sides), The physical definitions and control functions of the three variables. Effective width. Pure open-loop feedforward ( (Without feedback correction), the PI regulator only outputs the frequency correction amount. The effective bandwidth and frequency are completely decoupled. Simulation results show that, under the condition of leakage inductance +20% mismatch, the grid-connected current THD of this scheme is <3%, which is significantly better than the methods disclosed in the prior art (THD≈4.5%).

[0056] (2) This invention clarifies the division of labor between the two frequency formulas and solves the problem of frequency divergence at the zero crossing point; it establishes the design principle of “using power inverse solution for the boundary and linearization function for the feedforward”, which completely solves the problem of frequency divergence at the zero crossing point that has long plagued the engineering community.

[0057] (3) Multi-timescale compensation system to improve system robustness; Dead zone adaptive (cycle-by-cycle) + line voltage drop feedforward (millisecond level) + leakage inductance online identification (second level) constitute a complete three-dimensional compensation system, which enables the system to operate in an ideal state of "close to open-loop feedforward precise matching" for a long time, greatly improving the robustness to temperature drift and device consistency.

[0058] (4) Frequency conversion linearization simplifies control. The inner current loop can use simple PI control without complex nonlinear compensation.

[0059] (5) DDPG parameter self-tuning improves dynamic response and full load efficiency; the present invention can shorten the voltage adjustment time by more than 30% when the load changes suddenly; at the same time, the light load efficiency is improved by more than 5 percentage points, and the efficiency is optimized in the full load range.

[0060] (6) Lightweight deployment: The INT8 quantized model is less than 10KB, the single inference time is <80μs, and the real-time performance of 10kHz interrupt is met.

[0061] (7) Safety supervision mechanism: Automatic rollback when parameters exceed limits to ensure that the system will not go out of control due to AI erroneous output.

[0062] (8) Topology power level expansion: The grid side adopts an 8-tube full-bridge matrix topology, which supports power levels of 1000W and above and bidirectional energy flow.

[0063] (9) Complementary to existing software platforms: It can serve as a high-quality intelligent algorithm component to enrich the platform's algorithm library, but is not limited by the platform. Attached Figure Description

[0064] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0065] Figure 1 This is a block diagram of the effective width feedforward and frequency closed-loop decoupling control of the single-stage DAB bidirectional inverter of the present invention.

[0066] Figure 2 This is a flowchart illustrating the offline training and online inference deployment process of the DDPG of this invention.

[0067] Figure 3 This is a comparison curve of the power transmission characteristics before and after frequency conversion linearization and decoupling in this invention.

[0068] Figure 4 This is a diagram of the multi-timescale compensation system architecture of the present invention (dead zone adaptive + voltage drop feedforward + leakage inductance identification).

[0069] Figure 5 This is a schematic diagram of the modular architecture of the DSP software of the present invention.

[0070] Figure 6 The waveforms are simulations of key nodes of the present invention under rated operating conditions.

[0071] Figure 7 This is the simulation verification result of the DDPG parameter self-tuning of the present invention.

[0072] Figure 8 This is a diagram of the multi-module series voltage equalization control architecture of the solid-state transformer of the present invention.

[0073] Figure 9 This is a diagram of the multi-module series-parallel power circuit architecture of the solid-state transformer of the present invention.

[0074] Figure 10 This is the simulation verification result of the DDPG and equalizing ring of the present invention.

[0075] Figure 1 Symbol names in:

[0076]

[0077]

[0078] Figure 2 Symbol names in:

[0079]

[0080] Figure 3 Symbol names in

[0081]

[0082] Figure 3 Other symbol names are the same Figure 1 .

[0083] Figure 4 Symbol names in:

[0084]

[0085] Figure 4 Other symbol names are the same Figure 1 .

[0086] Figure 5 Symbol names in:

[0087]

[0088] Figure 6 Symbol names in:

[0089]

[0090] Figure 7 Symbol names in:

[0091]

[0092] Figure 8 Symbol names in:

[0093]

[0094] Figure 9 Symbol names in

[0095]

[0096] Figure 9 Other symbol names are the same Figure 1 and Figure 8 .

[0097] Figure 10 Symbol Explanation

[0098] Detailed Implementation

[0099] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0100] like Figure 1 The single-stage DAB inverter frequency conversion decoupling and reinforcement learning adaptive control method shown includes the following steps:

[0101] S1) Define three key control variables: define the effective width as the equivalent pulse width of the three-level waveform of the primary voltage; define the inner phase shift angle as the phase difference between the two bridge arm drive signals inside the low-voltage side primary full bridge; define the outer phase shift angle as the phase difference between the corresponding switch drive signals of the primary full bridge and the secondary full bridge.

[0102] (A) Effective width (Effective Pulse Width)

[0103] Effective width Defined as primary voltage The equivalent pulse width of a three-level waveform is determined by the inner phase shift angle. (The drive delay angle of S2 / S3 relative to S1 / S4, in...) (Normalization) Decision:

[0104]

[0105] (1) Physical formation mechanism: There is an internal delay angle between the driving signals of the two arms of the primary side full bridge. This makes the primary voltage The waveform changes from a two-level to a three-level waveform. The effective width on both sides of the middle level (zero level) of this three-level waveform is...

[0106] (2) Physical meaning: Determines the primary voltage The volt-second product (effective pulse width) directly determines the magnitude and waveform shape of power transmission.

[0107] (3) Normalization method: by Normalization is performed based on the baseline, with values ​​ranging from 0 to 0.5.

[0108] (4) Control function: change the effective width It will change the effective width of the primary voltage waveform, thus affecting the amount of transmitted power.

[0109] (5) Role in this scheme: Calculated by the feedforward open loop, not subject to PI feedback correction. The output of the inner current loop PI is the frequency correction amount. No change The corresponding inward phase shift angle is .

[0110] (B) Inward phase shift angle (Internal Phase Shift Angle / Delay Angle)

[0111] Inward phase angle Defined as the phase difference (delay angle of S2 / S3 relative to S1 / S4) between the two bridge arm drive signals inside the low-voltage side (primary side) full bridge, in... Normalized, with values ​​ranging from 0 to 0.5.

[0112] (1) Physical effect: It generates the effective width Control methods—through adjustment This changes the mid-level width of the voltage at the midpoint of the original bridge arm, thereby altering the effective width. ( ).

[0113] (2) Roles in this scheme: by The decision is made to generate the PWM drive signal, but it does not directly participate in the power transfer formula.

[0114] (C) Outward phase angle (External Phase Shift Angle)

[0115] Outward phase angle Defined as the phase difference between the corresponding switching transistor drive signals of the primary and secondary full-bridge circuits of a high-frequency transformer.

[0116] (1) Physical effect: It determines the magnitude and direction of power transfer and is the core variable in the power transfer formula of the DAB converter.

[0117] (2) with effective width Relationship: In the methods disclosed in the aforementioned non-patent literature, the outward shift phase angle With effective width Through phase shift index connect:

[0118]

[0119] in The phase shift index (0.15~0.5) is a key parameter for ZVS conditions and reactive power optimization (in this design, it is taken as...). ).

[0120] (3) Normalization method: Similarly For baseline normalization, the value ranges from 0 to 0.25.

[0121] (4) Roles in this scheme: by By fixed coefficient The calculated signal is used to generate the PWM phase-shifting signal (to control the direction and magnitude of power transmission) and is not involved in the frequency calculation.

[0122] The essential differences between the three:

[0123]

[0124] S2) The effective width pure open-loop feedforward quantity is calculated according to the grid-connected current reference command, and the feedforward frequency is calculated by the frequency conversion linearization function after the effective width is used;

[0125] Effective width pure open-loop feedforward calculation: calculated solely from the grid-connected current sinusoidal reference, without any closed-loop correction or superposition.

[0126]

[0127] in This is the ratio of the secondary side to the primary side of the transformer. For the total equivalent leakage, Maximum switching frequency, This is a current amplitude command. This is the sampled value of the DC bus voltage. The angular frequency of the power grid;

[0128] Work logic: The effective width waveform perfectly follows the sine wave command, unaffected by error disturbances. The corresponding inner phase shift angle is... It is used to generate the drive delay signal between the two bridge arms inside the primary side full bridge.

[0129] Feedforward frequency calculation: Substitute the effective bandwidth obtained from the above calculation into the frequency conversion linearization function to obtain the feedforward frequency:

[0130]

[0131] in, For linearization parameters, This is the phase shift index.

[0132] The physical positioning of this formula is real-time feedforward control: at the zero crossing point Frequency smoothing approaches It is physically achievable, and the frequency waveform is a smooth bias sine wave.

[0133] S3) Use the output of the inner current loop PI regulator as the frequency correction amount, and combine the feedforward frequency and the frequency correction amount according to the negative feedback polarity to obtain the actual switching frequency.

[0134] Calculate the frequency correction (feedback closed loop): The output of the current inner loop PI regulator is directly used as the switching frequency correction. :

[0135]

[0136] in For current tracking error, , These are the proportional gain and integral gain of the current loop, respectively.

[0137] In this invention, PI is directly output. Frequency participates in closed-loop regulation as an independent variable, and negative feedback polarity is used ( ): The error is positive (current is too low) → A positive value indicates a decrease in frequency, which in turn increases power. This correctly matches the inverse relationship between frequency and power in DAB power transmission.

[0138] Actual switching frequency synthesis: The actual switching frequency acting on the system is a linear superposition of the feedforward frequency and the feedback correction (negative feedback).

[0139]

[0140] Hardware constraints and limits: ,in Determined by core saturation and audio noise constraints, It is determined by the constraints of power transmission capability and switching losses.

[0141] Limiting strategy: When At that time, the frequency is clamped to At the same time, the integral term is reduced (to prevent integral saturation); when At that time, the frequency is clamped to At the same time, the output power command is saturated.

[0142] Dual-frequency formula division of labor criteria: This invention is the first to clearly distinguish the physical positioning of the two feedforward frequency calculation methods:

[0143] Formula 1: Direct inverse solution for power balance (hardware boundary formula)

[0144]

[0145] in It is the peak value of the instantaneous AC power. It is the peak value of the grid voltage.

[0146] Physical positioning: used to determine the upper limit boundary of the switching frequency ( This is the maximum switching frequency allowed for transmitting peak power. The formula at the zero-crossing point... This will lead to It is physically unusable for real-time feedforward.

[0147] Formula 2: Linearized Function (Real-time Feedforward Formula)

[0148]

[0149] Physical positioning: used for real-time feedforward control, ensuring smooth frequency convergence at zero crossings. It is physically achievable.

[0150] Design principle: "Use Formula 1 for the boundary and Formula 2 for the feedforward." The two work together to form a complete feedforward + limiting system.

[0151] Based on the above decoupling control method, a dual closed-loop control system consisting of an outer voltage loop and an inner current loop is constructed:

[0152] (1) Voltage outer loop: sampling DC bus voltage (or AC side voltage amplitude), compared with the given value Comparison, via the voltage outer loop PI regulator (parameters) , Output current amplitude command .

[0153] (2) Generation of the inner current loop command: Phase synchronization with the power grid output of the phase-locked loop Multiply to generate the instantaneous setpoint of the grid-connected current. .

[0154] (3) Current inner loop PI regulation: With grid-side current feedback The error is processed by the inner current loop PI regulator, and the output frequency correction is calculated. (Non-effective width correction, non-outward phase angle).

[0155] (4) Effective width feedforward calculation: The nominal effective width is calculated from step A2. .

[0156] (5) Effective width composition: (Pure feedforward, no feedback superposition).

[0157] (6) Generation of the inner phase angle:

[0158] (7) Generation of outward phase angle: It is used for PWM phase shift control.

[0159] (8) Calculation of switching frequency: Synthesize the actual switching frequency .

[0160] (9) PWM generation: by , and Generate the drive signal for the full bridge of the primary and secondary sides of the high-frequency transformer - inner phase shift angle Determines the internal driving delay of the primary side and the external phase angle. It determines the phase difference between the primary and secondary sides.

[0161] Control signal flow overview: Voltage outer loop → Current inner loop command → Current inner loop PI output (Frequency correction amount)

[0162] at the same time:

[0163] 1) Feedforward calculation

[0164] 2) Total effective width of the composite: (Without feedback superposition), the corresponding inward phase shift angle is

[0165] 3) Outward phase shift: Write to the PWM phase shift register

[0166] 4) Feedforward frequency:

[0167] 5) Actual frequency: Write to the PWM period register

[0168] This process ensures effective width ( ) and switching frequency ( Complete decoupling provides a clear physical basis for subsequent adaptive compensation.

[0169] S4) Construct a multi-time-scale compensation system: Eliminate steady-state errors caused by model mismatch and parameter perturbations through three time-scale hierarchical compensation mechanisms; the multi-time-scale engineering compensation system includes dead-zone adaptive compensation, line voltage drop feedforward compensation, and online adaptive leakage inductance identification.

[0170] (A) Dead-time adaptive compensation adaptively adjusts the dead time according to the real-time switching frequency and superimposes the dead-time compensation amount in the effective width feedforward;

[0171] To prevent bridge arm shoot-through, a dead time interval must be inserted. Dead time causes the actual output square wave duty cycle to deviate by 50%, resulting in a shift in the equivalent effective width. In frequency converter control, the impact of dead time on the effective width is related to the switching cycle. Inversely proportional:

[0172]

[0173] In the formula, It is the dead zone adaptive compensation amount. It is the real-time switching frequency.

[0174] To ensure reliable ZVS across the entire frequency range and meet the required effective width accuracy, the real-time dead time should decrease linearly with the switching frequency.

[0175]

[0176] In the formula, To at the nominal frequency The minimum safe dead zone measured at (e.g., 100kHz); It is the real-time switching frequency;

[0177] Physical boundary constraints: At low frequencies (50kHz), the dead time is automatically widened to provide a longer dead time to complete the charging and discharging of the hysteresis bridge arm junction capacitance; at high frequencies (100kHz), the dead time is automatically compressed to avoid serious loss of effective duty cycle due to excessive dead time.

[0178] Introduce a dead-time compensation term in the effective width feedforward instruction:

[0179]

[0180] The compensation amount is directly superimposed on the phase comparison register of the ePWM in each PWM cycle of the DSP to ensure that the actual voltage phase difference between the primary and secondary sides of the transformer strictly follows the control command.

[0181] (B) Line voltage drop feedforward compensation is to correct the effective width feedforward based on the equivalent resistance of the power transmission path and the active power command;

[0182] In actual systems, the power transmission path contains the on-resistance of the switching transistors. Transformer winding copper resistance Line parasitic resistance Non-ideal factors, such as these, cause the actual output current to be lower than the theoretical value. This solution employs voltage feedforward compensation based on power command.

[0183]

[0184] In the formula, It's line voltage drop. It is the equivalent resistance of the power transmission path. It is an active power command. It is the effective value of the grid voltage.

[0185] This voltage drop is added to the low-side voltage. Based on the equivalent value, the effective width feedforward formula is modified as follows:

[0186]

[0187] In the formula, It is the feedforward compensation amount for line voltage drop. This is the compensation amount calculated back to the original edge. This compensation does not require adding a sensor; it only requires adding a multiplication operation in the software.

[0188] Simplified implementation: The compensation surface is constructed using an offline two-dimensional lookup table method, and compensation is performed in segments according to power level.

[0189] (C) The online adaptive identification of leakage inductance uses the integral term of the current inner loop PI regulator as a model error indicator, slowly updates the leakage inductance estimate and injects it into the effective width feedforward calculation in real time, and applies physical boundary constraints to the identification results.

[0190] Feedforward frequency calculation is highly dependent on nominal leakage inductance However, the leakage inductance of the ferrite core varies significantly with temperature and DC bias current (up to ±20%), leading to a mismatch in the feedforward model.

[0191] This scheme utilizes the integral term of the current inner-loop PI regulator. As a model error indicator:

[0192] (1) If the feedforward model is accurate, the integral term should approach zero over a long period of time.

[0193] (2) If the integral term continues to accumulate in a positive direction ( This indicates that the actual current is lower than the commanded current, suggesting that the actual leakage inductance is lower than the commanded current. Greater than the nominal value

[0194] (3) Conversely, it is less than the nominal value.

[0195] Construct an adaptive update law with a slow time scale (update period of 1kHz, much slower than the 50kHz control period):

[0196]

[0197] In the formula, This is the leak sensing estimate for the k-th update cycle. This is the integral component of the current loop PI (after per-unit scaling). For adaptive coefficients (recommended value: 10) -4 ~10 -3 ).

[0198] To prevent core saturation or identification divergence, hard physical boundary constraints are applied:

[0199]

[0200] The identified In the actual calculation of effective width feedforward:

[0201]

[0202] This mechanism frees the integral term of the PI regulator from the burden of "eliminating large model errors," and instead focuses solely on suppressing high-frequency disturbances, greatly improving the system's robustness to temperature drift and device consistency.

[0203] S5) The Deep Deterministic Policy Gradient (DDPG) algorithm is used to train the agent offline. The system voltage and current error and the operating state are used as the state space, and the PI parameter increment and the frequency conversion linearization coefficient increment are output.

[0204] DDPG agent design

[0205] State space (6 dimensions):

[0206]

[0207] in For voltage error, The rate of change of voltage error. For current error, The current switching frequency, For output power, This is the current effective width feedforward value.

[0208] Action space (4-dimensional continuity):

[0209]

[0210] in , This represents the increment of the voltage outer loop PI parameter. This represents the increment of the proportional gain of the inner current loop. This is the correction amount for the frequency conversion linearization parameter m.

[0211] Reward function:

[0212]

[0213] in ~ These are the weighting coefficients. This is an estimate of the instantaneous efficiency.

[0214] The Actor network structure consists of two fully connected layers, each with 32 neurons. The input layer is 6-dimensional, and the output layer is 4-dimensional. The activation function is ReLU. The output layer uses Tanh to normalize the action to [-1, 1] and then maps it to the actual range proportionally.

[0215] The Critic network structure consists of two fully connected layers with 32 neurons per layer. The input is a concatenation of state and action (10-dimensional), and the output is the Q-value.

[0216] Offline training: In the PSIM+Python (or MATLAB / Simulink) co-simulation environment, randomly change parameters such as load (10%~100%), input voltage (25~60V), leakage inductance (nominal value ±30%), and temperature (25~100°C) to train for 2000~5000 episodes until reward convergence.

[0217] Training process:

[0218] (1) Initialize the DAB inverter simulation model and set random operating conditions;

[0219] (2) In each control cycle, the agent observes the state S and selects action A;

[0220] (3) Execute the action, update the controller parameters, and run one control cycle;

[0221] (4) Calculate the reward R and store the experience (S,A,R,S') in the experience replay pool;

[0222] (5) Randomly sample small batches from the experience replay pool to update the Actor and Critic networks;

[0223] (6) Repeat until convergence;

[0224] S6) The trained Actor network is quantized and deployed to the digital signal processor, periodically inferring and updating the controller parameters online, and a safe rollback mechanism is set.

[0225] Model Quantization and Deployment: Perform 8-bit symmetric quantization on the trained Actor network:

[0226]

[0227] in, Specify the quantization step size. Generate a header file (.h) containing the quantization weights, biases, and dequantization factors.

[0228] The quantized model size is less than 10KB, which meets the storage limitations of low-cost DSPs.

[0229] DSP inference engine implementation: In the interrupt service routine of the DSP (such as TMS320F28035), DDPG inference is executed once every N PWM cycles (e.g., 100 cycles, corresponding to 1kHz).

[0230] / / DDPG inference function (INT8 quantization version)

[0231]

[0232] The single inference time is <80μs (72μs measured), which meets the real-time requirements of the 10kHz control interrupt (100μs per cycle, with a 28% margin).

[0233] Security monitoring and rollback mechanism: Set up a security monitoring module to monitor the parameter increments output by DDPG.

[0234] Safety range constraints:

[0235]

[0236]

[0237]

[0238]

[0239] Rollback logic: If the increment of the DDPG output parameter causes any parameter to exceed the safe range, the last valid parameter will be used automatically; the abnormal flag will be set and the over-limit information will be recorded; if the limit is exceeded 3 times in a row, the DDPG inference engine will be shut down, the classic PI parameter (offline tuning value) will be switched, and the system alarm will be triggered; the DDPG mode will be restored after manual confirmation.

[0240] The above control algorithm is encapsulated as a configurable software component:

[0241]

[0242] Each component is connected through a standardized data flow interface, and supports the selection of topology type (single-phase DAB, three-phase 3-1MC, SST) and main control chip through YAML configuration files, automatically generating embedded project code.

[0243] Multi-module series voltage equalization control (solid-state transformer extension)

[0244] Figure 3 The diagram illustrates a comparison of power transfer characteristics before and after frequency conversion linearization and decoupling according to the present invention. Curve 1 (dashed line) is the power-effective width curve (nonlinear) under traditional fixed-frequency SPS / EPS modulation, while curve 2 (solid line) is the approximately linear curve under the present invention's effective width feedforward + frequency closed-loop correction. The effective width is approximately linear within the range of 0~0.5, and the equivalent proportional coefficient after linearization greatly simplifies the control design.

[0245] Figure 4The multi-timescale compensation system architecture diagram of the present invention is shown. From left to right, it is: cycle-scale dead zone adaptation (compensating for dead zone effect and ensuring full-band ZVS), millisecond-scale voltage drop feedforward (compensating for steady-state amplitude error caused by line resistance), second-scale leakage inductance identification (correcting model mismatch caused by core parameter temperature drift and saturation), and finally outputting the compensated effective width feedforward value.

[0246] Figure 5 The schematic diagram of the modular DSP software architecture of this invention is shown, including a hardware layer (TMS320F28035 DSP, signal conditioning circuit, driver circuit, protection circuit), a peripheral driver layer (ePWM driver, ADC driver, eCAP driver, SCI / CAN driver, GPIO driver), an algorithm and application component layer (FreqLinearDualLoop, DDPGInference, PhaseShiftModulator, DeadTimeAdaptive, LeakageAdaptive, LineDropComp, SOGI-PLL, Protection), an application layer (state machine management, fault protection handling, communication management, host computer monitoring, parameter configuration), as well as a YAML configuration file and code generator, which ultimately generates CCS / Keil / IAR embedded integrated development environment project files.

[0247] Multiple DAB modules are connected in series at their inputs and in parallel at their outputs (ISOP, Input-Series Output-Parallel) to form a solid-state transformer suitable for medium-voltage AC input. The AC input terminals of each module are connected in series to the medium-voltage power grid to share the voltage; the DC output terminals of each module are connected in parallel to form a common low-voltage DC bus (e.g., 750V).

[0248] Example: 1000W single-phase DAB bidirectional inverter

[0249] Main circuit parameters: Figure 1 This is a block diagram of the effective width feedforward and frequency closed-loop decoupling control of the single-stage DAB bidirectional inverter of the present invention. Figure 1 The power circuit in the circuit mainly consists of a primary-side full-bridge circuit, a high-frequency transformer, and a secondary-side full-bridge circuit. The primary-side full-bridge circuit consists of four switching transistors, S1 to S4, with a photovoltaic module (PV) and a filter capacitor (C) connected in parallel at the DC input. pv The midpoint of the bridge arm is connected to the primary side of the high-frequency transformer. The secondary side of the high-frequency transformer is connected to the midpoint of the bridge arm of the bidirectional full-bridge topology, from S5 to S6. 12 It consists of 8 switching transistors, and the output of the secondary-side full-bridge circuit is connected to the grid through an LC filter. The low-voltage side has a DC input of 25~60V (battery / photovoltaic), and the high-voltage side has an AC input of 240V / 50Hz. The transformer turns ratio n=7.5 (secondary:primary). The total equivalent leakage inductance is... =37.7μH (34μH resonant inductance + 3.7μH transformer leakage inductance), switching frequency range 50kHz~100kHz. Main control chip TMS320F28035 (60MHz main frequency, fixed-point DSP).

[0250] Step S1) Effective width feedforward and frequency closed-loop parameter design: Set phase shift index =0.25, linearization parameter Maximum switching frequency =100kHz, minimum switching frequency =50kHz.

[0251] Nominal effective width feedforward calculation:

[0252]

[0253] The corresponding inward phase angle is It is used to generate the internal drive signal delay of the primary side full bridge.

[0254] Feedforward frequency calculation:

[0255]

[0256] Step S2) Dead zone adaptive parameter calibration, under rated operating conditions ( =100kHz, At 25V and P=1000W, the optimal dead time for all switching transistors to achieve ZVS was determined by experimentally scanning different dead times. =500ns.

[0257] Adaptive law:

[0258] Limiting range: 200ns~800ns.

[0259] Step S3) Line voltage drop compensation coefficient calibration: Offline measurement of equivalent resistance ≈0.05Ω, compensated in segments according to power level:

[0260]

[0261] Step S4) DDPG training, such as Figure 2 The process shown trains 3000 episodes in a PSIM+Python environment, with 6-dimensional states. , , , , , ), the action is 4-dimensional ( , , , ), reward function weights =1.0, =0.5, =0.01, =0.01, =0.1. After training until the reward converges, extract the floating-point weights of the Actor network.

[0262] Step S5) Quantization and Deployment: Use 8-bit symmetric quantization to generate actor_weights_int8.h (approximately 8.2KB). Write the inference function, and the measured single inference time is 72μs (including state preprocessing and postprocessing), which meets the real-time requirements of 10kHz interrupt (100μs cycle).

[0263] Step S6) Real-time control operation: DDPG inference is called every 100 cycles (approximately 1 kHz) during the 10 kHz interrupt to update the controller parameters. Feedforward calculation, frequency synthesis, and PWM update are performed in each PWM cycle.

[0264] Step S7) Performance test results: Figure 6 For the present invention to operate under rated conditions (input voltage V) dc =48V, output power P o =1000W, mains voltage The simulation waveforms of key nodes are shown below. The simulation was performed in the MATLAB / Simulink environment. Figure 6 (a)(b) It can be seen that the grid-connected current With grid voltage The circuit is in phase and frequency, with a power factor of 0.998, and the current waveform exhibits high sinusoidality and no significant distortion. FFT analysis shows that the grid-connected current THD is 2.8%, meeting the requirements of the IEEE 519 grid connection standard. Figure 6 (c)(f) show the transformer primary voltage V p The three-level PWM waveform, the voltage is +V within one switching cycle. dc , 0, -V dc The switching between the three levels, with the width of the intermediate level dynamically changing according to the effective width command, verifies the physical mechanism of the present invention that controls the effective width by shifting the phase angle inward. Figure 6 (d) represents the switching frequency f. s The waveform approaches the lower limit frequency f at its peak. s,min =50kHz, approaching the upper limit frequency f near the current zero-crossing point. s,max =100kHz, the waveform is smooth and without jumps, which verifies the effectiveness of frequency conversion linearization control. Figure 6 (e) is the effective width The waveform is a half-wave of the absolute value of a sine wave calculated by pure open-loop feedforward, without any feedback correction component. The waveform is in phase with the grid-connected current command, verifying the core feature of this invention: "decoupling control of effective width pure open-loop feedforward and frequency closed-loop correction." A comparison of this invention's scheme with the fixed PI scheme is shown in the table below.

[0265]

[0266] Figure 7 The simulation results show the self-tuning method for DDPG parameters of this invention. Figure 7 (a) shows the training reward curve. The reward increases monotonically and then stabilizes, which verifies the effectiveness of DDPG learning. Figure 7 (b)(c) The voltage and current responses after optimization by fixed PI and DDPG were compared. After optimization by DDPG, the overshoot was smaller, the tracking error was smaller, and the current THD was reduced from 2.8% to 1.38%. Figure 7 (d) illustrates the adaptive evolution process of the PI parameter, which gradually converges from its initial value to the optimum. Figure 7 (e) shows the comparison of settling time under different power conditions. DDPG outperforms fixed PI across the entire power range, verifying the generalization ability of the agent. Figure 7 (f) shows the cumulative curves of the contributions of each component of the reward function, verifying the rationality of the reward function design. The above results verify the effectiveness of the DDPG parameter self-tuning method of this invention.

[0267] Step S8) Safety monitoring: When DDPG output causes K pv When the value exceeds the range [0.001, 0.1], automatic amplitude limiting and a warning will be recorded. If the limit is exceeded three times consecutively, DDPG inference will be disabled, and the system will switch to classic PI parameters (K). pV =0.00942, K iV =5.92).

[0268] Step S9: Constructing a solid-state transformer based on multi-module expansion: multiple such Figure 1 The power circuit modules can be constructed by connecting the AC input ports in series and the DC side in parallel to form a single-stage solid-state transformer. For example... Figure 8 The top left corner shows the three-phase SST structure based on this module. Figure 8 The total effective voltage value V shown g,total The effective voltage value V of each module gi,rmsThe sum of (i=1,2…N) (in the ideal case of in-phase); the positive terminal of each module's DC output port is connected to the positive terminal and the negative terminal is connected to the negative terminal to form a common DC bus; each module exchanges voltage RMS value, power, and status information with the main controller via the CAN bus; the main controller issues parameter adjustment commands based on voltage RMS value deviation to each module according to the voltage equalization algorithm; when hardware protection is triggered, a blocking signal is directly sent to the PWM driver of the corresponding module (independent of DSP, pure hardware path).

[0269] This embodiment uses the transfer of energy from the AC side to the DC side (rectifier mode) as an example for explanation. When energy is transferred in the reverse direction from the DC bus to the AC grid (inverter mode), the physical connection relationship of each module remains unchanged (e.g., Figure 9 As shown in the figure, reversing the polarity of the outer voltage loop in the control strategy can adapt to bidirectional power flow, and the voltage equalization control principle is also applicable.

[0270] Two (or more) DAB modules of the same specifications are connected in series at the input and parallel at the output (ISOP) configuration to form a solid-state transformer suitable for medium-voltage AC input. The AC input terminals of each module are connected in series to the medium-voltage power grid to share the voltage; the DC output terminals of each module are connected in parallel to form a common low-voltage DC bus. Each module operates independently using the single-module control method described in steps S1 to S8, and multi-module voltage equalization control is superimposed on this method.

[0271] Figure 8 The specific connection methods between the various SST modules are as follows: Figure 9 As shown, the multi-module solid-state transformer includes N identical single-stage DAB bidirectional inverter modules. The ellipsis in the figure represents the remaining identical intermediate modules. Each module includes a DC-side support capacitor C. pv A DC-side full-bridge circuit consisting of switching transistors S1~S4, a high-frequency isolation transformer, and an equivalent leakage inductance L. lk , by switching transistors S5~S 12 The AC side back-to-back bidirectional full bridge is constructed, and the filter inductor L... f and filter capacitor C fThe circuit is configured as an AC-side filter circuit. The DC-side ports of each module are connected to a common DC bus, with the positive and negative terminals interconnected to form a parallel DC-side structure. The AC-side ports of each module are connected in series, with the AC output of the preceding module connected to the AC input of the following module. The remaining AC ports of the first and Nth modules are connected to the two ends of the medium-voltage AC power grid. When energy is transferred from the medium-voltage AC side to the common DC bus, the above connection manifests as a series connection on the AC input side and a parallel connection on the DC output side, i.e., a series input and parallel output structure. When energy is transferred in the reverse direction from the common DC bus to the AC power grid, it manifests as parallel energy extraction on the DC side and series voltage stacking on the AC side. The physical connection relationship of each module remains unchanged under both power flow conditions.

[0272] (1) Physical principle of equalization

[0273] The AC inputs of each module are connected in series, so the instantaneous input current flowing through each module is exactly the same. The AC input voltage received by each module is proportional to its equivalent input impedance. By adjusting the transmission power of each module, its equivalent input impedance can be changed, thereby adjusting the AC voltage received by each module: if the AC voltage received by a module is too high, it means its equivalent impedance is too large, and its transmission power should be increased to reduce the equivalent impedance, thus reducing its voltage division; if the AC voltage received by a module is too low, it means its equivalent impedance is too small, and its transmission power should be decreased to increase the equivalent impedance, thus increasing its voltage division. Therefore, the physical way to achieve voltage equalization is to change the equivalent input impedance by adjusting the average power transmitted by each module, thereby making the AC input voltage received by each module more consistent.

[0274] (2) Pressure equalization control target

[0275] The goal of voltage equalization control is to make the effective values ​​of the AC input voltage of each module tend to be consistent, that is:

[0276]

[0277] The error signal for each module is defined as the deviation between the effective value of the local AC input voltage and the current global average value:

[0278]

[0279] Since AC power has a fluctuation of twice the power frequency, the effective value calculation window is set to 20ms (one power grid cycle), and a sliding window is used for updating to avoid misadjustment caused by instantaneous fluctuations.

[0280] (3) Implementation of pressure equalization control strategy

[0281] Each module sends its status information to the main controller via the CAN bus at a period of 1kHz. The main controller receives the effective voltage values ​​uploaded by all modules, calculates the global average value, and sends voltage effective value deviation commands to each module. Each module adjusts its control parameters according to the received deviation commands: if the local voltage is lower than the average value, the frequency conversion linearization parameter is decreased or the effective width feedforward coefficient is increased; if the local voltage is higher than the average value, the frequency conversion linearization parameter is increased or the effective width feedforward coefficient is decreased. The voltage equalization loop update period is set to 10ms, which is much slower than the switching cycle (20μs) and the current inner loop control cycle (100μs).

[0282] 1) Information Interaction: Each module sends its local status information to the main controller via the CAN bus at a period of 1kHz (broadcast once every 1ms), including: the effective value of the AC input voltage. Current transmission power P i Current switching frequency Module operating status (normal / fault / bypass).

[0283] 2) Main controller calculation and command issuance: The main controller (which can be concurrently used by module 1 or set independently) receives the effective voltage values ​​uploaded by all modules and calculates the global average value. It also sends voltage RMS deviation instructions to each module. .

[0284] 3) Local execution of each module: Each module executes according to the received... Adjust the control parameters of this module:

[0285]

[0286] Where m is the frequency conversion linearization parameter defined in this invention.

[0287] 4) Voltage equalization loop control cycle: The voltage equalization loop update cycle is set to 10ms (i.e., deviation calculation and parameter adjustment are performed every 10ms), which is much slower than the switching cycle (20μs) and the current inner loop control cycle (100μs). This slow loop is only used to eliminate static voltage imbalance caused by parameter differences between modules and does not affect the fast dynamic response performance of a single module.

[0288] (4) Three-level overvoltage protection system: To address the instantaneous overvoltage that may be caused by the response delay of the equalizing ring, a three-level protection system is constructed:

[0289]

[0290] 1) Hardware protection against instantaneous overvoltage

[0291] Because the voltage equalization ring is a slow ring (10ms level), during sudden load changes or startup transients, a module may momentarily receive excessively high voltage due to parameter differences. Therefore, fast input overvoltage protection must be implemented at the hardware level.

[0292]

[0293] 2) Software-assisted rapid pressure limiting

[0294] Before hardware protection is triggered, a fast voltage limiting loop is set up at the software level as a second line of defense:

[0295]

[0296] The software voltage limiting response is faster than the equalization ring (10ms) but slower than the hardware protection (10μs). The three form a three-level protection system: hardware protection (μs level) → software voltage limiting (100μs level) → equalization ring (10ms level).

[0297] (5) Fault redundancy and system derating: If a module exits operation due to a fault: After the main controller detects that the module has no heartbeat signal (no CAN data received for 5 consecutive times), it marks the module as faulty; the main controller recalculates the average voltage target of the remaining modules:

[0298]

[0299] Where M is the number of faulty modules;

[0300] Each normal module automatically adjusts its control parameters and redistributes the voltage; the system continues to operate at reduced capacity (output power is reduced accordingly) as long as the number of faulty modules does not exceed 1 / 3 of the total number of modules; after the fault is recovered, the main controller detects that the module is back online, automatically redistributes the voltage, and restores full capacity operation.

[0301] (6) Coordination with DDPG parameter self-tuning: In multi-module operation scenarios, the state space of the DDPG agent is expanded from the original 6 dimensions to 7 dimensions:

[0302]

[0303] Among the newly added dimensions This represents the deviation between the effective value of the AC input voltage of this machine and the global average value.

[0304] The output action is expanded from the original 4-dimensional to 5-dimensional:

[0305]

[0306] Among them, the new output This is the equalization correction coefficient, used to fine-tune the equalization response intensity of this module, realizing joint self-tuning of equalization control and single-module efficiency optimization.

[0307] The reward function adds an equalization term to the original function:

[0308]

[0309] in, As a voltage equalization penalty, it encourages the agent to optimize efficiency while also ensuring voltage balance between modules.

[0310] Figure 10 This is the simulation verification result of the DDPG and equalizing ring of the present invention. Figure 10 (a) shows that the effective values ​​of the AC input voltage of the three modules are gradually equalized to the target value after DDPG activation. Module 1 drops from 113.5V to about 110V, and module 3 rises from 106.5V to about 110V. Figure 10 (b) The voltage imbalance was reduced from approximately 3.2% to 0.2%, verifying the effectiveness of the voltage equalization control; Figure 10 (c) Shows the voltage deviation of each module The convergence to near zero indicates that the voltages of each module are becoming more consistent; Figure 10 (d) shows the equalization correction factor of the DDPG output. The gain gradually decreased from 1.0 and stabilized at about 0.92, showing an adaptive adjustment process, which reflects the dynamic characteristics of the agent to optimize the gain of the equalizing loop in real time according to the voltage deviation. Figure 10 (e) The system efficiency gradually increased from approximately 91.7% to 94.8% after DDPG activation, verifying the effectiveness of the equalization penalty term. Guide the agent to optimize efficiency while ensuring the effectiveness of voltage balancing; Figure 10 (f) demonstrates the expansion of the DDPG state space from 6 dimensions to 7 dimensions (new addition). A schematic diagram of the dimension. The above results verify the effectiveness of the DDPG and equalizing ring coordinated control method described in step S9(6) of the present invention.

[0311] (7) Measured Results: To verify the effectiveness of the equalization control principle, a three-module scaled-down test platform was built. The three modules were connected in ISOP mode: the AC input side was supplied with 330V / 50Hz AC power by a single-phase voltage regulator. The AC ports of the three modules were connected in series and then connected to the output of the voltage regulator. The total series voltage was 330V, and each module received about 110V, which met the performance boundary in Table I (110Vrms AC input for a single module). The positive terminal of the DC output side was connected to the positive terminal and the negative terminal was connected to the negative terminal, forming a common DC bus voltage (V). dc=400V). Each module exchanges voltage information via CAN bus at a rate of 500kbps, the DSP control cycle is 10kHz, and the voltage equalization ring update cycle is 10ms. The measured results are shown in the table below:

[0312] The measured results are shown in the table below:

[0313]

[0314] The experimental results show that the steady-state voltage equalization accuracy is better than 2.1%, slightly lower than the simulated value (0.1%). The difference is mainly due to non-ideal factors such as hardware sampling accuracy and communication delay. The voltage equalization convergence time is about 220ms, which is basically consistent with the simulated value (<200ms). The hardware overvoltage protection response time is less than 5μs, verifying the speed of the first-level hardware in the three-level protection system. After a single module failure, the remaining modules can complete voltage redistribution within about 220ms, verifying the effectiveness of fault redundancy and system derating mechanism. The above experimental results generally verify the following: Figure 10 Simulation results demonstrate the engineering feasibility of the ISOP voltage equalization control and three-level protection system of this invention on a practical hardware platform. The comparison between simulation and actual measurements is shown in the table below:

[0315]

[0316] (8) Extended Explanation: The multi-module ISOP series voltage equalization control method described in this step is not limited to three modules and can be extended to any N modules (N≥3) constituting a solid-state transformer system. As the number of modules increases, the CAN bus communication load also increases. The information broadcast period can be appropriately extended (e.g., when N>8, the period is adjusted from 1kHz to 500Hz), and the design principle of CAN bus load rate not exceeding 30% should be adopted. The convergence time of the voltage equalization ring is approximately linearly related to the number of modules. If the measured convergence time is <350ms when N=4 and <600ms when N=8, both are within acceptable ranges.

[0317] The above description of the embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. It should be noted that those skilled in the art can make several improvements and modifications to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A method for frequency conversion decoupling and reinforcement learning adaptive control of a single-stage DAB inverter, characterized in that, Includes the following steps: S1) Define three key control variables: Define the effective width as the equivalent pulse width of the three-level waveform of the primary voltage; The inner phase shift angle is defined as the phase difference between the drive signals of the two bridge arms inside the primary side full bridge on the low-voltage side; the outer phase shift angle is defined as the phase difference between the corresponding switch drive signals of the primary side full bridge and the secondary side full bridge. S2) The effective width pure open-loop feedforward quantity is calculated based on the grid-connected current reference command, and the feedforward frequency is calculated by the frequency conversion linearization function after the effective width is used; S3) Use the output of the inner current loop PI regulator as the frequency correction value, and combine the feedforward frequency and the frequency correction value according to the negative feedback polarity to obtain the actual switching frequency. S4) Construct a multi-timescale compensation system: Eliminate steady-state errors caused by model mismatch and parameter perturbation through three time-scale hierarchical compensation mechanisms; S5) The agent is trained offline using a deep deterministic strategy gradient algorithm. The system voltage and current error and the operating state are used as the state space, and the PI parameter increment and the frequency conversion linearization coefficient increment are output. S6) The trained Actor network is quantized and deployed to the digital signal processor, periodically inferring and updating the controller parameters online, and a safe rollback mechanism is set.

2. The method for frequency conversion decoupling and reinforcement learning adaptive control of a single-stage DAB inverter according to claim 1, characterized in that, S1) specifically includes: defining the effective width. Primary voltage The equivalent pulse width of a three-level waveform is determined by the inner phase shift angle α. ; The inner phase shift angle α is the phase difference between the driving signals of the two bridge arms inside the primary side of the full bridge. Normalized, with values ​​ranging from 0 to 0.5; The outer phase angle The phase difference between the corresponding switching transistor drive signals of the primary and secondary full-bridge circuits of the high-frequency transformer is given by the following relationship: ,in This is the phase shift index.

3. The method for frequency conversion decoupling and reinforcement learning adaptive control of a single-stage DAB inverter according to claim 1, characterized in that, S2) specifically includes: Calculation of effective width pure open-loop feedforward: ； in, For transformer turns ratio, For the total equivalent leakage, Maximum switching frequency, This is a current amplitude command. This is the sampled value of the DC bus voltage. The angular frequency of the power grid; Actual effective width It contains no feedback correction component; the corresponding inner phase shift angle is , used to generate PWM drive signals; Feedforward frequency calculation: Substitute the calculated effective bandwidth into the frequency conversion linearization function to obtain the feedforward frequency: ； in, For linearization parameters, The phase shift index; In real-time feedforward control, at the zero crossing point Frequency smoothing approaches The frequency waveform is a smooth bias sine wave.

4. The method for frequency conversion decoupling and reinforcement learning adaptive control of a single-stage DAB inverter according to claim 1, characterized in that, S3 specifically includes: Calculate the frequency correction: The output of the inner current loop PI regulator is directly used as the switching frequency correction. : ； in, For current tracking error, , These are the proportional gain and integral gain of the current loop, respectively. Actual switching frequency synthesis: The actual switching frequency acting on the system is a linear superposition of the feedforward frequency and the feedback correction. ； Hardware constraints and limits: ,in Determined by core saturation and audio noise constraints, Determined by power transmission capability and switching loss constraints; Limiting strategy: When At that time, the frequency is clamped to At the same time, the integral term shrinks; when At that time, the frequency is clamped to At the same time, the output power command is saturated.

5. The method for frequency conversion decoupling and reinforcement learning adaptive control of a single-stage DAB inverter according to claim 1, characterized in that, S4) specifically includes: the multi-time-scale engineering compensation system includes dead-zone adaptive compensation, line voltage drop feedforward compensation, and online adaptive leakage inductance identification. The dead-time adaptive compensation adaptively adjusts the dead-time based on the real-time switching frequency, and the dead-time compensation amount is superimposed in the effective width feedforward. Dead time adaptively adjusts with switching frequency: ； In the formula, To at the nominal frequency The minimum safe dead zone measured below; It is the real-time switching frequency; The dead-time compensation is also superimposed in the effective width feedforward instruction: ; The line voltage drop feedforward compensation is a correction of the effective width feedforward based on the equivalent resistance of the power transmission path and the active power command. The line voltage drop feedforward compensation is as follows: ； in, It's line voltage drop. , It is the equivalent resistance of the power transmission path. It is an active power command. It is the effective value of the grid voltage; This is the compensation amount converted back to the original edge; The online adaptive identification of leakage inductance uses the integral term of the current inner loop PI regulator as a model error indicator, slowly updates the leakage inductance estimate and injects it into the effective width feedforward calculation in real time, and applies physical boundary constraints to the identification results. Leakage inductance online adaptive identification is as follows: ； in, This is the integral component of the current inner-loop PI regulator. As adaptive coefficients, the identification results are injected into the effective width feedforward calculation in real time, and physical boundary constraints are applied. .

6. The method for frequency conversion decoupling and reinforcement learning adaptive control of a single-stage DAB inverter according to claim 1, characterized in that, The state space of the agent trained offline by the deep deterministic policy gradient algorithm described in S5) includes voltage error, voltage error rate of change, current error, current switching frequency, output power, and current effective width feedforward value; the action space includes voltage outer loop PI parameter increment, current inner loop proportional gain increment, and frequency conversion linearization coefficient increment; the reward function is composed of a weighted sum of voltage error penalty term, current error penalty term, switching frequency penalty term, power tracking reward term, and efficiency reward term; The reward function for a deep deterministic policy gradient agent is: ； in ~ These are the weighting coefficients. This is an estimate of the instantaneous efficiency.

7. The method for frequency conversion decoupling and reinforcement learning adaptive control of a single-stage DAB inverter according to claim 1, characterized in that, As described in S6), the trained Actor network is quantized and deployed to a digital signal processor, specifically using 8-bit symmetric quantization. The header file generated by the 8-bit symmetric quantization includes quantization weights, biases, and dequantization factors. Only integer multiplication and addition operations are used during inference, and the single inference time is less than 80μs.

8. The method for frequency conversion decoupling and reinforcement learning adaptive control of a single-stage DAB inverter according to claim 1, characterized in that, The safety rollback mechanism described in S6) is to automatically use the last valid parameter or classic PI parameter and set the abnormal flag when the increment of the gradient output parameter of the deep deterministic strategy causes the PI parameter or frequency conversion linearization coefficient to exceed the preset safety range. If the limit is exceeded multiple times consecutively, the deep deterministic policy gradient inference engine will be shut down and switched to fixed parameter mode.

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